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author | Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org> | 2017-06-16 09:30:43 +0000 |
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committer | Maxim Kuvyrkov <mkuvyrkov@gcc.gnu.org> | 2017-06-16 09:30:43 +0000 |
commit | 9d2c6e2eb72324b10160ce1117a8ab600be94bad (patch) | |
tree | f1b7174e6289a48cb0e9b65a00ac1eca952bec5e /gcc/tree-ssa-loop.c | |
parent | b783399af92647bd0765b9d51afab04dea31344b (diff) | |
download | gcc-9d2c6e2eb72324b10160ce1117a8ab600be94bad.zip gcc-9d2c6e2eb72324b10160ce1117a8ab600be94bad.tar.gz gcc-9d2c6e2eb72324b10160ce1117a8ab600be94bad.tar.bz2 |
Add prefetch configuration to aarch64 backend.
* config/aarch64/aarch64-protos.h (struct cpu_prefetch_tune):
New tune structure.
(struct tune_params): Use cpu_prefetch_tune instead of cache_line_size.
[Unrelated to main purpose of the patch] Place the pointer field last
to enable type checking errors when tune structure are wrongly merged.
* config/aarch64/aarch64.c (generic_prefetch_tune,)
(exynosm1_prefetch_tune, qdf24xx_prefetch_tune,)
(thunderx2t99_prefetch_tune): New tune constants.
(tune_params *_tunings): Update all tunings (no functional change).
(aarch64_override_options_internal): Set PARAM_SIMULTANEOUS_PREFETCHES,
PARAM_L1_CACHE_SIZE, PARAM_L1_CACHE_LINE_SIZE, and PARAM_L2_CACHE_SIZE
from tunings structures.
Change-Id: I1ddbac1863dcf078a2e5b14dd904debc76a7da94
From-SVN: r249240
Diffstat (limited to 'gcc/tree-ssa-loop.c')
0 files changed, 0 insertions, 0 deletions