diff options
| author | Jonathan Wright <jonathan.wright@arm.com> | 2021-08-16 14:37:18 +0100 |
|---|---|---|
| committer | Jonathan Wright <jonathan.wright@arm.com> | 2021-08-17 11:44:37 +0100 |
| commit | d1819df86fbe42125cccb2fc2959a0bf51e524d6 (patch) | |
| tree | 1b2e13c465d8b6c4cf046b0cac740a7120c0b6e4 /gcc/tree-ssa-loop-unswitch.c | |
| parent | 08f83812e5c5fdd9a7a4a1b9e46bb33725185c5a (diff) | |
| download | gcc-d1819df86fbe42125cccb2fc2959a0bf51e524d6.zip gcc-d1819df86fbe42125cccb2fc2959a0bf51e524d6.tar.gz gcc-d1819df86fbe42125cccb2fc2959a0bf51e524d6.tar.bz2 | |
aarch64: Remove macros for vld4[q]_lane Neon intrinsics
Remove macros for vld4[q]_lane Neon intrinsics. This is a preparatory
step before adding new modes for structures of Advanced SIMD vectors.
gcc/ChangeLog:
2021-08-16 Jonathan Wright <jonathan.wright@arm.com>
* config/aarch64/arm_neon.h (__LD4_LANE_FUNC): Delete.
(__LD4Q_LANE_FUNC): Likewise.
(vld4_lane_u8): Define without macro.
(vld4_lane_u16): Likewise.
(vld4_lane_u32): Likewise.
(vld4_lane_u64): Likewise.
(vld4_lane_s8): Likewise.
(vld4_lane_s16): Likewise.
(vld4_lane_s32): Likewise.
(vld4_lane_s64): Likewise.
(vld4_lane_f16): Likewise.
(vld4_lane_f32): Likewise.
(vld4_lane_f64): Likewise.
(vld4_lane_p8): Likewise.
(vld4_lane_p16): Likewise.
(vld4_lane_p64): Likewise.
(vld4q_lane_u8): Likewise.
(vld4q_lane_u16): Likewise.
(vld4q_lane_u32): Likewise.
(vld4q_lane_u64): Likewise.
(vld4q_lane_s8): Likewise.
(vld4q_lane_s16): Likewise.
(vld4q_lane_s32): Likewise.
(vld4q_lane_s64): Likewise.
(vld4q_lane_f16): Likewise.
(vld4q_lane_f32): Likewise.
(vld4q_lane_f64): Likewise.
(vld4q_lane_p8): Likewise.
(vld4q_lane_p16): Likewise.
(vld4q_lane_p64): Likewise.
(vld4_lane_bf16): Likewise.
(vld4q_lane_bf16): Likewise.
Diffstat (limited to 'gcc/tree-ssa-loop-unswitch.c')
0 files changed, 0 insertions, 0 deletions