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| author | Joe Ramsay <Joe.Ramsay@arm.com> | 2020-08-19 12:34:06 +0000 |
|---|---|---|
| committer | Joe Ramsay <joe.ramsay@arm.com> | 2020-08-20 15:27:09 +0000 |
| commit | 91d206adfe39ce063f6a5731b92a03c05e82e94a (patch) | |
| tree | c3a8f26e20ff9b23e0b00fddc29a4dd7dc152dfb /gcc/tree-ssa-loop-split.c | |
| parent | f9b9832837b65046a8f01c18597cf615ff61db40 (diff) | |
| download | gcc-91d206adfe39ce063f6a5731b92a03c05e82e94a.zip gcc-91d206adfe39ce063f6a5731b92a03c05e82e94a.tar.gz gcc-91d206adfe39ce063f6a5731b92a03c05e82e94a.tar.bz2 | |
arm: Require MVE memory operand for destination of vst1q intrinsic
Previously, the machine description patterns for vst1q accepted a generic memory
operand for the destination, which could lead to an unrecognised builtin when
expanding vst1q* intrinsics. This change fixes the pattern to only accept MVE
memory operands.
gcc/ChangeLog:
PR target/96683
* config/arm/mve.md (mve_vst1q_f<mode>): Require MVE memory operand for
destination.
(mve_vst1q_<supf><mode>): Likewise.
gcc/testsuite/ChangeLog:
PR target/96683
* gcc.target/arm/mve/intrinsics/vst1q_f16.c: New test.
* gcc.target/arm/mve/intrinsics/vst1q_s16.c: New test.
* gcc.target/arm/mve/intrinsics/vst1q_s8.c: New test.
* gcc.target/arm/mve/intrinsics/vst1q_u16.c: New test.
* gcc.target/arm/mve/intrinsics/vst1q_u8.c: New test.
Diffstat (limited to 'gcc/tree-ssa-loop-split.c')
0 files changed, 0 insertions, 0 deletions