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| author | Alexander Monakov <amonakov@ispras.ru> | 2018-05-23 17:44:10 +0300 |
|---|---|---|
| committer | Alexander Monakov <amonakov@gcc.gnu.org> | 2018-05-23 17:44:10 +0300 |
| commit | 8851a51161fa471eaaa87c4d950b250178703008 (patch) | |
| tree | 86cad335a955cce8ab40d70e8d9fa32794998dec /gcc/tree-ssa-loop-prefetch.c | |
| parent | 52388096c29387af5c2ac70f0a86e76bfbae2f8d (diff) | |
| download | gcc-8851a51161fa471eaaa87c4d950b250178703008.zip gcc-8851a51161fa471eaaa87c4d950b250178703008.tar.gz gcc-8851a51161fa471eaaa87c4d950b250178703008.tar.bz2 | |
extend.texi: update Global Register Variables section
* extend.texi (Global Register Variables): Rewrite the bullet list.
Note that the register is available for allocation. Note that access
via inline asm must use constraints. Add note about async-signal
handlers. Remove paragraph about automagic register selection.
From-SVN: r260610
Diffstat (limited to 'gcc/tree-ssa-loop-prefetch.c')
0 files changed, 0 insertions, 0 deletions