diff options
| author | Kyrylo Tkachov <kyrylo.tkachov@arm.com> | 2017-06-06 13:26:46 +0000 |
|---|---|---|
| committer | Kyrylo Tkachov <ktkachov@gcc.gnu.org> | 2017-06-06 13:26:46 +0000 |
| commit | 4ebcc903bf03705099cd4b50231dc8fe444d70b9 (patch) | |
| tree | c27196f3a87512de1b23e07932cf97bc567d0b4e /gcc/tree-ssa-loop-prefetch.c | |
| parent | 9bd01837e4c9f8f4e005a95a59f0147a6bb1d7c7 (diff) | |
| download | gcc-4ebcc903bf03705099cd4b50231dc8fe444d70b9.zip gcc-4ebcc903bf03705099cd4b50231dc8fe444d70b9.tar.gz gcc-4ebcc903bf03705099cd4b50231dc8fe444d70b9.tar.bz2 | |
[AArch64] Allow const0_rtx operand for atomic compare-exchange patterns
* config/aarch64/atomics.md (atomic_compare_and_swap<mode> expander):
Use aarch64_reg_or_zero predicate for operand 4.
(aarch64_compare_and_swap<mode> define_insn_and_split):
Use aarch64_reg_or_zero predicate for operand 3. Add 'Z' constraint.
(aarch64_store_exclusive<mode>): Likewise for operand 2.
* gcc.target/aarch64/atomic_cmp_exchange_zero_reg_1.c: New test.
From-SVN: r248921
Diffstat (limited to 'gcc/tree-ssa-loop-prefetch.c')
0 files changed, 0 insertions, 0 deletions