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| author | Sheldon Lobo <sheldon.lobo@oracle.com> | 2017-05-18 09:34:26 +0000 |
|---|---|---|
| committer | Sheldon Lobo <smlobo@gcc.gnu.org> | 2017-05-18 09:34:26 +0000 |
| commit | 00a84d0eddec8e671f48e209fffac7c97e6bc4bf (patch) | |
| tree | 3073cf46a77e5e964b3e0c4db99086e8a4fe43b8 /gcc/tree-ssa-loop-prefetch.c | |
| parent | 243c288370fe51ba55c3a9ee61eb2a1a62cb1279 (diff) | |
| download | gcc-00a84d0eddec8e671f48e209fffac7c97e6bc4bf.zip gcc-00a84d0eddec8e671f48e209fffac7c97e6bc4bf.tar.gz gcc-00a84d0eddec8e671f48e209fffac7c97e6bc4bf.tar.bz2 | |
Minor SPARC T4 and M7 fixes and additions.
* config/sparc/sparc.c (sparc_option_override): Set function
alignment for -mcpu=niagara7 to 64 to match the I$ line.
* config/sparc/sparc.h (BRANCH_COST): Set the SPARC M7 branch
latency to 1.
* config/sparc/sparc.h (BRANCH_COST): Set the SPARC T4 branch
latency to 2.
* config/sparc/sol2.h: Fix a ASM_CPU32_DEFAULT_SPEC typo.
* gcc.target/sparc/niagara7-align.c: New test.
From-SVN: r248184
Diffstat (limited to 'gcc/tree-ssa-loop-prefetch.c')
0 files changed, 0 insertions, 0 deletions