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| author | Bin Cheng <bin.cheng@linux.alibaba.com> | 2019-03-04 01:38:25 +0000 |
|---|---|---|
| committer | Bin Cheng <amker@gcc.gnu.org> | 2019-03-04 01:38:25 +0000 |
| commit | c4450491148133f3825470a6c69d90c745986fe8 (patch) | |
| tree | 03e205483e741149342892e40475d2986cbb6741 /gcc/tree-ssa-loop-ivopts.c | |
| parent | 19deb34365246c8dd0bcab74c1637ad2bdf47cca (diff) | |
| download | gcc-c4450491148133f3825470a6c69d90c745986fe8.zip gcc-c4450491148133f3825470a6c69d90c745986fe8.tar.gz gcc-c4450491148133f3825470a6c69d90c745986fe8.tar.bz2 | |
re PR tree-optimization/89487 (ICE in expand_expr_addr_expr_1, at expr.c:7993)
PR tree-optimization/89487
* tree-loop-distribution.c (has_nonaddressable_dataref_p): New.
(create_rdg_vertices): Compute has_nonaddressable_dataref_p.
(distribute_loop): Don't do runtime alias check if there is non-
addressable data reference.
* tree-ssa-loop-ivopts.c (may_be_nonaddressable_p): Check if VAR_DECL
is a register variable.
* gcc/testsuite/gcc.dg/tree-ssa/pr89487.c: New test.
From-SVN: r269361
Diffstat (limited to 'gcc/tree-ssa-loop-ivopts.c')
| -rw-r--r-- | gcc/tree-ssa-loop-ivopts.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/gcc/tree-ssa-loop-ivopts.c b/gcc/tree-ssa-loop-ivopts.c index a4cf64e..a44b4cb 100644 --- a/gcc/tree-ssa-loop-ivopts.c +++ b/gcc/tree-ssa-loop-ivopts.c @@ -2247,6 +2247,10 @@ may_be_nonaddressable_p (tree expr) { switch (TREE_CODE (expr)) { + case VAR_DECL: + /* Check if it's a register variable. */ + return DECL_HARD_REGISTER (expr); + case TARGET_MEM_REF: /* TARGET_MEM_REFs are translated directly to valid MEMs on the target, thus they are always addressable. */ |