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author | Wilco Dijkstra <wdijkstr@arm.com> | 2016-05-26 12:12:20 +0000 |
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committer | Wilco Dijkstra <wilco@gcc.gnu.org> | 2016-05-26 12:12:20 +0000 |
commit | 5e4d7abeeea05faaa19d97c4693d5ae6c660a831 (patch) | |
tree | f45799067e8c25cc5a7b171d2797792aa21d2ef6 /gcc/tree-ssa-loop-ivopts.c | |
parent | ffa8b5523261b1374a62b5d28560e0de8a4c5e75 (diff) | |
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SIMD operations like combine prefer to have their operands in FP registers,
so increase the cost of integer registers slightly to avoid unnecessary int<->FP
moves. This improves register allocation of scalar SIMD operations.
* config/aarch64/aarch64-simd.md (aarch64_combinez):
Add ? to integer variant.
(aarch64_combinez_be): Likewise.
From-SVN: r236770
Diffstat (limited to 'gcc/tree-ssa-loop-ivopts.c')
0 files changed, 0 insertions, 0 deletions