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| author | Michael Meissner <meissner@linux.vnet.ibm.com> | 2018-01-29 22:30:34 +0000 |
|---|---|---|
| committer | Michael Meissner <meissner@gcc.gnu.org> | 2018-01-29 22:30:34 +0000 |
| commit | ce6ecbac46ad1b9b6838e2adfe31ee7441da5524 (patch) | |
| tree | ddc2ba0a978313c55b2e2fbc8a755c71fb068e4e /gcc/tree-ssa-loop-ivcanon.c | |
| parent | 74d82e6b688546121764363c154af4bfe2d480f1 (diff) | |
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re PR target/81550 (gcc.target/powerpc/loop_align.c fails starting with r250482)
2018-01-29 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/81550
* config/rs6000/rs6000.c (rs6000_setup_reg_addr_masks): If DFmode
and SFmode can go in Altivec registers (-mcpu=power7 for DFmode,
-mcpu=power8 for SFmode) don't set the PRE_INCDEC or PRE_MODIFY
flags. This restores the settings used before the 2017-07-24.
Turning off pre increment/decrement/modify allows IVOPTS to
optimize DF/SF loops where the index is an int.
From-SVN: r257166
Diffstat (limited to 'gcc/tree-ssa-loop-ivcanon.c')
0 files changed, 0 insertions, 0 deletions