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| author | H.J. Lu <hongjiu.lu@intel.com> | 2018-10-22 07:25:51 +0000 |
|---|---|---|
| committer | H.J. Lu <hjl@gcc.gnu.org> | 2018-10-22 00:25:51 -0700 |
| commit | 26d50717b8fa7927e62f78092435db0e0c178035 (patch) | |
| tree | af7c6f63613051c9ddfe2123f718f020e1674906 /gcc/tree-ssa-loop-im.c | |
| parent | 0067ddcc0fca060a18243cec30d3d7f3931acbc3 (diff) | |
| download | gcc-26d50717b8fa7927e62f78092435db0e0c178035.zip gcc-26d50717b8fa7927e62f78092435db0e0c178035.tar.gz gcc-26d50717b8fa7927e62f78092435db0e0c178035.tar.bz2 | |
i386: Enable AVX512 memory broadcast for INT add
Many AVX512 vector operations can broadcast from a scalar memory source.
This patch enables memory broadcast for INT add operations.
gcc/
PR target/72782
* config/i386/sse.md (avx512bcst): Updated for V4SI, V2DI, V8SI,
V4DI, V16SI and V8DI.
(*sub<mode>3<mask_name>_bcst): New.
(*add<mode>3<mask_name>_bcst): Likewise.
gcc/testsuite/
PR target/72782
* gcc.target/i386/avx512f-add-di-zmm-1.c: New test.
* gcc.target/i386/avx512f-add-si-zmm-1.c: Likewise.
* gcc.target/i386/avx512f-add-si-zmm-2.c: Likewise.
* gcc.target/i386/avx512f-add-si-zmm-3.c: Likewise.
* gcc.target/i386/avx512f-add-si-zmm-4.c: Likewise.
* gcc.target/i386/avx512f-add-si-zmm-5.c: Likewise.
* gcc.target/i386/avx512f-add-si-zmm-6.c: Likewise.
* gcc.target/i386/avx512f-sub-di-zmm-1.c: Likewise.
* gcc.target/i386/avx512f-sub-si-zmm-1.c: Likewise.
* gcc.target/i386/avx512f-sub-si-zmm-2.c: Likewise.
* gcc.target/i386/avx512f-sub-si-zmm-3.c: Likewise.
* gcc.target/i386/avx512f-sub-si-zmm-4.c: Likewise.
* gcc.target/i386/avx512f-sub-si-zmm-5.c: Likewise.
* gcc.target/i386/avx512vl-add-si-xmm-1.c: Likewise.
* gcc.target/i386/avx512vl-add-si-ymm-1.c: Likewise.
* gcc.target/i386/avx512vl-sub-si-xmm-1.c: Likewise.
* gcc.target/i386/avx512vl-sub-si-ymm-1.c: Likewise.
From-SVN: r265368
Diffstat (limited to 'gcc/tree-ssa-loop-im.c')
0 files changed, 0 insertions, 0 deletions