PR target/110598: Fix rega = 0; rega ^= rega regression in i386.md

This patch fixes the regression PR target/110598 caused by my recent
addition of a peephole2.  The intention of that optimization was to
simplify zeroing a register, followed by an IOR, XOR or PLUS operation
on it into a move, or as described in the comment:
;; Peephole2 rega = 0; rega op= regb into rega = regb.

The issue is that I'd failed to consider the (rare and unusual) case,
where regb is rega, where the transformation leads to the incorrect
"rega = rega", when it should be "rega = 0".  The minimal fix is to
add a !reg_mentioned_p check to the recent peephole2.

In addition to resolving the regression, I've added a second peephole2
to optimize the problematic case above, which contains a false
dependency and is therefore tricky to optimize elsewhere.  This is an
improvement over GCC 13, for example, that generates the redundant:

        xorl    %edx, %edx
        xorq    %rdx, %rdx

2023-07-12  Roger Sayle  <roger@nextmovesoftware.com>

gcc/ChangeLog
	PR target/110598
	* config/i386/i386.md (peephole2): Check !reg_mentioned_p when
	optimizing rega = 0; rega op= regb for op in [XOR,IOR,PLUS].
	(peephole2): Simplify rega = 0; rega op= rega cases.

gcc/testsuite/ChangeLog
	PR target/110598
	* gcc.target/i386/pr110598.c: New test case.

0 files changed, 0 insertions, 0 deletions