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| author | Christoph Müllner <christoph.muellner@vrull.eu> | 2023-04-25 15:24:13 +0200 |
|---|---|---|
| committer | Kito Cheng <kito.cheng@sifive.com> | 2023-07-12 16:12:27 +0800 |
| commit | a3480aacc4ab01651725a63e05829a43bc23d549 (patch) | |
| tree | 8387a6975b72d1a5b248e0d1b72c4046429c35d2 /gcc/tree-ssa-loop-ch.cc | |
| parent | b621883620b127caf20e88e59fa73e666960013e (diff) | |
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riscv: Define Xmode macro
Define a Xmode macro that specifies the registers size (XLEN)
similar to Pmode. This allows the backend code to write generic
RV32/RV64 C code (under certain circumstances).
gcc/ChangeLog:
* config/riscv/riscv.h (Xmode): New macro.
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
Diffstat (limited to 'gcc/tree-ssa-loop-ch.cc')
0 files changed, 0 insertions, 0 deletions