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| author | Jan Beulich <jbeulich@suse.com> | 2023-07-12 12:16:08 +0200 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2023-07-12 12:16:08 +0200 |
| commit | 8a738ac71d6c7ff5fc6bd142de3852ccdca3e0ea (patch) | |
| tree | 7d470c8fa919cbb7f6dcd0dc035857d6ccf47a03 /gcc/tree-ssa-loop-ch.cc | |
| parent | 28cdba24a9b8405d9f4ec2591c53d23a8bb74051 (diff) | |
| download | gcc-8a738ac71d6c7ff5fc6bd142de3852ccdca3e0ea.zip gcc-8a738ac71d6c7ff5fc6bd142de3852ccdca3e0ea.tar.gz gcc-8a738ac71d6c7ff5fc6bd142de3852ccdca3e0ea.tar.bz2 | |
x86: improve fast bfloat->float conversion
There's nothing AVX512BW-ish in here, so no reason to use Yw as the
constraints for the AVX alternative. Furthermore by using the 512-bit
form of VPSSLD (in a new alternative) all 32 registers can be used
directly by the insn without AVX512VL needing to be enabled.
Also adjust the originally last alternative's "prefix" attribute to
maybe_evex.
gcc/
* config/i386/i386.md (extendbfsf2_1): Add new AVX512F
alternative. Adjust original last alternative's "prefix"
attribute to maybe_evex.
Diffstat (limited to 'gcc/tree-ssa-loop-ch.cc')
0 files changed, 0 insertions, 0 deletions