x32: Add addr32 prefix to VSIB address

32-bit indices in VSIB address are sign-extended to 64 bits.  In x32,
when 32-bit indices are used as addresses, like in

vgatherdps %ymm7, 0(,%ymm9,1), %ymm6

32-bit indices, 0xf7fa3010, is sign-extended to 0xfffffffff7fa3010 which
is invalid address.  Add addr32 prefix to UNSPEC_VSIBADDR instructions
for x32 if there is no base register nor symbol.

This fixes 175.vpr and 254.gap in SPEC CPU 2000 on x32 with

-Ofast -funroll-loops -march=haswell

gcc/

	PR target/89523
	* config/i386/i386.c (ix86_print_operand): Handle 'M' to add
	addr32 prefix to VSIB address for X32.
	* config/i386/sse.md (*avx512pf_gatherpf<mode>sf_mask): Prepend
	"%M2" to opcode.
	(*avx512pf_gatherpf<mode>df_mask): Likewise.
	(*avx512pf_scatterpf<mode>sf_mask): Likewise.
	(*avx512pf_scatterpf<mode>df_mask): Likewise.
	(*avx2_gathersi<mode>): Prepend "%M3" to opcode.
	(*avx2_gathersi<mode>_2): Prepend "%M2" to opcode.
	(*avx2_gatherdi<mode>): Prepend "%M3" to opcode.
	(*avx2_gatherdi<mode>_2): Prepend "%M2" to opcode.
	(*avx2_gatherdi<mode>_3): Prepend "%M3" to opcode.
	(*avx2_gatherdi<mode>_4): Prepend "%M2" to opcode.`
	(*avx512f_gathersi<mode>): Prepend "%M4" to opcode.
	(*avx512f_gathersi<mode>_2): Prepend "%M3" to opcode.
	(*avx512f_gatherdi<mode>): Prepend "%M4" to opcode.
	(*avx512f_gatherdi<mode>_2): Prepend "%M3" to opcode.
	(*avx512f_scattersi<mode>): Prepend "%M0" to opcode.
	(*avx512f_scatterdi<mode>): Likewise.

gcc/testsuite/

	PR target/89523
	* gcc.target/i386/pr89523-1a.c: New test.
	* gcc.target/i386/pr89523-1b.c: Likewise.
	* gcc.target/i386/pr89523-2.c: Likewise.
	* gcc.target/i386/pr89523-3.c: Likewise.
	* gcc.target/i386/pr89523-4.c: Likewise.
	* gcc.target/i386/pr89523-5.c: Likewise.
	* gcc.target/i386/pr89523-6.c: Likewise.
	* gcc.target/i386/pr89523-7.c: Likewise.
	* gcc.target/i386/pr89523-8.c: Likewise.
	* gcc.target/i386/pr89523-9.c: Likewise.

From-SVN: r269673

0 files changed, 0 insertions, 0 deletions