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authorDennis Zhang <dennis.zhang@arm.com>2020-02-25 17:38:00 +0000
committerDennis Zhang <dennis.zhang@arm.com>2020-02-25 17:38:00 +0000
commiteb7ba6c36b8a17c79936abe26245e4bc66bb8859 (patch)
tree51c0b81dd1284fcf0520468074e11e3fab6ed9c0 /gcc/tree-ssa-loop-ch.c
parent490350a11f82ee214aa8dd50b1222f3e7cffe630 (diff)
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arm: ACLE intrinsics for bfloat16 dot product
This patch is part of a series adding support for Armv8.6-A features. It adds intrinsics for brain half-precision float-point (BF16) dot instructions with AdvSIMD support. gcc/ChangeLog: 2020-02-25 Dennis Zhang <dennis.zhang@arm.com> * config/arm/arm_neon.h (vbfdot_f32, vbfdotq_f32): New (vbfdot_lane_f32, vbfdotq_laneq_f32): New. (vbfdot_laneq_f32, vbfdotq_lane_f32): New. * config/arm/arm_neon_builtins.def (vbfdot): New entry. (vbfdot_lanev4bf, vbfdot_lanev8bf): Likewise. * config/arm/iterators.md (VSF2BF): New attribute. * config/arm/neon.md (neon_vbfdot<VCVTF:mode>): New entry. (neon_vbfdot_lanev4bf<VCVTF:mode>): Likewise. (neon_vbfdot_lanev8bf<VCVTF:mode>): Likewise. gcc/testsuite/ChangeLog: 2020-02-25 Dennis Zhang <dennis.zhang@arm.com> * gcc.target/arm/simd/bf16_dot_1.c: New test. * gcc.target/arm/simd/bf16_dot_2.c: New test. * gcc.target/arm/simd/bf16_dot_3.c: New test.
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