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| author | Jiong Wang <jiong.wang@arm.com> | 2016-10-10 13:45:17 +0000 |
|---|---|---|
| committer | Jiong Wang <jiwang@gcc.gnu.org> | 2016-10-10 13:45:17 +0000 |
| commit | 8f3edb0732491c053d821445c6ce46b1ca52b1a6 (patch) | |
| tree | 4db963b3951db231388e257fe93efc0cb68350a0 /gcc/tree-ssa-dom.c | |
| parent | 6e49f922a6e75f37ea93a4592cc8f757b9650efb (diff) | |
| download | gcc-8f3edb0732491c053d821445c6ce46b1ca52b1a6.zip gcc-8f3edb0732491c053d821445c6ce46b1ca52b1a6.tar.gz gcc-8f3edb0732491c053d821445c6ce46b1ca52b1a6.tar.bz2 | |
[2/4] ARMv8.2-A testsuite for new data movement intrinsics
gcc/testsuite/
* gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h (FP16_SUPPORTED):
Enable AArch64.
* gcc.target/aarch64/advsimd-intrinsics/vdup_lane.c: Add support for
vdup*_laneq.
* gcc.target/aarch64/advsimd-intrinsics/vduph_lane.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vtrn_half.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vuzp_half.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vzip_half.c: New.
From-SVN: r240922
Diffstat (limited to 'gcc/tree-ssa-dom.c')
0 files changed, 0 insertions, 0 deletions