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| author | Levy Hsu <admin@levyhsu.com> | 2024-07-08 14:59:35 +0000 |
|---|---|---|
| committer | Levy Hsu <admin@levyhsu.com> | 2024-07-08 16:11:20 +0000 |
| commit | f3f9e4ee7642e5131f2d6607f764267df7d233d4 (patch) | |
| tree | 0cf35297cf50ac3421d3bc5541cc16834000b3de /gcc/tree-pass.h | |
| parent | 5be97039aa6c27fdf5d5bd43ef393b307c5ecedd (diff) | |
| download | gcc-f3f9e4ee7642e5131f2d6607f764267df7d233d4.zip gcc-f3f9e4ee7642e5131f2d6607f764267df7d233d4.tar.gz gcc-f3f9e4ee7642e5131f2d6607f764267df7d233d4.tar.bz2 | |
x86: Support bitwise and/andnot/abs/neg/copysign/xorsign op for V8BF/V16BF/V32BF
This patch extends support for BF16 vector operations in GCC, including bitwise AND, ANDNOT, ABS, NEG, COPYSIGN, and XORSIGN for V8BF, V16BF, and V32BF modes.
gcc/ChangeLog:
* config/i386/i386-expand.cc (ix86_expand_fp_absneg_operator): Add VBF modes.
(ix86_expand_copysign): Ditto.
(ix86_expand_xorsign): Ditto.
* config/i386/i386.cc (ix86_build_const_vector): Ditto.
(ix86_build_signbit_mask): Ditto.
* config/i386/sse.md: Ditto.
gcc/testsuite/ChangeLog:
* gcc.target/i386/avx2-bf16-vec-absneg.c: New test.
* gcc.target/i386/avx512f-bf16-vec-absneg.c: New test.
Diffstat (limited to 'gcc/tree-pass.h')
0 files changed, 0 insertions, 0 deletions