diff options
| author | Jeevitha <jeevitha@linux.ibm.com> | 2024-07-08 06:09:49 -0500 |
|---|---|---|
| committer | Jeevitha <jeevitha@linux.ibm.com> | 2024-07-08 06:09:49 -0500 |
| commit | 5be97039aa6c27fdf5d5bd43ef393b307c5ecedd (patch) | |
| tree | 90df2205903d02c745377f3bf4441c058b49d7a8 /gcc/tree-pass.h | |
| parent | dafd63d7c5cddce1e00803606e742d75927b1a1e (diff) | |
| download | gcc-5be97039aa6c27fdf5d5bd43ef393b307c5ecedd.zip gcc-5be97039aa6c27fdf5d5bd43ef393b307c5ecedd.tar.gz gcc-5be97039aa6c27fdf5d5bd43ef393b307c5ecedd.tar.bz2 | |
rs6000: load high and low part of 128bit vector independently [PR110040]
PR110040 exposes an issue concerning moves from vector registers to GPRs.
There are two moves, one for upper 64 bits and the other for the lower
64 bits. In the problematic test case, we are only interested in storing
the lower 64 bits. However, the instruction for copying the upper 64 bits
is still emitted and is dead code. This patch adds a splitter that splits
apart the two move instructions so that DCE can remove the dead code after
splitting.
2024-07-08 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
gcc/
PR target/110040
* config/rs6000/vsx.md (split pattern for V1TI to DI move): New define.
gcc/testsuite/
PR target/110040
* gcc.target/powerpc/pr110040-1.c: New testcase.
* gcc.target/powerpc/pr110040-2.c: New testcase.
Diffstat (limited to 'gcc/tree-pass.h')
0 files changed, 0 insertions, 0 deletions