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author | Richard Earnshaw <rearnsha@arm.com> | 2016-12-15 15:45:23 +0000 |
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committer | Richard Earnshaw <rearnsha@gcc.gnu.org> | 2016-12-15 15:45:23 +0000 |
commit | 199acf6cfbc3fdd7eca990c817752f32b17c7b4d (patch) | |
tree | cb5e285f3080e0da0fe01a7a67f4494f941bf3e1 /gcc/tree-parloops.c | |
parent | d2d19167c3a5f46af1726a6b79a6f4bc586e788a (diff) | |
download | gcc-199acf6cfbc3fdd7eca990c817752f32b17c7b4d.zip gcc-199acf6cfbc3fdd7eca990c817752f32b17c7b4d.tar.gz gcc-199acf6cfbc3fdd7eca990c817752f32b17c7b4d.tar.bz2 |
[arm] Add new isa quirk bit for Cortex-M3 ldrd issue.
With the new data structures it is trivial to add a new field and we
aren't (too) limited as to the number we have. This patch adds a new
bit to describe the need for a particular compiler behaviour
modification: in this case a quirk in the cortex-m3.
* arm-isa.h (enum isa_feature): Add isa_quirk_cm3_ldrd.
(ISA_ALL_QUIRKS): New macro.
* arm-cores.def (cortex-m3): Add isa_quirk_cm3_ldrd to isa feature list.
* arm.c (isa_quirkbits): New feature-list bitmap.
(arm_configure_build_target): Ignore quirk bits when comparing an
architecture feature list with a CPU feature list.
(arm_option_override): Initialize_isa_quirkbits. If the user has
not specified -m[no-]fix-cortex-m3-ldrd, automatically enable the
feature if isa_quirk_cm3_ldrd appears in the isa feature list.
From-SVN: r243701
Diffstat (limited to 'gcc/tree-parloops.c')
0 files changed, 0 insertions, 0 deletions