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| author | Michael Meissner <meissner@linux.vnet.ibm.com> | 2016-11-17 21:42:13 +0000 |
|---|---|---|
| committer | Michael Meissner <meissner@gcc.gnu.org> | 2016-11-17 21:42:13 +0000 |
| commit | c80620fcfa577f25449c727758627f47224cfaf9 (patch) | |
| tree | 036e8f9e6cf13af843d4f8cf0ec5b27bf17122af /gcc/tree-object-size.c | |
| parent | f8691e98180da3205b8a19ff34f6656c46c4c92a (diff) | |
| download | gcc-c80620fcfa577f25449c727758627f47224cfaf9.zip gcc-c80620fcfa577f25449c727758627f47224cfaf9.tar.gz gcc-c80620fcfa577f25449c727758627f47224cfaf9.tar.bz2 | |
re PR target/78101 (PowerPC 64-bit little endian fusion failure with -O3 -mcpu=power9)
[gcc]
2016-11-17 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/78101
* config/rs6000/predicates.md (fusion_addis_mem_combo_load): Add
the appropriate checks for SFmode/DFmode load/stores in GPR
registers.
(fusion_addis_mem_combo_store): Likewise.
* config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): Rename
fusion_fpr_* to fusion_vsx_* and add in support for ISA 3.0 scalar
d-form instructions for traditional Altivec registers.
(emit_fusion_p9_load): Likewise.
(emit_fusion_p9_store): Likewise.
* config/rs6000/rs6000.md (p9 fusion store peephole2): Remove
early clobber from scratch register. Do not match if the register
being stored is the scratch register.
(fusion_vsx_<P:mode>_<FPR_FUSION:mode>_load): Rename fusion_fpr_*
to fusion_vsx_* and add in support for ISA 3.0 scalar d-form
instructions for traditional Altivec registers.
(fusion_fpr_<P:mode>_<FPR_FUSION:mode>_load): Likewise.
(fusion_vsx_<P:mode>_<FPR_FUSION:mode>_store): Likewise.
(fusion_fpr_<P:mode>_<FPR_FUSION:mode>_store): Likewise.
[gcc/testsuite]
2016-11-17 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/78101
* gcc.target/powerpc/fusion4.c: New test.
From-SVN: r242564
Diffstat (limited to 'gcc/tree-object-size.c')
0 files changed, 0 insertions, 0 deletions