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| author | Kito Cheng <kito.cheng@sifive.com> | 2020-01-17 19:49:15 +0800 |
|---|---|---|
| committer | Kito Cheng <kito.cheng@sifive.com> | 2020-01-21 10:40:47 +0800 |
| commit | e0a5b313c1a3edfb33a28b8d8fea92e01490ebb3 (patch) | |
| tree | 565354c0838029c31da23fc5a0b7476c8eed0141 /gcc/tree-loop-distribution.c | |
| parent | 2df76cd6895f9cf0efee4d8bc50258899ba7c293 (diff) | |
| download | gcc-e0a5b313c1a3edfb33a28b8d8fea92e01490ebb3.zip gcc-e0a5b313c1a3edfb33a28b8d8fea92e01490ebb3.tar.gz gcc-e0a5b313c1a3edfb33a28b8d8fea92e01490ebb3.tar.bz2 | |
RISC-V: Disallow regrenme if the TO register never used before for interrupt functions
gcc/ChangeLog
PR target/93304
* config/riscv/riscv-protos.h (riscv_hard_regno_rename_ok): New.
* config/riscv/riscv.c (riscv_hard_regno_rename_ok): New.
* config/riscv/riscv.h (HARD_REGNO_RENAME_OK): Defined.
gcc/testsuite/ChangeLog
PR target/93304
* gcc.target/riscv/pr93304.c: New test.
Diffstat (limited to 'gcc/tree-loop-distribution.c')
0 files changed, 0 insertions, 0 deletions