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| author | Lulu Cheng <chenglulu@loongson.cn> | 2023-09-02 10:59:55 +0800 |
|---|---|---|
| committer | Lulu Cheng <chenglulu@loongson.cn> | 2023-09-04 09:40:02 +0800 |
| commit | ead6a142902b52dd129025d3a5c9cb341a27691e (patch) | |
| tree | 3adf45d9da2de66f8a963a8982c159815c1b3036 /gcc/tree-inline.h | |
| parent | 26aa5d9017104ee3a72de418e9a0a1e5c1e30313 (diff) | |
| download | gcc-ead6a142902b52dd129025d3a5c9cb341a27691e.zip gcc-ead6a142902b52dd129025d3a5c9cb341a27691e.tar.gz gcc-ead6a142902b52dd129025d3a5c9cb341a27691e.tar.bz2 | |
LoongArch: Optimize switch with sign-extended index.
The patch refers to the submission of RISCV
7bbce9b50302959286381d9177818642bceaf301.
gcc/ChangeLog:
* config/loongarch/loongarch.cc (loongarch_extend_comparands):
In unsigned QImode test, check for sign extended subreg and/or
constant operands, and do a sign extension in that case.
* config/loongarch/loongarch.md (TARGET_64BIT): Define
template cbranchqi4.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/switch-qi.c: New test.
Diffstat (limited to 'gcc/tree-inline.h')
0 files changed, 0 insertions, 0 deletions