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| author | Pan Li <pan2.li@intel.com> | 2023-09-04 15:14:28 +0800 |
|---|---|---|
| committer | Pan Li <pan2.li@intel.com> | 2023-09-04 15:45:33 +0800 |
| commit | d99a868a9b100ab5a4b270a1acece60b5b6153a3 (patch) | |
| tree | d6d3461ee9f42a5baa34fc875ac3d4985b784ed5 /gcc/tree-inline.h | |
| parent | 1aceceb1e2d6e86ce183c8cc448750fa03b6f79e (diff) | |
| download | gcc-d99a868a9b100ab5a4b270a1acece60b5b6153a3.zip gcc-d99a868a9b100ab5a4b270a1acece60b5b6153a3.tar.gz gcc-d99a868a9b100ab5a4b270a1acece60b5b6153a3.tar.bz2 | |
RISC-V: Support FP16 for RVV VRGATHEREI16 intrinsic
This patch would like to add FP16 support for the VRGATHEREI16
intrinsic. Aka:
* __riscv_vrgatherei16_vv_f16mf4
* __riscv_vrgatherei16_vv_f16mf4_m
As well as f16mf2 to f16m8 types.
Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/ChangeLog:
* config/riscv/riscv-vector-builtins-types.def
(vfloat16mf4_t): Add FP16 intrinsic def.
(vfloat16mf2_t): Ditto.
(vfloat16m1_t): Ditto.
(vfloat16m2_t): Ditto.
(vfloat16m4_t): Ditto.
(vfloat16m8_t): Ditto.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/intrisinc-vrgatherei16.c: New test.
Diffstat (limited to 'gcc/tree-inline.h')
0 files changed, 0 insertions, 0 deletions