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| author | Richard Earnshaw <rearnsha@arm.com> | 2019-01-24 16:06:34 +0000 |
|---|---|---|
| committer | Richard Earnshaw <rearnsha@gcc.gnu.org> | 2019-01-24 16:06:34 +0000 |
| commit | 21f657a48fe0d110f3d35646657090cd77d0f76a (patch) | |
| tree | dfeb8cb4562d124b0e15d2b56ceeb02d1c659638 /gcc/tree-inline.c | |
| parent | e658669fe18d27bbde85085d648f0392f3f9bce6 (diff) | |
| download | gcc-21f657a48fe0d110f3d35646657090cd77d0f76a.zip gcc-21f657a48fe0d110f3d35646657090cd77d0f76a.tar.gz gcc-21f657a48fe0d110f3d35646657090cd77d0f76a.tar.bz2 | |
Mitigation for PR target/88469 on arm-based systems bootstrapping with gcc-6/7/8
This patch, for gcc 8/9 is a mitigation patch for PR target/88469
where gcc-6/7/8 miscompile a structure whose alignment is dominated by
a 64-bit bitfield member. Since the PCS rules for such a type must
ignore any overalignment of the base type we cannot address this by
simply adding a larger alignment to the class. We can, however, force
the alignment of the bit-field itself and GCC will handle that as
desired.
PR target/88469
* profile-count.h (profile_count): On ARM systems using GCC 6/7/8
force the alignment of m_val.
From-SVN: r268240
Diffstat (limited to 'gcc/tree-inline.c')
0 files changed, 0 insertions, 0 deletions