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| author | Uros Bizjak <ubizjak@gmail.com> | 2021-06-23 12:50:53 +0200 |
|---|---|---|
| committer | Uros Bizjak <ubizjak@gmail.com> | 2021-06-23 12:51:32 +0200 |
| commit | 1e16f2b472c7d253d564556a048dc4ae16119c00 (patch) | |
| tree | 1590ac31c6e4a30d6ee2c5370e71b8c15bc28180 /gcc/tree-inline.c | |
| parent | 75404109dce57d2f8dac0f90808010233928418f (diff) | |
| download | gcc-1e16f2b472c7d253d564556a048dc4ae16119c00.zip gcc-1e16f2b472c7d253d564556a048dc4ae16119c00.tar.gz gcc-1e16f2b472c7d253d564556a048dc4ae16119c00.tar.bz2 | |
i386: Prevent unwanted combine from LZCNT to BSR [PR101175]
The current RTX pattern for BSR allows combine pass to convert LZCNT insn
to BSR. Note that the LZCNT has a defined behavior to return the operand
size when operand is zero, where BSR has not.
Add a BSR specific setting of zero-flag to RTX pattern of BSR insn
in order to avoid matching unwanted combinations.
2021-06-23 Uroš Bizjak <ubizjak@gmail.com>
gcc/
PR target/101175
* config/i386/i386.md (bsr_rex64): Add zero-flag setting RTX.
(bsr): Ditto.
(*bsrhi): Remove.
(clz<mode>2): Update RTX pattern for additions.
gcc/testsuite/
PR target/101175
* gcc.target/i386/pr101175.c: New test.
Diffstat (limited to 'gcc/tree-inline.c')
0 files changed, 0 insertions, 0 deletions