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| author | Tamar Christina <tamar.christina@arm.com> | 2018-06-27 08:08:48 +0000 |
|---|---|---|
| committer | Tamar Christina <tnfchris@gcc.gnu.org> | 2018-06-27 08:08:48 +0000 |
| commit | d89fe63e58fb775fb4aa043e168b5025521d5a47 (patch) | |
| tree | 2665165a6b88000bc4e71ea1456a1b4a4d228d2d /gcc/tree-inline.c | |
| parent | 0e97b84bfc542a51c1db1dd4571faa827a02064a (diff) | |
| download | gcc-d89fe63e58fb775fb4aa043e168b5025521d5a47.zip gcc-d89fe63e58fb775fb4aa043e168b5025521d5a47.tar.gz gcc-d89fe63e58fb775fb4aa043e168b5025521d5a47.tar.bz2 | |
Add SIMD to REG pattern for movhf without armv8.2-a support for AArch64
This fixes a regression where we don't have an instruction for pre Armv8.2-a
to do a move of an fp16 value from a GP reg to a SIMD reg.
This patch adds that pattern to movhf_aarch64 using a dup and only selectes it
using a very low priority.
This fixes an ICE at -O0.
gcc/
2018-06-20 Tamar Christina <tamar.christina@arm.com>
PR target/85769
* config/aarch64/aarch64.md (*movhf_aarch64): Add dup v0.4h pattern.
gcc/testsuite/
2018-06-20 Tamar Christina <tamar.christina@arm.com>
PR target/85769
* gcc.target/aarch64/f16_mov_immediate_3.c: New.
From-SVN: r262178
Diffstat (limited to 'gcc/tree-inline.c')
0 files changed, 0 insertions, 0 deletions