diff options
| author | Pan Li <pan2.li@intel.com> | 2023-08-14 14:03:29 +0800 |
|---|---|---|
| committer | Pan Li <pan2.li@intel.com> | 2023-08-14 15:08:36 +0800 |
| commit | c944ded09595946290778a26794074e69cc65f3e (patch) | |
| tree | 82a7686d46d9f8cf76f47e6b7ce923e09327909c /gcc/tree-cfg.cc | |
| parent | d9577b4b4c2a7b4e8bc869d33b7de98a0e507e7c (diff) | |
| download | gcc-c944ded09595946290778a26794074e69cc65f3e.zip gcc-c944ded09595946290778a26794074e69cc65f3e.tar.gz gcc-c944ded09595946290778a26794074e69cc65f3e.tar.bz2 | |
RISC-V: Support RVV VFWNMSAC rounding mode intrinsic API
This patch would like to support the rounding mode API for the
VFWNMSAC as the below samples.
* __riscv_vfwnmsac_vv_f64m2_rm
* __riscv_vfwnmsac_vv_f64m2_rm_m
* __riscv_vfwnmsac_vf_f64m2_rm
* __riscv_vfwnmsac_vf_f64m2_rm_m
Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/ChangeLog:
* config/riscv/riscv-vector-builtins-bases.cc
(class vfwnmsac_frm): New class for frm.
(vfwnmsac_frm_obj): New declaration.
(BASE): Ditto.
* config/riscv/riscv-vector-builtins-bases.h: Ditto.
* config/riscv/riscv-vector-builtins-functions.def
(vfwnmsac_frm): New intrinsic function definition.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/float-point-wnmsac.c: New test.
Diffstat (limited to 'gcc/tree-cfg.cc')
0 files changed, 0 insertions, 0 deletions