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authorPan Li <pan2.li@intel.com>2023-08-14 15:35:12 +0800
committerPan Li <pan2.li@intel.com>2023-08-14 16:24:59 +0800
commit9be93b80585fc875a2fc6b7d490b640b7fe04365 (patch)
treea0001ff0ae9597ef9aa79ab4426a67e37288e28f /gcc/tree-cfg.cc
parentc944ded09595946290778a26794074e69cc65f3e (diff)
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RISC-V: Support RVV VFSQRT rounding mode intrinsic API
This patch would like to support the rounding mode API for the VFSQRT as the below samples. * __riscv_vfsqrt_v_f32m1_rm * __riscv_vfsqrt_v_f32m1_rm_m Signed-off-by: Pan Li <pan2.li@intel.com> gcc/ChangeLog: * config/riscv/riscv-vector-builtins-bases.cc (class unop_frm): New class for frm. (vfsqrt_frm_obj): New declaration. (BASE): Ditto. * config/riscv/riscv-vector-builtins-bases.h: Ditto. * config/riscv/riscv-vector-builtins-functions.def (vfsqrt_frm): New intrinsic function definition. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/base/float-point-sqrt.c: New test.
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