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authorH.J. Lu <hongjiu.lu@intel.com>2019-05-15 15:08:38 +0000
committerH.J. Lu <hjl@gcc.gnu.org>2019-05-15 08:08:38 -0700
commit5d48867be5b9fa92d3c171418eb5d46f2ad6d640 (patch)
tree225f5d9da0373c5a46fb5a8e5009a8ae5eff5dc1 /gcc/tree-affine.c
parentd0e9bf2a6db4df95b776c5bcd728f0e159116659 (diff)
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i386: Emulate MMX ashr<mode>3/<shift_insn><mode>3 with SSE
Emulate MMX ashr<mode>3/<shift_insn><mode>3 with SSE. Only SSE register source operand is allowed. PR target/89021 * config/i386/mmx.md (mmx_ashr<mode>3): Also allow TARGET_MMX_WITH_SSE. Add SSE emulation. (mmx_<shift_insn><mode>3): Likewise. (ashr<mode>3): New. (<shift_insn><mode>3): Likewise. From-SVN: r271221
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