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| author | Tom de Vries <tdevries@suse.de> | 2020-07-28 15:13:54 +0200 |
|---|---|---|
| committer | Tom de Vries <tdevries@suse.de> | 2020-07-28 15:13:54 +0200 |
| commit | 862a58ed83c681efd2724db2b71294fc71196b73 (patch) | |
| tree | 70be495c5a7627e93fea0122eb13fac9d544d595 /gcc/testsuite | |
| parent | 134051f16bd490ada9febb7511a202b34b1821f3 (diff) | |
| download | gcc-862a58ed83c681efd2724db2b71294fc71196b73.zip gcc-862a58ed83c681efd2724db2b71294fc71196b73.tar.gz gcc-862a58ed83c681efd2724db2b71294fc71196b73.tar.bz2 | |
nvptx: Support 16-bit shifts and extendqihi2
Add support for 16-bits shifts and for sign extension from 8 bits to
16 bits.
This patch has been tested on nvptx-none with no new regressions.
2020-07-28 Roger Sayle <roger@nextmovesoftware.com>
Tom de Vries <tdevries@suse.de>
gcc/ChangeLog:
* config/nvptx/nvptx.md (extendqihi2): New instruction.
(ashl<mode>3, ashr<mode>3, lshr<mode>3): Support HImode.
gcc/testsuite/ChangeLog:
* gcc.target/nvptx/cvt.c: New test.
* gcc.target/nvptx/shift16.c: New test.
Diffstat (limited to 'gcc/testsuite')
| -rw-r--r-- | gcc/testsuite/gcc.target/nvptx/cvt.c | 13 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/nvptx/shift16.c | 30 |
2 files changed, 43 insertions, 0 deletions
diff --git a/gcc/testsuite/gcc.target/nvptx/cvt.c b/gcc/testsuite/gcc.target/nvptx/cvt.c new file mode 100644 index 0000000..279ec16 --- /dev/null +++ b/gcc/testsuite/gcc.target/nvptx/cvt.c @@ -0,0 +1,13 @@ +/* { dg-do assemble } */ +/* { dg-options "-O2 -save-temps" } */ + +signed short s; +signed char c; + +void +foo (void) +{ + s = c; +} + +/* { dg-final { scan-assembler "(?n)cvt\\.s16\\.s8.*%r" } } */ diff --git a/gcc/testsuite/gcc.target/nvptx/shift16.c b/gcc/testsuite/gcc.target/nvptx/shift16.c new file mode 100644 index 0000000..185aa62 --- /dev/null +++ b/gcc/testsuite/gcc.target/nvptx/shift16.c @@ -0,0 +1,30 @@ +/* { dg-do assemble } */ +/* { dg-options "-O2 -save-temps" } */ + +void +foo (unsigned short u) +{ + volatile unsigned short u2 = u << 5; +} + +void +foo2 (short s) +{ + volatile unsigned short s2 = s << 5; +} + +void +foo3 (unsigned short u) +{ + volatile unsigned short u2 = u >> 5; +} + +void +foo4 (signed short s) +{ + volatile signed short s2 = s >> 5; +} + +/* { dg-final { scan-assembler-times "(?n)shl\\.b16.*%r" 2 } } */ +/* { dg-final { scan-assembler "(?n)shr\\.u16.*%r" } } */ +/* { dg-final { scan-assembler "(?n)shr\\.s16.*%r" } } */ |