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| author | Kyrylo Tkachov <ktkachov@gcc.gnu.org> | 2013-03-25 13:50:45 +0000 |
|---|---|---|
| committer | Kyrylo Tkachov <ktkachov@gcc.gnu.org> | 2013-03-25 13:50:45 +0000 |
| commit | cf70554ed8b9e5b90c977f068b9f848c85c89228 (patch) | |
| tree | 1c6281c05aa5af6691d53a315a8fc6424f6e1e14 /gcc/testsuite | |
| parent | f35c297f8d42500060a2ca323af66c3aedea3334 (diff) | |
| download | gcc-cf70554ed8b9e5b90c977f068b9f848c85c89228.zip gcc-cf70554ed8b9e5b90c977f068b9f848c85c89228.tar.gz gcc-cf70554ed8b9e5b90c977f068b9f848c85c89228.tar.bz2 | |
Add testcases for previous commit.
2013-03-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/56720
* gcc.target/arm/neon-vcond-gt.c: New test.
* gcc.target/arm/neon-vcond-ltgt.c: Likewise.
* gcc.target/arm/neon-vcond-unordered.c: Likewise.
From-SVN: r197041
Diffstat (limited to 'gcc/testsuite')
| -rw-r--r-- | gcc/testsuite/gcc.target/arm/neon-vcond-gt.c | 17 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/arm/neon-vcond-ltgt.c | 18 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/arm/neon-vcond-unordered.c | 19 |
3 files changed, 54 insertions, 0 deletions
diff --git a/gcc/testsuite/gcc.target/arm/neon-vcond-gt.c b/gcc/testsuite/gcc.target/arm/neon-vcond-gt.c new file mode 100644 index 0000000..86ccf95 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/neon-vcond-gt.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target arm_neon_ok } */ +/* { dg-options "-O1 -funsafe-math-optimizations -ftree-vectorize" } */ +/* { dg-add-options arm_neon } */ + +#define MAX(a, b) (a > b ? a : b) +void foo (int ilast,float* w, float* w2) +{ + int i; + for (i = 0; i < ilast; ++i) + { + w[i] = MAX (0.0f, w2[i]); + } +} + +/* { dg-final { scan-assembler "vcgt\\.f32\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+" } } */ +/* { dg-final { scan-assembler "vbit\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon-vcond-ltgt.c b/gcc/testsuite/gcc.target/arm/neon-vcond-ltgt.c new file mode 100644 index 0000000..acb23a9 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/neon-vcond-ltgt.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target arm_neon_ok } */ +/* { dg-options "-O1 -funsafe-math-optimizations -ftree-vectorize" } */ +/* { dg-add-options arm_neon } */ + +#define LTGT(a, b) (__builtin_islessgreater (a, b) ? a : b) +void foo (int ilast,float* w, float* w2) +{ + int i; + for (i = 0; i < ilast; ++i) + { + w[i] = LTGT (0.0f, w2[i]); + } +} + +/* { dg-final { scan-assembler-times "vcgt\\.f32\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+" 2 } } */ +/* { dg-final { scan-assembler "vorr\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+" } } */ +/* { dg-final { scan-assembler "vbsl\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon-vcond-unordered.c b/gcc/testsuite/gcc.target/arm/neon-vcond-unordered.c new file mode 100644 index 0000000..c3e448d --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/neon-vcond-unordered.c @@ -0,0 +1,19 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target arm_neon_ok } */ +/* { dg-options "-O1 -funsafe-math-optimizations -ftree-vectorize" } */ +/* { dg-add-options arm_neon } */ + +#define UNORD(a, b) (__builtin_isunordered (a, b) ? a : b) +void foo (int ilast,float* w, float* w2) +{ + int i; + for (i = 0; i < ilast; ++i) + { + w[i] = UNORD (0.0f, w2[i]); + } +} + +/* { dg-final { scan-assembler "vcgt\\.f32\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+" } } */ +/* { dg-final { scan-assembler "vcge\\.f32\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+" } } */ +/* { dg-final { scan-assembler "vorr\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+" } } */ +/* { dg-final { scan-assembler "vbsl\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+" } } */ |