rs6000: Add xxeval and vec_ternarylogic

Add the xxeval insn and access it via the vec_ternarylogic built-in
function.  As part of this, add support to the built-in function
infrastructure for functions that take four arguments.

[gcc]

2020-05-11  Kelvin Nilsen  <wschmidt@linux.ibm.com>

	* config/rs6000/altivec.h (vec_ternarylogic): New #define.
	* config/rs6000/altivec.md (UNSPEC_XXEVAL): New constant.
	(xxeval): New insn.
	* config/rs6000/predicates.md (u8bit_cint_operand): New predicate.
	* config/rs6000/rs6000-builtin.def: Add handling of new macro
	RS6000_BUILTIN_4.
	(BU_FUTURE_V_4): New macro. Use it.
	(BU_FUTURE_OVERLOAD_4): Likewise.
	* config/rs6000/rs6000-c.c (altivec_build_resolved_builtin): Add
	handling for quaternary built-in functions.
	(altivec_resolve_overloaded_builtin): Add special-case handling
	for __builtin_vec_xxeval.
	* config/rs6000/rs6000-call.c: Add handling of new macro
	RS6000_BUILTIN_4 in initialization of rs6000_builtin_info,
	bdesc0_arg, bdesc1_arg, bdesc2_arg, bdesc_3arg,
	bdesc_altivec_preds, bdesc_abs, and bdesc_htm arrays.
	(altivec_overloaded_builtins): Add definitions for
	FUTURE_BUILTIN_VEC_XXEVAL.
	(bdesc_4arg): New array.
	(htm_expand_builtin): Add handling for quaternary built-in
	functions.
	(rs6000_expand_quaternop_builtin): New function.
	(rs6000_expand_builtin): Add handling for quaternary built-in
	functions.
	(rs6000_init_builtins): Initialize builtin_mode_to_type entries
	for unsigned QImode and unsigned HImode.
	(builtin_quaternary_function_type): New function.
	(rs6000_common_init_builtins): Add handling of quaternary
	operations.
	* config/rs6000/rs6000.h (RS6000_BTC_QUATERNARY): New defined
	constant.
	(RS6000_BTC_PREDICATE): Change value of constant.
	(RS6000_BTC_ABS): Likewise.
	(rs6000_builtins): Add support for new macro RS6000_BUILTIN_4.
	* doc/extend.texi (PowerPC AltiVec Built-In Functions Available
	for a Future Architecture): Add description of vec_ternarylogic
	built-in function.

[gcc/testsuite]

2020-05-11  Kelvin Nilsen  <wschmidt@linux.ibm.com>

	* gcc.target/powerpc/vec-ternarylogic-0.c: New.
	* gcc.target/powerpc/vec-ternarylogic-1.c: New.
	* gcc.target/powerpc/vec-ternarylogic-10.c: New.
	* gcc.target/powerpc/vec-ternarylogic-2.c: New.
	* gcc.target/powerpc/vec-ternarylogic-3.c: New.
	* gcc.target/powerpc/vec-ternarylogic-4.c: New.
	* gcc.target/powerpc/vec-ternarylogic-5.c: New.
	* gcc.target/powerpc/vec-ternarylogic-6.c: New.
	* gcc.target/powerpc/vec-ternarylogic-7.c: New.
	* gcc.target/powerpc/vec-ternarylogic-8.c: New.
	* gcc.target/powerpc/vec-ternarylogic-9.c: New.

12 files changed, 1264 insertions, 0 deletions

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 74e8332..0c54c52 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,17 @@
+2020-05-11  Kelvin Nilsen  <wschmidt@linux.ibm.com>
+
+	* gcc.target/powerpc/vec-ternarylogic-0.c: New.
+	* gcc.target/powerpc/vec-ternarylogic-1.c: New.
+	* gcc.target/powerpc/vec-ternarylogic-10.c: New.
+	* gcc.target/powerpc/vec-ternarylogic-2.c: New.
+	* gcc.target/powerpc/vec-ternarylogic-3.c: New.
+	* gcc.target/powerpc/vec-ternarylogic-4.c: New.
+	* gcc.target/powerpc/vec-ternarylogic-5.c: New.
+	* gcc.target/powerpc/vec-ternarylogic-6.c: New.
+	* gcc.target/powerpc/vec-ternarylogic-7.c: New.
+	* gcc.target/powerpc/vec-ternarylogic-8.c: New.
+	* gcc.target/powerpc/vec-ternarylogic-9.c: New.
+
 2020-05-11  Kelvin Nilsen  <kelvin@gcc.gnu.org>
 
 	* gcc.target/powerpc/pdep-0.c: New.
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-0.c b/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-0.c
new file mode 100644
index 0000000..bc1d05c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-0.c
@@ -0,0 +1,120 @@
+/* { dg-do compile } */
+/* { dg-options "-mdejagnu-cpu=future" } */
+
+#include <altivec.h>
+
+extern void abort (void);
+
+#define NumSamples 4
+
+void
+doTests00000001 (vector unsigned char a_sources [],
+		 vector unsigned char b_sources [],
+		 vector unsigned char c_sources []) {
+  for (int i = 0; i < NumSamples; i++)
+    for (int j = 0; j < NumSamples; j++)
+      for (int k = 0; k < NumSamples; k++)
+	{
+	  vector unsigned char a = a_sources [i];
+	  vector unsigned char b = b_sources [j];
+	  vector unsigned char c = c_sources [k];
+	  vector unsigned char result = vec_ternarylogic (a, b, c, 0x01);
+	  vector unsigned char intended = (a & b & c);
+	  if (!vec_all_eq (result, intended))
+	    abort ();
+	}
+}
+
+void
+doTests11100101 (vector unsigned char a_sources [],
+		 vector unsigned char b_sources [],
+		 vector unsigned char c_sources []) {
+  for (int i = 0; i < NumSamples; i++)
+    for (int j = 0; j < NumSamples; j++)
+      for (int k = 0; k < NumSamples; k++)
+	{
+	  vector unsigned char a = a_sources [i];
+	  vector unsigned char b = b_sources [j];
+	  vector unsigned char c = c_sources [k];
+	  vector unsigned char result = vec_ternarylogic (a, b, c, 0xe5);
+	  vector unsigned char intended =
+	    { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
+	  // Supposed to be a ? c: nand (b,c)
+	  for (int l = 0; l < 16; l++)
+	    {
+	      for (int m = 0; m < 8; m++)
+	      {
+		unsigned char bit_selector = (0x01 << m);
+		if (a[l] & bit_selector)
+		  intended [l] |= c [l] & bit_selector;
+		else if ((b [l] & c [l] & bit_selector) == 0)
+		  intended [l] |= bit_selector;
+	      }
+	    }
+	  if (!vec_all_eq (result, intended))
+	    abort ();
+	}
+}
+
+void
+doTests11110011 (vector unsigned char a_sources [],
+		 vector unsigned char b_sources [],
+		 vector unsigned char c_sources []) {
+  for (int i = 0; i < NumSamples; i++)
+    for (int j = 0; j < NumSamples; j++)
+      for (int k = 0; k < NumSamples; k++)
+	{
+	  vector unsigned char a = a_sources [i];
+	  vector unsigned char b = b_sources [j];
+	  vector unsigned char c = c_sources [k];
+	  vector unsigned char result = vec_ternarylogic (a, b, c, 0xfb);
+	  vector unsigned char intended = {
+	    0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
+	  for (int i = 0; i < 16; i++)
+	    intended [i] = b [i] | ~(a [i] & c [i]);
+	  if (!vec_all_eq (result, intended))
+ 	    abort ();
+	}
+}
+
+int main (int argc, char *argv [])
+{
+  vector unsigned char a_sources [NumSamples] = {
+    { 0x01, 0x23, 0x45, 0x67, 0x89, 0xab, 0xcd, 0xef,
+      0x12, 0x34, 0x56, 0x78, 0x9a, 0xbc, 0xde, 0xf0 },
+    { 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55,
+      0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff },
+    { 0xcc, 0xcc, 0xcc, 0xcc, 0x55, 0x55, 0x55, 0x55,
+      0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
+    { 0xe7, 0xe7, 0xe7, 0xe7, 0xe7, 0xe7, 0xe7, 0xe7,
+      0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69 },
+  };
+  vector unsigned char b_sources [NumSamples] = {
+    { 0x01, 0x23, 0x45, 0x67, 0x89, 0xab, 0xcd, 0xef,
+      0x12, 0x34, 0x56, 0x78, 0x9a, 0xbc, 0xde, 0xf0 },
+    { 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55,
+      0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff },
+    { 0xcc, 0xcc, 0xcc, 0xcc, 0x55, 0x55, 0x55, 0x55,
+      0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
+    { 0xe7, 0xe7, 0xe7, 0xe7, 0xe7, 0xe7, 0xe7, 0xe7,
+      0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69 },
+  };
+  vector unsigned char c_sources [NumSamples] = {
+    { 0x01, 0x23, 0x45, 0x67, 0x89, 0xab, 0xcd, 0xef,
+      0x12, 0x34, 0x56, 0x78, 0x9a, 0xbc, 0xde, 0xf0 },
+    { 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55,
+      0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff },
+    { 0xcc, 0xcc, 0xcc, 0xcc, 0x55, 0x55, 0x55, 0x55,
+      0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
+    { 0xe7, 0xe7, 0xe7, 0xe7, 0xe7, 0xe7, 0xe7, 0xe7,
+      0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69 },
+  };
+
+  doTests00000001 (a_sources, b_sources, c_sources);
+  doTests11100101 (a_sources, b_sources, c_sources);
+  doTests11110011 (a_sources, b_sources, c_sources);
+
+  return 0;
+}
+
+/* { dg-final { scan-assembler {\mxxeval\M} } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-1.c b/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-1.c
new file mode 100644
index 0000000..8beb80f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-1.c
@@ -0,0 +1,119 @@
+/* { dg-do run} */
+/* { dg-require-effective-target powerpc_future_hw } */
+/* { dg-options "-mdejagnu-cpu=future" } */
+
+#include <altivec.h>
+
+extern void abort (void);
+
+#define NumSamples 4
+
+void
+doTests00000001 (vector unsigned char a_sources [],
+		 vector unsigned char b_sources [],
+		 vector unsigned char c_sources []) {
+  for (int i = 0; i < NumSamples; i++)
+    for (int j = 0; j < NumSamples; j++)
+      for (int k = 0; k < NumSamples; k++)
+	{
+	  vector unsigned char a = a_sources [i];
+	  vector unsigned char b = b_sources [j];
+	  vector unsigned char c = c_sources [k];
+	  vector unsigned char result = vec_ternarylogic (a, b, c, 0x01);
+	  vector unsigned char intended = (a & b & c);
+	  if (!vec_all_eq (result, intended))
+	    abort ();
+	}
+}
+
+void
+doTests11100101 (vector unsigned char a_sources [],
+		 vector unsigned char b_sources [],
+		 vector unsigned char c_sources []) {
+  for (int i = 0; i < NumSamples; i++)
+    for (int j = 0; j < NumSamples; j++)
+      for (int k = 0; k < NumSamples; k++)
+	{
+	  vector unsigned char a = a_sources [i];
+	  vector unsigned char b = b_sources [j];
+	  vector unsigned char c = c_sources [k];
+	  vector unsigned char result = vec_ternarylogic (a, b, c, 0xe5);
+	  vector unsigned char intended =
+	    { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
+	  // Supposed to be a ? c: nand (b,c)
+	  for (int l = 0; l < 16; l++)
+	    {
+	      for (int m = 0; m < 8; m++)
+	      {
+		unsigned char bit_selector = (0x01 << m);
+		if (a[l] & bit_selector)
+		  intended [l] |= c [l] & bit_selector;
+		else if ((b [l] & c [l] & bit_selector) == 0)
+		  intended [l] |= bit_selector;
+	      }
+	    }
+	  if (!vec_all_eq (result, intended))
+	    abort ();
+	}
+}
+
+void
+doTests11110011 (vector unsigned char a_sources [],
+		 vector unsigned char b_sources [],
+		 vector unsigned char c_sources []) {
+  for (int i = 0; i < NumSamples; i++)
+    for (int j = 0; j < NumSamples; j++)
+      for (int k = 0; k < NumSamples; k++)
+	{
+	  vector unsigned char a = a_sources [i];
+	  vector unsigned char b = b_sources [j];
+	  vector unsigned char c = c_sources [k];
+	  vector unsigned char result = vec_ternarylogic (a, b, c, 0xfb);
+	  vector unsigned char intended = {
+	    0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
+	  for (int i = 0; i < 16; i++)
+	    intended [i] = b [i] | ~(a [i] & c [i]);
+	  if (!vec_all_eq (result, intended))
+	    abort ();
+	}
+}
+
+int main (int argc, char *argv [])
+{
+  vector unsigned char a_sources [NumSamples] = {
+    { 0x01, 0x23, 0x45, 0x67, 0x89, 0xab, 0xcd, 0xef,
+      0x12, 0x34, 0x56, 0x78, 0x9a, 0xbc, 0xde, 0xf0 },
+    { 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55,
+      0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff },
+    { 0xcc, 0xcc, 0xcc, 0xcc, 0x55, 0x55, 0x55, 0x55,
+      0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
+    { 0xe7, 0xe7, 0xe7, 0xe7, 0xe7, 0xe7, 0xe7, 0xe7,
+      0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69 },
+  };
+  vector unsigned char b_sources [NumSamples] = {
+    { 0x01, 0x23, 0x45, 0x67, 0x89, 0xab, 0xcd, 0xef,
+      0x12, 0x34, 0x56, 0x78, 0x9a, 0xbc, 0xde, 0xf0 },
+    { 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55,
+      0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff },
+    { 0xcc, 0xcc, 0xcc, 0xcc, 0x55, 0x55, 0x55, 0x55,
+      0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
+    { 0xe7, 0xe7, 0xe7, 0xe7, 0xe7, 0xe7, 0xe7, 0xe7,
+      0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69 },
+  };
+  vector unsigned char c_sources [NumSamples] = {
+    { 0x01, 0x23, 0x45, 0x67, 0x89, 0xab, 0xcd, 0xef,
+      0x12, 0x34, 0x56, 0x78, 0x9a, 0xbc, 0xde, 0xf0 },
+    { 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55,
+      0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff },
+    { 0xcc, 0xcc, 0xcc, 0xcc, 0x55, 0x55, 0x55, 0x55,
+      0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
+    { 0xe7, 0xe7, 0xe7, 0xe7, 0xe7, 0xe7, 0xe7, 0xe7,
+      0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69 },
+  };
+
+  doTests00000001 (a_sources, b_sources, c_sources);
+  doTests11100101 (a_sources, b_sources, c_sources);
+  doTests11110011 (a_sources, b_sources, c_sources);
+
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-10.c b/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-10.c
new file mode 100644
index 0000000..868fb23
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-10.c
@@ -0,0 +1,129 @@
+/* { dg-do compile } */
+/* { dg-options "-mdejagnu-cpu=future" } */
+
+#include <altivec.h>
+
+extern void abort (void);
+
+#define NumSamples 4
+
+/* vec_all_eq not yet supported for arguments of type
+   vector unsigned __int128.  */
+int
+vector_equal (vector unsigned __int128 a, vector unsigned __int128 b)
+{
+  return a[0] == b[0];
+}
+
+void
+doTests00000001 (vector unsigned __int128 a_sources [],
+		 vector unsigned __int128 b_sources [],
+		 vector unsigned __int128 c_sources []) {
+  for (int i = 0; i < NumSamples; i++)
+    for (int j = 0; j < NumSamples; j++)
+      for (int k = 0; k < NumSamples; k++)
+	{
+	  vector unsigned __int128 a = a_sources [i];
+	  vector unsigned __int128 b = b_sources [j];
+	  vector unsigned __int128 c = c_sources [k];
+	  vector unsigned __int128 result;
+	  result = vec_ternarylogic (a, b, c, 0xfff); /* { dg-error "8-bit unsigned literal" } */
+	  vector unsigned __int128 intended = (a & b & c);
+	  if (!vector_equal (result, intended))
+	    abort ();
+	}
+}
+
+void
+doTests11100101 (vector unsigned __int128 a_sources [],
+		 vector unsigned __int128 b_sources [],
+		 vector unsigned __int128 c_sources []) {
+  for (int i = 0; i < NumSamples; i++)
+    for (int j = 0; j < NumSamples; j++)
+      for (int k = 0; k < NumSamples; k++)
+	{
+	  vector unsigned __int128 a = a_sources [i];
+	  vector unsigned __int128 b = b_sources [j];
+	  vector unsigned __int128 c = c_sources [k];
+	  vector unsigned __int128 result;
+	  result = vec_ternarylogic (a, b, c, -1); /* { dg-error "8-bit unsigned literal" } */
+	  vector unsigned __int128 intended = { 0 };
+	  // Supposed to be a ? c: nand (b,c)
+	  for (int l = 0; l < 1; l++)
+	    {
+	      for (int m = 0; m < 128; m++)
+	      {
+		unsigned __int128 bit_selector = 0x01;
+		bit_selector = bit_selector << m;
+
+		if (a[l] & bit_selector)
+		  intended [l] |= c [l] & bit_selector;
+		else if ((b [l] & c [l] & bit_selector) == 0)
+		  intended [l] |= bit_selector;
+	      }
+	    }
+	  if (!vector_equal (result, intended))
+	    abort ();
+	}
+}
+
+void
+doTests11110011 (vector unsigned __int128 a_sources [],
+		 vector unsigned __int128 b_sources [],
+		 vector unsigned __int128 c_sources []) {
+  for (int i = 0; i < NumSamples; i++)
+    for (int j = 0; j < NumSamples; j++)
+      for (int k = 0; k < NumSamples; k++)
+	{
+	  vector unsigned __int128 a = a_sources [i];
+	  vector unsigned __int128 b = b_sources [j];
+	  vector unsigned __int128 c = c_sources [k];
+	  vector unsigned __int128 result;
+	  result = vec_ternarylogic (a, b, c, i);  /* { dg-error "8-bit unsigned literal" } */
+	  vector unsigned __int128 intended = { 0 };
+	  for (int i = 0; i < 1; i++)
+	    intended [i] = b [i] | ~(a [i] & c [i]);
+	  if (!vector_equal (result, intended))
+	    abort ();
+	}
+}
+
+int main (int argc, int *argv [])
+{
+  vector unsigned __int128 a_sources [NumSamples];
+  vector unsigned __int128 b_sources [NumSamples];
+  vector unsigned __int128 c_sources [NumSamples];
+
+  a_sources [0][0] = 0x0123456789abcdefull;
+  a_sources [0][0] = a_sources [0][0] << 64 | 0x123456789abcdef0ull;
+  a_sources [1][0] = 0x5555555555555555ull;
+  a_sources [1][0] = a_sources [1][0] << 64 | 0xffffffffffffffffull;
+  a_sources [2][0] = 0xcccccccc55555555ull;
+  a_sources [2][0] = a_sources [2][0] << 64 | 0x0000000000000000ull;
+  a_sources [3][0] = 0xe7e7e7e7e7e7e7e7ull;
+  a_sources [3][0] = a_sources [3][0] << 64 | 0x6969696969696969ull;
+
+  b_sources [0][0] = 0x0123456789abcdefull;
+  b_sources [0][0] = b_sources [0][0] << 64 | 0x123456789abcdef0ull;
+  b_sources [1][0] = 0x5555555555555555ull;
+  b_sources [1][0] = b_sources [1][0] << 64 | 0xffffffffffffffffull;
+  b_sources [2][0] = 0xcccccccc55555555ull;
+  b_sources [2][0] = b_sources [2][0] << 64 | 0x0000000000000000ull;
+  b_sources [3][0] = 0xe7e7e7e7e7e7e7e7ull;
+  b_sources [3][0] = b_sources [3][0] << 64 | 0x6969696969696969ull;
+
+  c_sources [0][0] = 0x0123456789abcdefull;
+  c_sources [0][0] = c_sources [0][0] << 64 | 0x123456789abcdef0ull;
+  c_sources [1][0] = 0x5555555555555555ull;
+  c_sources [1][0] = c_sources [1][0] << 64 | 0xffffffffffffffffull;
+  c_sources [2][0] = 0xcccccccc55555555ull;
+  c_sources [2][0] = c_sources [2][0] << 64 | 0x0000000000000000ull;
+  c_sources [3][0] = 0xe7e7e7e7e7e7e7e7ull;
+  c_sources [3][0] = c_sources [3][0] << 64 | 0x6969696969696969ull;
+
+  doTests00000001 (a_sources, b_sources, c_sources);
+  doTests11100101 (a_sources, b_sources, c_sources);
+  doTests11110011 (a_sources, b_sources, c_sources);
+
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-2.c b/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-2.c
new file mode 100644
index 0000000..0d482b8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-2.c
@@ -0,0 +1,105 @@
+/* { dg-do compile } */
+/* { dg-options "-mdejagnu-cpu=future" } */
+
+#include <altivec.h>
+
+extern void abort (void);
+
+#define NumSamples 4
+
+void
+doTests00000001 (vector unsigned short int a_sources [],
+		 vector unsigned short int b_sources [],
+		 vector unsigned short int c_sources []) {
+  for (int i = 0; i < NumSamples; i++)
+    for (int j = 0; j < NumSamples; j++)
+      for (int k = 0; k < NumSamples; k++)
+	{
+	  vector unsigned short a = a_sources [i];
+	  vector unsigned short b = b_sources [j];
+	  vector unsigned short c = c_sources [k];
+	  vector unsigned short result = vec_ternarylogic (a, b, c, 0x01);
+	  vector unsigned short intended = (a & b & c);
+	  if (!vec_all_eq (result, intended))
+	    abort ();
+	}
+}
+
+void doTests11100101 (vector unsigned short int a_sources [],
+		      vector unsigned short int b_sources [],
+		      vector unsigned short int c_sources []) {
+  for (int i = 0; i < NumSamples; i++)
+    for (int j = 0; j < NumSamples; j++)
+      for (int k = 0; k < NumSamples; k++)
+	{
+	  vector unsigned short a = a_sources [i];
+	  vector unsigned short b = b_sources [j];
+	  vector unsigned short c = c_sources [k];
+	  vector unsigned short result = vec_ternarylogic (a, b, c, 0xe5);
+	  vector unsigned short intended =
+	    { 0, 0, 0, 0, 0, 0, 0, 0 };
+	  // Supposed to be a ? c: nand (b,c)
+	  for (int l = 0; l < 8; l++)
+	    {
+	      for (int m = 0; m < 16; m++)
+	      {
+		unsigned short int bit_selector = (0x01 << m);
+		if (a[l] & bit_selector)
+		  intended [l] |= c [l] & bit_selector;
+		else if ((b [l] & c [l] & bit_selector) == 0)
+		  intended [l] |= bit_selector;
+	      }
+	    }
+	  if (!vec_all_eq (result, intended))
+	    abort ();
+	}
+}
+
+void doTests11110011 (vector unsigned short int a_sources [],
+		      vector unsigned short int b_sources [],
+		      vector unsigned short int c_sources []) {
+  for (int i = 0; i < NumSamples; i++)
+    for (int j = 0; j < NumSamples; j++)
+      for (int k = 0; k < NumSamples; k++)
+	{
+	  vector unsigned short a = a_sources [i];
+	  vector unsigned short b = b_sources [j];
+	  vector unsigned short c = c_sources [k];
+	  vector unsigned short result = vec_ternarylogic (a, b, c, 0xfb);
+	  vector unsigned short intended = { 0, 0, 0, 0, 0, 0, 0, 0 };
+	  for (int i = 0; i < 8; i++)
+	    intended [i] = b [i] | ~(a [i] & c [i]);
+	  if (!vec_all_eq (result, intended))
+	    abort ();
+	}
+}
+
+int main (int argc, short *argv [])
+{
+  vector unsigned short int a_sources [NumSamples] = {
+    { 0x0123, 0x4567, 0x89ab, 0xcdef, 0x1234, 0x5678, 0x9abc, 0xdef0 },
+    { 0x5555, 0x5555, 0x5555, 0x5555, 0xffff, 0xffff, 0xffff, 0xffff },
+    { 0xcccc, 0xcccc, 0x5555, 0x5555, 0x0000, 0x0000, 0x0000, 0x0000 },
+    { 0xe7e7, 0xe7e7, 0xe7e7, 0xe7e7, 0x6969, 0x6969, 0x6969, 0x6969 },
+  };
+  vector unsigned short int b_sources [NumSamples] = {
+    { 0x0123, 0x4567, 0x89ab, 0xcdef, 0x1234, 0x5678, 0x9abc, 0xdef0 },
+    { 0x5555, 0x5555, 0x5555, 0x5555, 0xffff, 0xffff, 0xffff, 0xffff },
+    { 0xcccc, 0xcccc, 0x5555, 0x5555, 0x0000, 0x0000, 0x0000, 0x0000 },
+    { 0xe7e7, 0xe7e7, 0xe7e7, 0xe7e7, 0x6969, 0x6969, 0x6969, 0x6969 },
+  };
+  vector unsigned short int c_sources [NumSamples] = {
+    { 0x0123, 0x4567, 0x89ab, 0xcdef, 0x1234, 0x5678, 0x9abc, 0xdef0 },
+    { 0x5555, 0x5555, 0x5555, 0x5555, 0xffff, 0xffff, 0xffff, 0xffff },
+    { 0xcccc, 0xcccc, 0x5555, 0x5555, 0x0000, 0x0000, 0x0000, 0x0000 },
+    { 0xe7e7, 0xe7e7, 0xe7e7, 0xe7e7, 0x6969, 0x6969, 0x6969, 0x6969 },
+  };
+
+  doTests00000001 (a_sources, b_sources, c_sources);
+  doTests11100101 (a_sources, b_sources, c_sources);
+  doTests11110011 (a_sources, b_sources, c_sources);
+
+  return 0;
+}
+
+/* { dg-final { scan-assembler {\mxxeval\M} } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-3.c b/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-3.c
new file mode 100644
index 0000000..a7245e5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-3.c
@@ -0,0 +1,106 @@
+/* { dg-do run } */
+/* { dg-require-effective-target powerpc_future_hw } */
+/* { dg-options "-mdejagnu-cpu=future" } */
+
+#include <altivec.h>
+
+extern void abort (void);
+
+#define NumSamples 4
+
+void
+doTests00000001 (vector unsigned short int a_sources [],
+		 vector unsigned short int b_sources [],
+		 vector unsigned short int c_sources []) {
+  for (int i = 0; i < NumSamples; i++)
+    for (int j = 0; j < NumSamples; j++)
+      for (int k = 0; k < NumSamples; k++)
+	{
+	  vector unsigned short a = a_sources [i];
+	  vector unsigned short b = b_sources [j];
+	  vector unsigned short c = c_sources [k];
+	  vector unsigned short result = vec_ternarylogic (a, b, c, 0x01);
+	  vector unsigned short intended = (a & b & c);
+	  if (!vec_all_eq (result, intended))
+	    abort ();
+	}
+}
+
+void doTests11100101 (vector unsigned short int a_sources [],
+		      vector unsigned short int b_sources [],
+		      vector unsigned short int c_sources []) {
+  for (int i = 0; i < NumSamples; i++)
+    for (int j = 0; j < NumSamples; j++)
+      for (int k = 0; k < NumSamples; k++)
+	{
+	  vector unsigned short a = a_sources [i];
+	  vector unsigned short b = b_sources [j];
+	  vector unsigned short c = c_sources [k];
+	  vector unsigned short result = vec_ternarylogic (a, b, c, 0xe5);
+	  vector unsigned short intended =
+	    { 0, 0, 0, 0, 0, 0, 0, 0 };
+	  // Supposed to be a ? c: nand (b,c)
+	  for (int l = 0; l < 8; l++)
+	    {
+	      for (int m = 0; m < 16; m++)
+	      {
+		unsigned short int bit_selector = (0x01 << m);
+		if (a[l] & bit_selector)
+		  intended [l] |= c [l] & bit_selector;
+		else if ((b [l] & c [l] & bit_selector) == 0)
+		  intended [l] |= bit_selector;
+	      }
+	    }
+	  if (!vec_all_eq (result, intended))
+	    abort ();
+	}
+}
+
+void doTests11110011 (vector unsigned short int a_sources [],
+		      vector unsigned short int b_sources [],
+		      vector unsigned short int c_sources []) {
+  for (int i = 0; i < NumSamples; i++)
+    for (int j = 0; j < NumSamples; j++)
+      for (int k = 0; k < NumSamples; k++)
+	{
+	  vector unsigned short a = a_sources [i];
+	  vector unsigned short b = b_sources [j];
+	  vector unsigned short c = c_sources [k];
+	  vector unsigned short result = vec_ternarylogic (a, b, c, 0xfb);
+	  vector unsigned short intended = { 0, 0, 0, 0, 0, 0, 0, 0 };
+	  for (int i = 0; i < 8; i++)
+	    intended [i] = b [i] | ~(a [i] & c [i]);
+	  if (!vec_all_eq (result, intended))
+	    abort ();
+	}
+}
+
+int main (int argc, short *argv [])
+{
+  vector unsigned short int a_sources [NumSamples] = {
+    { 0x0123, 0x4567, 0x89ab, 0xcdef, 0x1234, 0x5678, 0x9abc, 0xdef0 },
+    { 0x5555, 0x5555, 0x5555, 0x5555, 0xffff, 0xffff, 0xffff, 0xffff },
+    { 0xcccc, 0xcccc, 0x5555, 0x5555, 0x0000, 0x0000, 0x0000, 0x0000 },
+    { 0xe7e7, 0xe7e7, 0xe7e7, 0xe7e7, 0x6969, 0x6969, 0x6969, 0x6969 },
+  };
+  vector unsigned short int b_sources [NumSamples] = {
+    { 0x0123, 0x4567, 0x89ab, 0xcdef, 0x1234, 0x5678, 0x9abc, 0xdef0 },
+    { 0x5555, 0x5555, 0x5555, 0x5555, 0xffff, 0xffff, 0xffff, 0xffff },
+    { 0xcccc, 0xcccc, 0x5555, 0x5555, 0x0000, 0x0000, 0x0000, 0x0000 },
+    { 0xe7e7, 0xe7e7, 0xe7e7, 0xe7e7, 0x6969, 0x6969, 0x6969, 0x6969 },
+  };
+  vector unsigned short int c_sources [NumSamples] = {
+    { 0x0123, 0x4567, 0x89ab, 0xcdef, 0x1234, 0x5678, 0x9abc, 0xdef0 },
+    { 0x5555, 0x5555, 0x5555, 0x5555, 0xffff, 0xffff, 0xffff, 0xffff },
+    { 0xcccc, 0xcccc, 0x5555, 0x5555, 0x0000, 0x0000, 0x0000, 0x0000 },
+    { 0xe7e7, 0xe7e7, 0xe7e7, 0xe7e7, 0x6969, 0x6969, 0x6969, 0x6969 },
+  };
+
+  doTests00000001 (a_sources, b_sources, c_sources);
+  doTests11100101 (a_sources, b_sources, c_sources);
+  doTests11110011 (a_sources, b_sources, c_sources);
+
+  return 0;
+}
+
+/* { dg-final { scan-assembler {\mxxeval\M} } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-4.c b/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-4.c
new file mode 100644
index 0000000..dbd9ffb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-4.c
@@ -0,0 +1,104 @@
+/* { dg-do compile } */
+/* { dg-options "-mdejagnu-cpu=future" } */
+
+#include <altivec.h>
+
+extern void abort (void);
+
+#define NumSamples 4
+
+void
+doTests00000001 (vector unsigned int a_sources [],
+		 vector unsigned int b_sources [],
+		 vector unsigned int c_sources []) {
+  for (int i = 0; i < NumSamples; i++)
+    for (int j = 0; j < NumSamples; j++)
+      for (int k = 0; k < NumSamples; k++)
+	{
+	  vector unsigned int a = a_sources [i];
+	  vector unsigned int b = b_sources [j];
+	  vector unsigned int c = c_sources [k];
+	  vector unsigned int result = vec_ternarylogic (a, b, c, 0x01);
+	  vector unsigned int intended = (a & b & c);
+	  if (!vec_all_eq (result, intended))
+	    abort ();
+	}
+}
+
+void doTests11100101 (vector unsigned int a_sources [],
+		      vector unsigned int b_sources [],
+		      vector unsigned int c_sources []) {
+  for (int i = 0; i < NumSamples; i++)
+    for (int j = 0; j < NumSamples; j++)
+      for (int k = 0; k < NumSamples; k++)
+	{
+	  vector unsigned int a = a_sources [i];
+	  vector unsigned int b = b_sources [j];
+	  vector unsigned int c = c_sources [k];
+	  vector unsigned int result = vec_ternarylogic (a, b, c, 0xe5);
+	  vector unsigned int intended = { 0, 0, 0, 0 };
+	  // Supposed to be a ? c: nand (b,c)
+	  for (int l = 0; l < 4; l++)
+	    {
+	      for (int m = 0; m < 32; m++)
+	      {
+		unsigned int bit_selector = (0x01 << m);
+		if (a[l] & bit_selector)
+		  intended [l] |= c [l] & bit_selector;
+		else if ((b [l] & c [l] & bit_selector) == 0)
+		  intended [l] |= bit_selector;
+	      }
+	    }
+	  if (!vec_all_eq (result, intended))
+	    abort ();
+	}
+}
+
+void doTests11110011 (vector unsigned int a_sources [],
+		      vector unsigned int b_sources [],
+		      vector unsigned int c_sources []) {
+  for (int i = 0; i < NumSamples; i++)
+    for (int j = 0; j < NumSamples; j++)
+      for (int k = 0; k < NumSamples; k++)
+	{
+	  vector unsigned int a = a_sources [i];
+	  vector unsigned int b = b_sources [j];
+	  vector unsigned int c = c_sources [k];
+	  vector unsigned int result = vec_ternarylogic (a, b, c, 0xfb);
+	  vector unsigned int intended = { 0, 0, 0, 0 };
+	  for (int i = 0; i < 4; i++)
+	    intended [i] = b [i] | ~(a [i] & c [i]);
+	  if (!vec_all_eq (result, intended))
+	    abort ();
+	}
+}
+
+int main (int argc, int *argv [])
+{
+  vector unsigned int a_sources [NumSamples] = {
+    { 0x01234567, 0x89abcdef, 0x12345678, 0x9abcdef0 },
+    { 0x55555555, 0x55555555, 0xffffffff, 0xffffffff },
+    { 0xcccccccc, 0x55555555, 0x00000000, 0x00000000 },
+    { 0xe7e7e7e7, 0xe7e7e7e7, 0x69696969, 0x69696969 },
+  };
+  vector unsigned int b_sources [NumSamples] = {
+    { 0x01234567, 0x89abcdef, 0x12345678, 0x9abcdef0 },
+    { 0x55555555, 0x55555555, 0xffffffff, 0xffffffff },
+    { 0xcccccccc, 0x55555555, 0x00000000, 0x00000000 },
+    { 0xe7e7e7e7, 0xe7e7e7e7, 0x69696969, 0x69696969 },
+  };
+  vector unsigned int c_sources [NumSamples] = {
+    { 0x01234567, 0x89abcdef, 0x12345678, 0x9abcdef0 },
+    { 0x55555555, 0x55555555, 0xffffffff, 0xffffffff },
+    { 0xcccccccc, 0x55555555, 0x00000000, 0x00000000 },
+    { 0xe7e7e7e7, 0xe7e7e7e7, 0x69696969, 0x69696969 },
+  };
+
+  doTests00000001 (a_sources, b_sources, c_sources);
+  doTests11100101 (a_sources, b_sources, c_sources);
+  doTests11110011 (a_sources, b_sources, c_sources);
+
+  return 0;
+}
+
+/* { dg-final { scan-assembler {\mxxeval\M} } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-5.c b/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-5.c
new file mode 100644
index 0000000..4d5d8e5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-5.c
@@ -0,0 +1,103 @@
+/* { dg-do run } */
+/* { dg-require-effective-target powerpc_future_hw } */
+/* { dg-options "-mdejagnu-cpu=future" } */
+
+#include <altivec.h>
+
+extern void abort (void);
+
+#define NumSamples 4
+
+void
+doTests00000001 (vector unsigned int a_sources [],
+		 vector unsigned int b_sources [],
+		 vector unsigned int c_sources []) {
+  for (int i = 0; i < NumSamples; i++)
+    for (int j = 0; j < NumSamples; j++)
+      for (int k = 0; k < NumSamples; k++)
+	{
+	  vector unsigned int a = a_sources [i];
+	  vector unsigned int b = b_sources [j];
+	  vector unsigned int c = c_sources [k];
+	  vector unsigned int result = vec_ternarylogic (a, b, c, 0x01);
+	  vector unsigned int intended = (a & b & c);
+	  if (!vec_all_eq (result, intended))
+	    abort ();
+	}
+}
+
+void doTests11100101 (vector unsigned int a_sources [],
+		      vector unsigned int b_sources [],
+		      vector unsigned int c_sources []) {
+  for (int i = 0; i < NumSamples; i++)
+    for (int j = 0; j < NumSamples; j++)
+      for (int k = 0; k < NumSamples; k++)
+	{
+	  vector unsigned int a = a_sources [i];
+	  vector unsigned int b = b_sources [j];
+	  vector unsigned int c = c_sources [k];
+	  vector unsigned int result = vec_ternarylogic (a, b, c, 0xe5);
+	  vector unsigned int intended = { 0, 0, 0, 0 };
+	  // Supposed to be a ? c: nand (b,c)
+	  for (int l = 0; l < 4; l++)
+	    {
+	      for (int m = 0; m < 32; m++)
+	      {
+		unsigned int bit_selector = (0x01 << m);
+		if (a[l] & bit_selector)
+		  intended [l] |= c [l] & bit_selector;
+		else if ((b [l] & c [l] & bit_selector) == 0)
+		  intended [l] |= bit_selector;
+	      }
+	    }
+	  if (!vec_all_eq (result, intended))
+	    abort ();
+	}
+}
+
+void doTests11110011 (vector unsigned int a_sources [],
+		      vector unsigned int b_sources [],
+		      vector unsigned int c_sources []) {
+  for (int i = 0; i < NumSamples; i++)
+    for (int j = 0; j < NumSamples; j++)
+      for (int k = 0; k < NumSamples; k++)
+	{
+	  vector unsigned int a = a_sources [i];
+	  vector unsigned int b = b_sources [j];
+	  vector unsigned int c = c_sources [k];
+	  vector unsigned int result = vec_ternarylogic (a, b, c, 0xfb);
+	  vector unsigned int intended = { 0, 0, 0, 0 };
+	  for (int i = 0; i < 4; i++)
+	    intended [i] = b [i] | ~(a [i] & c [i]);
+	  if (!vec_all_eq (result, intended))
+	    abort ();
+	}
+}
+
+int main (int argc, int *argv [])
+{
+  vector unsigned int a_sources [NumSamples] = {
+    { 0x01234567, 0x89abcdef, 0x12345678, 0x9abcdef0 },
+    { 0x55555555, 0x55555555, 0xffffffff, 0xffffffff },
+    { 0xcccccccc, 0x55555555, 0x00000000, 0x00000000 },
+    { 0xe7e7e7e7, 0xe7e7e7e7, 0x69696969, 0x69696969 },
+  };
+  vector unsigned int b_sources [NumSamples] = {
+    { 0x01234567, 0x89abcdef, 0x12345678, 0x9abcdef0 },
+    { 0x55555555, 0x55555555, 0xffffffff, 0xffffffff },
+    { 0xcccccccc, 0x55555555, 0x00000000, 0x00000000 },
+    { 0xe7e7e7e7, 0xe7e7e7e7, 0x69696969, 0x69696969 },
+  };
+  vector unsigned int c_sources [NumSamples] = {
+    { 0x01234567, 0x89abcdef, 0x12345678, 0x9abcdef0 },
+    { 0x55555555, 0x55555555, 0xffffffff, 0xffffffff },
+    { 0xcccccccc, 0x55555555, 0x00000000, 0x00000000 },
+    { 0xe7e7e7e7, 0xe7e7e7e7, 0x69696969, 0x69696969 },
+  };
+
+  doTests00000001 (a_sources, b_sources, c_sources);
+  doTests11100101 (a_sources, b_sources, c_sources);
+  doTests11110011 (a_sources, b_sources, c_sources);
+
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-6.c b/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-6.c
new file mode 100644
index 0000000..0114bac
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-6.c
@@ -0,0 +1,104 @@
+/* { dg-do compile } */
+/* { dg-options "-mdejagnu-cpu=future" } */
+
+#include <altivec.h>
+
+extern void abort (void);
+
+#define NumSamples 4
+
+void
+doTests00000001 (vector unsigned long long int a_sources [],
+		 vector unsigned long long int b_sources [],
+		 vector unsigned long long int c_sources []) {
+  for (int i = 0; i < NumSamples; i++)
+    for (int j = 0; j < NumSamples; j++)
+      for (int k = 0; k < NumSamples; k++)
+	{
+	  vector unsigned long long a = a_sources [i];
+	  vector unsigned long long b = b_sources [j];
+	  vector unsigned long long c = c_sources [k];
+	  vector unsigned long long result = vec_ternarylogic (a, b, c, 0x01);
+	  vector unsigned long long intended = (a & b & c);
+	  if (!vec_all_eq (result, intended))
+	    abort ();
+	}
+}
+
+void doTests11100101 (vector unsigned long long int a_sources [],
+		      vector unsigned long long int b_sources [],
+		      vector unsigned long long int c_sources []) {
+  for (int i = 0; i < NumSamples; i++)
+    for (int j = 0; j < NumSamples; j++)
+      for (int k = 0; k < NumSamples; k++)
+	{
+	  vector unsigned long long a = a_sources [i];
+	  vector unsigned long long b = b_sources [j];
+	  vector unsigned long long c = c_sources [k];
+	  vector unsigned long long result = vec_ternarylogic (a, b, c, 0xe5);
+	  vector unsigned long long intended = { 0, 0 };
+	  // Supposed to be a ? c: nand (b,c)
+	  for (int l = 0; l < 2; l++)
+	    {
+	      for (int m = 0; m < 64; m++)
+	      {
+		unsigned long long int bit_selector = (0x01ll << m);
+		if (a[l] & bit_selector)
+		  intended [l] |= c [l] & bit_selector;
+		else if ((b [l] & c [l] & bit_selector) == 0)
+		  intended [l] |= (0x01ll << m);
+	      }
+	    }
+	  if (!vec_all_eq (result, intended))
+	    abort ();
+	}
+}
+
+void doTests11110011 (vector unsigned long long int a_sources [],
+		      vector unsigned long long int b_sources [],
+		      vector unsigned long long int c_sources []) {
+  for (int i = 0; i < NumSamples; i++)
+    for (int j = 0; j < NumSamples; j++)
+      for (int k = 0; k < NumSamples; k++)
+	{
+	  vector unsigned long long a = a_sources [i];
+	  vector unsigned long long b = b_sources [j];
+	  vector unsigned long long c = c_sources [k];
+	  vector unsigned long long result = vec_ternarylogic (a, b, c, 0xfb);
+	  vector unsigned long long intended = { 0, 0 };
+	  intended [0] = b [0] | ~(a [0] & c [0]);
+	  intended [1] = b [1] | ~(a [1] & c [1]);
+	  if (!vec_all_eq (result, intended))
+	    abort ();
+	}
+}
+
+int main (int argc, char *argv [])
+{
+  vector unsigned long long int a_sources [NumSamples] = {
+    { 0x0123456789abcdef, 0x123456789abcdef0 },
+    { 0x5555555555555555, 0xffffffffffffffff },
+    { 0xcccccccc55555555, 0x0000000000000000 },
+    { 0xe7e7e7e7e7e7e7e7, 0x6969696969696969 },
+  };
+  vector unsigned long long int b_sources [NumSamples] = {
+    { 0x0123456789abcdef, 0x123456789abcdef0 },
+    { 0x5555555555555555, 0xffffffffffffffff },
+    { 0xcccccccc55555555, 0x0000000000000000 },
+    { 0xe7e7e7e7e7e7e7e7, 0x6969696969696969 },
+  };
+  vector unsigned long long int c_sources [NumSamples] = {
+    { 0x0123456789abcdef, 0x123456789abcdef0 },
+    { 0x5555555555555555, 0xffffffffffffffff },
+    { 0xcccccccc55555555, 0x0000000000000000 },
+    { 0xe7e7e7e7e7e7e7e7, 0x6969696969696969 },
+  };
+
+  doTests00000001 (a_sources, b_sources, c_sources);
+  doTests11100101 (a_sources, b_sources, c_sources);
+  doTests11110011 (a_sources, b_sources, c_sources);
+
+  return 0;
+}
+
+/* { dg-final { scan-assembler {\mxxeval\M} } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-7.c b/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-7.c
new file mode 100644
index 0000000..27ac4a2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-7.c
@@ -0,0 +1,103 @@
+/* { dg-do run } */
+/* { dg-require-effective-target powerpc_future_hw } */
+/* { dg-options "-mdejagnu-cpu=future" } */
+
+#include <altivec.h>
+
+extern void abort (void);
+
+#define NumSamples 4
+
+void
+doTests00000001 (vector unsigned long long int a_sources [],
+		 vector unsigned long long int b_sources [],
+		 vector unsigned long long int c_sources []) {
+  for (int i = 0; i < NumSamples; i++)
+    for (int j = 0; j < NumSamples; j++)
+      for (int k = 0; k < NumSamples; k++)
+	{
+	  vector unsigned long long a = a_sources [i];
+	  vector unsigned long long b = b_sources [j];
+	  vector unsigned long long c = c_sources [k];
+	  vector unsigned long long result = vec_ternarylogic (a, b, c, 0x01);
+	  vector unsigned long long intended = (a & b & c);
+	  if (!vec_all_eq (result, intended))
+	    abort ();
+	}
+}
+
+void doTests11100101 (vector unsigned long long int a_sources [],
+		      vector unsigned long long int b_sources [],
+		      vector unsigned long long int c_sources []) {
+  for (int i = 0; i < NumSamples; i++)
+    for (int j = 0; j < NumSamples; j++)
+      for (int k = 0; k < NumSamples; k++)
+	{
+	  vector unsigned long long a = a_sources [i];
+	  vector unsigned long long b = b_sources [j];
+	  vector unsigned long long c = c_sources [k];
+	  vector unsigned long long result = vec_ternarylogic (a, b, c, 0xe5);
+	  vector unsigned long long intended = { 0, 0 };
+	  // Supposed to be a ? c: nand (b,c)
+	  for (int l = 0; l < 2; l++)
+	    {
+	      for (int m = 0; m < 64; m++)
+	      {
+		unsigned long long int bit_selector = (0x01ll << m);
+		if (a[l] & bit_selector)
+		  intended [l] |= c [l] & bit_selector;
+		else if ((b [l] & c [l] & bit_selector) == 0)
+		  intended [l] |= (0x01ll << m);
+	      }
+	    }
+	  if (!vec_all_eq (result, intended))
+	    abort ();
+	}
+}
+
+void doTests11110011 (vector unsigned long long int a_sources [],
+		      vector unsigned long long int b_sources [],
+		      vector unsigned long long int c_sources []) {
+  for (int i = 0; i < NumSamples; i++)
+    for (int j = 0; j < NumSamples; j++)
+      for (int k = 0; k < NumSamples; k++)
+	{
+	  vector unsigned long long a = a_sources [i];
+	  vector unsigned long long b = b_sources [j];
+	  vector unsigned long long c = c_sources [k];
+	  vector unsigned long long result = vec_ternarylogic (a, b, c, 0xfb);
+	  vector unsigned long long intended = { 0, 0 };
+	  intended [0] = b [0] | ~(a [0] & c [0]);
+	  intended [1] = b [1] | ~(a [1] & c [1]);
+	  if (!vec_all_eq (result, intended))
+	    abort ();
+	}
+}
+
+int main (int argc, char *argv [])
+{
+  vector unsigned long long int a_sources [NumSamples] = {
+    { 0x0123456789abcdef, 0x123456789abcdef0 },
+    { 0x5555555555555555, 0xffffffffffffffff },
+    { 0xcccccccc55555555, 0x0000000000000000 },
+    { 0xe7e7e7e7e7e7e7e7, 0x6969696969696969 },
+  };
+  vector unsigned long long int b_sources [NumSamples] = {
+    { 0x0123456789abcdef, 0x123456789abcdef0 },
+    { 0x5555555555555555, 0xffffffffffffffff },
+    { 0xcccccccc55555555, 0x0000000000000000 },
+    { 0xe7e7e7e7e7e7e7e7, 0x6969696969696969 },
+  };
+  vector unsigned long long int c_sources [NumSamples] = {
+    { 0x0123456789abcdef, 0x123456789abcdef0 },
+    { 0x5555555555555555, 0xffffffffffffffff },
+    { 0xcccccccc55555555, 0x0000000000000000 },
+    { 0xe7e7e7e7e7e7e7e7, 0x6969696969696969 },
+  };
+
+  doTests00000001 (a_sources, b_sources, c_sources);
+  doTests11100101 (a_sources, b_sources, c_sources);
+  doTests11110011 (a_sources, b_sources, c_sources);
+
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-8.c b/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-8.c
new file mode 100644
index 0000000..0d6b9e7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-8.c
@@ -0,0 +1,128 @@
+/* { dg-do compile } */
+/* { dg-options "-mdejagnu-cpu=future" } */
+
+#include <altivec.h>
+
+extern void abort (void);
+
+#define NumSamples 4
+
+/* vec_all_eq not yet supported for arguments of type
+   vector unsigned __int128.  */
+int
+vector_equal (vector unsigned __int128 a, vector unsigned __int128 b)
+{
+  return a[0] == b[0];
+}
+
+void
+doTests00000001 (vector unsigned __int128 a_sources [],
+		 vector unsigned __int128 b_sources [],
+		 vector unsigned __int128 c_sources []) {
+  for (int i = 0; i < NumSamples; i++)
+    for (int j = 0; j < NumSamples; j++)
+      for (int k = 0; k < NumSamples; k++)
+	{
+	  vector unsigned __int128 a = a_sources [i];
+	  vector unsigned __int128 b = b_sources [j];
+	  vector unsigned __int128 c = c_sources [k];
+	  vector unsigned __int128 result = vec_ternarylogic (a, b, c, 0x01);
+	  vector unsigned __int128 intended = (a & b & c);
+	  if (!vector_equal (result, intended))
+	    abort ();
+	}
+}
+
+void
+doTests11100101 (vector unsigned __int128 a_sources [],
+		 vector unsigned __int128 b_sources [],
+		 vector unsigned __int128 c_sources []) {
+  for (int i = 0; i < NumSamples; i++)
+    for (int j = 0; j < NumSamples; j++)
+      for (int k = 0; k < NumSamples; k++)
+	{
+	  vector unsigned __int128 a = a_sources [i];
+	  vector unsigned __int128 b = b_sources [j];
+	  vector unsigned __int128 c = c_sources [k];
+	  vector unsigned __int128 result = vec_ternarylogic (a, b, c, 0xe5);
+	  vector unsigned __int128 intended = { 0 };
+	  // Supposed to be a ? c: nand (b,c)
+	  for (int l = 0; l < 1; l++)
+	    {
+	      for (int m = 0; m < 128; m++)
+	      {
+		unsigned __int128 bit_selector = 0x01;
+		bit_selector = bit_selector << m;
+
+		if (a[l] & bit_selector)
+		  intended [l] |= c [l] & bit_selector;
+		else if ((b [l] & c [l] & bit_selector) == 0)
+		  intended [l] |= bit_selector;
+	      }
+	    }
+	  if (!vector_equal (result, intended))
+	    abort ();
+	}
+}
+
+void
+doTests11110011 (vector unsigned __int128 a_sources [],
+		 vector unsigned __int128 b_sources [],
+		 vector unsigned __int128 c_sources []) {
+  for (int i = 0; i < NumSamples; i++)
+    for (int j = 0; j < NumSamples; j++)
+      for (int k = 0; k < NumSamples; k++)
+	{
+	  vector unsigned __int128 a = a_sources [i];
+	  vector unsigned __int128 b = b_sources [j];
+	  vector unsigned __int128 c = c_sources [k];
+	  vector unsigned __int128 result = vec_ternarylogic (a, b, c, 0xfb);
+	  vector unsigned __int128 intended = { 0 };
+	  for (int i = 0; i < 1; i++)
+	    intended [i] = b [i] | ~(a [i] & c [i]);
+	  if (!vector_equal (result, intended))
+	    abort ();
+	}
+}
+
+int main (int argc, int *argv [])
+{
+  vector unsigned __int128 a_sources [NumSamples];
+  vector unsigned __int128 b_sources [NumSamples];
+  vector unsigned __int128 c_sources [NumSamples];
+
+  a_sources [0][0] = 0x0123456789abcdefull;
+  a_sources [0][0] = a_sources [0][0] << 64 | 0x123456789abcdef0ull;
+  a_sources [1][0] = 0x5555555555555555ull;
+  a_sources [1][0] = a_sources [1][0] << 64 | 0xffffffffffffffffull;
+  a_sources [2][0] = 0xcccccccc55555555ull;
+  a_sources [2][0] = a_sources [2][0] << 64 | 0x0000000000000000ull;
+  a_sources [3][0] = 0xe7e7e7e7e7e7e7e7ull;
+  a_sources [3][0] = a_sources [3][0] << 64 | 0x6969696969696969ull;
+
+  b_sources [0][0] = 0x0123456789abcdefull;
+  b_sources [0][0] = b_sources [0][0] << 64 | 0x123456789abcdef0ull;
+  b_sources [1][0] = 0x5555555555555555ull;
+  b_sources [1][0] = b_sources [1][0] << 64 | 0xffffffffffffffffull;
+  b_sources [2][0] = 0xcccccccc55555555ull;
+  b_sources [2][0] = b_sources [2][0] << 64 | 0x0000000000000000ull;
+  b_sources [3][0] = 0xe7e7e7e7e7e7e7e7ull;
+  b_sources [3][0] = b_sources [3][0] << 64 | 0x6969696969696969ull;
+
+  c_sources [0][0] = 0x0123456789abcdefull;
+  c_sources [0][0] = c_sources [0][0] << 64 | 0x123456789abcdef0ull;
+  c_sources [1][0] = 0x5555555555555555ull;
+  c_sources [1][0] = c_sources [1][0] << 64 | 0xffffffffffffffffull;
+  c_sources [2][0] = 0xcccccccc55555555ull;
+  c_sources [2][0] = c_sources [2][0] << 64 | 0x0000000000000000ull;
+  c_sources [3][0] = 0xe7e7e7e7e7e7e7e7ull;
+  c_sources [3][0] = c_sources [3][0] << 64 | 0x6969696969696969ull;
+
+  doTests00000001 (a_sources, b_sources, c_sources);
+  doTests11100101 (a_sources, b_sources, c_sources);
+  doTests11110011 (a_sources, b_sources, c_sources);
+
+  return 0;
+}
+
+/* { dg-final { scan-assembler {\mxxeval\M} } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-9.c b/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-9.c
new file mode 100644
index 0000000..b611359
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-9.c
@@ -0,0 +1,129 @@
+/* { dg-do run } */
+/* { dg-require-effective-target powerpc_future_hw } */
+/* { dg-options "-mdejagnu-cpu=future" } */
+
+#include <altivec.h>
+
+extern void abort (void);
+
+#define NumSamples 4
+
+/* vec_all_eq not yet supported for arguments of type
+   vector unsigned __int128.  */
+int
+vector_equal (vector unsigned __int128 a, vector unsigned __int128 b)
+{
+  return a[0] == b[0];
+}
+
+void
+doTests00000001 (vector unsigned __int128 a_sources [],
+		 vector unsigned __int128 b_sources [],
+		 vector unsigned __int128 c_sources []) {
+  for (int i = 0; i < NumSamples; i++)
+    for (int j = 0; j < NumSamples; j++)
+      for (int k = 0; k < NumSamples; k++)
+	{
+	  vector unsigned __int128 a = a_sources [i];
+	  vector unsigned __int128 b = b_sources [j];
+	  vector unsigned __int128 c = c_sources [k];
+	  vector unsigned __int128 result = vec_ternarylogic (a, b, c, 0x01);
+	  vector unsigned __int128 intended = (a & b & c);
+	  if (!vector_equal (result, intended))
+	    abort ();
+	}
+}
+
+void
+doTests11100101 (vector unsigned __int128 a_sources [],
+		 vector unsigned __int128 b_sources [],
+		 vector unsigned __int128 c_sources []) {
+  for (int i = 0; i < NumSamples; i++)
+    for (int j = 0; j < NumSamples; j++)
+      for (int k = 0; k < NumSamples; k++)
+	{
+	  vector unsigned __int128 a = a_sources [i];
+	  vector unsigned __int128 b = b_sources [j];
+	  vector unsigned __int128 c = c_sources [k];
+	  vector unsigned __int128 result = vec_ternarylogic (a, b, c, 0xe5);
+	  vector unsigned __int128 intended = { 0 };
+	  // Supposed to be a ? c: nand (b,c)
+	  for (int l = 0; l < 1; l++)
+	    {
+	      for (int m = 0; m < 128; m++)
+	      {
+		unsigned __int128 bit_selector = 0x01;
+		bit_selector = bit_selector << m;
+
+		if (a[l] & bit_selector)
+		  intended [l] |= c [l] & bit_selector;
+		else if ((b [l] & c [l] & bit_selector) == 0)
+		  intended [l] |= bit_selector;
+	      }
+	    }
+	  if (!vector_equal (result, intended))
+	    abort ();
+	}
+}
+
+void
+doTests11110011 (vector unsigned __int128 a_sources [],
+		 vector unsigned __int128 b_sources [],
+		 vector unsigned __int128 c_sources []) {
+  for (int i = 0; i < NumSamples; i++)
+    for (int j = 0; j < NumSamples; j++)
+      for (int k = 0; k < NumSamples; k++)
+	{
+	  vector unsigned __int128 a = a_sources [i];
+	  vector unsigned __int128 b = b_sources [j];
+	  vector unsigned __int128 c = c_sources [k];
+	  vector unsigned __int128 result = vec_ternarylogic (a, b, c, 0xfb);
+	  vector unsigned __int128 intended = { 0 };
+	  for (int i = 0; i < 1; i++)
+	    intended [i] = b [i] | ~(a [i] & c [i]);
+	  if (!vector_equal (result, intended))
+	    abort ();
+	}
+}
+
+int main (int argc, int *argv [])
+{
+  vector unsigned __int128 a_sources [NumSamples];
+  vector unsigned __int128 b_sources [NumSamples];
+  vector unsigned __int128 c_sources [NumSamples];
+
+  a_sources [0][0] = 0x0123456789abcdefull;
+  a_sources [0][0] = a_sources [0][0] << 64 | 0x123456789abcdef0ull;
+  a_sources [1][0] = 0x5555555555555555ull;
+  a_sources [1][0] = a_sources [1][0] << 64 | 0xffffffffffffffffull;
+  a_sources [2][0] = 0xcccccccc55555555ull;
+  a_sources [2][0] = a_sources [2][0] << 64 | 0x0000000000000000ull;
+  a_sources [3][0] = 0xe7e7e7e7e7e7e7e7ull;
+  a_sources [3][0] = a_sources [3][0] << 64 | 0x6969696969696969ull;
+
+  b_sources [0][0] = 0x0123456789abcdefull;
+  b_sources [0][0] = b_sources [0][0] << 64 | 0x123456789abcdef0ull;
+  b_sources [1][0] = 0x5555555555555555ull;
+  b_sources [1][0] = b_sources [1][0] << 64 | 0xffffffffffffffffull;
+  b_sources [2][0] = 0xcccccccc55555555ull;
+  b_sources [2][0] = b_sources [2][0] << 64 | 0x0000000000000000ull;
+  b_sources [3][0] = 0xe7e7e7e7e7e7e7e7ull;
+  b_sources [3][0] = b_sources [3][0] << 64 | 0x6969696969696969ull;
+
+  c_sources [0][0] = 0x0123456789abcdefull;
+  c_sources [0][0] = c_sources [0][0] << 64 | 0x123456789abcdef0ull;
+  c_sources [1][0] = 0x5555555555555555ull;
+  c_sources [1][0] = c_sources [1][0] << 64 | 0xffffffffffffffffull;
+  c_sources [2][0] = 0xcccccccc55555555ull;
+  c_sources [2][0] = c_sources [2][0] << 64 | 0x0000000000000000ull;
+  c_sources [3][0] = 0xe7e7e7e7e7e7e7e7ull;
+  c_sources [3][0] = c_sources [3][0] << 64 | 0x6969696969696969ull;
+
+  doTests00000001 (a_sources, b_sources, c_sources);
+  doTests11100101 (a_sources, b_sources, c_sources);
+  doTests11110011 (a_sources, b_sources, c_sources);
+
+  return 0;
+}
+
+/* { dg-final { scan-assembler {\mxxeval\M} } } */