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| author | Tamar Christina <tamar.christina@arm.com> | 2017-05-02 15:19:07 +0000 |
|---|---|---|
| committer | Tamar Christina <tnfchris@gcc.gnu.org> | 2017-05-02 15:19:07 +0000 |
| commit | cc5b8f3d568e95ce74e03d8d87ada71117a6c106 (patch) | |
| tree | 9466e3e211c6783f0f35e6a524d4b1e5772df60a /gcc/testsuite | |
| parent | c8429337386348018079e683ac3bfd35c51672d0 (diff) | |
| download | gcc-cc5b8f3d568e95ce74e03d8d87ada71117a6c106.zip gcc-cc5b8f3d568e95ce74e03d8d87ada71117a6c106.tar.gz gcc-cc5b8f3d568e95ce74e03d8d87ada71117a6c106.tar.bz2 | |
simplify-rtx.c (simplify_binary_operation_1): Add LSHIFTRT case.
gcc/
2017-04-27 Tamar Christina <tamar.christina@arm.com>
* simplify-rtx.c (simplify_binary_operation_1): Add LSHIFTRT case.
gcc/testsuite/
2017-04-27 Tamar Christina <tamar.christina@arm.com>
* gcc.dg/lsr-div1.c: New testcase.
From-SVN: r247504
Diffstat (limited to 'gcc/testsuite')
| -rw-r--r-- | gcc/testsuite/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.dg/lsr-div1.c | 57 |
2 files changed, 61 insertions, 0 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index d47aa91..759a603 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2017-04-27 Tamar Christina <tamar.christina@arm.com> + + * gcc.dg/lsr-div1.c: New testcase. + 2017-05-02 Sebastian Peryt <sebastian.peryt@intel.com> * gcc.target/i386/avx512f-vaddsd-1.c (_mm_mask_add_sd) diff --git a/gcc/testsuite/gcc.dg/lsr-div1.c b/gcc/testsuite/gcc.dg/lsr-div1.c new file mode 100644 index 0000000..962054d --- /dev/null +++ b/gcc/testsuite/gcc.dg/lsr-div1.c @@ -0,0 +1,57 @@ +/* Test division by const int generates only one shift. */ +/* { dg-do run } */ +/* { dg-options "-O2 -fdump-rtl-combine-all" } */ +/* { dg-options "-O2 -fdump-rtl-combine-all -mtune=cortex-a53" { target aarch64*-*-* } } */ +/* { dg-require-effective-target int32plus } */ + +extern void abort (void); + +#define NOINLINE __attribute__((noinline)) + +static NOINLINE int +f1 (unsigned int n) +{ + return n % 0x33; +} + +static NOINLINE int +f2 (unsigned int n) +{ + return n % 0x12; +} + +int +main () +{ + int a = 0xaaaaaaaa; + int b = 0x55555555; + int c; + c = f1 (a); + if (c != 0x11) + abort (); + c = f1 (b); + if (c != 0x22) + abort (); + c = f2 (a); + if (c != 0xE) + abort (); + c = f2 (b); + if (c != 0x7) + abort (); + return 0; +} + +/* Following replacement pattern of intger division by constant, GCC is expected + to generate UMULL and (x)SHIFTRT. This test checks that considering division + by const 0x33, gcc generates a single LSHIFTRT by 37, instead of + two - LSHIFTRT by 32 and LSHIFTRT by 5. */ + +/* { dg-final { scan-rtl-dump "\\(set \\(subreg:DI \\(reg:SI" "combine" { target aarch64*-*-* } } } */ +/* { dg-final { scan-rtl-dump "\\(lshiftrt:DI \\(reg:DI" "combine" { target aarch64*-*-* } } } */ +/* { dg-final { scan-rtl-dump "\\(const_int 37 " "combine" { target aarch64*-*-* } } } */ + +/* Similarly, considering division by const 0x12, gcc generates a + single LSHIFTRT by 34, instead of two - LSHIFTRT by 32 and LSHIFTRT by 2. */ + +/* { dg-final { scan-rtl-dump "\\(const_int 34 " "combine" { target aarch64*-*-* } } } */ + |