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author | Renlin Li <renlin.li@arm.com> | 2013-12-24 15:34:30 +0000 |
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committer | Yufeng Zhang <yufeng@gcc.gnu.org> | 2013-12-24 15:34:30 +0000 |
commit | c75d51aa81c517b616c2984251a4364d45fbd781 (patch) | |
tree | efe8a2b5e3fb7d97580bd038c64633ea31bafe74 /gcc/testsuite | |
parent | 8bebb9532b4724afacf514dfe1f0d127cb7f6f07 (diff) | |
download | gcc-c75d51aa81c517b616c2984251a4364d45fbd781.zip gcc-c75d51aa81c517b616c2984251a4364d45fbd781.tar.gz gcc-c75d51aa81c517b616c2984251a4364d45fbd781.tar.bz2 |
arm-protos.h (vfp_const_double_for_bits): Declare.
gcc/
2013-12-24 Renlin Li <Renlin.Li@arm.com>
* config/arm/arm-protos.h (vfp_const_double_for_bits): Declare.
* config/arm/constraints.md (Dp): Define new constraint.
* config/arm/predicates.md (const_double_vcvt_power_of_two): Define
new predicate.
* config/arm/arm.c (arm_print_operand): Add print for new fucntion.
(vfp3_const_double_for_bits): New function.
* config/arm/vfp.md (combine_vcvtf2i): Define new instruction.
gcc/testsuite/
2013-12-24 Renlin Li <Renlin.Li@arm.com>
* gcc.target/arm/fixed_float_conversion.c: New test case.
From-SVN: r206195
Diffstat (limited to 'gcc/testsuite')
-rw-r--r-- | gcc/testsuite/ChangeLog | 4 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/arm/fixed_float_conversion.c | 19 |
2 files changed, 23 insertions, 0 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index c0bba43..b743754 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2013-12-24 Renlin Li <Renlin.Li@arm.com> + + * gcc.target/arm/fixed_float_conversion.c: New test case. + 2013-12-23 Bingfeng Mei <bmei@broadcom.com> * gcc.dg/vect/vect-neg-store-1.c: New test. diff --git a/gcc/testsuite/gcc.target/arm/fixed_float_conversion.c b/gcc/testsuite/gcc.target/arm/fixed_float_conversion.c new file mode 100644 index 0000000..a8befd0 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/fixed_float_conversion.c @@ -0,0 +1,19 @@ +/* Check that vcvt is used for fixed and float data conversions. */ +/* { dg-do compile } */ +/* { dg-options "-O1 -mfpu=vfp3" } */ +/* { dg-require-effective-target arm_vfp_ok } */ + +float +fixed_to_float (int i) +{ + return ((float) i / (1 << 16)); +} + +int +float_to_fixed (float f) +{ + return ((int) (f * (1 << 16))); +} + +/* { dg-final { scan-assembler "vcvt.f32.s32" } } */ +/* { dg-final { scan-assembler "vcvt.s32.f32" } } */ |