re PR tree-optimization/59501 (Vector Gather with GCC 4.9 2013-12-08 Snapshot)

	PR target/59501
	* config/i386/i386.c (ix86_save_reg): Don't return true for drap_reg
	if !crtl->stack_realign_needed.
	(ix86_finalize_stack_realign_flags): If drap_reg isn't live on entry
	and stack_realign_needed will be false, clear drap_reg and need_drap.
	Optimize leaf functions that don't need stack frame even if
	crtl->need_drap.

	* gcc.target/i386/pr59501-1.c: New test.
	* gcc.target/i386/pr59501-1a.c: New test.
	* gcc.target/i386/pr59501-2.c: New test.
	* gcc.target/i386/pr59501-2a.c: New test.
	* gcc.target/i386/pr59501-3.c: New test.
	* gcc.target/i386/pr59501-3a.c: New test.
	* gcc.target/i386/pr59501-4.c: New test.
	* gcc.target/i386/pr59501-4a.c: New test.
	* gcc.target/i386/pr59501-5.c: New test.
	* gcc.target/i386/pr59501-6.c: New test.

From-SVN: r206243

11 files changed, 178 insertions, 0 deletions

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index b7f12f5..e5f1a82 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,17 @@
+2013-12-30  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/59501
+	* gcc.target/i386/pr59501-1.c: New test.
+	* gcc.target/i386/pr59501-1a.c: New test.
+	* gcc.target/i386/pr59501-2.c: New test.
+	* gcc.target/i386/pr59501-2a.c: New test.
+	* gcc.target/i386/pr59501-3.c: New test.
+	* gcc.target/i386/pr59501-3a.c: New test.
+	* gcc.target/i386/pr59501-4.c: New test.
+	* gcc.target/i386/pr59501-4a.c: New test.
+	* gcc.target/i386/pr59501-5.c: New test.
+	* gcc.target/i386/pr59501-6.c: New test.
+
 2013-12-30   H.J. Lu  <hongjiu.lu@intel.com>
 
 	PR target/59605
diff --git a/gcc/testsuite/gcc.target/i386/pr59501-1.c b/gcc/testsuite/gcc.target/i386/pr59501-1.c
new file mode 100644
index 0000000..6a104ee
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr59501-1.c
@@ -0,0 +1,30 @@
+/* PR target/59501 */
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx -mno-accumulate-outgoing-args" } */
+
+#define CHECK_H "avx-check.h"
+#define TEST avx_test
+
+#include CHECK_H
+
+typedef double V __attribute__ ((vector_size (32)));
+
+__attribute__((noinline, noclone)) V
+foo (double *x, unsigned *y)
+{
+  V r = { x[y[0]], x[y[1]], x[y[2]], x[y[3]] };
+  return r;
+}
+
+static void
+TEST (void)
+{
+  double a[16];
+  unsigned b[4] = { 5, 0, 15, 7 };
+  int i;
+  for (i = 0; i < 16; i++)
+    a[i] = 0.5 + i;
+  V v = foo (a, b);
+  if (v[0] != 5.5 || v[1] != 0.5 || v[2] != 15.5 || v[3] != 7.5)
+    __builtin_abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr59501-1a.c b/gcc/testsuite/gcc.target/i386/pr59501-1a.c
new file mode 100644
index 0000000..5b468e5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr59501-1a.c
@@ -0,0 +1,17 @@
+/* PR target/59501 */
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-O2 -mavx -mno-accumulate-outgoing-args" } */
+
+typedef double V __attribute__ ((vector_size (32)));
+
+V
+foo (double *x, unsigned *y)
+{
+  V r = { x[y[0]], x[y[1]], x[y[2]], x[y[3]] };
+  return r;
+}
+
+/* Verify no dynamic realignment is performed.  */
+/* { dg-final { scan-assembler-not "and\[^\n\r]*sp" } } */
+/* And DRAP isn't needed either.  */
+/* { dg-final { scan-assembler-not "r10" } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr59501-2.c b/gcc/testsuite/gcc.target/i386/pr59501-2.c
new file mode 100644
index 0000000..8ce177d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr59501-2.c
@@ -0,0 +1,5 @@
+/* PR target/59501 */
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx -maccumulate-outgoing-args" } */
+
+#include "pr59501-1.c"
diff --git a/gcc/testsuite/gcc.target/i386/pr59501-2a.c b/gcc/testsuite/gcc.target/i386/pr59501-2a.c
new file mode 100644
index 0000000..c0fe362
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr59501-2a.c
@@ -0,0 +1,10 @@
+/* PR target/59501 */
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-O2 -mavx -maccumulate-outgoing-args" } */
+
+#include "pr59501-1a.c"
+
+/* Verify no dynamic realignment is performed.  */
+/* { dg-final { scan-assembler-not "and\[^\n\r]*sp" } } */
+/* And DRAP isn't needed either.  */
+/* { dg-final { scan-assembler-not "r10" } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr59501-3.c b/gcc/testsuite/gcc.target/i386/pr59501-3.c
new file mode 100644
index 0000000..0bf5ef6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr59501-3.c
@@ -0,0 +1,30 @@
+/* PR target/59501 */
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx -mno-accumulate-outgoing-args" } */
+
+#define CHECK_H "avx-check.h"
+#define TEST avx_test
+
+#include CHECK_H
+
+typedef double V __attribute__ ((vector_size (32)));
+
+__attribute__((noinline, noclone)) V
+foo (double *x, int a, int b, int c, int d, int e, int f, unsigned *y)
+{
+  V r = { x[y[0]], x[y[1]], x[y[2]], x[y[3]] };
+  return r;
+}
+
+static void
+TEST (void)
+{
+  double a[16];
+  unsigned b[4] = { 5, 0, 15, 7 };
+  int i;
+  for (i = 0; i < 16; i++)
+    a[i] = 0.5 + i;
+  V v = foo (a, 0, 0, 0, 0, 0, 0, b);
+  if (v[0] != 5.5 || v[1] != 0.5 || v[2] != 15.5 || v[3] != 7.5)
+    __builtin_abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr59501-3a.c b/gcc/testsuite/gcc.target/i386/pr59501-3a.c
new file mode 100644
index 0000000..ded4336
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr59501-3a.c
@@ -0,0 +1,15 @@
+/* PR target/59501 */
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-O2 -mavx -mno-accumulate-outgoing-args" } */
+
+typedef double V __attribute__ ((vector_size (32)));
+
+V
+foo (double *x, int a, int b, int c, int d, int e, int f, unsigned *y)
+{
+  V r = { x[y[0]], x[y[1]], x[y[2]], x[y[3]] };
+  return r;
+}
+
+/* Verify no dynamic realignment is performed.  */
+/* { dg-final { scan-assembler-not "and\[^\n\r]*sp" } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr59501-4.c b/gcc/testsuite/gcc.target/i386/pr59501-4.c
new file mode 100644
index 0000000..43a5ad2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr59501-4.c
@@ -0,0 +1,5 @@
+/* PR target/59501 */
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx -maccumulate-outgoing-args" } */
+
+#include "pr59501-3.c"
diff --git a/gcc/testsuite/gcc.target/i386/pr59501-4a.c b/gcc/testsuite/gcc.target/i386/pr59501-4a.c
new file mode 100644
index 0000000..5c3cb68
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr59501-4a.c
@@ -0,0 +1,8 @@
+/* PR target/59501 */
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-O2 -mavx -maccumulate-outgoing-args" } */
+
+#include "pr59501-3a.c"
+
+/* Verify no dynamic realignment is performed.  */
+/* { dg-final { scan-assembler-not "and\[^\n\r]*sp" { xfail *-*-* } } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr59501-5.c b/gcc/testsuite/gcc.target/i386/pr59501-5.c
new file mode 100644
index 0000000..f2feca8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr59501-5.c
@@ -0,0 +1,39 @@
+/* PR target/59501 */
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx -mno-accumulate-outgoing-args" } */
+
+#define CHECK_H "avx-check.h"
+#define TEST avx_test
+
+#include CHECK_H
+
+typedef double V __attribute__ ((vector_size (32)));
+
+__attribute__((noinline, noclone)) void
+bar (char *p)
+{
+  p[0] = 1;
+  p[37] = 2;
+  asm volatile ("" : : "r" (p) : "memory");
+}
+
+__attribute__((noinline, noclone)) V
+foo (double *x, int a, int b, int c, int d, int e, int f, unsigned *y)
+{
+  bar (__builtin_alloca (a + b + c + d + e + f));
+  V r = { x[y[0]], x[y[1]], x[y[2]], x[y[3]] };
+  return r;
+}
+
+static void
+TEST (void)
+{
+  double a[16];
+  unsigned b[4] = { 5, 0, 15, 7 };
+  int i;
+  for (i = 0; i < 16; i++)
+    a[i] = 0.5 + i;
+  V v = foo (a, 0, 30, 0, 0, 8, 0, b);
+  if (v[0] != 5.5 || v[1] != 0.5 || v[2] != 15.5 || v[3] != 7.5)  
+    __builtin_abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr59501-6.c b/gcc/testsuite/gcc.target/i386/pr59501-6.c
new file mode 100644
index 0000000..d0ac242
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr59501-6.c
@@ -0,0 +1,5 @@
+/* PR target/59501 */
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx -maccumulate-outgoing-args" } */
+
+#include "pr59501-5.c"