Map "arch=corei7"/"arch=nehalem" to M_INTEL_COREI7

After Intel processor name cleanup,

__attribute__ ((target("arch=corei7"))) is translated to PROCESSOR_NEHALEM
and mapped to M_INTEL_COREI7_NEHALEM.

__attribute__ ((target("arch=corei7")))

used to cover M_INTEL_COREI7_XXXX. Now it only covers M_INTEL_COREI7_NEHALEM.
We have PROCESSOR_SANDYBRIDGE and PROCESSOR_HASWELL.  But there is nothing
to mark Westmere and Ivy Bridge.  Since function versioning doesn't support
extra ISAs in Westmere and Ivy Bridge, we don't lose anything. The solution
is to map

__attribute__ ((target("arch=corei7")))

and

__attribute__ ((target("arch=nehalem")))

to M_INTEL_COREI7.

gcc/

	PR target/59601
	* config/i386/i386.c (get_builtin_code_for_version): Map
	PROCESSOR_NEHALEM to "corei7".

gcc/testsuite/

	PR target/59601
	* g++.dg/ext/mv14.C: New tests.
	* g++.dg/ext/mv15.C: Likewise.

From-SVN: r206212

3 files changed, 87 insertions, 0 deletions

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index aede8f8..51be98c 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,10 @@
+2013-12-26   Uros Bizjak  <ubizjak@gmail.com>
+	     H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR target/59601
+	* g++.dg/ext/mv14.C: New tests.
+	* g++.dg/ext/mv15.C: Likewise.
+
 2013-12-25  Allan Sandfeld Jensen  <sandfeld@kde.org>
 
 	PR target/59422
diff --git a/gcc/testsuite/g++.dg/ext/mv14.C b/gcc/testsuite/g++.dg/ext/mv14.C
new file mode 100644
index 0000000..e36e08d
--- /dev/null
+++ b/gcc/testsuite/g++.dg/ext/mv14.C
@@ -0,0 +1,40 @@
+/* Test case to check if Multiversioning works.  */
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-ifunc "" }  */
+/* { dg-options "-O2 -fPIC" } */
+
+#include <assert.h>
+
+/* Default version.  */
+int foo (); // Extra declaration that is merged with the second one.
+int foo () __attribute__ ((target("default")));
+
+int foo () __attribute__ ((target("arch=corei7")));
+
+int (*p)() = &foo;
+int main ()
+{
+  int val = foo ();
+  assert (val ==  (*p)());
+
+  /* Check in the exact same order in which the dispatching
+     is expected to happen.  */
+  if (__builtin_cpu_is ("corei7"))
+    assert (val == 5);
+  else
+    assert (val == 0);
+  
+  return 0;
+}
+
+int __attribute__ ((target("default")))
+foo ()
+{
+  return 0;
+}
+
+int __attribute__ ((target("arch=corei7")))
+foo ()
+{
+  return 5;
+}
diff --git a/gcc/testsuite/g++.dg/ext/mv15.C b/gcc/testsuite/g++.dg/ext/mv15.C
new file mode 100644
index 0000000..42e39d2
--- /dev/null
+++ b/gcc/testsuite/g++.dg/ext/mv15.C
@@ -0,0 +1,40 @@
+/* Test case to check if Multiversioning works.  */
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-ifunc "" }  */
+/* { dg-options "-O2 -fPIC" } */
+
+#include <assert.h>
+
+/* Default version.  */
+int foo (); // Extra declaration that is merged with the second one.
+int foo () __attribute__ ((target("default")));
+
+int foo () __attribute__ ((target("arch=nehalem")));
+
+int (*p)() = &foo;
+int main ()
+{
+  int val = foo ();
+  assert (val ==  (*p)());
+
+  /* Check in the exact same order in which the dispatching
+     is expected to happen.  */
+  if (__builtin_cpu_is ("corei7"))
+    assert (val == 5);
+  else
+    assert (val == 0);
+  
+  return 0;
+}
+
+int __attribute__ ((target("default")))
+foo ()
+{
+  return 0;
+}
+
+int __attribute__ ((target("arch=nehalem")))
+foo ()
+{
+  return 5;
+}