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authorOleg Endo <olegendo@gcc.gnu.org>2012-08-20 20:54:20 +0000
committerOleg Endo <olegendo@gcc.gnu.org>2012-08-20 20:54:20 +0000
commit5592815a885e6101054be5b7fbac7a223b698815 (patch)
tree1735ecce6bebefc95e794764b6a81b5216e2b0ac /gcc/testsuite
parent6774855070fac75d8ea3b4814a3c4a81d23d1811 (diff)
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re PR rtl-optimization/50489 ([UPC/IA64] mis-schedule of MEM ref with -ftree-vectorize and -fschedule-insns2)
PR target/50489 * config/sh/sh.md (rotcr, *rotcr, shar, shlr): New insns and splits. (ashrdi3_k, lshrdi3_k): Rewrite as insn_and_split. * config/sh/sh.c (sh_lshrsi_clobbers_t_reg_p): New function. * config/sh/sh-protos.h (sh_lshrsi_clobbers_t_reg_p): Declare it. PR target/50489 * gcc.target/sh/pr54089-1.c: New. From-SVN: r190545
Diffstat (limited to 'gcc/testsuite')
-rw-r--r--gcc/testsuite/ChangeLog5
-rw-r--r--gcc/testsuite/gcc.target/sh/pr54089-1.c83
2 files changed, 88 insertions, 0 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index ecff56c..0db9e17 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,5 +1,10 @@
2012-08-20 Oleg Endo <olegendo@gcc.gnu.org>
+ PR target/50489
+ * gcc.target/sh/pr54089-1.c: New.
+
+2012-08-20 Oleg Endo <olegendo@gcc.gnu.org>
+
PR target/51244
* gcc.target/sh/pr51244-11.c: New.
diff --git a/gcc/testsuite/gcc.target/sh/pr54089-1.c b/gcc/testsuite/gcc.target/sh/pr54089-1.c
new file mode 100644
index 0000000..2101c53
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sh/pr54089-1.c
@@ -0,0 +1,83 @@
+/* Check that the rotcr instruction is generated. */
+/* { dg-do compile { target "sh*-*-*" } } */
+/* { dg-options "-O1" } */
+/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
+/* { dg-final { scan-assembler-times "rotcr" 11 } } */
+
+typedef char bool;
+
+long long
+test_00 (long long a)
+{
+ return a >> 1;
+}
+
+unsigned int
+test_01 (unsigned int a, int b, int c)
+{
+ bool r = b == c;
+ return ((a >> 1) | (r << 31));
+}
+
+unsigned int
+test_02 (unsigned int a, int b, int c)
+{
+ bool r = b == c;
+ return ((a >> 2) | (r << 31));
+}
+
+unsigned int
+test_03 (unsigned int a, int b, int c)
+{
+ bool r = b == c;
+ return ((a >> 3) | (r << 31));
+}
+
+unsigned int
+test_04 (unsigned int a, int b, int c)
+{
+ bool r = b == c;
+ return ((a >> 4) | (r << 31));
+}
+
+unsigned int
+test_05 (unsigned int a, int b, int c)
+{
+ bool r = b == c;
+ return ((a >> 5) | (r << 31));
+}
+
+unsigned int
+test_06 (unsigned int a, int b, int c)
+{
+ bool r = b == c;
+ return ((a >> 6) | (r << 31));
+}
+
+unsigned int
+test_07 (unsigned int a, int b, int c)
+{
+ bool r = b == c;
+ return ((a >> 7) | (r << 31));
+}
+
+unsigned int
+test_08 (unsigned int a, int b, int c)
+{
+ bool r = b == c;
+ return ((a >> 8) | (r << 31));
+}
+
+unsigned int
+test_09 (unsigned int a, int b, int c)
+{
+ bool r = b == c;
+ return ((a >> 31) | (r << 31));
+}
+
+int
+test_10 (int a, int b)
+{
+ bool r = a == b;
+ return r << 31;
+}