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author | Richard Biener <rguenther@suse.de> | 2022-02-11 12:43:22 +0100 |
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committer | Richard Biener <rguenther@suse.de> | 2022-02-11 13:53:45 +0100 |
commit | ae117af43944101ca47b99b743c85a3c528b4b4f (patch) | |
tree | e6b640e8c3125ff9be07dc1d869a03e4d682beef /gcc/testsuite | |
parent | 84993d94e13ad2ab3aee151bb5a5e767cf75d51e (diff) | |
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[gimplefe] Add vector_mask attribute to get access to vector bools
The following adds __attribute__((vector_mask)) to get access to
the corresponding mask type for a vector type. The implementation
simply uses truth_type_for so creating a mask type that's not
what the target would choose as canonical, say a AVX2 style one
when AVX512VL is enabled, is not possible. It might be possible
to provide access to that with an optional argument specifying
the precision of the bool element. The syntax is as simple as
typedef vector_type mask_type __attribute__((vector_mask));
In theory this allows to create unit testcases for vector
lowering and ISEL.
2022-02-11 Richard Biener <rguenther@suse.de>
gcc/c-family/
* c-attribs.cc (c_common_attribute_table): Add entry for
vector_mask.
(handle_vector_mask_attribute): New.
gcc/c/
* gimple-parser.cc (c_parser_gimple_statement): Properly parse
VEC_COND_EXPRs.
gcc/testsuite/
* gcc.dg/gimplefe-48.c: New testcase.
Diffstat (limited to 'gcc/testsuite')
-rw-r--r-- | gcc/testsuite/gcc.dg/gimplefe-48.c | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/gcc/testsuite/gcc.dg/gimplefe-48.c b/gcc/testsuite/gcc.dg/gimplefe-48.c new file mode 100644 index 0000000..1399cc9 --- /dev/null +++ b/gcc/testsuite/gcc.dg/gimplefe-48.c @@ -0,0 +1,20 @@ +/* { dg-do compile } */ +/* { dg-options "-O -fgimple -Wno-psabi -w" } */ +/* { dg-additional-options "-mavx2" { target x86_64-*-* i?86-*-* } } */ + +typedef int v8si __attribute__((vector_size(8*sizeof(int)))); +typedef v8si v8sib __attribute__((vector_mask)); + +v8si res; + +void __GIMPLE (ssa) foo (v8si v1, v8si v2, v8si v3, v8si v4) +{ + v8sib tem; + v8si resr; + +__BB(2): + tem_3 = v1_1(D) <= v2_2(D); + resr_4 = tem_3 ? v3_5(D) : v4_6(D); + res = resr_4; + return; +} |