diff options
| author | Ian Lance Taylor <iant@golang.org> | 2020-11-10 07:26:18 -0800 |
|---|---|---|
| committer | Ian Lance Taylor <iant@golang.org> | 2020-11-10 07:26:18 -0800 |
| commit | 8d703821c69062c0cd255787d793e44f1a95d463 (patch) | |
| tree | 6b1df9cdc36cc47b6164db69a14bc86a63dc77c6 /gcc/testsuite | |
| parent | 9cd320ea6572c577cdf17ce1f9ea5230b166af6d (diff) | |
| parent | cf392dbdf17e38026f8e3c0e9af7f5b87f63be56 (diff) | |
| download | gcc-8d703821c69062c0cd255787d793e44f1a95d463.zip gcc-8d703821c69062c0cd255787d793e44f1a95d463.tar.gz gcc-8d703821c69062c0cd255787d793e44f1a95d463.tar.bz2 | |
Merge from trunk revision cf392dbdf17e38026f8e3c0e9af7f5b87f63be56.
Diffstat (limited to 'gcc/testsuite')
1035 files changed, 24276 insertions, 2450 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 12c7d8f..7f89efa 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,2462 @@ +2020-11-09 Marek Polacek <polacek@redhat.com> + + DR 1914 + * c-c++-common/attr-fallthrough-2.c: Adjust dg-warning. + * g++.dg/cpp0x/fallthrough2.C: Likewise. + * g++.dg/cpp0x/gen-attrs-60.C: Turn dg-error into dg-warning. + * g++.dg/cpp1y/attr-deprecated-2.C: Likewise. + * g++.dg/cpp2a/attr-likely2.C: Adjust dg-warning. + * g++.dg/cpp2a/nodiscard-once.C: Turn dg-error into dg-warning. + * g++.dg/cpp0x/gen-attrs-72.C: New test. + +2020-11-09 Patrick Palka <ppalka@redhat.com> + + * g++.dg/cpp2a/concepts-decltype2.C: New file. + +2020-11-09 Patrick Palka <ppalka@redhat.com> + + PR c++/93907 + * g++.dg/cpp2a/concepts-using3.C: New test, based off of + concepts-using2.C. + +2020-11-09 Jason Merrill <jason@redhat.com> + + * g++.dg/lookup/using26.C: Adjust location. + * g++.old-deja/g++.other/using1.C: Adjust location. + +2020-11-09 Marek Polacek <polacek@redhat.com> + + PR c++/97762 + * g++.dg/warn/Wvexing-parse8.C: New test. + +2020-11-09 Patrick Palka <ppalka@redhat.com> + + * gcc.dg/pragma-diag-6.c: Adjust expected diagnostics + accordingly. + +2020-11-09 Tobias Burnus <tobias@codesourcery.com> + + PR fortran/90111 + * gfortran.dg/goacc/specification-part.f90: New test. + +2020-11-09 Richard Biener <rguenther@suse.de> + + PR tree-optimization/97761 + * gfortran.dg/vect/pr97761.f90: New testcase. + +2020-11-09 Richard Biener <rguenther@suse.de> + + PR tree-optimization/97753 + * gcc.dg/vect/pr97753.c: New testcase. + +2020-11-09 Richard Biener <rguenther@suse.de> + + PR tree-optimization/97746 + * gcc.dg/vect/bb-slp-pr97746.c: New testcase. + +2020-11-09 Andrea Corallo <andrea.corallo@arm.com> + + * gcc.target/arm/simd/vld1_lane_bf16_1.c: Require target to + support and add -mfloat-abi=hard flag. + * gcc.target/arm/simd/vld1_lane_bf16_indices_1.c: Likewise. + * gcc.target/arm/simd/vld1q_lane_bf16_indices_1.c: Likewise. + * gcc.target/arm/simd/vst1_lane_bf16_1.c: Likewise. + * gcc.target/arm/simd/vst1_lane_bf16_indices_1.c: Likewise. + * gcc.target/arm/simd/vstq1_lane_bf16_indices_1.c: Likewise. + +2020-11-08 Iain Sandoe <iain@sandoe.co.uk> + + * obj-c++.dg/property/at-property-4.mm: Test handling class + attributes. + * objc.dg/property/at-property-4.m: Likewise. + +2020-11-08 Iain Sandoe <iain@sandoe.co.uk> + + * c-c++-common/zero-scratch-regs-10.c: Skip for powerpc + Darwin. + * c-c++-common/zero-scratch-regs-11.c: Likewise. + * c-c++-common/zero-scratch-regs-8.c: Likewise. + * c-c++-common/zero-scratch-regs-9.c: Likewise. + +2020-11-08 Iain Sandoe <iain@sandoe.co.uk> + + * gcc.target/i386/builtin_thread_pointer.c: Require native TLS. + +2020-11-07 Marek Polacek <polacek@redhat.com> + + * c-c++-common/Wimplicit-fallthrough-20.c: Adjust dg-warning. + +2020-11-07 Iain Sandoe <iain@sandoe.co.uk> + + * obj-c++.dg/property/at-property-4.mm: Test atomic property + attribute. + * objc.dg/property/at-property-4.m: Likewise. + +2020-11-07 Iain Sandoe <iain@sandoe.co.uk> + + * obj-c++.dg/attributes/nsobject-01.mm: New test. + * objc.dg/attributes/nsobject-01.m: New test. + +2020-11-07 Iain Sandoe <iain@sandoe.co.uk> + + * c-c++-common/zero-scratch-regs-10.c: XFAIL for + powerpc-darwin. + * c-c++-common/zero-scratch-regs-11.c: Likewise. + * c-c++-common/zero-scratch-regs-8.c: Likewise. + * c-c++-common/zero-scratch-regs-9.c: Likewise. + +2020-11-07 Martin Uecker <muecker@gwdg.de> + + * c-c++-common/attr-fallthrough-2.c: Update compiler flags. + * c-c++-common/Wimplicit-fallthrough-20.c: Adapt test. + * gcc.dg/20031223-1.c: Update compiler flags and adapt test. + * gcc.dg/c11-labels-1.c: New test. + * gcc.dg/c11-labels-2.c: New test. + * gcc.dg/c11-labels-3.c: New test. + * gcc.dg/c2x-attr-syntax-3.c: Adapt test. + * gcc.dg/c2x-labels-1.c: New test. + * gcc.dg/c2x-labels-2.c: New test. + * gcc.dg/c2x-labels-3.c: New test. + * gcc.dg/decl-9.c: Update compiler flags and add error. + * gcc.dg/gomp/barrier-2.c: Update compiler flags and add warning. + * gcc.dg/gomp/declare-simd-5.c: Update compiler flags and adapt test. + * gcc.dg/gomp/declare-variant-2.c: Update compiler flags and add error. + * gcc.dg/label-compound-stmt-1.c: Update compiler flags. + * gcc.dg/parse-decl-after-label.c: Update compiler flags. + +2020-11-06 Peter Bergner <bergner@linux.ibm.com> + + * gcc.target/powerpc/pr64505.c: Run everywhere. Use correct minimized + test case. + +2020-11-06 Peter Bergner <bergner@linux.ibm.com> + + * gcc.target/powerpc/mma-alignment.c: New test. + +2020-11-06 Jeff Law <law@torsion.usersys.redhat.com> + + PR target/91489 + * gcc.target/i386/ms_hook_prologue.c: Expand testcase + to reproduce PR target/91489 issue. + +2020-11-06 Joseph Myers <joseph@codesourcery.com> + + * lib/target-supports.exp + (check_effective_target_fenv_exceptions_dfp): New. + * gcc.dg/dfp/builtin-snan-1.c, gcc.dg/dfp/builtin-snan-2.c: New + tests. + +2020-11-06 Marek Polacek <polacek@redhat.com> + + PR c++/81660 + * g++.dg/warn/Wexceptions3.C: New test. + * g++.dg/eh/pr42859.C: Add dg-warning. + * g++.dg/torture/pr81659.C: Likewise. + +2020-11-06 Iain Sandoe <iain@sandoe.co.uk> + + * obj-c++.dg/property/at-property-1.mm: Adjust expected + diagnostics. + * obj-c++.dg/property/at-property-29.mm: Likewise. + * obj-c++.dg/property/at-property-4.mm: Likewise. + * obj-c++.dg/property/property-neg-2.mm: Likewise. + * objc.dg/property/at-property-1.m: Likewise. + * objc.dg/property/at-property-29.m: Likewise. + * objc.dg/property/at-property-4.m: Likewise. + * objc.dg/property/at-property-5.m: Likewise. + * objc.dg/property/property-neg-2.m: Likewise. + +2020-11-06 Jakub Jelinek <jakub@redhat.com> + + PR c++/67453 + * g++.dg/ext/attr-used-2.C: New test. + +2020-11-06 Iain Sandoe <iain@sandoe.co.uk> + + * gcc.dg/darwin-minversion-link.c: Allow for Darwin19 (macOS 10.15) + and Darwin20 (macOS 11.0). + +2020-11-06 Andrew MacLeod <amacleod@redhat.com> + + * gcc.dg/pr97737.c: New. + * gcc.dg/pr97741.c: New. + +2020-11-06 David Candler <david.candler@arm.com> + + * gcc.target/aarch64/advsimd-intrinsics/vqrshrn_high_n.c: New testcase. + * gcc.target/aarch64/advsimd-intrinsics/vqrshrun_high_n.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vqshrn_high_n.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vqshrun_high_n.c: Likewise. + * gcc.target/aarch64/narrow_high-intrinsics.c: Update expected assembler + for sqshrun2, sqrshrun2, sqshrn2, uqshrn2, sqrshrn2 and uqrshrn2. + +2020-11-06 Richard Sandiford <richard.sandiford@arm.com> + + * gcc.target/aarch64/sve/dup_lane_2.c: New test. + * gcc.target/aarch64/sve/dup_lane_3.c: Likewise. + * gcc.target/aarch64/sve/ext_4.c: Likewise. + * gcc.target/aarch64/sve/rev_2.c: Likewise. + * gcc.target/aarch64/sve/revhw_1.c: Likewise. + * gcc.target/aarch64/sve/revhw_2.c: Likewise. + * gcc.target/aarch64/sve/slp_perm_8.c: Likewise. + * gcc.target/aarch64/sve/trn1_2.c: Likewise. + * gcc.target/aarch64/sve/trn2_2.c: Likewise. + * gcc.target/aarch64/sve/uzp1_2.c: Likewise. + * gcc.target/aarch64/sve/uzp2_2.c: Likewise. + * gcc.target/aarch64/sve/zip1_2.c: Likewise. + * gcc.target/aarch64/sve/zip2_2.c: Likewise. + +2020-11-06 Martin Liska <mliska@suse.cz> + + * gcc.dg/tree-ssa/switch-4.c: New test. + +2020-11-06 Richard Biener <rguenther@suse.de> + + PR tree-optimization/97706 + * gcc.dg/vect/bb-slp-pr97706.c: New testcase. + +2020-11-06 Kewen Lin <linkw@linux.ibm.com> + + PR gcov-profile/97461 + * gcc.dg/tree-prof/pr97461.c: Return aligned memory. + +2020-11-06 Thomas Schwinge <thomas@codesourcery.com> + + * gfortran.dg/goacc/loop-2-parallel-3.f95: Adjust. + +2020-11-06 Thomas Schwinge <thomas@codesourcery.com> + + * gfortran.dg/goacc/loop-6.f95: Remove. + +2020-11-06 Thomas Schwinge <thomas@codesourcery.com> + + * gfortran.dg/goacc/loop-5.f95: Remove. + +2020-11-06 Tobias Burnus <tobias@codesourcery.com> + + * gfortran.dg/goacc-gomp/goacc-gomp.exp: New. + * gfortran.dg/goacc-gomp/atomic.f90: New test. + * gfortran.dg/goacc/atomic.f90: New test. + +2020-11-06 Tobias Burnus <tobias@codesourcery.com> + + * c-c++-common/goacc-gomp/atomic.c: New test. + * c-c++-common/goacc/atomic.c: New test. + +2020-11-06 Richard Biener <rguenther@suse.de> + + PR tree-optimization/97732 + * gcc.dg/vect/bb-slp-pr97732.c: New testcase. + +2020-11-06 Olivier Hainque <hainque@adacore.com> + + * gcc.target/i386/fentryname1.c: Add dg-require-profiling. + * gcc.target/i386/fentryname2.c: Likewise. + * gcc.target/i386/fentryname3.c: Likewise. + * gcc.target/i386/returninst1.c: Likewise. + * gcc.target/i386/returninst2.c: Likewise. + * gcc.target/i386/returninst3.c: Likewise. + +2020-11-06 Olivier Hainque <hainque@adacore.com> + + * g++.dg/pr57878.C: Add dg-require-effective-target fpic. + * g++.dg/pr65032.C: Likewise. + * g++.dg/pr84279.C: Likewise. + * g++.dg/inherit/thunk8.C: Likewise. + * g++.dg/opt/pr64411.C: Likewise. + +2020-11-06 Jan Hubicka <jh@suse.cz> + + * gcc.dg/ipa/modref-2.c: New test. + * gcc.dg/lto/modref-2_0.c: New test. + +2020-11-06 Jeff Law <law@redhat.com> + + * gcc.dg/no-strict-overflow-4.c: Adjust expected output. + +2020-11-06 Eugene Rozenfeld <erozen@microsoft.com> + + * gcc.dg/self-right-shift.c: New test. + +2020-11-06 Kito Cheng <kito.cheng@sifive.com> + + PR target/96307 + * gcc.dg/pr96307.c: New. + * gcc.target/riscv/pr96260.c: Move this test case from here to ... + * gcc.dg/pr96260.c: ... here. + * gcc.target/riscv/pr91441.c: Move this test case from here to ... + * gcc.dg/pr91441.c: ... here. + * lib/target-supports.exp (check_effective_target_no_fsanitize_address): + New proc. + +2020-11-05 Marek Polacek <polacek@redhat.com> + + PR c++/78209 + * g++.dg/cpp1y/decltype-auto1.C: New test. + +2020-11-05 Marek Polacek <polacek@redhat.com> + + PR c++/97675 + * g++.old-deja/g++.eh/catch10.C: Adjust dg-warning. + * g++.dg/warn/Wexceptions1.C: New test. + * g++.dg/warn/Wexceptions2.C: New test. + +2020-11-05 Marek Polacek <polacek@redhat.com> + + PR c++/25814 + * g++.dg/cpp2a/fn-template16.C: Add a dg-warning. + * g++.dg/cpp2a/fn-template7.C: Likewise. + * g++.dg/lookup/pr80891-5.C: Likewise. + * g++.dg/lto/pr79050_0.C: Add extern. + * g++.dg/lto/pr84805_0.C: Likewise. + * g++.dg/parse/pr58898.C: Add a dg-warning. + * g++.dg/template/scope5.C: Likewise. + * g++.old-deja/g++.brendan/recurse.C: Likewise. + * g++.old-deja/g++.jason/template4.C: Likewise. + * g++.old-deja/g++.law/arm4.C: Likewise. + * g++.old-deja/g++.mike/for2.C: Likewise. + * g++.old-deja/g++.other/local4.C: Likewise. + * g++.old-deja/g++.pt/crash3.C: Likewise. + * g++.dg/warn/Wvexing-parse.C: New test. + * g++.dg/warn/Wvexing-parse2.C: New test. + * g++.dg/warn/Wvexing-parse3.C: New test. + * g++.dg/warn/Wvexing-parse4.C: New test. + * g++.dg/warn/Wvexing-parse5.C: New test. + * g++.dg/warn/Wvexing-parse6.C: New test. + * g++.dg/warn/Wvexing-parse7.C: New test. + +2020-11-05 Andrew MacLeod <amacleod@redhat.com> + + * gcc.dg/pr97725.c: New. + +2020-11-05 Olivier Hainque <hainque@adacore.com> + + * gcc.dg/sms-12.c: Add dg-require-effective-target fpic. + +2020-11-05 Jan Hubicka <jh@suse.cz> + + * g++.dg/ipa/devirt-24.C: Update template. + +2020-11-05 Tamar Christina <tamar.christina@arm.com> + + * gcc.dg/vect/slp-11b.c: Guard statements. + +2020-11-05 Aldy Hernandez <aldyh@redhat.com> + + * gcc.dg/pr97721.c: New test. + +2020-11-05 qing zhao <qinzhao@gcc.gnu.org> + + PR target/97715 + * gcc.target/i386/zero-scratch-regs-32.c: New test. + +2020-11-05 David Malcolm <dmalcolm@redhat.com> + + PR analyzer/97668 + * gcc.dg/analyzer/pr97668.c: New test. + * gfortran.dg/analyzer/pr97668.f: New test. + +2020-11-05 Richard Biener <rguenther@suse.de> + + * gcc.dg/vect/bb-slp-69.c: New testcase. + +2020-11-05 Tamar Christina <tamar.christina@arm.com> + + * gcc.dg/vect/slp-11b.c: Update testcase. + * gcc.dg/vect/slp-perm-6.c: Update target selector. + +2020-11-05 Kewen Lin <linkw@linux.ibm.com> + + PR target/96933 + * gcc.target/powerpc/pr96933-1.c: New test. + * gcc.target/powerpc/pr96933-2.c: New test. + * gcc.target/powerpc/pr96933-3.c: New test. + * gcc.target/powerpc/pr96933-4.c: New test. + * gcc.target/powerpc/pr96933.h: New test. + * gcc.target/powerpc/pr96933-run.h: New test. + +2020-11-04 Tamar Christina <tamar.christina@arm.com> + + * gcc.dg/vect/slp-11b.c: Update output scan. + * gcc.dg/vect/slp-perm-6.c: Likewise. + +2020-11-04 Andrew MacLeod <amacleod@redhat.com> + + * gcc.dg/pr97515.c: Check listing for folding of entire function. + +2020-11-04 Richard Biener <rguenther@suse.de> + + PR tree-optimization/97709 + * gcc.dg/vect/bb-slp-pr97709.c: New testcase. + +2020-11-04 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/97690 + * gcc.dg/tree-ssa/phi-opt-22.c: New test. + * gcc.dg/tree-ssa/ssa-ccp-11.c: Use -O2 instead of -O1. + * gcc.dg/vect/bb-slp-pattern-2.c (foo): Use ? 2 : 7, ? 4 : 7 and + ? 8 : 7 instead of ? 2 : 0, ? 4 : 0, ? 8 : 0. + +2020-11-04 Christophe Lyon <christophe.lyon@linaro.org> + + * gcc.target/arm/pure-code/no-literal-pool-m0.c: Add dg-skip-if + and -mfloat-abi=soft option. + * gcc.target/arm/pure-code/no-literal-pool-m23.c: Likewise. + +2020-11-04 Jakub Jelinek <jakub@redhat.com> + + PR c++/97670 + * c-c++-common/gomp/allocate-4.c: New test. + * g++.dg/gomp/allocate-2.C: New test. + * g++.dg/gomp/allocate-3.C: New test. + +2020-11-04 Joseph Myers <joseph@codesourcery.com> + + * gcc.dg/c2x-attr-nodiscard-1.c, gcc.dg/c2x-attr-nodiscard-2.c, + gcc.dg/c2x-attr-nodiscard-3.c, gcc.dg/c2x-attr-nodiscard-4.c: New + tests. + * gcc.dg/c2x-attr-syntax-5.c: Remove nodiscard test. + +2020-11-04 liuhongt <hongtao.liu@intel.com> + + * gcc.target/i386/pr97540.c: New test. + +2020-11-03 Jan Hubicka <jh@suse.cz> + + * gcc.c-torture/execute/pr97695.c: New test. + +2020-11-03 Jason Merrill <jason@redhat.com> + + * g++.dg/Wclass-memaccess.C: Check that signed char and + char16_t aren't treated as byte-access types. + +2020-11-03 Thomas Schwinge <thomas@codesourcery.com> + + * c-c++-common/goacc/pr92793-1.c: Extend. + * gfortran.dg/goacc/pr92793-1.f90: Likewise. + +2020-11-03 Jakub Jelinek <jakub@redhat.com> + + PR c++/97663 + * g++.dg/cpp1z/class-deduction75.C: New test. + +2020-11-03 Kamlesh Kumar <kamleshbhalui@gmail.com> + + * g++.dg/DRs/dr2303.C: New test. + +2020-11-03 Olivier Hainque <hainque@adacore.com> + + * gcc.target/powerpc/pr67789.c: Add + dg-require-effective-target fpic. + * gcc.target/powerpc/pr83629.c: Likewise. + * gcc.target/powerpc/pr84112.c: Likewise. Remove + a superflous target test in the dg-do compile + directive while at it. + +2020-11-03 Dennis Zhang <dennis.zhang@arm.com> + + * gcc.target/aarch64/advsimd-intrinsics/bf16_get.c: New test. + * gcc.target/aarch64/advsimd-intrinsics/bf16_get-be.c: New test. + +2020-11-03 Marek Polacek <polacek@redhat.com> + + PR c++/97632 + * g++.dg/warn/Winit-list4.C: New test. + +2020-11-03 Andrea Corallo <andrea.corallo@arm.com> + + * gcc.target/aarch64/advsimd-intrinsics/vst2_lane_bf16_indices_1.c: + Run it also for arm-*-*. + * gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_bf16_indices_1.c: + Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vst3_lane_bf16_indices_1.c: + Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_bf16_indices_1.c: + Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vst4_lane_bf16_indices_1.c: + Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_bf16_indices_1.c: + Likewise. + * gcc.target/arm/simd/vstn_lane_bf16_1.c: New test. + +2020-11-03 Andrea Corallo <andrea.corallo@arm.com> + + * gcc.target/aarch64/advsimd-intrinsics/vld2_lane_bf16_indices_1.c: + Run it also for the arm backend. + * gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_bf16_indices_1.c: + Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vld3_lane_bf16_indices_1.c: + Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_bf16_indices_1.c: + Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vld4_lane_bf16_indices_1.c: + Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_bf16_indices_1.c: + Likewise. + * gcc.target/arm/simd/vldn_lane_bf16_1.c: New test. + +2020-11-03 Andrea Corallo <andrea.corallo@arm.com> + + * gcc.target/arm/simd/vst1_bf16_1.c: New test. + +2020-11-03 Andrea Corallo <andrea.corallo@arm.com> + + * gcc.target/arm/simd/vld1_bf16_1.c: New test. + +2020-11-03 Andrea Corallo <andrea.corallo@arm.com> + + * gcc.target/arm/simd/vst1_lane_bf16_1.c: New testcase. + * gcc.target/arm/simd/vstq1_lane_bf16_indices_1.c: Likewise. + * gcc.target/arm/simd/vst1_lane_bf16_indices_1.c: Likewise. + +2020-11-03 Andrea Corallo <andrea.corallo@arm.com> + + * gcc.target/arm/simd/vld1_lane_bf16_1.c: New testcase. + * gcc.target/arm/simd/vld1_lane_bf16_indices_1.c: Likewise. + * gcc.target/arm/simd/vld1q_lane_bf16_indices_1.c: Likewise. + +2020-11-03 Dennis Zhang <dennis.zhang@arm.com> + + * gcc.target/aarch64/advsimd-intrinsics/bfcvt-compile.c + (test_vcvt_f32_bf16, test_vcvtq_low_f32_bf16): New tests. + (test_vcvtq_high_f32_bf16, test_vcvth_f32_bf16): Likewise. + +2020-11-03 Richard Biener <rguenther@suse.de> + + PR tree-optimization/80928 + * gcc.dg/vect/vect-outer-slp-2.c: New testcase. + * gcc.dg/vect/vect-outer-slp-3.c: Likewise. + +2020-11-03 Uroš Bizjak <ubizjak@gmail.com> + + * gcc.target/i386/zero-scratch-regs-1.c: Add ia32 target + selector where appropriate. Improve scan-assembler regexp. + * gcc.target/i386/zero-scratch-regs-2.c: Ditto. + * gcc.target/i386/zero-scratch-regs-3.c: Ditto. + * gcc.target/i386/zero-scratch-regs-4.c: Ditto. + * gcc.target/i386/zero-scratch-regs-5.c: Ditto. + * gcc.target/i386/zero-scratch-regs-6.c: Ditto. + * gcc.target/i386/zero-scratch-regs-7.c: Ditto. + * gcc.target/i386/zero-scratch-regs-8.c: Ditto. + * gcc.target/i386/zero-scratch-regs-9.c: Ditto. + * gcc.target/i386/zero-scratch-regs-10.c: Ditto. + * gcc.target/i386/zero-scratch-regs-13.c: Ditto. + * gcc.target/i386/zero-scratch-regs-14.c: Ditto. + * gcc.target/i386/zero-scratch-regs-15.c: Ditto. + * gcc.target/i386/zero-scratch-regs-16.c: Ditto. + * gcc.target/i386/zero-scratch-regs-17.c: Ditto. + * gcc.target/i386/zero-scratch-regs-18.c: Ditto. + * gcc.target/i386/zero-scratch-regs-19.c: Ditto. + * gcc.target/i386/zero-scratch-regs-20.c: Ditto. + * gcc.target/i386/zero-scratch-regs-21.c: Ditto. + * gcc.target/i386/zero-scratch-regs-22.c: Ditto. + * gcc.target/i386/zero-scratch-regs-23.c: Ditto. + * gcc.target/i386/zero-scratch-regs-24.c: Ditto. + * gcc.target/i386/zero-scratch-regs-25.c: Ditto. + * gcc.target/i386/zero-scratch-regs-26.c: Ditto. + * gcc.target/i386/zero-scratch-regs-27.c: Ditto. + * gcc.target/i386/zero-scratch-regs-28.c: Ditto. + * gcc.target/i386/zero-scratch-regs-29.c: Ditto. + * gcc.target/i386/zero-scratch-regs-30.c: Ditto. + * gcc.target/i386/zero-scratch-regs-31.c: Ditto. + +2020-11-03 Olivier Hainque <hainque@adacore.com> + + * gcc.dg/tree-ssa/pr71077.c: Add + dg-require-effective-target lto. + +2020-11-03 Olivier Hainque <hainque@adacore.com> + + * gcc.target/i386/pr45352-1.c: Add dg-require-effective-target fpic. + * gcc.target/i386/pr47602.c: Likewise. + * gcc.target/i386/pr55151.c: Likewise. + * gcc.target/i386/pr55458.c: Likewise. + * gcc.target/i386/pr56348.c: Likewise. + * gcc.target/i386/pr57097.c: Likewise. + * gcc.target/i386/pr65753.c: Likewise. + * gcc.target/i386/pr65915.c: Likewise. + * gcc.target/i386/pr66232-5.c: Likewise. + * gcc.target/i386/pr66334.c: Likewise. + * gcc.target/i386/pr66819-2.c: Likewise. + * gcc.target/i386/pr67265.c: Likewise. + * gcc.target/i386/pr81481.c: Likewise. + * gcc.target/i386/pr83994.c: Likewise. + +2020-11-03 Jan Hubicka <hubicka@ucw.cz> + + * gcc.c-torture/compile/pr97578.c: New test. + +2020-11-03 Richard Biener <rguenther@suse.de> + + PR testsuite/97688 + * gcc.dg/vect/tree-vect.h (check_vect): Fix the x86 cpuid + check to always specify subleaf zero. + +2020-11-03 Richard Biener <rguenther@suse.de> + + PR tree-optimization/97678 + * gcc.dg/vect/pr97678.c: New testcase. + +2020-11-03 Tobias Burnus <tobias@codesourcery.com> + + * gfortran.dg/attr_deprecated.f90: New test. + +2020-11-03 Thomas Schwinge <thomas@codesourcery.com> + + * c-c++-common/goacc/nested-reductions-1-kernels.c: Extend. + * c-c++-common/goacc/nested-reductions-2-kernels.c: Likewise. + * gfortran.dg/goacc/nested-reductions-1-kernels.f90: Likewise. + * gfortran.dg/goacc/nested-reductions-2-kernels.f90: Likewise. + +2020-11-03 Thomas Schwinge <thomas@codesourcery.com> + + * c-c++-common/goacc/nested-reductions.c: Split file into... + * c-c++-common/goacc/nested-reductions-1-kernels.c: ... this... + * c-c++-common/goacc/nested-reductions-1-parallel.c: ..., this... + * c-c++-common/goacc/nested-reductions-1-routine.c: ..., and this. + * c-c++-common/goacc/nested-reductions-warn.c: Split file into... + * c-c++-common/goacc/nested-reductions-2-kernels.c: ... this... + * c-c++-common/goacc/nested-reductions-2-parallel.c: ..., this... + * c-c++-common/goacc/nested-reductions-2-routine.c: ..., and this. + * gfortran.dg/goacc/nested-reductions.f90: Split file into... + * gfortran.dg/goacc/nested-reductions-1-kernels.f90: ... this... + * gfortran.dg/goacc/nested-reductions-1-parallel.f90: ..., this... + * gfortran.dg/goacc/nested-reductions-1-routine.f90: ..., and + this. + * gfortran.dg/goacc/nested-reductions-warn.f90: Split file into... + * gfortran.dg/goacc/nested-reductions-2-kernels.f90: ... this... + * gfortran.dg/goacc/nested-reductions-2-parallel.f90: ..., this... + * gfortran.dg/goacc/nested-reductions-2-routine.f90: ..., and + this. + +2020-11-03 Thomas Schwinge <thomas@codesourcery.com> + + PR fortran/92793 + * gfortran.dg/goacc/pr92793-1.f90: Adjust. + +2020-11-03 Thomas Schwinge <thomas@codesourcery.com> + + * c-c++-common/goacc/pr92793-1.c: Extend. + * gfortran.dg/goacc/pr92793-1.f90: Likewise. + +2020-11-03 Kewen Lin <linkw@gcc.gnu.org> + + PR tree-optimization/96789 + * gcc.dg/tree-ssa/ssa-dse-28.c: Adjust. + * gcc.dg/tree-ssa/ssa-dse-29.c: Likewise. + * gcc.dg/vect/bb-slp-41.c: Likewise. + * gcc.dg/tree-ssa/pr96789.c: New test. + +2020-11-03 Bernd Edlinger <bernd.edlinger@hotmail.de> + + PR target/97205 + * gcc.c-torture/compile/pr97205.c: New test. + +2020-11-02 Alan Modra <amodra@gmail.com> + + PR middle-end/97267 + * gcc.target/powerpc/pr97267.c: New test. + +2020-11-02 H.J. Lu <hjl.tools@gmail.com> + + PR target/97140 + * gcc.target/i386/pr97140.c: New test. + +2020-11-02 Patrick Palka <ppalka@redhat.com> + + * g++.dg/cpp2a/concepts-complete1.C: Delete test that became + ill-formed after P2104. + +2020-11-02 Carl Love <cel@us.ibm.com> + + * gcc.target/powerpc/bcd-2.c: Add include altivec.h. + * gcc.target/powerpc/bcd-3.c: Add include altivec.h. + * gcc.target/powerpc/bcd-4.c: New test. + +2020-11-02 Nathan Sidwell <nathan@acm.org> + + * g++.dg/concepts/pack-1.C: New. + * g++.dg/lookup/using53.C: Add an enum. + * g++.dg/template/error25.C: Relax 'export' error check. + +2020-11-02 Sudakshina Das <sudi.das@arm.com> + + PR target/97638 + * gcc.target/aarch64/pr97638.c: New test.a + +2020-11-02 Richard Biener <rguenther@suse.de> + + * gcc.dg/vect/slp-49.c: New testcase. + +2020-11-02 Christophe Lyon <christophe.lyon@linaro.org> + + * gcc.target/arm/pure-code/no-literal-pool-m23.c: New. + +2020-11-02 Christophe Lyon <christophe.lyon@linaro.org> + + * gcc.target/arm/pure-code/no-literal-pool-m0.c: New. + +2020-11-02 Thomas Schwinge <thomas@codesourcery.com> + + PR fortran/92793 + * gfortran.dg/goacc/pr92793-1.f90: Adjust. + +2020-11-02 Tobias Burnus <tobias@codesourcery.com> + + PR fortran/97655 + * gfortran.dg/gomp/atomic.f90: Update tree-dump counts; move + invalid OMP 5.0 code to ... + * gfortran.dg/gomp/atomic-2.f90: ... here; update dg-error. + * gfortran.dg/gomp/requires-9.f90: Update tree dump scan. + +2020-11-02 Richard Biener <rguenther@suse.de> + + PR tree-optimization/97558 + * gcc.dg/vect/pr97558-2.c: New testcase. + +2020-11-02 Aldy Hernandez <aldyh@redhat.com> + + PR tree-optimization/97505 + * gcc.dg/pr97505.c: New test. + +2020-11-02 Richard Biener <rguenther@suse.de> + + PR tree-optimization/97558 + * gcc.dg/vect/pr97558.c: New testcase. + +2020-11-02 Richard Biener <rguenther@suse.de> + + PR tree-optimization/97650 + * gcc.dg/vect/bb-slp-pr97650.c: New testcase. + +2020-11-02 Kito Cheng <kito.cheng@sifive.com> + + * gcc.target/riscv/arch-7.c: New. + * gcc.target/riscv/attribute-10.c: Update test arch string. + +2020-11-02 Christophe Lyon <christophe.lyon@linaro.org> + + PR target/96770 + * gcc.target/arm/pure-code/pr96770.c: New test. + +2020-11-02 Christophe Lyon <christophe.lyon@linaro.org> + + PR target/96967 + * gcc.target/arm/pure-code/pr96767.c: New test. + +2020-11-01 Iain Sandoe <iain@sandoe.co.uk> + + * obj-c++.dg/SEL-typedef.mm: New test. + * objc.dg/SEL-typedef.m: New test. + +2020-11-01 Iain Sandoe <iain@sandoe.co.uk> + + * obj-c++.dg/property/at-property-1.mm: Adjust test after + fixing spurious error output. + +2020-11-01 Iain Sandoe <iain@sandoe.co.uk> + + * gcc.target/i386/amxbf16-asmintel-1.c: Require masm_intel. + * gcc.target/i386/amxint8-asmintel-1.c: Likewise. + * gcc.target/i386/amxtile-asmintel-1.c: Likewise. + +2020-10-30 Qing Zhao <qing.zhao@oracle.com> + H.J.Lu <hjl.tools@gmail.com> + + * c-c++-common/zero-scratch-regs-1.c: New test. + * c-c++-common/zero-scratch-regs-10.c: New test. + * c-c++-common/zero-scratch-regs-11.c: New test. + * c-c++-common/zero-scratch-regs-2.c: New test. + * c-c++-common/zero-scratch-regs-3.c: New test. + * c-c++-common/zero-scratch-regs-4.c: New test. + * c-c++-common/zero-scratch-regs-5.c: New test. + * c-c++-common/zero-scratch-regs-6.c: New test. + * c-c++-common/zero-scratch-regs-7.c: New test. + * c-c++-common/zero-scratch-regs-8.c: New test. + * c-c++-common/zero-scratch-regs-9.c: New test. + * c-c++-common/zero-scratch-regs-attr-usages.c: New test. + * gcc.target/i386/zero-scratch-regs-1.c: New test. + * gcc.target/i386/zero-scratch-regs-10.c: New test. + * gcc.target/i386/zero-scratch-regs-11.c: New test. + * gcc.target/i386/zero-scratch-regs-12.c: New test. + * gcc.target/i386/zero-scratch-regs-13.c: New test. + * gcc.target/i386/zero-scratch-regs-14.c: New test. + * gcc.target/i386/zero-scratch-regs-15.c: New test. + * gcc.target/i386/zero-scratch-regs-16.c: New test. + * gcc.target/i386/zero-scratch-regs-17.c: New test. + * gcc.target/i386/zero-scratch-regs-18.c: New test. + * gcc.target/i386/zero-scratch-regs-19.c: New test. + * gcc.target/i386/zero-scratch-regs-2.c: New test. + * gcc.target/i386/zero-scratch-regs-20.c: New test. + * gcc.target/i386/zero-scratch-regs-21.c: New test. + * gcc.target/i386/zero-scratch-regs-22.c: New test. + * gcc.target/i386/zero-scratch-regs-23.c: New test. + * gcc.target/i386/zero-scratch-regs-24.c: New test. + * gcc.target/i386/zero-scratch-regs-25.c: New test. + * gcc.target/i386/zero-scratch-regs-26.c: New test. + * gcc.target/i386/zero-scratch-regs-27.c: New test. + * gcc.target/i386/zero-scratch-regs-28.c: New test. + * gcc.target/i386/zero-scratch-regs-29.c: New test. + * gcc.target/i386/zero-scratch-regs-30.c: New test. + * gcc.target/i386/zero-scratch-regs-31.c: New test. + * gcc.target/i386/zero-scratch-regs-3.c: New test. + * gcc.target/i386/zero-scratch-regs-4.c: New test. + * gcc.target/i386/zero-scratch-regs-5.c: New test. + * gcc.target/i386/zero-scratch-regs-6.c: New test. + * gcc.target/i386/zero-scratch-regs-7.c: New test. + * gcc.target/i386/zero-scratch-regs-8.c: New test. + * gcc.target/i386/zero-scratch-regs-9.c: New test. + +2020-10-30 Martin Sebor <msebor@redhat.com> + + PR middle-end/97556 + * gcc.dg/Warray-bounds-70.c: New test. + +2020-10-30 Tobias Burnus <tobias@codesourcery.com> + + * g++.dg/guality/guality.exp: Skip $rootme-based check if unset. + * gcc.dg/guality/guality.exp: Likewise. + * gfortran.dg/guality/guality.exp: Likewise. + * lib/asan-dg.exp: Don't use $asan_saved_library_path if not set. + * lib/tsan-dg.exp: Don't use $tsan_saved_library_path if not set. + * lib/ubsan-dg.exp: Don't use $ubsan_saved_library_path if not set. + +2020-10-30 Tobias Burnus <tobias@codesourcery.com> + + * gfortran.dg/gomp/atomic-2.f90: New test. + * gfortran.dg/gomp/atomic.f90: New test. + +2020-10-30 Richard Biener <rguenther@suse.de> + + PR tree-optimization/97623 + * gcc.dg/tree-ssa/ssa-hoist-7.c: New testcase. + +2020-10-30 Richard Biener <rguenther@suse.de> + + PR tree-optimization/97626 + * gcc.dg/vect/bb-slp-pr97626.c: New testcase. + +2020-10-30 Thomas Schwinge <thomas@codesourcery.com> + + PR fortran/92793 + * c-c++-common/goacc/clause-locations.c: Rewrite into... + * c-c++-common/goacc/pr92793-1.c: ... this. + * gfortran.dg/goacc/clause-locations.f90: Rewrite into... + * gfortran.dg/goacc/pr92793-1.f90: ... this. + +2020-10-30 Richard Biener <rguenther@suse.de> + + PR tree-optimization/97633 + * g++.dg/vect/slp-pr97636.cc: New testcase. + * gcc.dg/vect/bb-slp-pr97633.c: Likewise. + +2020-10-30 Alex Coplan <alex.coplan@arm.com> + + PR target/96998 + * gcc.c-torture/compile/pr96998.c: New test. + +2020-10-30 Jakub Jelinek <jakub@redhat.com> + + * c-c++-common/gomp/allocate-3.c: New test. + +2020-10-30 Jakub Jelinek <jakub@redhat.com> + + * c-c++-common/gomp/allocate-1.c (qux): Add another test. + * g++.dg/gomp/allocate-1.C: New test. + +2020-10-30 Richard Biener <rguenther@suse.de> + + * gcc.dg/vect/bb-slp-pr65935.c: Adjust. + +2020-10-30 Michael Meissner <meissner@linux.ibm.com> + + * gcc.target/powerpc/float128-mix-2.c: New test. + * gcc.target/powerpc/float128-mix-3.c: New test. + * gcc.target/powerpc/float128-mix.c: Update failure messages. + +2020-10-29 Marek Polacek <polacek@redhat.com> + + DR 625 + PR c++/97479 + * g++.dg/cpp0x/auto3.C: Update dg-error. + * g++.dg/cpp0x/auto9.C: Likewise. + * g++.dg/cpp2a/concepts-pr84979-2.C: Likewise. + * g++.dg/cpp2a/concepts-pr84979-3.C: Likewise. + * g++.dg/cpp2a/concepts-pr84979.C: Likewise. + * g++.dg/DRs/dr625.C: New test. + +2020-10-29 Marek Polacek <polacek@redhat.com> + + PR c++/93107 + * g++.dg/cpp0x/initlist-deduce3.C: New test. + +2020-10-29 Marek Polacek <polacek@redhat.com> + + * g++.dg/cpp2a/enum-conv1.C: Remove unused code. + * g++.dg/cpp2a/spaceship-err5.C: New test. + +2020-10-29 Patrick Palka <ppalka@redhat.com> + + PR c++/97412 + * g++.dg/cpp2a/concepts-variadic2.C: New test. + +2020-10-29 Jason Merrill <jason@redhat.com> + + PR c++/97388 + * g++.dg/cpp2a/constexpr-dtor8.C: New test. + +2020-10-29 Jakub Jelinek <jakub@redhat.com> + Jason Merrill <jason@redhat.com> + + PR c++/97388 + * g++.dg/cpp2a/constexpr-dtor5.C: New test. + * g++.dg/cpp2a/constexpr-dtor6.C: New test. + * g++.dg/cpp2a/constexpr-dtor7.C: New test. + +2020-10-29 Jakub Jelinek <jakub@redhat.com> + + PR c++/95808 + * g++.dg/cpp2a/constexpr-new15.C: New test. + +2020-10-29 Joseph Myers <joseph@codesourcery.com> + + * gcc.dg/c11-bool-1.c, gcc.dg/c2x-bool-1.c, gcc.dg/c99-bool-4.c: + New tests. + +2020-10-29 Jakub Jelinek <jakub@redhat.com> + + * gcc.dg/pr97596.c: Require int128 effective target. + +2020-10-29 Andrew MacLeod <amacleod@redhat.com> + + * gcc.dg/pr97596.c: New. + +2020-10-29 Alexandre Oliva <oliva@adacore.com> + + * gnat.dg/sin_cos.ads: New. + * gnat.dg/sin_cos.adb: New. + * gcc.dg/sin_cos.c: New. + +2020-10-29 liuhongt <hongtao.liu@intel.com> + + * gcc.target/i386/keylocker-aesdec128kl.c: New test. + * gcc.target/i386/keylocker-aesdec256kl.c: Likewise. + * gcc.target/i386/keylocker-aesdecwide128kl.c: Likewise. + * gcc.target/i386/keylocker-aesdecwide256kl.c: Likewise. + * gcc.target/i386/keylocker-aesenc128kl.c: Likewise. + * gcc.target/i386/keylocker-aesencwide128kl.c: Likewise. + * gcc.target/i386/keylocker-aesencwide256kl.c: Likewise. + * gcc.target/i386/keylocker-encodekey128.c: Likewise. + * gcc.target/i386/keylocker-encodekey256.c: Likewise. + * gcc.target/i386/keylocker-loadiwkey.c: Likewise. + * g++.dg/other/i386-2.C: Add -mkl and -mwidekl. + * g++.dg/other/i386-3.C: Likewise. + * gcc.target/i386/sse-12.c: Likewise. + * gcc.target/i386/sse-13.c: Likewise. + * gcc.target/i386/sse-14.c: Likewise. + * gcc.target/i386/sse-22.c: Add kl and widekl. + * gcc.target/i386/sse-23.c: Likewise. + * gcc.target/i386/funcspec-56.inc: Add new target attribute test. + +2020-10-29 Richard Biener <rguenther@suse.de> + + * gcc.dg/vect/bb-slp-pr65935.c: Adjust. + +2020-10-29 Andrew MacLeod <amacleod@redhat.com> + + * g++.dg/pr97609.C: New. + +2020-10-29 David Malcolm <dmalcolm@redhat.com> + + PR analyzer/97608 + * gcc.dg/analyzer/malloc-1.c (test_42d): New. + * gcc.dg/analyzer/pr97608.c: New test. + +2020-10-28 Alan Modra <amodra@gmail.com> + + * gcc.target/powerpc/vsx-load-element-extend-char.c: Put "dg-do run" + before "dg-do compile", and make them mutually exclusive. + * gcc.target/powerpc/vsx-load-element-extend-int.c: Likewise. + * gcc.target/powerpc/vsx-load-element-extend-longlong.c: Likewise. + * gcc.target/powerpc/vsx-load-element-extend-short.c: Likewise. + * gcc.target/powerpc/vsx-store-element-truncate-char.c: Likewise. + * gcc.target/powerpc/vsx-store-element-truncate-int.c: Likewise. + * gcc.target/powerpc/vsx-store-element-truncate-longlong.c: Likewise. + * gcc.target/powerpc/vsx-store-element-truncate-short.c: Likewise. + * gcc.target/powerpc/altivec-consts.c: Likewise, add -save-temps. + * gcc.target/powerpc/le-altivec-consts.c: Likewise. + +2020-10-28 Alan Modra <amodra@gmail.com> + + * gcc.target/powerpc/float128-type-1.c: Simplify target test. + * gcc.target/powerpc/float128-type-2.c: Likewise. + +2020-10-28 Alan Modra <amodra@gmail.com> + + * gcc.target/powerpc/fold-vec-extract-char.p9.c: Don't check addi + count for ilp32. + * gcc.target/powerpc/fold-vec-extract-int.p9.c: Likewise. + * gcc.target/powerpc/fold-vec-extract-longlong.p7.c: Likewise. + * gcc.target/powerpc/fold-vec-extract-longlong.p8.c: Likewise. + * gcc.target/powerpc/fold-vec-insert-int-p9.c: Likewise. + +2020-10-28 Marek Polacek <polacek@redhat.com> + + * g++.dg/warn/mvp3.C: New test. + +2020-10-28 Marek Polacek <polacek@redhat.com> + + PR c++/97573 + * g++.dg/cpp0x/linkage2.C: Add dg-warning. + * g++.dg/parse/attr3.C: Likewise. + * g++.dg/cpp2a/enum-conv1.C: New test. + * g++.dg/cpp2a/enum-conv2.C: New test. + * g++.dg/cpp2a/enum-conv3.C: New test. + +2020-10-28 Marek Polacek <polacek@redhat.com> + + PR c++/96675 + PR c++/96742 + * g++.dg/warn/Wdiv-by-zero-3.C: Turn dg-warning into dg-bogus. + * g++.dg/warn/Wtautological-compare3.C: New test. + * g++.dg/warn/Wtype-limits5.C: New test. + * g++.old-deja/g++.pt/crash10.C: Remove dg-warning. + +2020-10-28 David Edelsohn <dje.gcc@gmail.com> + + * gcc.target/powerpc/sad-vectorize-1.c: Remove AIX skip. + * gcc.target/powerpc/sad-vectorize-2.c: Remove AIX skip. + * gcc.target/powerpc/sad-vectorize-3.c: Remove target. + Require p9vector_hw. + * gcc.target/powerpc/sad-vectorize-4.c: Remove target. + Require p9vector_hw. + * gcc.target/powerpc/signbit-1.c: Remove target. + Require ppc_float128_sw. + * gcc.target/powerpc/signbit-2.c: Remove target. + Require ppc_float128_sw. + * gcc.target/powerpc/signbit-3.c: Remove target. + Require ppc_float128_sw. + +2020-10-28 Marek Polacek <polacek@redhat.com> + + PR c++/94799 + * g++.dg/template/lookup16.C: New test. + +2020-10-28 Marek Polacek <polacek@redhat.com> + + PR c++/86773 + * g++.dg/cpp1z/fold12.C: New test. + +2020-10-28 Tamar Christina <tamar.christina@arm.com> + + PR target/97535 + * gcc.target/aarch64/pr97535.c: Exclude ILP32. + +2020-10-28 Richard Sandiford <richard.sandiford@arm.com> + + PR tree-optimization/97457 + * gcc.dg/vect/pr97457.c: New test. + +2020-10-28 Joseph Myers <joseph@codesourcery.com> + + * gcc.dg/c11-parm-omit-1.c, gcc.dg/c11-parm-omit-2.c, + gcc.dg/c11-parm-omit-3.c, gcc.dg/c11-parm-omit-4.c, + gcc.dg/c2x-parm-omit-1.c, gcc.dg/c2x-parm-omit-2.c, + gcc.dg/c2x-parm-omit-3.c, gcc.dg/c2x-parm-omit-4.c: New tests. + * gcc.dg/noncompile/pr79758.c: Do not expect error for omitted + parameter name. + +2020-10-28 Patrick Palka <ppalka@redhat.com> + + PR c++/95132 + * g++.dg/cpp2a/concepts-fn7.C: New test. + +2020-10-28 David Edelsohn <dje.gcc@gmail.com> + + * gcc.target/powerpc/vadsdu-0.c: Remove target. + * gcc.target/powerpc/vadsdu-1.c: Remove target. + * gcc.target/powerpc/vadsdu-2.c: Remove target. + * gcc.target/powerpc/vadsdu-3.c: Remove target. + * gcc.target/powerpc/vadsdu-4.c: Remove target. + * gcc.target/powerpc/vadsdu-5.c: Remove target. + * gcc.target/powerpc/vadsdub-1.c: Remove target. + * gcc.target/powerpc/vadsdub-2.c: Remove target. + * gcc.target/powerpc/vadsduh-1.c: Remove target. + * gcc.target/powerpc/vadsduh-2.c: Remove target. + * gcc.target/powerpc/vadsduw-1.c: Remove target. + * gcc.target/powerpc/vadsduw-2.c: Remove target. + * gcc.target/powerpc/vslv-0.c: Remove target. + * gcc.target/powerpc/vslv-1.c: Remove target. + * gcc.target/powerpc/vsrv-0.c: Remove target. + * gcc.target/powerpc/vsrv-1.c: Remove target. + +2020-10-28 David Edelsohn <dje.gcc@gmail.com> + Alan Modra <amodra@gmail.com> + + * gcc.target/powerpc/byte-in-either-range-0.c: Remove target. + * gcc.target/powerpc/byte-in-either-range-1.c: Remove target. + * gcc.target/powerpc/byte-in-range-0.c: Remove target. + * gcc.target/powerpc/byte-in-range-1.c: Remove target. + * gcc.target/powerpc/byte-in-set-0.c: Remove target. + * gcc.target/powerpc/byte-in-set-1.c: Remove target. + * gcc.target/powerpc/byte-in-set-2.c: Remove target. Expect + implicit declaration warning. + +2020-10-28 Richard Biener <rguenther@suse.de> + + * gcc.dg/vect/bb-slp-58.c: Require vect_double. + * gcc.dg/vect/bb-slp-59.c: Likewise. + +2020-10-28 Richard Biener <rguenther@suse.de> + + PR tree-optimization/97615 + * gcc.dg/vect/bb-slp-pr97615.c: New testcase. + +2020-10-28 Richard Biener <rguenther@suse.de> + + * gcc.dg/vect/bb-slp-68.c: New testcase. + +2020-10-28 Andrea Corallo <andrea.corallo@arm.com> + + * gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h + (hbfloat16_t): Define type. + (CHECK_FP): Make it working for bfloat types. + * gcc.target/aarch64/advsimd-intrinsics/bf16_vstN_lane_1.c: New file. + * gcc.target/aarch64/advsimd-intrinsics/bf16_vstN_lane_2.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vst2_lane_bf16_indices_1.c: + Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_bf16_indices_1.c: + Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vst3_lane_bf16_indices_1.c: + Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_bf16_indices_1.c: + Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vst4_lane_bf16_indices_1.c: + Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_bf16_indices_1.c: + Likewise. + +2020-10-28 Andrea Corallo <andrea.corallo@arm.com> + + * gcc.target/aarch64/advsimd-intrinsics/bf16_vldN_lane_1.c: New + testcase. + * gcc.target/aarch64/advsimd-intrinsics/bf16_vldN_lane_2.c: + Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vld2_lane_bf16_indices_1.c: + Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_bf16_indices_1.c: + Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vld3_lane_bf16_indices_1.c: + Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_bf16_indices_1.c: + Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vld4_lane_bf16_indices_1.c: + Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_bf16_indices_1.c: + Likewise. + +2020-10-28 Jakub Jelinek <jakub@redhat.com> + + * c-c++-common/gomp/allocate-1.c: New test. + * c-c++-common/gomp/allocate-2.c: New test. + * c-c++-common/gomp/clauses-1.c (omp_allocator_handle_t): New typedef. + (foo, bar, baz): Add allocate clauses where allowed. + +2020-10-28 Alan Modra <amodra@gmail.com> + + * gcc.target/powerpc/vsx-load-element-extend-char.c: Add -save-temps. + * gcc.target/powerpc/vsx-load-element-extend-int.c: Likewise. + * gcc.target/powerpc/vsx-load-element-extend-longlong.c: Likewise. + * gcc.target/powerpc/vsx-load-element-extend-short.c: Likewise. + * gcc.target/powerpc/vsx-store-element-truncate-char.c: Likewise. + * gcc.target/powerpc/vsx-store-element-truncate-int.c: Likewise. + * gcc.target/powerpc/vsx-store-element-truncate-longlong.c: Likewise. + * gcc.target/powerpc/vsx-store-element-truncate-short.c: Likewise. + +2020-10-28 Alan Modra <amodra@gmail.com> + + * gcc.target/powerpc/vec-blend-runnable.c: Add save-temps. + * gcc.target/powerpc/vec-insert-word-runnable.c: Likewise. + * gcc.target/powerpc/vec-permute-ext-runnable.c: Likewise. + * gcc.target/powerpc/vec-replace-word-runnable.c: Likewise. + * gcc.target/powerpc/vec-splati-runnable.c: Likewise. + * gcc.target/powerpc/vec-ternarylogic-3.c: Likewise. + * gcc.target/powerpc/vec-ternarylogic-9.c: Likewise. + * gcc.target/powerpc/vsx_mask-count-runnable.c: Likewise. + * gcc.target/powerpc/vsx_mask-expand-runnable.c: Likewise. + * gcc.target/powerpc/vsx_mask-extract-runnable.c: Likewise. + * gcc.target/powerpc/vsx_mask-move-runnable.c: Likewise. + * gcc.target/powerpc/vec-shift-double-runnable.c: Likewise, + and correct assembly match. + +2020-10-27 Joseph Myers <joseph@codesourcery.com> + + * gcc.dg/c2x-attr-deprecated-4.c, gcc.dg/c2x-attr-fallthrough-4.c, + gcc.dg/c2x-attr-maybe_unused-4.c: Allow duplicate attributes. + +2020-10-27 Andreas Krebbel <krebbel@linux.ibm.com> + + * gcc.target/s390/pr97497.c: New test. + +2020-10-27 Harald Anlauf <anlauf@gmx.de> + + * gfortran.dg/value_8.f90: New test. + +2020-10-27 Carl Love <cel@us.ibm.com> + + * gcc.target/powerpc/vec-blend-runnable.c: Change #ifdef + DEBUG to #if DEBUG. + Fix printf line so it is less then 80 characters long. + * gcc.target/powerpc/vec-insert-word-runnable.c: Change + #ifdef DEBUG to #if DEBUG. + * gcc.target/powerpc/vec-permute-ext-runnable.c: Change + #ifdef DEBUG to #if DEBUG. + * gcc.target/powerpc/vec-replace-word-runnable.c: Change + #ifdef DEBUG to #if DEBUG. + Fix printf lines so they are less then 80 characters long. + * gcc.target/powerpc/vec-shift-double-runnable.c: Change + #ifdef DEBUG to #if DEBUG. + +2020-10-27 Tamar Christina <tamar.christina@arm.com> + + PR target/97535 + * gcc.target/aarch64/pr97535.c: New test. + +2020-10-27 Andrea Corallo <andrea.corallo@arm.com> + + * gcc.target/aarch64/advsimd-intrinsics/bf16_vect_copy_lane_1.c: + New test. + * gcc.target/aarch64/advsimd-intrinsics/vcopy_lane_bf16_indices_1.c: + Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcopy_lane_bf16_indices_2.c: + Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcopy_laneq_bf16_indices_1.c: + Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcopy_laneq_bf16_indices_2.c: + Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcopyq_lane_bf16_indices_1.c: + Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcopyq_lane_bf16_indices_2.c: + Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcopyq_laneq_bf16_indices_1.c: + Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcopyq_laneq_bf16_indices_2.c: + Likewise. + +2020-10-27 Richard Biener <rguenther@suse.de> + + * gcc.dg/vect/bb-slp-67.c: New testcase. + +2020-10-27 Martin Sebor <msebor@redhat.com> + + PR middle-end/92942 + * gcc.dg/Wstringop-overflow-56.c: New test. + * gcc.dg/Wstringop-overflow-57.c: Same. + +2020-10-27 Martin Sebor <msebor@redhat.com> + + * gcc.dg/Wstringop-overflow-44.s: Remove. + +2020-10-27 Andrew MacLeod <amacleod@redhat.com> + + * gcc.dg/pr97567.c: Update to work with 32 bit targets. + +2020-10-27 David Malcolm <dmalcolm@redhat.com> + + PR analyzer/97568 + * gcc.dg/analyzer/pr97568.c: New test. + +2020-10-27 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/97560 + PR testsuite/97590 + * g++.dg/pr97560.C: Require c++11 effective target and add comment + with PR number. + +2020-10-27 Richard Biener <rguenther@suse.de> + + * gcc.dg/vect/bb-slp-54.c: New test. + * gcc.dg/vect/bb-slp-55.c: Likewise. + * gcc.dg/vect/bb-slp-56.c: Likewise. + * gcc.dg/vect/bb-slp-57.c: Likewise. + * gcc.dg/vect/bb-slp-58.c: Likewise. + * gcc.dg/vect/bb-slp-59.c: Likewise. + * gcc.dg/vect/bb-slp-60.c: Likewise. + * gcc.dg/vect/bb-slp-61.c: Likewise. + * gcc.dg/vect/bb-slp-62.c: Likewise. + * gcc.dg/vect/bb-slp-63.c: Likewise. + * gcc.dg/vect/bb-slp-64.c: Likewise. + * gcc.dg/vect/bb-slp-65.c: Likewise. + * gcc.dg/vect/bb-slp-66.c: Likewise. + * gcc.dg/vect/vect-outer-slp-1.c: Likewise. + * gfortran.dg/vect/O3-bb-slp-1.f: Likewise. + * gfortran.dg/vect/O3-bb-slp-2.f: Likewise. + * g++.dg/vect/simd-11.cc: Likewise. + +2020-10-27 Richard Biener <rguenther@suse.de> + + * gcc.target/i386/pr95866-1.c: Adjust. + +2020-10-27 Alan Modra <amodra@gmail.com> + + * gcc.target/powerpc/swaps-p8-22.c: Enable only for aix and + -m64 linux. + +2020-10-27 Martin Liska <mliska@suse.cz> + + PR gcov-profile/97461 + * gcc.dg/tree-prof/pr97461.c: New test. + +2020-10-27 Aldy Hernandez <aldyh@redhat.com> + + PR tree-optimization/97560 + * g++.dg/pr97560.C: New test. + +2020-10-27 Alan Modra <amodra@gmail.com> + + * gcc.target/powerpc/vsx_mask-count-runnable.c: Separate options + passed to dg-require-effective-target. + * gcc.target/powerpc/vsx_mask-expand-runnable.c: Likewise. + * gcc.target/powerpc/vsx_mask-extract-runnable.c: Likewise. + * gcc.target/powerpc/vsx_mask-move-runnable.c: Likewise. + +2020-10-26 Alan Modra <amodra@gmail.com> + + * gcc.target/powerpc/localentry-1.c: Remove -mpcrel from options. + * gcc.target/powerpc/notoc-direct-1.c: Likewise. + * gcc.target/powerpc/pr94740.c: Likewise. + +2020-10-26 Alan Modra <amodra@gmail.com> + + * gcc.target/powerpc/bswap64-4.c: Comment. + +2020-10-26 Alan Modra <amodra@gmail.com> + + * gcc.target/powerpc/pr93122.c: Replace -mcpu with -mdejagnu-cpu. + * gcc.target/powerpc/vsx_mask-count-runnable.c: Likewise. + * gcc.target/powerpc/vsx_mask-expand-runnable.c: Likewise. + * gcc.target/powerpc/vsx_mask-extract-runnable.c: Likewise. + * gcc.target/powerpc/vsx_mask-move-runnable.c: Likewise. + +2020-10-26 Alan Modra <amodra@gmail.com> + + * gcc.target/powerpc/vsx-load-element-extend-char.c: Require int128. + * gcc.target/powerpc/vsx-load-element-extend-int.c: Likewise. + * gcc.target/powerpc/vsx-load-element-extend-longlong.c: Likewise. + * gcc.target/powerpc/vsx-load-element-extend-short.c: Likewise. + * gcc.target/powerpc/vsx-store-element-truncate-char.c: Likewise. + * gcc.target/powerpc/vsx-store-element-truncate-int.c: Likewise. + * gcc.target/powerpc/vsx-store-element-truncate-longlong.c: Likewise. + * gcc.target/powerpc/vsx-store-element-truncate-short.c: Likewise. + * gcc.target/powerpc/vsx_mask-count-runnable.c: Likewise. + * gcc.target/powerpc/vsx_mask-expand-runnable.c: Likewise. + * gcc.target/powerpc/vsx_mask-extract-runnable.c: Likewise. + * gcc.target/powerpc/vsx_mask-move-runnable.c: Likewise. + +2020-10-26 Alan Modra <amodra@gmail.com> + + * gcc.target/powerpc/cfuged-1.c, + gcc.target/powerpc/cntlzdm-1.c, + gcc.target/powerpc/cnttzdm-1.c, + gcc.target/powerpc/dg-future-1.c, + gcc.target/powerpc/lsbb-runnable.c, + gcc.target/powerpc/mma-double-test.c, + gcc.target/powerpc/mma-single-test.c, + gcc.target/powerpc/p10-arch31.c, + gcc.target/powerpc/p10-identify.c, + gcc.target/powerpc/pdep-1.c, + gcc.target/powerpc/pextd-1.c, + gcc.target/powerpc/pr96787-2.c, + gcc.target/powerpc/vec-blend-runnable.c, + gcc.target/powerpc/vec-cfuged-1.c, + gcc.target/powerpc/vec-clrl-1.c, + gcc.target/powerpc/vec-clrl-3.c, + gcc.target/powerpc/vec-clrr-1.c, + gcc.target/powerpc/vec-clrr-3.c, + gcc.target/powerpc/vec-cntlzm-1.c, + gcc.target/powerpc/vec-cnttzm-1.c, + gcc.target/powerpc/vec-extracth-1.c, + gcc.target/powerpc/vec-extracth-3.c, + gcc.target/powerpc/vec-extracth-5.c, + gcc.target/powerpc/vec-extracth-7.c, + gcc.target/powerpc/vec-extractl-1.c, + gcc.target/powerpc/vec-extractl-3.c, + gcc.target/powerpc/vec-extractl-5.c, + gcc.target/powerpc/vec-extractl-7.c, + gcc.target/powerpc/vec-gnb-1.c, + gcc.target/powerpc/vec-insert-word-runnable.c, + gcc.target/powerpc/vec-pdep-1.c, + gcc.target/powerpc/vec-permute-ext-runnable.c, + gcc.target/powerpc/vec-pext-1.c, + gcc.target/powerpc/vec-replace-word-runnable.c, + gcc.target/powerpc/vec-shift-double-runnable.c, + gcc.target/powerpc/vec-splati-runnable.c, + gcc.target/powerpc/vec-stril-1.c, + gcc.target/powerpc/vec-stril-16.c, + gcc.target/powerpc/vec-stril-17.c, + gcc.target/powerpc/vec-stril-18.c, + gcc.target/powerpc/vec-stril-19.c, + gcc.target/powerpc/vec-stril-20.c, + gcc.target/powerpc/vec-stril-21.c, + gcc.target/powerpc/vec-stril-22.c, + gcc.target/powerpc/vec-stril-23.c, + gcc.target/powerpc/vec-stril-3.c, + gcc.target/powerpc/vec-stril-5.c, + gcc.target/powerpc/vec-stril-7.c, + gcc.target/powerpc/vec-stril_p-1.c, + gcc.target/powerpc/vec-stril_p-3.c, + gcc.target/powerpc/vec-stril_p-5.c, + gcc.target/powerpc/vec-stril_p-7.c, + gcc.target/powerpc/vec-strir-1.c, + gcc.target/powerpc/vec-strir-16.c, + gcc.target/powerpc/vec-strir-17.c, + gcc.target/powerpc/vec-strir-18.c, + gcc.target/powerpc/vec-strir-19.c, + gcc.target/powerpc/vec-strir-20.c, + gcc.target/powerpc/vec-strir-21.c, + gcc.target/powerpc/vec-strir-22.c, + gcc.target/powerpc/vec-strir-23.c, + gcc.target/powerpc/vec-strir-3.c, + gcc.target/powerpc/vec-strir-5.c, + gcc.target/powerpc/vec-strir-7.c, + gcc.target/powerpc/vec-strir_p-1.c, + gcc.target/powerpc/vec-strir_p-3.c, + gcc.target/powerpc/vec-strir_p-5.c, + gcc.target/powerpc/vec-strir_p-7.c, + gcc.target/powerpc/vec-ternarylogic-1.c, + gcc.target/powerpc/vec-ternarylogic-3.c, + gcc.target/powerpc/vec-ternarylogic-5.c, + gcc.target/powerpc/vec-ternarylogic-7.c, + gcc.target/powerpc/vec-ternarylogic-9.c, + gcc.target/powerpc/vsx_mask-count-runnable.c, + gcc.target/powerpc/vsx_mask-expand-runnable.c, + gcc.target/powerpc/vsx_mask-extract-runnable.c, + gcc.target/powerpc/vsx_mask-move-runnable.c, + gcc.target/powerpc/xxgenpc-runnable.c: Link testcase when it + can't be run. + +2020-10-26 Alan Modra <amodra@gmail.com> + + * gcc.target/powerpc/dimode_off.c: Add -mno-prefixed to options. + +2020-10-26 Alan Modra <amodra@gmail.com> + + * gcc.target/powerpc/cprophard.c: Add -mno-pcrel to options. + * gcc.target/powerpc/float128-hw3.c: Likewise. + * gcc.target/powerpc/pr79439-1.c: Likewise. + * gcc.target/powerpc/pr79439-2.c: Likewise. + * gcc.target/powerpc/r2_shrink-wrap.c: Likewise. + +2020-10-26 Andrew MacLeod <amacleod@redhat.com> + + * gcc.dg/pr97567.c: New. + +2020-10-26 Aldy Hernandez <aldyh@redhat.com> + + * gcc.dg/pr97555.c: New test. + +2020-10-26 Ville Voutilainen <ville.voutilainen@gmail.com> + + * g++.dg/ext/is_nothrow_constructible1.C: New file. + * g++.dg/ext/is_nothrow_constructible2.C: New file. + * g++.dg/ext/is_nothrow_constructible3.C: New file. + * g++.dg/ext/is_nothrow_constructible4.C: New file. + * g++.dg/ext/is_nothrow_constructible5.C: New file. + * g++.dg/ext/is_nothrow_constructible6.C: New file. + +2020-10-26 Jan Hubicka <jh@suse.cz> + + PR ipa/97576 + * gcc.c-torture/compile/pr97576.c: New test. + +2020-10-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + PR tree-optimization/97546 + * gcc.target/aarch64/sve/acle/general/pr97546.c: New test. + +2020-10-26 Richard Biener <rguenther@suse.de> + + PR middle-end/97521 + * gcc.target/i386/pr97521.c: New testcase. + +2020-10-26 H.J. Lu <hjl.tools@gmail.com> + + PR target/95458 + * gcc.target/i386/pr95458-1.c: New test. + * gcc.target/i386/pr95458-2.c: Likewise. + +2020-10-26 H.J. Lu <hjl.tools@gmail.com> + + PR target/95151 + * gcc.target/i386/pr95151-1.c: New test. + * gcc.target/i386/pr95151-2.c: Likewise. + * gcc.target/i386/pr95151-3.c: Likewise. + * gcc.target/i386/pr95151-4.c: Likewise. + +2020-10-26 Richard Biener <rguenther@suse.de> + + PR tree-optimization/97539 + * gcc.dg/pr97539.c: New testcase. + +2020-10-26 Arnaud Charlet <charlet@adacore.com> + + * gnat.dg/warn14.adb: Update expectations. + +2020-10-24 Marek Polacek <polacek@redhat.com> + + PR c++/96241 + * g++.dg/cpp0x/constexpr-96241.C: New test. + * g++.dg/cpp1y/constexpr-96241.C: New test. + +2020-10-24 Aldy Hernandez <aldyh@redhat.com> + + * g++.dg/pr97538.C: New test. + +2020-10-23 Marek Polacek <polacek@redhat.com> + + * c-c++-common/Wsizeof-array-div1.c: Expect certain warnings on + lp64 targets only. + * g++.dg/warn/Wsizeof-array-div2.C: Only run on lp64 targets. + +2020-10-23 Marek Polacek <polacek@redhat.com> + + PR c++/91741 + * c-c++-common/Wsizeof-pointer-div.c: Add dg-warning. + * c-c++-common/Wsizeof-array-div1.c: New test. + * g++.dg/warn/Wsizeof-array-div1.C: New test. + * g++.dg/warn/Wsizeof-array-div2.C: New test. + +2020-10-23 Martin Sebor <msebor@redhat.com> + + PR middle-end/97552 + * gcc.dg/Wvla-parameter-2.c: Adjust text of expected warning. + * gcc.dg/Wnonnull-5.c: New test. + +2020-10-23 Martin Sebor <msebor@redhat.com> + + PR c/97463 + * gcc.dg/pr97463.c: New test. + +2020-10-23 David Edelsohn <dje.gcc@gmail.com> + + * gcc.target/powerpc/vec-rlmi-rlnm.c: Update xxlor expect. + +2020-10-23 Jonathan Wakely <jwakely@redhat.com> + + * g++.dg/compat/eh/filter2_y.C: Add noexcept(false) to + destructor. + +2020-10-23 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/97164 + * c-c++-common/pr97164.c: New test. + * gcc.c-torture/execute/pr36093.c: Move ... + * gcc.dg/pr36093.c: ... here. Add dg-do compile and dg-error + directives. + * gcc.c-torture/execute/pr43783.c: Move ... + * gcc.dg/pr43783.c: ... here. Add dg-do compile, dg-options and + dg-error directives. + +2020-10-23 Dennis Zhang <dennis.zhang@arm.com> + + * gcc.target/arm/simd/mve-vsub_1.c: New test. + +2020-10-23 Richard Biener <rguenther@suse.de> + + Revert: + 2020-10-23 Richard Biener <rguenther@suse.de> + + PR middle-end/97521 + * gcc.target/i386/pr97521.c: New testcase. + +2020-10-22 Alan Modra <amodra@gmail.com> + + * gcc.target/powerpc/vec-splati-runnable.c: Don't abort on + undefined output. + +2020-10-22 David Edelsohn <dje.gcc@gmail.com> + + * gcc.target/powerpc/rlwimi-2.c: Adjust expected results for lp64. + * gcc.target/powerpc/vec-rlmi-rlnm.c: Remove target and LP64. + Adjust xxlor expected results. + +2020-10-22 Tobias Burnus <tobias@codesourcery.com> + + * gfortran.dg/gomp/flush-1.f90: New test. + * gfortran.dg/gomp/flush-2.f90: New test. + +2020-10-22 Will Schmidt <will_schmidt@vnet.ibm.com> + + * gcc.target/powerpc/vsx-load-element-extend-char.c: New test. + * gcc.target/powerpc/vsx-load-element-extend-int.c: New test. + * gcc.target/powerpc/vsx-load-element-extend-longlong.c: New test. + * gcc.target/powerpc/vsx-load-element-extend-short.c: New test. + * gcc.target/powerpc/vsx-store-element-truncate-char.c: New test. + * gcc.target/powerpc/vsx-store-element-truncate-int.c: New test. + * gcc.target/powerpc/vsx-store-element-truncate-longlong.c: New test. + * gcc.target/powerpc/vsx-store-element-truncate-short.c: New test. + +2020-10-22 Eric Botcazou <ebotcazou@adacore.com> + + * ada/acats/run_all.sh: Define and substitute target_{max,min}_int. + * ada/acats/support/macro.dfs: Parameterize {MAX,MIN}_INT. + * gnat.dg/assert1.adb: Adjust conditionally to 128-bit integer types. + * gnat.dg/size_clause1.adb: Do not expect a warning for LP64 targets. + * gnat.dg/warn11.adb: Likewise. + * gnat.dg/specs/rep_clause5.ads (Array_2_Type): Add alignment clause. + +2020-10-22 Patrick Palka <ppalka@redhat.com> + + PR c++/97328 + * g++.dg/cpp2a/constexpr-init19.C: New test. + * g++.dg/cpp2a/constexpr-init20.C: New test. + +2020-10-22 Patrick Palka <ppalka@redhat.com> + + PR c++/96575 + * g++.dg/cpp1z/constexpr-96575.C: New test. + +2020-10-22 Patrick Palka <ppalka@redhat.com> + + PR c++/97511 + * g++.dg/template/shadow3.C: New test. + +2020-10-22 Richard Biener <rguenther@suse.de> + + PR middle-end/97521 + * gcc.target/i386/pr97521.c: New testcase. + +2020-10-22 Andreas Krebbel <krebbel@linux.ibm.com> + + * gcc.dg/pr97502.c: New test. + +2020-10-22 Andreas Krebbel <krebbel@linux.ibm.com> + + * gcc.dg/dfp/pr97439.c: New test. + +2020-10-22 David Malcolm <dmalcolm@redhat.com> + + PR analyzer/97514 + * gcc.dg/analyzer/pr97514.c: New test. + +2020-10-22 David Malcolm <dmalcolm@redhat.com> + + * g++.dg/analyzer/ctor-dtor-1.C: New test. + * g++.dg/analyzer/dyncast-1.C: New test. + * g++.dg/analyzer/vfunc-1.C: New test. + +2020-10-22 David Malcolm <dmalcolm@redhat.com> + + PR analyzer/97489 + * g++.dg/analyzer/pr97489.C: New test. + +2020-10-22 Martin Liska <mliska@suse.cz> + + PR c/94722 + * g++.dg/no-stack-protector-attr-2.C: New test. + * g++.dg/no-stack-protector-attr-3.C: New test. + * g++.dg/no-stack-protector-attr.C: New test. + +2020-10-22 liuhongt <hongtao.liu@intel.com> + + * gcc.target/i386/pr97249-1.c: New test. + +2020-10-22 Andrew MacLeod <amacleod@redhat.com> + + * gcc.dg/pr97520.c: New. + +2020-10-22 Dennis Zhang <dennis.zhang@arm.com> + + * gcc.target/arm/simd/mve-vmul_1.c: New test. + +2020-10-22 Andrew MacLeod <amacleod@redhat.com> + + PR tree-optimization/97515 + * gcc.dg/pr97515.c: New file. + +2020-10-21 David Edelsohn <dje.gcc@gmail.com> + + * gcc.target/powerpc/fold-vec-extract-float.p9.c: rldicl and + subfic only for target LE. + * gcc.target/powerpc/fold-vec-extract-longlong.p9.c: xori only + for target LE. Adjust mfvsrd and add mfvsrld for BE. + * gcc.target/powerpc/fold-vec-extract-short.p9.c: vextuhrx for LE. + vextuhlx for BE. + * gcc.target/powerpc/p9-lxvx-stxvx-1.c: Remove target. + * gcc.target/powerpc/p9-lxvx-stxvx-2.c: Remove target. + * gcc.target/powerpc/p9-lxvx-stxvx-3.c: Remove target. Require + float128 + +2020-10-21 Martin Liska <mliska@suse.cz> + Andrew MacLeod <amacleod@redhat.com> + + PR target/97360 + * gcc.target/powerpc/pr97360.c: New test. + +2020-10-21 Jan Hubicka <jh@suse.cz> + + PR ipa/97445 + * gcc.dg/ipa/inlinehint-5.c: New test. + +2020-10-21 David Edelsohn <dje.gcc@gmail.com> + + * gcc.target/powerpc/p9-extract-1.c: Require lp64. + * gcc.target/powerpc/p9-extract-2.c: Require lp64. + * gcc.target/powerpc/p9-extract-3.c: Require lp64. + * gcc.target/powerpc/p9-permute.c: Remove target. + * gcc.target/powerpc/pr63335.c: Remove target. + * gcc.target/powerpc/pr87507.c: Remove target. + * gcc.target/powerpc/swaps-p8-1.c: Require LE and P8. + * gcc.target/powerpc/swaps-p8-10.c: Remove target. Require P8. + * gcc.target/powerpc/swaps-p8-11.c: Remove target. Require P8. + * gcc.target/powerpc/swaps-p8-12.c: Require LE and P8. + * gcc.target/powerpc/swaps-p8-13.c: Remove target. Require P8. + * gcc.target/powerpc/swaps-p8-14.c: Remove target. Require P8. + * gcc.target/powerpc/swaps-p8-15.c: Remove target. Require P8. + * gcc.target/powerpc/swaps-p8-16.c: Remove target. Require P8. + * gcc.target/powerpc/swaps-p8-17.c: Require P8. + * gcc.target/powerpc/swaps-p8-18.c: Remove target. Require P8. + * gcc.target/powerpc/swaps-p8-19.c: Remove target. Require P8. + * gcc.target/powerpc/swaps-p8-2.c: Require LE and P8. + * gcc.target/powerpc/swaps-p8-20.c: Remove target. + * gcc.target/powerpc/swaps-p8-21.c: Remove target. Require Altivec. + * gcc.target/powerpc/swaps-p8-22.c: Remove target. Require P8. + * gcc.target/powerpc/swaps-p8-23.c: Require LE and P8. + * gcc.target/powerpc/swaps-p8-24.c: Remove target. Require P8. + * gcc.target/powerpc/swaps-p8-25.c: Require LE and P8. + * gcc.target/powerpc/swaps-p8-26.c: Remove target. Require P8. + * gcc.target/powerpc/swaps-p8-27.c: Remove target. Require P8. + * gcc.target/powerpc/swaps-p8-28.c: Remove target. + * gcc.target/powerpc/swaps-p8-29.c: Remove target. + * gcc.target/powerpc/swaps-p8-3.c: Require LE and P8. + * gcc.target/powerpc/swaps-p8-30.c: Remove target. + * gcc.target/powerpc/swaps-p8-31.c: Remove target. + * gcc.target/powerpc/swaps-p8-32.c: Remove target. + * gcc.target/powerpc/swaps-p8-33.c: Remove target. + * gcc.target/powerpc/swaps-p8-34.c: Remove target. + * gcc.target/powerpc/swaps-p8-35.c: Remove target. + * gcc.target/powerpc/swaps-p8-36.c: Remove target. + * gcc.target/powerpc/swaps-p8-37.c: Remove target. + * gcc.target/powerpc/swaps-p8-38.c: Remove target. + * gcc.target/powerpc/swaps-p8-39.c: Remove target. + * gcc.target/powerpc/swaps-p8-4.c: Require LE and P8. + * gcc.target/powerpc/swaps-p8-40.c: Remove target. + * gcc.target/powerpc/swaps-p8-41.c: Remove target. + * gcc.target/powerpc/swaps-p8-42.c: Remove target. + * gcc.target/powerpc/swaps-p8-43.c: Remove target. + * gcc.target/powerpc/swaps-p8-44.c: Remove target. + * gcc.target/powerpc/swaps-p8-45.c: Remove target. + * gcc.target/powerpc/swaps-p8-46.c: Require LE. + * gcc.target/powerpc/swaps-p8-5.c: Require LE and P8. + * gcc.target/powerpc/swaps-p8-6.c: Remove target. Require P8. + * gcc.target/powerpc/swaps-p8-7.c: Remove target. Require P8. + * gcc.target/powerpc/swaps-p8-8.c: Remove target. Require P8. + * gcc.target/powerpc/swaps-p8-9.c: Remove target. Require P8. + * gcc.target/powerpc/vec-cmp.c: Require LP64. + * gcc.target/powerpc/vec-cmpne.c: Remove target. + * gcc.target/powerpc/vec-mul.c: Remove target. + * gcc.target/powerpc/vec-set-char.c: Require LP64. + * gcc.target/powerpc/vec-set-int.c: Require LP64. + * gcc.target/powerpc/vec-set-short.c: Require LP64. + * gcc.target/powerpc/vec-xxpermdi.c: Remove target. Require VSX. + * gcc.target/powerpc/vsxcopy.c: Remove target. Require VSX. + +2020-10-21 Richard Biener <rguenther@suse.de> + + PR tree-optimization/97500 + * gfortran.dg/pr97500.f90: New testcase. + +2020-10-21 liuhongt <hongtao.liu@intel.com> + + PR target/97506 + * gcc.target/i386/pr97506.c: New test. + +2020-10-21 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/97503 + * gcc.dg/tree-ssa/pr97503.c: New test. + +2020-10-21 Martin Liska <mliska@suse.cz> + + PR sanitizer/97414 + * g++.dg/asan/pr97414.C: New test. + +2020-10-21 Eric Botcazou <ebotcazou@adacore.com> + + * gnat.dg/multfixed.adb: Update expected exception message. + +2020-10-21 Andrea Corallo <andrea.corallo@arm.com> + + * gcc.target/aarch64/advsimd-intrinsics/vstX_lane.c (CMT): + Adopt the same style used in the rest of the file. + +2020-10-21 Aldy Hernandez <aldyh@redhat.com> + + * gcc.dg/Walloca-1.c: Adjust for 32-bits. + +2020-10-22 Dennis Zhang <dennis.zhang@arm.com> + + * gcc.target/arm/simd/mve-vminmax_1.c: New test. + +2020-10-20 Jeff Law <law@redhat.com> + + * gcc.dg/Wbuiltin-declaration-mismatch-9.c: Improve pruning of + invalid scanf call messages. + +2020-10-20 Andrew MacLeod <amacleod@redhat.com> + + PR tree-optimization/97505 + * gfortran.dg/pr97505.f90: New file. + +2020-10-20 Nathan Sidwell <nathan@acm.org> + + * g++.dg/lookup/local-extern.C: New. + +2020-10-20 Aldy Hernandez <aldyh@redhat.com> + + * gcc.dg/Wrestrict-22.c: New test. + * g++.dg/torture/pr92421.C: Adjust for ranger. + +2020-10-20 Aldy Hernandez <aldyh@redhat.com> + + * gcc.dg/Walloca-1.c: Adjust for ranger. + * gcc.dg/Walloca-12.c: Same. + * gcc.dg/Walloca-13.c: Same. + * gcc.dg/Walloca-2.c: Same. + * gcc.dg/Walloca-3.c: Same. + * gcc.dg/Walloca-6.c: Same. + * gcc.dg/Wvla-larger-than-2.c: Same. + +2020-10-20 Tobias Burnus <tobias@codesourcery.com> + + * gcc.misc-tests/outputs.exp: Add ltrans_args dump files + for 'lto save-temps'. + +2020-10-20 Aldy Hernandez <aldyh@redhat.com> + + * gcc.dg/pr97501.c: New test. + +2020-10-20 Nathan Sidwell <nathan@acm.org> + + * gcc.dg/cpp/endif.c: Move to ... + * c-c++-common/cpp/endif.c: ... here. + * gcc.dg/cpp/endif.h: Move to ... + * c-c++-common/cpp/endif.h: ... here. + * c-c++-common/cpp/eof-2.c: Adjust diagnostic. + * c-c++-common/cpp/eof-3.c: Adjust diagnostic. + +2020-10-20 Marek Polacek <polacek@redhat.com> + + PR c++/82239 + * g++.dg/cpp0x/static_assert16.C: New test. + +2020-10-20 Arnaud Charlet <charlet@adacore.com> + + * gnat.dg/opt11.adb: Add new expected warning. + +2020-10-20 Richard Biener <rguenther@suse.de> + + PR tree-optimization/97496 + * gcc.dg/vect/bb-slp-pr97496.c: New testcase. + +2020-10-20 Aldy Hernandez <aldyh@redhat.com> + + * gcc.dg/pr97488.c: Add target int128 predicate. + +2020-10-19 Andrew MacLeod <amacleod@redhat.com> + + * gcc.dg/pr97360-2.c: New test. + +2020-10-19 David Edelsohn <dje.gcc@gmail.com> + + * gcc.target/powerpc/sad-vectorize-1.c: Remove target. + * gcc.target/powerpc/sad-vectorize-2.c: Remove target. + * gcc.target/powerpc/vec-extract-v16qi-df.c: Remove target. + * gcc.target/powerpc/vec-extract-v16qi.c: Remove target. + * gcc.target/powerpc/vec-extract-v16qiu-df.c: Remove target. + * gcc.target/powerpc/vec-extract-v16qiu.c: Remove target. + * gcc.target/powerpc/vec-extract-v2df.c: Remove target. + * gcc.target/powerpc/vec-extract-v2di.c: Require lp64. + * gcc.target/powerpc/vec-extract-v4sf.c: Remove target. + * gcc.target/powerpc/vec-extract-v4si-df.c: Remove target. + * gcc.target/powerpc/vec-extract-v4si.c: Remove target. + * gcc.target/powerpc/vec-extract-v4siu-df.c: Remove target. + * gcc.target/powerpc/vec-extract-v4siu.c: Remove target. + * gcc.target/powerpc/vec-extract-v8hi-df.c: Remove target. + * gcc.target/powerpc/vec-extract-v8hi.c: Remove target. + * gcc.target/powerpc/vec-extract-v8hiu-df.c: Remove target. + * gcc.target/powerpc/vec-extract-v8hiu.c: Remove target. + * gcc.target/powerpc/vec-init-1.c: Remove target. + * gcc.target/powerpc/vec-init-2.c: Require lp64. + * gcc.target/powerpc/vec-init-3.c: Require lp64. + * gcc.target/powerpc/vec-init-4.c: Remove target. + * gcc.target/powerpc/vec-init-5.c: Remove target. + * gcc.target/powerpc/vec-init-6.c: Require lp64. + * gcc.target/powerpc/vec-init-7.c: Require lp64. + * gcc.target/powerpc/vec-init-8.c: Remove target. + * gcc.target/powerpc/vec-init-9.c: Require lp64. + * gcc.target/powerpc/vec-setup-double.c: Remove target. + * gcc.target/powerpc/vec-setup-long.c: Remove target. + * gcc.target/powerpc/vsu/vec-xl-len-13.c: Correct expected warnings. + * gcc.target/powerpc/vsu/vsu.exp: Enable on AIX. + +2020-10-19 David Edelsohn <dje.gcc@gmail.com> + + * gcc.target/powerpc/fold-vec-extract-char.p7.c: Remove target. + * gcc.target/powerpc/fold-vec-extract-char.p8.c: Remove target. + * gcc.target/powerpc/fold-vec-extract-char.p9.c: Remove target. + Expect 3 addi for ilp32. + * gcc.target/powerpc/fold-vec-extract-double.p7.c: Remove target. + Add -mbig-endian for Linux. + * gcc.target/powerpc/fold-vec-extract-double.p8.c: Remove target. + * gcc.target/powerpc/fold-vec-extract-float.p7.c: Remove target. + * gcc.target/powerpc/fold-vec-extract-float.p8.c: Remove target. + * gcc.target/powerpc/fold-vec-extract-float.p9.c: Require lp64. + * gcc.target/powerpc/fold-vec-extract-int.p7.c: Remove target. + * gcc.target/powerpc/fold-vec-extract-int.p8.c: Remove target. + * gcc.target/powerpc/fold-vec-extract-int.p9.c: Remove target. + Expect 3 addi for ilp32. + * gcc.target/powerpc/fold-vec-extract-longlong.p7.c: Remove target. + Expect 4 addi for ilp32. + * gcc.target/powerpc/fold-vec-extract-longlong.p8.c: Remove target. + Expect 4 addi for ilp32. + * gcc.target/powerpc/fold-vec-extract-longlong.p9.c: Require lp64. + * gcc.target/powerpc/fold-vec-extract-short.p7.c: Remove target. + * gcc.target/powerpc/fold-vec-extract-short.p8.c: Remove target. + * gcc.target/powerpc/fold-vec-extract-short.p9.c: Require lp64. + * gcc.target/powerpc/fold-vec-insert-char-p8.c: Remove target. + * gcc.target/powerpc/fold-vec-insert-char-p9.c: Remove target. + * gcc.target/powerpc/fold-vec-insert-double.c: Remove target. + * gcc.target/powerpc/fold-vec-insert-float-p8.c: Remove target. + * gcc.target/powerpc/fold-vec-insert-float-p9.c: Remove target. + * gcc.target/powerpc/fold-vec-insert-int-p8.c: Remove target. + * gcc.target/powerpc/fold-vec-insert-int-p9.c: Remove target. + Require 8 addi for ilp32. + * gcc.target/powerpc/fold-vec-insert-longlong.c: Remove target. + * gcc.target/powerpc/fold-vec-insert-short-p8.c: Remove target. + * gcc.target/powerpc/fold-vec-insert-short-p9.c: Remove target. + * gcc.target/powerpc/fold-vec-select-double.c: Remove target. + * gcc.target/powerpc/fold-vec-select-float.c: Remove target. + * gcc.target/powerpc/fold-vec-splats-int.c: Require lp64. + * gcc.target/powerpc/fold-vec-splats-longlong.c: Require lp64. + +2020-10-19 Iain Sandoe <iain@sandoe.co.uk> + + PR c++/97438 + * g++.dg/coroutines/pr97438.C: New test. + +2020-10-19 Martin Jambor <mjambor@suse.cz> + + PR tree-optimization/97456 + * gcc.dg/tree-ssa/pr97456.c: New test. + +2020-10-19 Nathan Sidwell <nathan@acm.org> + + * c-c++-common/cpp/pr97471.c: New. + +2020-10-19 Aldy Hernandez <aldyh@redhat.com> + + * gcc.dg/pr97488.c: New test. + +2020-10-19 Richard Biener <rguenther@suse.de> + + PR tree-optimization/97486 + * gcc.dg/vect/bb-slp-pr97486.c: New testcase. + +2020-10-19 Aldy Hernandez <aldyh@redhat.com> + + * gcc.dg/pr97467.c: New test. + +2020-10-19 Li Jia He <helijia@gcc.gnu.org> + + PR tree-optimization/66552 + * gcc.dg/pr66552.c: New testcase. + +2020-10-18 Harald Anlauf <anlauf@gmx.de> + + * gfortran.dg/matmul_20.f90: New test. + +2020-10-17 David Edelsohn <dje.gcc@gmail.com> + + * gcc.target/powerpc/p9-dimode1.c: Remove target. + * gcc.target/powerpc/p9-dimode2.c: Remove target. + * gcc.target/powerpc/p9-fpcvt-1.c: Remove target. + * gcc.target/powerpc/p9-fpcvt-2.c: Require lp64. + * gcc.target/powerpc/p9-minmax-1.c: Remove target. + * gcc.target/powerpc/p9-minmax-2.c: Remove target. + * gcc.target/powerpc/p9-minmax-3.c: Remove target. + * gcc.target/powerpc/p9-splat-1.c: Require lp64. + * gcc.target/powerpc/p9-splat-2.c: Remove target. + * gcc.target/powerpc/p9-splat-3.c: Remove target. + * gcc.target/powerpc/p9-splat-4.c: Require lp64. + * gcc.target/powerpc/p9-vbpermd.c: Require lp64. + * gcc.target/powerpc/p9-vneg.c: Require lp64. + * gcc.target/powerpc/p9-vparity.c: Require lp64. + * gcc.target/powerpc/p9-vpermr.c: Require LE. + * gcc.target/powerpc/p9-xxbr-1.c: Remove target. + * gcc.target/powerpc/p9-xxbr-2.c: Require lp64. + * gcc.target/powerpc/p9-xxbr-3.c: Require lp64. + +2020-10-17 David Edelsohn <dje.gcc@gmail.com> + + * gcc.target/powerpc/builtins-3-p9.c: Remove le. + +2020-10-17 David Edelsohn <dje.gcc@gmail.com> + + * gcc.target/powerpc/pr96139-a.c: Remove -m32. + * gcc.target/powerpc/pr96139-b.c: Remove -m64. + +2020-10-16 Harald Anlauf <anlauf@gmx.de> + + PR fortran/95979 + * gfortran.dg/index_4.f90: New test. + +2020-10-16 Andrew MacLeod <amacleod@redhat.com> + + PR tree-optimization/97462 + * gcc.dg/pr97462.c: New file. + +2020-10-16 Nathan Sidwell <nathan@acm.org> + + PR c++/97460 + * g++.dg/template/pr97460.C: New. + +2020-10-16 Nathan Sidwell <nathan@acm.org> + + PR c++/96258 + * g++.dg/parse/pr96258.C: New. + +2020-10-16 Srinath Parvathaneni <srinath.parvathaneni@arm.com> + + PR target/97327 + * gcc.target/arm/mve/intrinsics/pr97327.c: New test. + +2020-10-16 Richard Biener <rguenther@suse.de> + + * gcc.dg/vect/bb-slp-53.c: New testcase. + +2020-10-16 Srinath Parvathaneni <srinath.parvathaneni@arm.com> + + PR target/97291 + * gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_s64.c: Modify. + * gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_u64.c: + Likewise. + * gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_s64.c: Likewise. + * gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_u64.c: Likewise. + * gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_f32.c: Likewise. + * gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_f32.c: + Likewise. + * gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_s32.c: + Likewise. + * gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_u32.c: + Likewise. + * gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_s32.c: Likewise. + * gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_u32.c: Likewise. + +2020-10-16 Jan Hubicka <jh@suse.cz> + + PR testsuite/97426 + * gcc.dg/tree-ssa/modref-4.c: Fix return test. + +2020-10-16 Martin Liska <mliska@suse.cz> + + PR ipa/97404 + * gcc.c-torture/execute/pr97404.c: New test. + +2020-10-16 Richard Biener <rguenther@suse.de> + + PR tree-optimization/97428 + * gcc.dg/vect/vect-complex-5.c: Expect to SLP. + * gcc.dg/vect/pr97428.c: Likewise. + +2020-10-15 David Edelsohn <dje.gcc@gmail.com> + + * gcc.target/powerpc/builtins-1-p9-runnable.c: Adjust for big endian. + * gcc.target/powerpc/builtins-7-p9-runnable.c: Same. + +2020-10-15 Jason Merrill <jason@redhat.com> + + PR c++/95844 + * g++.dg/cpp2a/spaceship-eq10.C: New test. + +2020-10-15 David Edelsohn <dje.gcc@gmail.com> + + * gcc.target/powerpc/builtins-5-p9-runnable.c: Require lp64. + * gcc.target/powerpc/builtins-msum-runnable.c: Require int128. + * gcc.target/powerpc/float128-cmp2-runnable.c: Require float128. + * gcc.target/powerpc/fold-vec-extract-double.p9.c: Require lp64. + +2020-10-15 Marek Polacek <polacek@redhat.com> + + PR c++/97406 + PR c++/85901 + * g++.dg/diagnostic/ptrtomem1.C: New test. + * g++.dg/diagnostic/ptrtomem2.C: New test. + +2020-10-15 Tom de Vries <tdevries@suse.de> + + * gcc.dg/atomic/c11-atomic-exec-6.c: Xfail execution for nvptx. + * gcc.dg/atomic/c11-atomic-exec-7.c: Same. + * gcc.dg/atomic/stdatomic-op-5.c: Same. + +2020-10-15 Tom de Vries <tdevries@suse.de> + + PR target/97436 + * gcc.target/nvptx/atomic_fetch-3.c: Remove. + +2020-10-15 Richard Biener <rguenther@suse.de> + + * gcc.dg/vect/bb-slp-52.c: New testcase. + +2020-10-15 Richard Biener <rguenther@suse.de> + + PR tree-optimization/97482 + * gcc.dg/vect/pr97428.c: New testcase. + +2020-10-15 Tom de Vries <tdevries@suse.de> + + * gcc.dg/tree-ssa/pr84512.c: Remove xfail for nvptx. + +2020-10-15 Tom de Vries <tdevries@suse.de> + + * c-c++-common/ident-0b.c: Require effective target ident_directive. + +2020-10-15 Tom de Vries <tdevries@suse.de> + + * gcc.c-torture/compile/limits-externdecl.c: Remove dg-skip-if for + nvptx. + +2020-10-15 Tom de Vries <tdevries@suse.de> + + * gcc.dg/attr-alloc_size-11.c: Don't xfail for nvptx. + * gcc.dg/tree-ssa/20040204-1.c: Same. + +2020-10-15 Tom de Vries <tdevries@suse.de> + + * gcc.c-torture/execute/pr68185.c: Remove dg-skip-if for nvptx. + +2020-10-15 Tom de Vries <tdevries@suse.de> + + * gcc.c-torture/execute/981019-1.c: Remove dg-skip-if for nvptx. + +2020-10-15 Tom de Vries <tdevries@suse.de> + + * gcc.c-torture/compile/pr42717.c: Remove nvptx xfail. + * gcc.c-torture/compile/pr61684.c: Same. + * gcc.c-torture/execute/pr20601-1.c: Same. + * gcc.c-torture/execute/pr52129.c: Same. + * gcc.c-torture/execute/pr59221.c: Same. + * gcc.dg/pr68671.c: Same. + +2020-10-15 Jakub Jelinek <jakub@redhat.com> + + * gcc.dg/ipa/modref-1.c: Remove space between param offset: and number + in scan-ipa-dump. + (b): Declare return type to void. + (main): Declare return type to int. Change c to array of 3 chars. + * gcc.dg/tree-ssa/modref-4.c: Remove space between param offset: and + number in scan-ipa-dump. Use modref1 instead of modref2. + (b): Declare return type to void. + (main): Declare return type to int. Change c to array of 3 chars. + +2020-10-15 Kito Cheng <kito.cheng@sifive.com> + + * gcc.target/riscv/mcpu-1.c: New. + * gcc.target/riscv/mcpu-2.c: Ditto. + * gcc.target/riscv/mcpu-3.c: Ditto. + * gcc.target/riscv/mcpu-4.c: Ditto. + * gcc.target/riscv/mcpu-5.c: Ditto. + * gcc.target/riscv/mcpu-6.c: Ditto. + * gcc.target/riscv/mcpu-7.c: Ditto. + +2020-10-15 Hongyu Wang <hongyu.wang@intel.com> + + * gcc.target/i386/hreset-1.c: New test. + * gcc.target/i386/funcspec-56.inc: Add new target attribute. + * gcc.target/i386/x86gprintrin-1.c: Add -mhreset. + * gcc.target/i386/x86gprintrin-2.c: Ditto. + * gcc.target/i386/x86gprintrin-3.c: Ditto. + * gcc.target/i386/x86gprintrin-4.c: Add mhreset. + * gcc.target/i386/x86gprintrin-5.c: Ditto. + +2020-10-15 Hongtao Liu <hongtao.liu@intel.com> + + * gcc.target/i386/funcspec-56.inc: Add new target attribute. + * gcc.target/i386/uintr-1.c: New test. + * gcc.target/i386/uintr-2.c: Ditto. + * gcc.target/i386/uintr-3.c: Ditto. + * gcc.target/i386/uintr-4.c: Ditto. + * gcc.target/i386/uintr-5.c: Ditto. + * gcc.target/i386/x86gprintrin-1.c: Add -muintr for 64bit target. + * gcc.target/i386/x86gprintrin-2.c: Ditto. + * gcc.target/i386/x86gprintrin-3.c: Ditto. + * gcc.target/i386/x86gprintrin-4.c: Add muintr for 64bit target. + * gcc.target/i386/x86gprintrin-5.c: Ditto. + +2020-10-14 Martin Sebor <msebor@redhat.com> + + PR middle-end/97391 + * gcc.dg/Warray-bounds-68.c: New test. + +2020-10-14 Martin Sebor <msebor@redhat.com> + + PR c/97413 + * gcc.dg/Wvla-parameter-8.c: New test. + +2020-10-14 Tom de Vries <tdevries@suse.de> + + * lib/target-supports.exp (check_compile): Save and restore + $compiler_flags when calling ${tool}_target_compile. + +2020-10-14 David Malcolm <dmalcolm@redhat.com> + + PR analyzer/93388 + * gcc.dg/analyzer/data-model-21.c: New test. + +2020-10-14 David Malcolm <dmalcolm@redhat.com> + + PR analyzer/97394 + * gcc.dg/analyzer/setjmp-pr93378.c: Use test-setjmp.h rather than + <setjmp.h>. + * gcc.dg/analyzer/sigsetjmp-5.c: Likewise. + * gcc.dg/analyzer/sigsetjmp-6.c: Likewise. + * gcc.dg/analyzer/test-setjmp.h: Don't include <setjmp.h>. + Provide decls of jmp_buf, sigjmp_buf, setjmp, sigsetjmp, + longjmp, and siglongjmp. + +2020-10-14 Jason Merrill <jason@redhat.com> + + PR c++/97358 + * g++.dg/cpp0x/lambda/lambda-variadic11.C: New test. + +2020-10-14 Sunil K Pandey <skpgkp2@gmail.com> + + PR target/95483 + * gcc.target/i386/avx-1.c: Add test. + * gcc.target/i386/avx2-vbroadcastsi128-1.c: Ditto. + * gcc.target/i386/avx2-vbroadcastsi128-2.c: Ditto. + * gcc.target/i386/avx512bw-vmovdqu16-1.c: Ditto. + * gcc.target/i386/avx512bw-vmovdqu8-1.c: Ditto. + * gcc.target/i386/avx512dq-vreducesd-1.c: Ditto. + * gcc.target/i386/avx512dq-vreducesd-2.c: Ditto. + * gcc.target/i386/avx512dq-vreducess-1.c: Ditto. + * gcc.target/i386/avx512dq-vreducess-2.c: Ditto. + * gcc.target/i386/avx512er-vrcp28sd-1.c: Ditto. + * gcc.target/i386/avx512er-vrcp28sd-2.c: Ditto. + * gcc.target/i386/avx512er-vrcp28ss-1.c: Ditto. + * gcc.target/i386/avx512er-vrcp28ss-2.c: Ditto. + * gcc.target/i386/avx512er-vrsqrt28sd-1.c: Ditto. + * gcc.target/i386/avx512er-vrsqrt28sd-2.c: Ditto. + * gcc.target/i386/avx512er-vrsqrt28ss-1.c: Ditto. + * gcc.target/i386/avx512er-vrsqrt28ss-2.c: Ditto. + * gcc.target/i386/avx512f-vcvtsd2si-1.c: Ditto. + * gcc.target/i386/avx512f-vcvtsd2si64-1.c: Ditto. + * gcc.target/i386/avx512f-vcvtsd2ss-1.c: Ditto. + * gcc.target/i386/avx512f-vcvtsi2sd64-1.c: Ditto. + * gcc.target/i386/avx512f-vcvtsi2ss-1.c: Ditto. + * gcc.target/i386/avx512f-vcvtsi2ss64-1.c: Ditto. + * gcc.target/i386/avx512f-vcvtss2sd-1.c: Ditto. + * gcc.target/i386/avx512f-vcvtss2si-1.c: Ditto. + * gcc.target/i386/avx512f-vcvtss2si64-1.c: Ditto. + * gcc.target/i386/avx512f-vscalefsd-1.c: Ditto. + * gcc.target/i386/avx512f-vscalefsd-2.c: Ditto. + * gcc.target/i386/avx512f-vscalefss-1.c: Ditto. + * gcc.target/i386/avx512f-vscalefss-2.c: Ditto. + * gcc.target/i386/avx512f-vsqrtsd-1.c: Ditto. + * gcc.target/i386/avx512f-vsqrtsd-2.c: Ditto. + * gcc.target/i386/avx512f-vsqrtss-1.c: Ditto. + * gcc.target/i386/avx512f-vsqrtss-2.c: Ditto. + * gcc.target/i386/avx512vl-vmovdqa32-1.c: Ditto. + * gcc.target/i386/avx512vl-vmovdqa64-1.c: Ditto. + * gcc.target/i386/sse-13.c: Ditto. + * gcc.target/i386/sse-23.c: Ditto. + * gcc.target/i386/avx512dq-vreducepd-3.c: New test. + * gcc.target/i386/avx512dq-vreducepd-4.c: New test. + * gcc.target/i386/avx512dq-vreduceps-3.c: New test. + * gcc.target/i386/avx512dq-vreduceps-4.c: New test. + * gcc.target/i386/avx512f-vcvtsi2sd-1.c: New test. + * gcc.target/i386/pr95483-1.c: New test. + * gcc.target/i386/pr95483-2.c: New test. + * gcc.target/i386/pr95483-3.c: New test. + * gcc.target/i386/pr95483-4.c: New test. + * gcc.target/i386/pr95483-5.c: New test. + * gcc.target/i386/pr95483-6.c: New test. + * gcc.target/i386/pr95483-7.c: New test. + +2020-10-14 Jakub Jelinek <jakub@redhat.com> + + PR target/97387 + * gcc.target/i386/pr97387-1.c: New test. + * gcc.target/i386/pr97387-2.c: New test. + +2020-10-14 Aldy Hernandez <aldyh@redhat.com> + + * gcc.dg/pr97396.c: New test. + +2020-10-14 Jan Hubicka <jh@suse.cz> + + * gcc.dg/ipa/modref-1.c: New test. + * gcc.dg/tree-ssa/modref-4.c: New test. + +2020-10-14 Tobias Burnus <tobias@codesourcery.com> + + PR fortran/97390 + * gfortran.dg/goacc/warn_truncated.f90: New test. + +2020-10-14 Nathan Sidwell <nathan@acm.org> + + * g++.dg/lookup/extern-redecl2.C: New. + +2020-10-14 Steven G. Kargl <kargl@gcc.gnu.org> + Mark Eggleston <markeggleston@gcc.gnu.org> + + PR fortran/95614 + * gfortran.dg/pr95614_1.f90: New test. + * gfortran.dg/pr95614_2.f90: New test. + * gfortran.dg/pr95614_3.f90: New test. + * gfortran.dg/pr95614_4.f90: New test. + +2020-10-14 Kito Cheng <kito.cheng@sifive.com> + + PR target/96759 + * g++.target/riscv/pr96759.C: New. + * gcc.target/riscv/pr96759.c: New. + +2020-10-13 Jakub Jelinek <jakub@redhat.com> + + PR rtl-optimization/97386 + * gcc.c-torture/execute/pr97386-1.c: New test. + * gcc.c-torture/execute/pr97386-2.c: New test. + +2020-10-13 Richard Sandiford <richard.sandiford@arm.com> + + * gcc.target/arm/stack-protector-5.c: Use -Os rather than -O2. + * gcc.target/arm/stack-protector-6.c: Likewise. + +2020-10-13 Richard Biener <rguenther@suse.de> + + PR tree-optimization/97382 + * gcc.dg/vect/no-vfa-vect-dv-2.c: Remove same align dump + scanning. + * gcc.dg/vect/vect-103.c: Likewise. + * gcc.dg/vect/vect-91.c: Likewise. + * gfortran.dg/vect/vect-4.f90: Likewise. + +2020-10-13 Martin Liska <mliska@suse.cz> + + PR middle-end/97392 + * g++.dg/asan/asan_test.C: Disable -Wstringop-overflow. + * gcc.dg/asan/pr80166.c: Likewise. + +2020-10-12 David Malcolm <dmalcolm@redhat.com> + + PR analyzer/97258 + * gcc.dg/analyzer/callbacks-1.c: New test. + * gcc.dg/analyzer/callbacks-2.c: New test. + * gcc.dg/analyzer/callbacks-3.c: New test. + +2020-10-12 Andrew MacLeod <amacleod@redhat.com> + + * gcc.dg/pr97381.c: New test. + +2020-10-12 Aldy Hernandez <aldyh@redhat.com> + + * gcc.dg/pr97378.c: New test. + +2020-10-12 David Malcolm <dmalcolm@redhat.com> + + PR c/83347 + PR middle-end/90404 + PR analyzer/95007 + * gcc.dg/analyzer/write-to-const-1.c: New test. + * gcc.dg/analyzer/write-to-string-literal-1.c: New test. + +2020-10-12 Martin Sebor <msebor@redhat.com> + + PR c++/97201 + * g++.dg/warn/Wplacement-new-size-8.C: Adjust expected message. + * g++.dg/warn/Warray-bounds-10.C: New test. + * g++.dg/warn/Warray-bounds-11.C: New test. + * g++.dg/warn/Warray-bounds-12.C: New test. + * g++.dg/warn/Warray-bounds-13.C: New test. + +2020-10-12 Martin Sebor <msebor@redhat.com> + + PR middle-end/97342 + PR middle-end/97023 + PR middle-end/96384 + * c-c++-common/Wrestrict.c: Adjust comment. + * gcc.dg/Wstringop-overflow-34.c: Remove xfail. + * gcc.dg/Wstringop-overflow-43.c: Remove xfails. Adjust regex patterns. + * gcc.dg/pr51683.c: Prune out expected warning. + * gcc.target/i386/pr60693.c: Same. + * g++.dg/warn/Wplacement-new-size-8.C: New test. + * gcc.dg/Wstringop-overflow-41.c: New test. + * gcc.dg/Wstringop-overflow-44.s: New test. + * gcc.dg/Wstringop-overflow-45.c: New test. + * gcc.dg/Wstringop-overflow-46.c: New test. + * gcc.dg/Wstringop-overflow-47.c: New test. + * gcc.dg/Wstringop-overflow-49.c: New test. + * gcc.dg/Wstringop-overflow-50.c: New test. + * gcc.dg/Wstringop-overflow-51.c: New test. + * gcc.dg/Wstringop-overflow-52.c: New test. + * gcc.dg/Wstringop-overflow-53.c: New test. + * gcc.dg/Wstringop-overflow-54.c: New test. + * gcc.dg/Wstringop-overflow-55.c: New test. + * gcc.dg/Wstringop-overread-5.c: New test. + +2020-10-12 Martin Sebor <msebor@redhat.com> + + PR c++/96511 + PR middle-end/96384 + * g++.dg/init/strlen.C: Add expected warning. + * g++.dg/warn/Wplacement-new-size-1.C: Relax warnings. + * g++.dg/warn/Wplacement-new-size-2.C: Same. + * g++.dg/warn/Wplacement-new-size-6.C: Same. + * gcc.dg/Warray-bounds-58.c: Adjust + * gcc.dg/Wstringop-overflow-37.c: Same. + * g++.dg/warn/Wplacement-new-size-7.C: New test. + +2020-10-12 Christophe Lyon <christophe.lyon@linaro.org> + + PR tree-optimization/97357 + * gcc.dg/pr97357.c: Call setjmp instead of _setjmp. + +2020-10-12 Richard Biener <rguenther@suse.de> + + * gcc.dg/vect/bb-slp-50.c: New testcase. + * gcc.dg/vect/bb-slp-51.c: Likewise. + +2020-10-12 Martin Liska <mliska@suse.cz> + + PR tree-optimization/97079 + * gcc.target/aarch64/sve/pr97079.c: New test. + +2020-10-12 Duan bo <duanbo3@huawei.com> + + PR target/96757 + * gcc.target/aarch64/pr96757.c: New test. + +2020-10-12 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + PR target/97349 + * gcc.target/aarch64/simd/pr97349.c: New test. + +2020-10-12 Aldy Hernandez <aldyh@redhat.com> + + * gcc.dg/pr97371.c: New test. + +2020-10-12 Richard Biener <rguenther@suse.de> + + PR tree-optimization/97357 + * gcc.dg/pr97357.c: New testcase. + +2020-10-12 Mark Eggleston <markeggleston@gcc.gnu.org> + + PR fortran/96099 + * gfortran.dg/pr96099_1.f90: New test. + * gfortran.dg/pr96099_2.f90: New test. + 2020-10-11 Iain Sandoe <iain@sandoe.co.uk> * obj-c++.dg/plugin/diagnostic-test-expressions-1.mm: @@ -425,20 +2884,6 @@ * gcc.target/arm/cortex-m55-nomve.fp-flag-softfp.c: New test. * gcc.target/arm/multilib.exp: Add tests for -mcpu=cortex-m55. -2020-10-05 Dennis Zhang <dennis.zhang@arm.com> - - * gcc.target/arm/mve/intrinsics/vreinterpretq_f16.c: Use additional - option -fno-ipa-icf and change the instruction count from 8 to 16. - * gcc.target/arm/mve/intrinsics/vreinterpretq_f32.c: Likewise. - * gcc.target/arm/mve/intrinsics/vreinterpretq_s16.c: Likewise. - * gcc.target/arm/mve/intrinsics/vreinterpretq_s32.c: Likewise. - * gcc.target/arm/mve/intrinsics/vreinterpretq_s64.c: Likewise. - * gcc.target/arm/mve/intrinsics/vreinterpretq_s8.c: Likewise. - * gcc.target/arm/mve/intrinsics/vreinterpretq_u16.c: Likewise. - * gcc.target/arm/mve/intrinsics/vreinterpretq_u32.c: Likewise. - * gcc.target/arm/mve/intrinsics/vreinterpretq_u64.c: Likewise. - * gcc.target/arm/mve/intrinsics/vreinterpretq_u8.c: Likewise. - 2020-10-05 Nathan Sidwell <nathan@acm.org> * c-c++-common/spellcheck-reserved.c: Restore diagnostic. diff --git a/gcc/testsuite/ada/acats/run_all.sh b/gcc/testsuite/ada/acats/run_all.sh index 7645983..ac2a86b 100755 --- a/gcc/testsuite/ada/acats/run_all.sh +++ b/gcc/testsuite/ada/acats/run_all.sh @@ -133,6 +133,23 @@ target_run $dir/support/impbit > $dir/support/impbit.out 2>&1 target_bit=`cat $dir/support/impbit.out` echo target_bit="$target_bit" >> $dir/acats.log +case "$target_bit" in + *32*) + target_max_int="9223372036854775807" + target_min_int="-9223372036854775808" + ;; + *64*) + target_max_int="170141183460469231731687303715884105727" + target_min_int="-170141183460469231731687303715884105728" + ;; + *) + display "**** Unsupported bits per word" + exit 1 +esac + +echo target_max_insn="$target_max_int" >> $dir/acats.log +echo target_min_insn="$target_min_int" >> $dir/acats.log + # Find out a suitable asm statement # Adapted from configure.ac gcc_cv_as_dwarf2_debug_line case "$target" in @@ -153,6 +170,8 @@ sed -e "s,ACATS4GNATDIR,$dir,g" \ sed -e "s,ACATS4GNATDIR,$dir,g" \ -e "s,ACATS4GNATBIT,$target_bit,g" \ -e "s,ACATS4GNATINSN,$target_insn,g" \ + -e "s,ACATS4GNATMAXINT,$target_max_int,g" \ + -e "s,ACATS4GNATMININT,$target_min_int,g" \ < $testdir/support/macro.dfs > $dir/support/MACRO.DFS sed -e "s,ACATS4GNATDIR,$dir,g" \ < $testdir/support/tsttests.dat > $dir/support/TSTTESTS.DAT diff --git a/gcc/testsuite/ada/acats/support/macro.dfs b/gcc/testsuite/ada/acats/support/macro.dfs index 8c37233..e3c5559 100644 --- a/gcc/testsuite/ada/acats/support/macro.dfs +++ b/gcc/testsuite/ada/acats/support/macro.dfs @@ -227,7 +227,7 @@ MACHINE_CODE_STATEMENT Asm_Insn'(Asm ("ACATS4GNATINSN")); -- THE LITERAL MUST NOT INCLUDE UNDERSCORES OR LEADING OR TRAILING -- BLANKS. -- USED IN: C35503D C35503F C4A007A -MAX_INT 9223372036854775807 +MAX_INT ACATS4GNATMAXINT -- $MIN_INT @@ -235,7 +235,7 @@ MAX_INT 9223372036854775807 -- THE LITERAL MUST NOT CONTAIN UNDERSCORES OR LEADING OR TRAILING -- BLANKS. -- USED IN: C35503D C35503F -MIN_INT -9223372036854775808 +MIN_INT ACATS4GNATMININT -- $NAME -- THE NAME OF A PREDEFINED INTEGER TYPE OTHER THAN INTEGER, diff --git a/gcc/testsuite/c-c++-common/Wimplicit-fallthrough-20.c b/gcc/testsuite/c-c++-common/Wimplicit-fallthrough-20.c index d37a840..bc0cd0f 100644 --- a/gcc/testsuite/c-c++-common/Wimplicit-fallthrough-20.c +++ b/gcc/testsuite/c-c++-common/Wimplicit-fallthrough-20.c @@ -27,13 +27,13 @@ g (int i) switch (i) { case -1: - __attribute__((used)); /* { dg-warning "ignored|only attribute" } */ + __attribute__((used)); /* { dg-warning "empty declaration|ignored" } */ default: - __attribute__((used)); /* { dg-warning "ignored|only attribute" } */ + __attribute__((used)); /* { dg-warning "empty declaration|ignored" } */ case 1: return 6; case 2 ... 4: - __attribute__((used)); /* { dg-warning "ignored|only attribute" } */ + __attribute__((used)); /* { dg-warning "empty declaration|ignored" } */ case 5: return 7; } diff --git a/gcc/testsuite/c-c++-common/Wsizeof-array-div1.c b/gcc/testsuite/c-c++-common/Wsizeof-array-div1.c new file mode 100644 index 0000000..6e01d6c --- /dev/null +++ b/gcc/testsuite/c-c++-common/Wsizeof-array-div1.c @@ -0,0 +1,56 @@ +/* PR c++/91741 */ +/* { dg-do compile } */ +/* { dg-options "-Wall" } */ + +typedef int T; + +int +fn (int ap[]) +{ + int arr[10]; + int *arr2[10]; + int *p = &arr[0]; + int r = 0; + + r += sizeof (arr) / sizeof (*arr); + r += sizeof (arr) / sizeof (p); /* { dg-warning "expression does not compute" "" { target { lp64 } } } */ + r += sizeof (arr) / sizeof p; /* { dg-warning "expression does not compute" "" { target { lp64 } } } */ + r += sizeof (arr) / (sizeof p); + r += sizeof (arr) / (sizeof (p)); + r += sizeof (arr2) / sizeof p; + r += sizeof (arr2) / sizeof (int); /* { dg-warning "expression does not compute" "" { target { lp64 } } } */ + r += sizeof (arr2) / sizeof (int *); + r += sizeof (arr2) / sizeof (short *); + r += sizeof (arr) / sizeof (int); + r += sizeof (arr) / sizeof (unsigned int); + r += sizeof (arr) / sizeof (T); + r += sizeof (arr) / sizeof (short); /* { dg-warning "expression does not compute" } */ + r += sizeof (arr) / (sizeof (short)); + + r += sizeof (ap) / sizeof (char); /* { dg-warning ".sizeof. on array function parameter" } */ + + const char arr3[] = "foo"; + r += sizeof (arr3) / sizeof(char); + r += sizeof (arr3) / sizeof(int); + r += sizeof (arr3) / sizeof (*arr3); + + int arr4[5][5]; + r += sizeof (arr4) / sizeof (arr4[0]); + r += sizeof (arr4) / sizeof (*arr4); + r += sizeof (arr4) / sizeof (**arr4); + r += sizeof (arr4) / sizeof (int *); + r += sizeof (arr4) / sizeof (int); + r += sizeof (arr4) / sizeof (short int); + + T arr5[10]; + r += sizeof (arr5) / sizeof (T); + r += sizeof (arr5) / sizeof (int); + r += sizeof (arr5) / sizeof (short); /* { dg-warning "expression does not compute" } */ + + double arr6[10]; + r += sizeof (arr6) / sizeof (double); + r += sizeof (arr6) / sizeof (float); /* { dg-warning "expression does not compute" } */ + r += sizeof (arr6) / sizeof (*arr6); + + return r; +} diff --git a/gcc/testsuite/c-c++-common/Wsizeof-pointer-div.c b/gcc/testsuite/c-c++-common/Wsizeof-pointer-div.c index 8311618..e9bad1f 100644 --- a/gcc/testsuite/c-c++-common/Wsizeof-pointer-div.c +++ b/gcc/testsuite/c-c++-common/Wsizeof-pointer-div.c @@ -29,7 +29,7 @@ f2 (void) i += sizeof(array) / sizeof(array[0]); i += (sizeof(array)) / (sizeof(array[0])); i += sizeof(array) / sizeof(int); - i += sizeof(array) / sizeof(char); + i += sizeof(array) / sizeof(char); /* { dg-warning "expression does not compute" } */ i += sizeof(*array) / sizeof(char); i += sizeof(array[0]) / sizeof(char); return i; diff --git a/gcc/testsuite/c-c++-common/Wunused-value-1.c b/gcc/testsuite/c-c++-common/Wunused-value-1.c new file mode 100644 index 0000000..90c9d93 --- /dev/null +++ b/gcc/testsuite/c-c++-common/Wunused-value-1.c @@ -0,0 +1,33 @@ +/* PR c/97748 */ +/* { dg-do compile } */ +/* { dg-options "-Wunused-value" } */ + +double _Complex f (); +double _Complex *p; + +double _Complex +foo (double _Complex x) +{ + ++x; /* { dg-bogus "value computed is not used" } */ + --x; /* { dg-bogus "value computed is not used" } */ + x += 1; /* { dg-bogus "value computed is not used" } */ + x += 1.0iF; /* { dg-bogus "value computed is not used" } */ + x++; /* { dg-bogus "value computed is not used" } */ + x--; /* { dg-bogus "value computed is not used" } */ + x + 1; /* { dg-warning "value computed is not used" } */ + (void) (x + 1); /* { dg-bogus "value computed is not used" } */ + 1 + f (); /* { dg-warning "value computed is not used" } */ + f () + f (); /* { dg-warning "value computed is not used" } */ + f () + f (), f (); /* { dg-warning "value computed is not used" } */ + f (); + (void) f (); + *p++; /* { dg-warning "value computed is not used" } */ + ++*p; /* { dg-bogus "value computed is not used" } */ + (*p ? f () : 0); + ({ f (); }); + ({ f () + 1; }); + ({ f (); 0; }); + ({ f () + 1; 0; }); /* { dg-warning "value computed is not used" } */ + 1 + ({ f (); }); /* { dg-warning "value computed is not used" } */ + return x; +} diff --git a/gcc/testsuite/c-c++-common/attr-fallthrough-2.c b/gcc/testsuite/c-c++-common/attr-fallthrough-2.c index e8659e5..156b413 100644 --- a/gcc/testsuite/c-c++-common/attr-fallthrough-2.c +++ b/gcc/testsuite/c-c++-common/attr-fallthrough-2.c @@ -1,6 +1,6 @@ /* PR c/7652 */ /* { dg-do compile } */ -/* { dg-options "-Wall -Wextra -Wpedantic -Wno-unused -Wno-implicit-fallthrough" } */ +/* { dg-options "-Wall -Wextra -Wno-unused -Wno-implicit-fallthrough" } */ extern void bar (int); void @@ -34,7 +34,7 @@ fn (int i) __attribute__((fallthrough ("x"))); /* { dg-warning "specified with a parameter" } */ case 7: bar (1); - __attribute__((fallthrough, fallthrough)); /* { dg-warning "attribute specified multiple times" } */ + __attribute__((fallthrough, fallthrough)); /* { dg-warning "specified multiple times" } */ case 8: bar (1); __attribute__((fallthrough)); diff --git a/gcc/testsuite/gcc.dg/cpp/endif.c b/gcc/testsuite/c-c++-common/cpp/endif.c index efea52c..efea52c 100644 --- a/gcc/testsuite/gcc.dg/cpp/endif.c +++ b/gcc/testsuite/c-c++-common/cpp/endif.c diff --git a/gcc/testsuite/gcc.dg/cpp/endif.h b/gcc/testsuite/c-c++-common/cpp/endif.h index 3762249..3762249 100644 --- a/gcc/testsuite/gcc.dg/cpp/endif.h +++ b/gcc/testsuite/c-c++-common/cpp/endif.h diff --git a/gcc/testsuite/c-c++-common/cpp/eof-2.c b/gcc/testsuite/c-c++-common/cpp/eof-2.c index 3a4af7f..9cc4fed 100644 --- a/gcc/testsuite/c-c++-common/cpp/eof-2.c +++ b/gcc/testsuite/c-c++-common/cpp/eof-2.c @@ -5,4 +5,4 @@ #define f(x) x #include "eof-2.h" - /* { dg-regexp {[^\n]*eof-2.h:4: error: unterminated argument list invoking macro "f"\n} } */ + /* { dg-regexp {[^\n]*eof-2.h:4:21: error: unterminated argument list invoking macro "f"\n} } */ diff --git a/gcc/testsuite/c-c++-common/cpp/eof-3.c b/gcc/testsuite/c-c++-common/cpp/eof-3.c index 316918e..e309a54 100644 --- a/gcc/testsuite/c-c++-common/cpp/eof-3.c +++ b/gcc/testsuite/c-c++-common/cpp/eof-3.c @@ -3,6 +3,6 @@ /* { dg-do preprocess } */ /* { dg-additional-options "-include $srcdir/c-c++-common/cpp/eof-2.h" } */ - /* { dg-regexp {[^\n]*eof-2.h:4: error: unterminated argument list invoking macro "f"\n} } */ + /* { dg-regexp {[^\n]*eof-2.h:4:21: error: unterminated argument list invoking macro "f"\n} } */ token ) diff --git a/gcc/testsuite/c-c++-common/cpp/pr97471.c b/gcc/testsuite/c-c++-common/cpp/pr97471.c new file mode 100644 index 0000000..f1e512e --- /dev/null +++ b/gcc/testsuite/c-c++-common/cpp/pr97471.c @@ -0,0 +1,10 @@ +/* PR preprocessor/97471 */ +/* { dg-do compile } */ + +/* ICE with non-fn use of fn-like macro at EOF */ + +#define a() b + +/* { dg-error "expected" "" { target c } .+2 } */ +/* { dg-error "does not name" "" { target c++ } .+1 } */ +a diff --git a/gcc/testsuite/c-c++-common/goacc-gomp/atomic.c b/gcc/testsuite/c-c++-common/goacc-gomp/atomic.c new file mode 100644 index 0000000..4d18f23 --- /dev/null +++ b/gcc/testsuite/c-c++-common/goacc-gomp/atomic.c @@ -0,0 +1,43 @@ +/* { dg-do compile } */ +/* { dg-additional-options "-fdump-tree-original" } */ + +#pragma omp requires atomic_default_mem_order(acq_rel) + +void +foo () +{ + int i, v; + +#pragma omp atomic read + i = v; + +#pragma acc atomic read + i = v; + +#pragma omp atomic write + i = v; + +#pragma acc atomic write + i = v; + +#pragma omp atomic update + i += 1; + +#pragma acc atomic update + i += 1; + +#pragma omp atomic capture + v = i += 1; + +#pragma acc atomic capture + v = i += 1; +#pragma acc atomic update capture + v = i += 1; +} + +/* { dg-final { scan-tree-dump-times "i = #pragma omp atomic read acquire" 1 "original" } } */ +/* { dg-final { scan-tree-dump-times "i = #pragma omp atomic read relaxed" 1 "original" } } */ +/* { dg-final { scan-tree-dump-times "#pragma omp atomic release" 2 "original" } } */ +/* { dg-final { scan-tree-dump-times "#pragma omp atomic relaxed" 2 "original" } } */ +/* { dg-final { scan-tree-dump-times "v = #pragma omp atomic capture acq_rel" 1 "original" } } */ +/* { dg-final { scan-tree-dump-times "v = #pragma omp atomic capture relaxed" 2 "original" } } */ diff --git a/gcc/testsuite/c-c++-common/goacc/atomic.c b/gcc/testsuite/c-c++-common/goacc/atomic.c new file mode 100644 index 0000000..ff3b25e --- /dev/null +++ b/gcc/testsuite/c-c++-common/goacc/atomic.c @@ -0,0 +1,30 @@ +/* { dg-do compile } */ + +void +foo () +{ + int i, v; +#pragma acc atomic read bar /* { dg-error "expected 'read', 'write', 'update', or 'capture' clause" } */ + i = v; /* { dg-error "expected end of line before 'bar'" "" { target *-*-* } .-1 } */ + +#pragma acc atomic read write /* { dg-error "too many atomic clauses" } */ + i = v; + +#pragma acc atomic read seq_cst /* { dg-error "expected 'read', 'write', 'update', or 'capture' clause" } */ + i = v; /* { dg-error "expected end of line before 'seq_cst'" "" { target *-*-* } .-1 } */ + +#pragma acc atomic read relaxed /* { dg-error "expected 'read', 'write', 'update', or 'capture' clause" } */ + i = v; /* { dg-error "expected end of line before 'relaxed'" "" { target *-*-* } .-1 } */ + +#pragma acc atomic update hint(1) /* { dg-error "expected 'read', 'write', 'update', or 'capture' clause" } */ + i += 1; /* { dg-error "expected end of line before 'hint'" "" { target *-*-* } .-1 } */ + +#pragma acc atomic update update capture /* { dg-error "too many atomic clauses" } */ + v = i += 1; + +#pragma acc atomic update capture capture /* { dg-error "too many atomic clauses" } */ + v = i += 1; + +#pragma acc atomic write capture /* { dg-error "too many atomic clauses" } */ + i = 1; +} diff --git a/gcc/testsuite/c-c++-common/goacc/clause-locations.c b/gcc/testsuite/c-c++-common/goacc/clause-locations.c deleted file mode 100644 index 913988d..0000000 --- a/gcc/testsuite/c-c++-common/goacc/clause-locations.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Verify that the location information for clauses is correct. */ - -void -check_clause_columns() { - int i, j, sum, diff; - - #pragma acc parallel - { - #pragma acc loop reduction(+:sum) - for (i = 1; i <= 10; i++) - { - #pragma acc loop reduction(-:diff) reduction(-:sum) - /* { dg-warning "53: conflicting reduction operations for .sum." "" { target c } .-1 } */ - /* { dg-warning "56: conflicting reduction operations for .sum." "" { target c++ } .-2 } */ - for (j = 1; j <= 10; j++) - sum = 1; - } - } -} diff --git a/gcc/testsuite/c-c++-common/goacc/nested-reductions-1-kernels.c b/gcc/testsuite/c-c++-common/goacc/nested-reductions-1-kernels.c new file mode 100644 index 0000000..9323e2c --- /dev/null +++ b/gcc/testsuite/c-c++-common/goacc/nested-reductions-1-kernels.c @@ -0,0 +1,236 @@ +/* Test cases of nested 'reduction' clauses expected to compile cleanly. */ + +/* See also 'gfortran.dg/goacc/nested-reductions-1-kernels.f90'. */ + +void acc_kernels (void) +{ + int i, j, k, sum, diff; + + #pragma acc kernels + { + #pragma acc loop reduction(+:sum) + for (i = 0; i < 10; i++) + for (j = 0; j < 10; j++) + for (k = 0; k < 10; k++) + sum = 1; + + #pragma acc loop collapse(2) reduction(+:sum) + for (i = 0; i < 10; i++) + for (j = 0; j < 10; j++) + for (k = 0; k < 10; k++) + sum = 1; + + #pragma acc loop reduction(+:sum) + for (i = 0; i < 10; i++) + #pragma acc loop reduction(+:sum) + for (j = 0; j < 10; j++) + for (k = 0; k < 10; k++) + sum = 1; + + #pragma acc loop reduction(+:sum) + for (i = 0; i < 10; i++) + #pragma acc loop collapse(2) reduction(+:sum) + for (j = 0; j < 10; j++) + for (k = 0; k < 10; k++) + sum = 1; + + #pragma acc loop reduction(+:sum) + for (i = 0; i < 10; i++) + for (j = 0; j < 10; j++) + #pragma acc loop reduction(+:sum) + for (k = 0; k < 10; k++) + sum = 1; + + #pragma acc loop reduction(+:sum) + for (i = 0; i < 10; i++) + #pragma acc loop reduction(+:sum) + for (j = 0; j < 10; j++) + #pragma acc loop reduction(+:sum) + for (k = 0; k < 10; k++) + sum = 1; + + #pragma acc loop reduction(+:sum) reduction(-:diff) + for (i = 0; i < 10; i++) + { + #pragma acc loop reduction(+:sum) + for (j = 0; j < 10; j++) + #pragma acc loop reduction(+:sum) + for (k = 0; k < 10; k++) + sum = 1; + + #pragma acc loop reduction(-:diff) + for (j = 0; j < 10; j++) + #pragma acc loop reduction(-:diff) + for (k = 0; k < 10; k++) + diff = 1; + } + } +} + +/* The same tests as above, but using a combined kernels loop construct. */ + +void acc_kernels_loop (void) +{ + int i, j, k, l, sum, diff; + + #pragma acc kernels loop + for (int h = 0; h < 10; ++h) + { + #pragma acc loop reduction(+:sum) + for (i = 0; i < 10; i++) + for (j = 0; j < 10; j++) + for (k = 0; k < 10; k++) + sum = 1; + + #pragma acc loop collapse(2) reduction(+:sum) + for (i = 0; i < 10; i++) + for (j = 0; j < 10; j++) + for (k = 0; k < 10; k++) + sum = 1; + + #pragma acc loop reduction(+:sum) + for (i = 0; i < 10; i++) + #pragma acc loop reduction(+:sum) + for (j = 0; j < 10; j++) + for (k = 0; k < 10; k++) + sum = 1; + + #pragma acc loop reduction(+:sum) + for (i = 0; i < 10; i++) + #pragma acc loop collapse(2) reduction(+:sum) + for (j = 0; j < 10; j++) + for (k = 0; k < 10; k++) + sum = 1; + + #pragma acc loop reduction(+:sum) + for (i = 0; i < 10; i++) + for (j = 0; j < 10; j++) + #pragma acc loop reduction(+:sum) + for (k = 0; k < 10; k++) + sum = 1; + + #pragma acc loop reduction(+:sum) + for (i = 0; i < 10; i++) + #pragma acc loop reduction(+:sum) // { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } } + for (j = 0; j < 10; j++) + #pragma acc loop reduction(+:sum) + for (k = 0; k < 10; k++) + sum = 1; + + #pragma acc loop reduction(+:sum) reduction(-:diff) + for (i = 0; i < 10; i++) + { + #pragma acc loop reduction(+:sum) // { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } } + for (j = 0; j < 10; j++) + #pragma acc loop reduction(+:sum) + for (k = 0; k < 10; k++) + sum = 1; + + #pragma acc loop reduction(-:diff) // { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } } + for (j = 0; j < 10; j++) + #pragma acc loop reduction(-:diff) + for (k = 0; k < 10; k++) + diff = 1; + } + } +} + +/* The same tests as above, but now the outermost reduction clause is on + the kernels region, not the outermost loop. */ + +void acc_kernels_reduction (void) +{ + /* In contrast to the 'parallel' construct, the 'reduction' clause is not + supported on the 'kernels' construct. */ +} + +/* The same tests as above, but using a combined kernels loop construct, and + the outermost reduction clause is on that one, not the outermost loop. */ +void acc_kernels_loop_reduction (void) +{ + int i, j, k, sum, diff; + + #pragma acc kernels loop reduction(+:sum) + for (int h = 0; h < 10; ++h) + { + for (i = 0; i < 10; i++) + for (j = 0; j < 10; j++) + for (k = 0; k < 10; k++) + sum = 1; + + for (i = 0; i < 10; i++) + #pragma acc loop + for (j = 0; j < 10; j++) + for (k = 0; k < 10; k++) + sum = 1; + + #pragma acc loop reduction(+:sum) + for (i = 0; i < 10; i++) + for (j = 0; j < 10; j++) + #pragma acc loop reduction(+:sum) + for (k = 0; k < 10; k++) + sum = 1; + + for (i = 0; i < 10; i++) + for (j = 0; j < 10; j++) + #pragma acc loop + for (k = 0; k < 10; k++) + sum = 1; + + #pragma acc loop reduction(+:sum) + for (i = 0; i < 10; i++) + #pragma acc loop reduction(+:sum) // { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } } + for (j = 0; j < 10; j++) + #pragma acc loop reduction(+:sum) + for (k = 0; k < 10; k++) + sum = 1; + + #pragma acc loop reduction(+:sum) reduction(-:diff) + for (i = 0; i < 10; i++) + { + #pragma acc loop reduction(+:sum) // { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } } + for (j = 0; j < 10; j++) + #pragma acc loop reduction(+:sum) + for (k = 0; k < 10; k++) + sum = 1; + + #pragma acc loop reduction(-:diff) // { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } } + for (j = 0; j < 10; j++) + #pragma acc loop reduction(-:diff) + for (k = 0; k < 10; k++) + diff = 1; + } + + #pragma acc loop reduction(+:sum) + for (i = 0; i < 10; i++) + { + #pragma acc loop reduction(+:sum) // { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } } + for (j = 0; j < 10; j++) + #pragma acc loop reduction(+:sum) + for (k = 0; k < 10; k++) + sum = 1; + + #pragma acc loop reduction(-:diff) // { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } } + for (j = 0; j < 10; j++) + #pragma acc loop reduction(-:diff) + for (k = 0; k < 10; k++) + diff = 1; + } + + #pragma acc loop reduction(+:sum) + for (i = 0; i < 10; i++) + { + #pragma acc loop reduction(+:sum) // { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } } + for (j = 0; j < 10; j++) + #pragma acc loop reduction(+:sum) + for (k = 0; k < 10; k++) + sum = 1; + + #pragma acc loop // { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } } + for (j = 0; j < 10; j++) + #pragma acc loop reduction(-:diff) + for (k = 0; k < 10; k++) + diff = 1; + } + } +} diff --git a/gcc/testsuite/c-c++-common/goacc/nested-reductions.c b/gcc/testsuite/c-c++-common/goacc/nested-reductions-1-parallel.c index 15385c4..ce1d0a1 100644 --- a/gcc/testsuite/c-c++-common/goacc/nested-reductions.c +++ b/gcc/testsuite/c-c++-common/goacc/nested-reductions-1-parallel.c @@ -1,4 +1,6 @@ -/* Test cases of nested reduction loops that should compile cleanly. */ +/* Test cases of nested 'reduction' clauses expected to compile cleanly. */ + +/* See also 'gfortran.dg/goacc/nested-reductions-1-parallel.f90'. */ void acc_parallel (void) { @@ -314,107 +316,3 @@ void acc_parallel_loop_reduction (void) } } } - -/* The same tests as above, but inside a routine construct. */ -#pragma acc routine gang -void acc_routine (void) -{ - int i, j, k, sum, diff; - - { - #pragma acc loop reduction(+:sum) - for (i = 0; i < 10; i++) - for (j = 0; j < 10; j++) - for (k = 0; k < 10; k++) - sum = 1; - - #pragma acc loop collapse(2) reduction(+:sum) - for (i = 0; i < 10; i++) - for (j = 0; j < 10; j++) - for (k = 0; k < 10; k++) - sum = 1; - - #pragma acc loop reduction(+:sum) - for (i = 0; i < 10; i++) - #pragma acc loop reduction(+:sum) - for (j = 0; j < 10; j++) - for (k = 0; k < 10; k++) - sum = 1; - - #pragma acc loop reduction(+:sum) - for (i = 0; i < 10; i++) - #pragma acc loop collapse(2) reduction(+:sum) - for (j = 0; j < 10; j++) - for (k = 0; k < 10; k++) - sum = 1; - - #pragma acc loop reduction(+:sum) - for (i = 0; i < 10; i++) - for (j = 0; j < 10; j++) - #pragma acc loop reduction(+:sum) - for (k = 0; k < 10; k++) - sum = 1; - - #pragma acc loop reduction(+:sum) - for (i = 0; i < 10; i++) - #pragma acc loop reduction(+:sum) - for (j = 0; j < 10; j++) - #pragma acc loop reduction(+:sum) - for (k = 0; k < 10; k++) - sum = 1; - - #pragma acc loop reduction(+:sum) reduction(-:diff) - for (i = 0; i < 10; i++) - { - #pragma acc loop reduction(+:sum) - for (j = 0; j < 10; j++) - #pragma acc loop reduction(+:sum) - for (k = 0; k < 10; k++) - sum = 1; - - #pragma acc loop reduction(-:diff) - for (j = 0; j < 10; j++) - #pragma acc loop reduction(-:diff) - for (k = 0; k < 10; k++) - diff = 1; - } - } -} - -void acc_kernels (void) -{ - int i, j, k, sum, diff; - - /* FIXME: These tests are not meaningful yet because reductions in - kernels regions are not supported yet. */ - #pragma acc kernels - { - #pragma acc loop reduction(+:sum) - for (i = 0; i < 10; i++) - for (j = 0; j < 10; j++) - for (k = 0; k < 10; k++) - sum = 1; - - #pragma acc loop reduction(+:sum) - for (i = 0; i < 10; i++) - #pragma acc loop reduction(+:sum) - for (j = 0; j < 10; j++) - for (k = 0; k < 10; k++) - sum = 1; - - #pragma acc loop reduction(+:sum) - for (i = 0; i < 10; i++) - for (j = 0; j < 10; j++) - #pragma acc loop reduction(+:sum) - for (k = 0; k < 10; k++) - sum = 1; - - #pragma acc loop reduction(+:sum) - for (i = 0; i < 10; i++) - #pragma acc loop reduction(+:sum) - for (j = 0; j < 10; j++) - #pragma acc loop reduction(+:sum) - for (k = 0; k < 10; k++) - sum = 1; - } -} diff --git a/gcc/testsuite/c-c++-common/goacc/nested-reductions-1-routine.c b/gcc/testsuite/c-c++-common/goacc/nested-reductions-1-routine.c new file mode 100644 index 0000000..83d3995 --- /dev/null +++ b/gcc/testsuite/c-c++-common/goacc/nested-reductions-1-routine.c @@ -0,0 +1,68 @@ +/* Test cases of nested 'reduction' clauses expected to compile cleanly. */ + +/* See also 'gfortran.dg/goacc/nested-reductions-1-routine.f90'. */ + +#pragma acc routine gang +void acc_routine (void) +{ + int i, j, k, sum, diff; + + { + #pragma acc loop reduction(+:sum) + for (i = 0; i < 10; i++) + for (j = 0; j < 10; j++) + for (k = 0; k < 10; k++) + sum = 1; + + #pragma acc loop collapse(2) reduction(+:sum) + for (i = 0; i < 10; i++) + for (j = 0; j < 10; j++) + for (k = 0; k < 10; k++) + sum = 1; + + #pragma acc loop reduction(+:sum) + for (i = 0; i < 10; i++) + #pragma acc loop reduction(+:sum) + for (j = 0; j < 10; j++) + for (k = 0; k < 10; k++) + sum = 1; + + #pragma acc loop reduction(+:sum) + for (i = 0; i < 10; i++) + #pragma acc loop collapse(2) reduction(+:sum) + for (j = 0; j < 10; j++) + for (k = 0; k < 10; k++) + sum = 1; + + #pragma acc loop reduction(+:sum) + for (i = 0; i < 10; i++) + for (j = 0; j < 10; j++) + #pragma acc loop reduction(+:sum) + for (k = 0; k < 10; k++) + sum = 1; + + #pragma acc loop reduction(+:sum) + for (i = 0; i < 10; i++) + #pragma acc loop reduction(+:sum) + for (j = 0; j < 10; j++) + #pragma acc loop reduction(+:sum) + for (k = 0; k < 10; k++) + sum = 1; + + #pragma acc loop reduction(+:sum) reduction(-:diff) + for (i = 0; i < 10; i++) + { + #pragma acc loop reduction(+:sum) + for (j = 0; j < 10; j++) + #pragma acc loop reduction(+:sum) + for (k = 0; k < 10; k++) + sum = 1; + + #pragma acc loop reduction(-:diff) + for (j = 0; j < 10; j++) + #pragma acc loop reduction(-:diff) + for (k = 0; k < 10; k++) + diff = 1; + } + } +} diff --git a/gcc/testsuite/c-c++-common/goacc/nested-reductions-2-kernels.c b/gcc/testsuite/c-c++-common/goacc/nested-reductions-2-kernels.c new file mode 100644 index 0000000..dec7dbd --- /dev/null +++ b/gcc/testsuite/c-c++-common/goacc/nested-reductions-2-kernels.c @@ -0,0 +1,305 @@ +/* Test erroneous cases of nested 'reduction' clauses. */ + +/* See also 'gfortran.dg/goacc/nested-reductions-2-kernels.f90'. */ + +void acc_kernels (void) +{ + int i, j, k, l, sum, diff; + + #pragma acc kernels + { + #pragma acc loop reduction(+:sum) + for (i = 0; i < 10; i++) + #pragma acc loop // { dg-warning "nested loop in reduction needs reduction clause for .sum." } + for (j = 0; j < 10; j++) + #pragma acc loop reduction(+:sum) + for (k = 0; k < 10; k++) + sum = 1; + + #pragma acc loop reduction(+:sum) + for (i = 0; i < 10; i++) + #pragma acc loop collapse(2) // { dg-warning "nested loop in reduction needs reduction clause for .sum." } + for (j = 0; j < 10; j++) + for (k = 0; k < 10; k++) + #pragma acc loop reduction(+:sum) + for (l = 0; l < 10; l++) + sum = 1; + + #pragma acc loop reduction(+:sum) + for (i = 0; i < 10; i++) + #pragma acc loop // { dg-warning "nested loop in reduction needs reduction clause for .sum." } + for (j = 0; j < 10; j++) + #pragma acc loop // { dg-warning "nested loop in reduction needs reduction clause for .sum." } + // { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + for (k = 0; k < 10; k++) + #pragma acc loop reduction(+:sum) + for (l = 0; l < 10; l++) + sum = 1; + + #pragma acc loop reduction(+:sum) + for (i = 0; i < 10; i++) + #pragma acc loop reduction(-:sum) // { dg-warning "conflicting reduction operations for .sum." } + for (j = 0; j < 10; j++) + #pragma acc loop reduction(+:sum) // { dg-warning "conflicting reduction operations for .sum." } + for (k = 0; k < 10; k++) + sum = 1; + + #pragma acc loop reduction(+:sum) + for (i = 0; i < 10; i++) + #pragma acc loop reduction(-:sum) // { dg-warning "conflicting reduction operations for .sum." } + for (j = 0; j < 10; j++) + #pragma acc loop reduction(-:sum) + for (k = 0; k < 10; k++) + sum = 1; + + #pragma acc loop reduction(+:sum) + for (i = 0; i < 10; i++) + #pragma acc loop reduction(-:sum) // { dg-warning "conflicting reduction operations for .sum." } + for (j = 0; j < 10; j++) + #pragma acc loop // { dg-warning "nested loop in reduction needs reduction clause for .sum." } + // { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + for (k = 0; k < 10; k++) + #pragma acc loop reduction(*:sum) // { dg-warning "conflicting reduction operations for .sum." } + for (l = 0; l < 10; l++) + sum = 1; + + #pragma acc loop reduction(+:sum) + for (i = 0; i < 10; i++) + #pragma acc loop reduction(-:sum) // { dg-warning "conflicting reduction operations for .sum." } + for (j = 0; j < 10; j++) + #pragma acc loop reduction(+:sum) // { dg-warning "conflicting reduction operations for .sum." } + // { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + for (k = 0; k < 10; k++) + #pragma acc loop reduction(*:sum) // { dg-warning "conflicting reduction operations for .sum." } + for (l = 0; l < 10; l++) + sum = 1; + + #pragma acc loop reduction(+:sum) reduction(-:diff) + for (i = 0; i < 10; i++) + { + #pragma acc loop reduction(-:diff) // { dg-warning "nested loop in reduction needs reduction clause for .sum." } + for (j = 0; j < 10; j++) + #pragma acc loop reduction(+:sum) + for (k = 0; k < 10; k++) + sum = 1; + + #pragma acc loop reduction(+:sum) // { dg-warning "nested loop in reduction needs reduction clause for .diff." } + for (j = 0; j < 10; j++) + #pragma acc loop reduction(-:diff) + for (k = 0; k < 10; k++) + diff = 1; + } + } +} + +/* The same tests as above, but using a combined kernels loop construct. */ + +void acc_kernels_loop (void) +{ + int i, j, k, l, sum, diff; + + #pragma acc kernels loop + for (int h = 0; h < 10; ++h) + { + #pragma acc loop reduction(+:sum) + for (i = 0; i < 10; i++) + #pragma acc loop // { dg-warning "nested loop in reduction needs reduction clause for .sum." } + // { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + for (j = 0; j < 10; j++) + #pragma acc loop reduction(+:sum) + for (k = 0; k < 10; k++) + sum = 1; + + #pragma acc loop reduction(+:sum) + for (i = 0; i < 10; i++) + #pragma acc loop collapse(2) // { dg-warning "nested loop in reduction needs reduction clause for .sum." } + // { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + for (j = 0; j < 10; j++) + for (k = 0; k < 10; k++) + #pragma acc loop reduction(+:sum) + for (l = 0; l < 10; l++) + sum = 1; + + #pragma acc loop reduction(+:sum) + for (i = 0; i < 10; i++) + #pragma acc loop // { dg-warning "nested loop in reduction needs reduction clause for .sum." } + // { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + for (j = 0; j < 10; j++) + #pragma acc loop // { dg-warning "nested loop in reduction needs reduction clause for .sum." } + // { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + for (k = 0; k < 10; k++) + #pragma acc loop reduction(+:sum) + for (l = 0; l < 10; l++) + sum = 1; + + #pragma acc loop reduction(+:sum) + for (i = 0; i < 10; i++) + #pragma acc loop reduction(-:sum) // { dg-warning "conflicting reduction operations for .sum." } + // { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + for (j = 0; j < 10; j++) + #pragma acc loop reduction(+:sum) // { dg-warning "conflicting reduction operations for .sum." } + for (k = 0; k < 10; k++) + sum = 1; + + #pragma acc loop reduction(+:sum) + for (i = 0; i < 10; i++) + #pragma acc loop reduction(-:sum) // { dg-warning "conflicting reduction operations for .sum." } + // { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + for (j = 0; j < 10; j++) + #pragma acc loop reduction(-:sum) + for (k = 0; k < 10; k++) + sum = 1; + + #pragma acc loop reduction(+:sum) + for (i = 0; i < 10; i++) + #pragma acc loop reduction(-:sum) // { dg-warning "conflicting reduction operations for .sum." } + // { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + for (j = 0; j < 10; j++) + #pragma acc loop // { dg-warning "nested loop in reduction needs reduction clause for .sum." } + // { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + for (k = 0; k < 10; k++) + #pragma acc loop reduction(*:sum) // { dg-warning "conflicting reduction operations for .sum." } + for (l = 0; l < 10; l++) + sum = 1; + + #pragma acc loop reduction(+:sum) + for (i = 0; i < 10; i++) + #pragma acc loop reduction(-:sum) // { dg-warning "conflicting reduction operations for .sum." } + // { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + for (j = 0; j < 10; j++) + #pragma acc loop reduction(+:sum) // { dg-warning "conflicting reduction operations for .sum." } + // { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + for (k = 0; k < 10; k++) + #pragma acc loop reduction(*:sum) // { dg-warning "conflicting reduction operations for .sum." } + for (l = 0; l < 10; l++) + sum = 1; + + #pragma acc loop reduction(+:sum) reduction(-:diff) + for (i = 0; i < 10; i++) + { + #pragma acc loop reduction(-:diff) // { dg-warning "nested loop in reduction needs reduction clause for .sum." } + // { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + for (j = 0; j < 10; j++) + #pragma acc loop reduction(+:sum) + for (k = 0; k < 10; k++) + sum = 1; + + #pragma acc loop reduction(+:sum) // { dg-warning "nested loop in reduction needs reduction clause for .diff." } + // { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + for (j = 0; j < 10; j++) + #pragma acc loop reduction(-:diff) + for (k = 0; k < 10; k++) + diff = 1; + } + } +} + +/* The same tests as above, but now the outermost reduction clause is on + the kernels region, not the outermost loop. */ +void acc_kernels_reduction (void) +{ + /* In contrast to the 'parallel' construct, the 'reduction' clause is not + supported on the 'kernels' construct. */ +} + +/* The same tests as above, but using a combined kernels loop construct, and + the outermost reduction clause is on that one, not the outermost loop. */ +void acc_kernels_loop_reduction (void) +{ + int i, j, k, l, sum, diff; + + #pragma acc kernels loop reduction(+:sum) + for (int h = 0; h < 10; ++h) + { + #pragma acc loop // { dg-warning "nested loop in reduction needs reduction clause for .sum." } + for (i = 0; i < 10; i++) + #pragma acc loop // { dg-warning "nested loop in reduction needs reduction clause for .sum." } + // { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + for (j = 0; j < 10; j++) + #pragma acc loop reduction(+:sum) + for (k = 0; k < 10; k++) + sum = 1; + + #pragma acc loop // { dg-warning "nested loop in reduction needs reduction clause for .sum." } + for (i = 0; i < 10; i++) + #pragma acc loop collapse(2) // { dg-warning "nested loop in reduction needs reduction clause for .sum." } + // { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + for (j = 0; j < 10; j++) + for (k = 0; k < 10; k++) + #pragma acc loop reduction(+:sum) + for (l = 0; l < 10; l++) + sum = 1; + + #pragma acc loop // { dg-warning "nested loop in reduction needs reduction clause for .sum." } + for (i = 0; i < 10; i++) + #pragma acc loop // { dg-warning "nested loop in reduction needs reduction clause for .sum." } + // { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + for (j = 0; j < 10; j++) + #pragma acc loop // { dg-warning "nested loop in reduction needs reduction clause for .sum." } + // { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + for (k = 0; k < 10; k++) + #pragma acc loop reduction(+:sum) + for (l = 0; l < 10; l++) + sum = 1; + + #pragma acc loop // { dg-warning "nested loop in reduction needs reduction clause for .sum." } + for (i = 0; i < 10; i++) + #pragma acc loop reduction(-:sum) // { dg-warning "conflicting reduction operations for .sum." } + // { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + for (j = 0; j < 10; j++) + #pragma acc loop reduction(+:sum) // { dg-warning "conflicting reduction operations for .sum." } + for (k = 0; k < 10; k++) + sum = 1; + + #pragma acc loop // { dg-warning "nested loop in reduction needs reduction clause for .sum." } + for (i = 0; i < 10; i++) + #pragma acc loop reduction(-:sum) // { dg-warning "conflicting reduction operations for .sum." } + // { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + for (j = 0; j < 10; j++) + #pragma acc loop reduction(-:sum) + for (k = 0; k < 10; k++) + sum = 1; + + #pragma acc loop reduction(max:sum) // { dg-warning "conflicting reduction operations for .sum." } + for (i = 0; i < 10; i++) + #pragma acc loop reduction(-:sum) // { dg-warning "conflicting reduction operations for .sum." } + // { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + for (j = 0; j < 10; j++) + #pragma acc loop // { dg-warning "nested loop in reduction needs reduction clause for .sum." } + // { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + for (k = 0; k < 10; k++) + #pragma acc loop reduction(*:sum) // { dg-warning "conflicting reduction operations for .sum." } + for (l = 0; l < 10; l++) + sum = 1; + + #pragma acc loop reduction(max:sum) // { dg-warning "conflicting reduction operations for .sum." } + for (i = 0; i < 10; i++) + #pragma acc loop reduction(-:sum) // { dg-warning "conflicting reduction operations for .sum." } + // { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + for (j = 0; j < 10; j++) + #pragma acc loop reduction(+:sum) // { dg-warning "conflicting reduction operations for .sum." }) + // { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + for (k = 0; k < 10; k++) + #pragma acc loop reduction(*:sum) // { dg-warning "conflicting reduction operations for .sum." } + for (l = 0; l < 10; l++) + sum = 1; + + #pragma acc loop reduction(-:diff) // { dg-warning "nested loop in reduction needs reduction clause for .sum." } + for (i = 0; i < 10; i++) + { + #pragma acc loop reduction(-:diff) // { dg-warning "nested loop in reduction needs reduction clause for .sum." } + // { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + for (j = 0; j < 10; j++) + #pragma acc loop reduction(+:sum) + for (k = 0; k < 10; k++) + sum = 1; + + #pragma acc loop reduction(+:sum) // { dg-warning "nested loop in reduction needs reduction clause for .diff." } + // { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + for (j = 0; j < 10; j++) + #pragma acc loop reduction(-:diff) + for (k = 0; k < 10; k++) + diff = 1; + } + } +} diff --git a/gcc/testsuite/c-c++-common/goacc/nested-reductions-warn.c b/gcc/testsuite/c-c++-common/goacc/nested-reductions-2-parallel.c index e2af66e..1f6b4e7 100644 --- a/gcc/testsuite/c-c++-common/goacc/nested-reductions-warn.c +++ b/gcc/testsuite/c-c++-common/goacc/nested-reductions-2-parallel.c @@ -1,4 +1,6 @@ -/* Test erroneous cases of nested reduction loops. */ +/* Test erroneous cases of nested 'reduction' clauses. */ + +/* See also 'gfortran.dg/goacc/nested-reductions-2-parallel.f90'. */ void acc_parallel (void) { @@ -385,141 +387,3 @@ void acc_parallel_loop_reduction (void) } } } - -/* The same tests as above, but inside a routine construct. */ -#pragma acc routine gang -void acc_routine (void) -{ - int i, j, k, l, sum, diff; - - { - #pragma acc loop reduction(+:sum) - for (i = 0; i < 10; i++) - #pragma acc loop // { dg-warning "nested loop in reduction needs reduction clause for .sum." } - for (j = 0; j < 10; j++) - #pragma acc loop reduction(+:sum) - for (k = 0; k < 10; k++) - sum = 1; - - #pragma acc loop reduction(+:sum) - for (i = 0; i < 10; i++) - #pragma acc loop collapse(2) // { dg-warning "nested loop in reduction needs reduction clause for .sum." } - for (j = 0; j < 10; j++) - for (k = 0; k < 10; k++) - #pragma acc loop reduction(+:sum) - for (l = 0; l < 10; l++) - sum = 1; - - #pragma acc loop reduction(+:sum) - for (i = 0; i < 10; i++) - #pragma acc loop // { dg-warning "nested loop in reduction needs reduction clause for .sum." } - for (j = 0; j < 10; j++) - #pragma acc loop // { dg-warning "nested loop in reduction needs reduction clause for .sum." } - // { dg-warning "insufficient partitioning available to parallelize loop" "" { target *-*-* } .-1 } - for (k = 0; k < 10; k++) - #pragma acc loop reduction(+:sum) - for (l = 0; l < 10; l++) - sum = 1; - - #pragma acc loop reduction(+:sum) - for (i = 0; i < 10; i++) - #pragma acc loop reduction(-:sum) // { dg-warning "conflicting reduction operations for .sum." } - for (j = 0; j < 10; j++) - #pragma acc loop reduction(+:sum) // { dg-warning "conflicting reduction operations for .sum." } - for (k = 0; k < 10; k++) - sum = 1; - - #pragma acc loop reduction(+:sum) - for (i = 0; i < 10; i++) - #pragma acc loop reduction(-:sum) // { dg-warning "conflicting reduction operations for .sum." } - for (j = 0; j < 10; j++) - #pragma acc loop reduction(-:sum) - for (k = 0; k < 10; k++) - sum = 1; - - #pragma acc loop reduction(+:sum) - for (i = 0; i < 10; i++) - #pragma acc loop reduction(-:sum) // { dg-warning "conflicting reduction operations for .sum." } - for (j = 0; j < 10; j++) - #pragma acc loop // { dg-warning "nested loop in reduction needs reduction clause for .sum." } - // { dg-warning "insufficient partitioning available to parallelize loop" "" { target *-*-* } .-1 } - for (k = 0; k < 10; k++) - #pragma acc loop reduction(*:sum) // { dg-warning "conflicting reduction operations for .sum." } - for (l = 0; l < 10; l++) - sum = 1; - - #pragma acc loop reduction(+:sum) - for (i = 0; i < 10; i++) - #pragma acc loop reduction(-:sum) // { dg-warning "conflicting reduction operations for .sum." } - for (j = 0; j < 10; j++) - #pragma acc loop reduction(+:sum) // { dg-warning "conflicting reduction operations for .sum." }) - // { dg-warning "insufficient partitioning available to parallelize loop" "" { target *-*-* } .-1 } - for (k = 0; k < 10; k++) - #pragma acc loop reduction(*:sum) // { dg-warning "conflicting reduction operations for .sum." } - for (l = 0; l < 10; l++) - sum = 1; - - #pragma acc loop reduction(+:sum) reduction(-:diff) - for (i = 0; i < 10; i++) - { - #pragma acc loop reduction(-:diff) // { dg-warning "nested loop in reduction needs reduction clause for .sum." } - for (j = 0; j < 10; j++) - #pragma acc loop reduction(+:sum) - for (k = 0; k < 10; k++) - sum = 1; - - #pragma acc loop reduction(+:sum) // { dg-warning "nested loop in reduction needs reduction clause for .diff." } - for (j = 0; j < 10; j++) - #pragma acc loop reduction(-:diff) - for (k = 0; k < 10; k++) - diff = 1; - } - } -} - -void acc_kernels (void) -{ - int i, j, k, sum, diff; - - /* FIXME: No diagnostics are produced for these loops because reductions - in kernels regions are not supported yet. */ - #pragma acc kernels - { - #pragma acc loop reduction(+:sum) - for (i = 0; i < 10; i++) - for (j = 0; j < 10; j++) - for (k = 0; k < 10; k++) - sum = 1; - - #pragma acc loop reduction(+:sum) - for (i = 0; i < 10; i++) - #pragma acc loop - for (j = 0; j < 10; j++) - for (k = 0; k < 10; k++) - sum = 1; - - #pragma acc loop reduction(+:sum) - for (i = 0; i < 10; i++) - #pragma acc loop reduction(-:diff) - for (j = 0; j < 10; j++) - #pragma acc loop - for (k = 0; k < 10; k++) - sum = 1; - - #pragma acc loop reduction(+:sum) - for (i = 0; i < 10; i++) - #pragma acc loop - for (j = 0; j < 10; j++) - #pragma acc loop reduction(+:sum) - for (k = 0; k < 10; k++) - sum = 1; - - #pragma acc loop reduction(+:sum) - for (i = 0; i < 10; i++) - #pragma acc loop reduction(-:sum) - for (j = 0; j < 10; j++) - #pragma acc loop reduction(+:sum) - for (k = 0; k < 10; k++) - sum = 1; - } -} diff --git a/gcc/testsuite/c-c++-common/goacc/nested-reductions-2-routine.c b/gcc/testsuite/c-c++-common/goacc/nested-reductions-2-routine.c new file mode 100644 index 0000000..5988d50 --- /dev/null +++ b/gcc/testsuite/c-c++-common/goacc/nested-reductions-2-routine.c @@ -0,0 +1,93 @@ +/* Test erroneous cases of nested 'reduction' clauses. */ + +/* See also 'gfortran.dg/goacc/nested-reductions-2-routine.f90'. */ + +#pragma acc routine gang +void acc_routine (void) +{ + int i, j, k, l, sum, diff; + + { + #pragma acc loop reduction(+:sum) + for (i = 0; i < 10; i++) + #pragma acc loop // { dg-warning "nested loop in reduction needs reduction clause for .sum." } + for (j = 0; j < 10; j++) + #pragma acc loop reduction(+:sum) + for (k = 0; k < 10; k++) + sum = 1; + + #pragma acc loop reduction(+:sum) + for (i = 0; i < 10; i++) + #pragma acc loop collapse(2) // { dg-warning "nested loop in reduction needs reduction clause for .sum." } + for (j = 0; j < 10; j++) + for (k = 0; k < 10; k++) + #pragma acc loop reduction(+:sum) + for (l = 0; l < 10; l++) + sum = 1; + + #pragma acc loop reduction(+:sum) + for (i = 0; i < 10; i++) + #pragma acc loop // { dg-warning "nested loop in reduction needs reduction clause for .sum." } + for (j = 0; j < 10; j++) + #pragma acc loop // { dg-warning "nested loop in reduction needs reduction clause for .sum." } + // { dg-warning "insufficient partitioning available to parallelize loop" "" { target *-*-* } .-1 } + for (k = 0; k < 10; k++) + #pragma acc loop reduction(+:sum) + for (l = 0; l < 10; l++) + sum = 1; + + #pragma acc loop reduction(+:sum) + for (i = 0; i < 10; i++) + #pragma acc loop reduction(-:sum) // { dg-warning "conflicting reduction operations for .sum." } + for (j = 0; j < 10; j++) + #pragma acc loop reduction(+:sum) // { dg-warning "conflicting reduction operations for .sum." } + for (k = 0; k < 10; k++) + sum = 1; + + #pragma acc loop reduction(+:sum) + for (i = 0; i < 10; i++) + #pragma acc loop reduction(-:sum) // { dg-warning "conflicting reduction operations for .sum." } + for (j = 0; j < 10; j++) + #pragma acc loop reduction(-:sum) + for (k = 0; k < 10; k++) + sum = 1; + + #pragma acc loop reduction(+:sum) + for (i = 0; i < 10; i++) + #pragma acc loop reduction(-:sum) // { dg-warning "conflicting reduction operations for .sum." } + for (j = 0; j < 10; j++) + #pragma acc loop // { dg-warning "nested loop in reduction needs reduction clause for .sum." } + // { dg-warning "insufficient partitioning available to parallelize loop" "" { target *-*-* } .-1 } + for (k = 0; k < 10; k++) + #pragma acc loop reduction(*:sum) // { dg-warning "conflicting reduction operations for .sum." } + for (l = 0; l < 10; l++) + sum = 1; + + #pragma acc loop reduction(+:sum) + for (i = 0; i < 10; i++) + #pragma acc loop reduction(-:sum) // { dg-warning "conflicting reduction operations for .sum." } + for (j = 0; j < 10; j++) + #pragma acc loop reduction(+:sum) // { dg-warning "conflicting reduction operations for .sum." }) + // { dg-warning "insufficient partitioning available to parallelize loop" "" { target *-*-* } .-1 } + for (k = 0; k < 10; k++) + #pragma acc loop reduction(*:sum) // { dg-warning "conflicting reduction operations for .sum." } + for (l = 0; l < 10; l++) + sum = 1; + + #pragma acc loop reduction(+:sum) reduction(-:diff) + for (i = 0; i < 10; i++) + { + #pragma acc loop reduction(-:diff) // { dg-warning "nested loop in reduction needs reduction clause for .sum." } + for (j = 0; j < 10; j++) + #pragma acc loop reduction(+:sum) + for (k = 0; k < 10; k++) + sum = 1; + + #pragma acc loop reduction(+:sum) // { dg-warning "nested loop in reduction needs reduction clause for .diff." } + for (j = 0; j < 10; j++) + #pragma acc loop reduction(-:diff) + for (k = 0; k < 10; k++) + diff = 1; + } + } +} diff --git a/gcc/testsuite/c-c++-common/goacc/pr92793-1.c b/gcc/testsuite/c-c++-common/goacc/pr92793-1.c new file mode 100644 index 0000000..71a556e --- /dev/null +++ b/gcc/testsuite/c-c++-common/goacc/pr92793-1.c @@ -0,0 +1,141 @@ +/* Verify column location information. */ + +/* See also 'gfortran.dg/goacc/pr92793-1.f90'. */ + +/* { dg-additional-options "-fdump-tree-original-lineno" }, and also + { dg-additional-options "-fdump-tree-gimple-lineno" } as the former doesn't + actually contain location information. */ + +/* No tabs. Funny indentation/spacing for a reason. */ + + +static void +check () +{ + int i, j, sum, diff; + + #pragma acc parallel \ + /* C, C++ location information points to the 'a' in '#pragma acc parallel'. */ \ + /* { dg-final { scan-tree-dump-times "pr92793-1\\\.c:17:12\\\] #pragma acc parallel" 1 "original" { xfail *-*-* } } } */ \ + /* { dg-final { scan-tree-dump-times "pr92793-1\\\.c:17:12\\\] #pragma omp target oacc_parallel" 1 "gimple" } } */ + { +#pragma acc loop \ + /* C, C++ location information points to the 'a' in '#pragma acc loop'. */ \ + /* { dg-final { scan-tree-dump-times "pr92793-1\\\.c:22:13\\\] #pragma acc loop" 1 "original" { xfail *-*-* } } } */ \ + /* { dg-final { scan-tree-dump-times "pr92793-1\\\.c:22:13\\\] #pragma acc loop" 1 "gimple" } } */ \ + reduction ( + : sum) /* { dg-line sum1 } */ \ + /* C location information points to the '(' in 'reduction(+:sum)'. */ \ + /* { dg-message "19: location of the previous reduction for 'sum'" "" { target c } sum1 } */ \ + /* C++ location information points to 'sum' in 'reduction(+:sum)'. */ \ + /* { dg-message "28: location of the previous reduction for 'sum'" "" { target c++ } sum1 } */ \ + independent + for (i = 1; i <= 10; i++) + { + #pragma acc loop \ + /* C, C++ location information points to the 'a' in '#pragma acc loop'. */ \ + /* { dg-final { scan-tree-dump-times "pr92793-1\\\.c:34:19\\\] #pragma acc loop" 1 "original" { xfail *-*-* } } } */ \ + /* { dg-final { scan-tree-dump-times "pr92793-1\\\.c:34:19\\\] #pragma acc loop" 1 "gimple" } } */ \ + reduction ( - : diff ) \ +reduction(-:sum ) /* { dg-line sum2 } */ \ + /* C location information points to the '(' in 'reduction(-:sum)'. */ \ + /* { dg-warning "10: conflicting reduction operations for 'sum'" "" { target c } sum2 } */ \ + /* C++ location information points to 'sum' in 'reduction(-:sum)'. */ \ + /* { dg-warning "13: conflicting reduction operations for 'sum'" "" { target c++ } sum2 } */ \ + independent + for (j = 1; j <= 10; j++) + { + sum + = + 1 ; + /* C, C++ location information points to the '=' in 'sum = 1'. */ \ + /* { dg-final { scan-tree-dump-times "pr92793-1\\\.c:48:19\\\] sum = 1" 1 "original" { xfail *-*-* } } } */ \ + /* { dg-final { scan-tree-dump-times "pr92793-1\\\.c:48:19\\\] sum = 1" 1 "gimple" } } */ + } + } + } +} + + +void +gwv_sl_1() { +#pragma acc serial loop /* { dg-message "9: enclosing parent compute construct" } */ \ + gang(num:5) /* { dg-error "5: argument not permitted on 'gang' clause" } */ \ + worker(num:5) /* { dg-error "3: argument not permitted on 'worker' clause" } */ \ + vector(length:5) /* { dg-error "4: argument not permitted on 'vector' clause" } */ + for (int i = 0; i < 10; i++) + ; +} + +void +gwv_sl_2() { +#pragma acc serial loop /* { dg-message "9: enclosing parent compute construct" } */ + for (int i = 0; i < 10; i++) + { +#pragma acc loop /* { dg-bogus "enclosing parent compute construct" } */ + for (int j = 0; j < 10; j++) + { +#pragma acc loop \ + gang(num:5) /* { dg-error "9: argument not permitted on 'gang' clause" } */ \ + worker(num:5) /* { dg-error "5: argument not permitted on 'worker' clause" } */ \ + vector(length:5) /* { dg-error "3: argument not permitted on 'vector' clause" } */ + for (int k = 0; k < 10; k++) + ; + } + } +} + +void +gwv_s_l() { +#pragma acc serial /* { dg-message "9: enclosing parent compute construct" } */ + { +#pragma acc loop \ + gang(num:5) /* { dg-error "8: argument not permitted on 'gang' clause" } */ \ + worker(num:5) /* { dg-error "4: argument not permitted on 'worker' clause" } */ \ + vector(length:5) /* { dg-error "3: argument not permitted on 'vector' clause" } */ + for (int i = 0; i < 10; i++) + ; + +#pragma acc loop + for (int i = 0; i < 10; i++) + { +#pragma acc loop /* { dg-bogus "enclosing parent compute construct" } */ + for (int j = 0; j < 10; j++) + { +#pragma acc loop \ + gang(num:5) /* { dg-error "10: argument not permitted on 'gang' clause" } */ \ + worker(num:5) /* { dg-error "7: argument not permitted on 'worker' clause" } */ \ + vector(length:5) /* { dg-error "5: argument not permitted on 'vector' clause" } */ + for (int k = 0; k < 10; k++) + ; + } + } + } +} + +void gwv_r(); +#pragma acc routine(gwv_r) + +void +gwv_r() { /* { dg-message "1: enclosing routine" } */ +#pragma acc loop \ + gang(num:5) /* { dg-error "4: argument not permitted on 'gang' clause" } */ \ + worker(num:5) /* { dg-error "5: argument not permitted on 'worker' clause" } */ \ + vector(length:5) /* { dg-error "3: argument not permitted on 'vector' clause" } */ + for (int i = 0; i < 10; i++) + ; + +#pragma acc loop + for (int i = 0; i < 10; i++) + { +#pragma acc loop + for (int j = 0; j < 10; j++) + { +#pragma acc loop \ + gang(num:5) /* { dg-error "6: argument not permitted on 'gang' clause" } */ \ + worker(num:5) /* { dg-error "4: argument not permitted on 'worker' clause" } */ \ + vector(length:5) /* { dg-error "6: argument not permitted on 'vector' clause" } */ + for (int k = 0; k < 10; k++) + ; + } + } +} diff --git a/gcc/testsuite/c-c++-common/gomp/allocate-1.c b/gcc/testsuite/c-c++-common/gomp/allocate-1.c new file mode 100644 index 0000000..5630dac --- /dev/null +++ b/gcc/testsuite/c-c++-common/gomp/allocate-1.c @@ -0,0 +1,84 @@ +typedef enum omp_allocator_handle_t +#if __cplusplus >= 201103L +: __UINTPTR_TYPE__ +#endif +{ + omp_null_allocator = 0, + omp_default_mem_alloc = 1, + omp_large_cap_mem_alloc = 2, + omp_const_mem_alloc = 3, + omp_high_bw_mem_alloc = 4, + omp_low_lat_mem_alloc = 5, + omp_cgroup_mem_alloc = 6, + omp_pteam_mem_alloc = 7, + omp_thread_mem_alloc = 8, + __omp_allocator_handle_t_max__ = __UINTPTR_MAX__ +} omp_allocator_handle_t; + +int bar (int, int *, int); +omp_allocator_handle_t baz (void); + +void +foo (int x, int z) +{ + int y[16] = { 0 }, r = 0, i; + omp_allocator_handle_t h = baz (); + #pragma omp parallel allocate (x) allocate (omp_default_mem_alloc : y) \ + allocate ((omp_allocator_handle_t) omp_default_mem_alloc:z) firstprivate (x, y, z) + bar (x, y, z); + #pragma omp task private (x) firstprivate (z) allocate (omp_low_lat_mem_alloc:x,z) + bar (0, &x, z); + #pragma omp taskwait + #pragma omp target teams distribute parallel for private (x) firstprivate (y) \ + allocate ((omp_allocator_handle_t)(omp_default_mem_alloc + 0):z) \ + allocate (omp_default_mem_alloc: x, y) allocate (omp_low_lat_mem_alloc: r) \ + lastprivate (z) reduction(+:r) + for (i = 0; i < 64; i++) + { + z = bar (0, &x, 0); + r += bar (1, y, 0); + } + #pragma omp single private (x) allocate (h:x) + ; + #pragma omp single allocate (*&h : x) private (x) + ; + #pragma omp parallel shared (r, x, z) + #pragma omp single firstprivate (r) allocate (x, r, z) private (x, z) + ; + #pragma omp for allocate (x) private (x) + for (i = 0; i < 64; i++) + x = 1; + #pragma omp sections private (x) allocate (omp_low_lat_mem_alloc: x) + { + x = 1; + #pragma omp section + x = 2; + #pragma omp section + x = 3; + } + #pragma omp taskgroup task_reduction(+:r) allocate (omp_default_mem_alloc : r) + #pragma omp task in_reduction(+:r) allocate (omp_default_mem_alloc : r) + r += bar (r, &r, 0); + #pragma omp teams private (x) firstprivate (y) allocate (h : x, y) + bar (x, y, 0); + #pragma omp taskloop lastprivate (x) reduction (+:r) allocate (h : x, r) + for (i = 0; i < 16; i++) + { + r += bar (0, &r, 0); + x = i; + } + #pragma omp taskgroup task_reduction(+:r) allocate (omp_default_mem_alloc : r) + #pragma omp taskloop firstprivate (x) in_reduction (+:r) \ + allocate (omp_default_mem_alloc : x, r) + for (i = 0; i < 16; i++) + r += bar (x, &r, 0); + #pragma omp taskwait +} + +void +qux (const omp_allocator_handle_t h) +{ + int x = 0; + #pragma omp parallel firstprivate (x) allocate (h: x) + x = 1; +} diff --git a/gcc/testsuite/c-c++-common/gomp/allocate-2.c b/gcc/testsuite/c-c++-common/gomp/allocate-2.c new file mode 100644 index 0000000..cc77efc --- /dev/null +++ b/gcc/testsuite/c-c++-common/gomp/allocate-2.c @@ -0,0 +1,45 @@ +typedef enum omp_allocator_handle_t +#if __cplusplus >= 201103L +: __UINTPTR_TYPE__ +#endif +{ + omp_null_allocator = 0, + omp_default_mem_alloc = 1, + omp_large_cap_mem_alloc = 2, + omp_const_mem_alloc = 3, + omp_high_bw_mem_alloc = 4, + omp_low_lat_mem_alloc = 5, + omp_cgroup_mem_alloc = 6, + omp_pteam_mem_alloc = 7, + omp_thread_mem_alloc = 8, + __omp_allocator_handle_t_max__ = __UINTPTR_MAX__ +} omp_allocator_handle_t; + +int bar (int, int *, int); +omp_allocator_handle_t baz (void); + +void +foo (int x, int z) +{ + int i; + #pragma omp task allocate (x) /* { dg-error "'x' specified in 'allocate' clause but not in an explicit privatization clause" } */ + bar (x, &x, 0); + #pragma omp taskwait + #pragma omp parallel allocate (x) /* { dg-error "'x' specified in 'allocate' clause but not in an explicit privatization clause" } */ + bar (x, &x, 0); + #pragma omp parallel for simd private (x) allocate (x) /* { dg-error "'x' specified in 'allocate' clause but not in an explicit privatization clause" } */ + for (i = 0; i < 16; i++) + x = i; + #pragma omp parallel allocate (foo) /* { dg-error "'\[^\n\r]*foo\[^\n\r]*' is not a variable in 'allocate' clause" } */ + ; + #pragma omp parallel allocate (x) shared (x) /* { dg-error "'x' specified in 'allocate' clause but not in an explicit privatization clause" } */ + bar (x, &x, 0); + #pragma omp parallel private (x) allocate (x) allocate (x) /* { dg-warning "'x' appears more than once in 'allocate' clauses" } */ + bar (x, &x, 0); + #pragma omp parallel private (x) allocate (x, x) /* { dg-warning "'x' appears more than once in 'allocate' clauses" } */ + bar (x, &x, 0); + #pragma omp parallel private (x) allocate (0.0 : x) /* { dg-error "'allocate' clause allocator expression has type 'double' rather than 'omp_allocator_handle_t'" } */ + bar (x, &x, 0); + #pragma omp parallel private (x) allocate (0 : x) /* { dg-error "'allocate' clause allocator expression has type 'int' rather than 'omp_allocator_handle_t'" } */ + bar (x, &x, 0); +} diff --git a/gcc/testsuite/c-c++-common/gomp/allocate-3.c b/gcc/testsuite/c-c++-common/gomp/allocate-3.c new file mode 100644 index 0000000..e61cc1e --- /dev/null +++ b/gcc/testsuite/c-c++-common/gomp/allocate-3.c @@ -0,0 +1,38 @@ +typedef enum omp_allocator_handle_t +#if __cplusplus >= 201103L +: __UINTPTR_TYPE__ +#endif +{ + omp_null_allocator = 0, + omp_default_mem_alloc = 1, + omp_large_cap_mem_alloc = 2, + omp_const_mem_alloc = 3, + omp_high_bw_mem_alloc = 4, + omp_low_lat_mem_alloc = 5, + omp_cgroup_mem_alloc = 6, + omp_pteam_mem_alloc = 7, + omp_thread_mem_alloc = 8, + __omp_allocator_handle_t_max__ = __UINTPTR_MAX__ +} omp_allocator_handle_t; + +omp_allocator_handle_t baz (int); + +int +foo (omp_allocator_handle_t h1, omp_allocator_handle_t h2, int y) +{ + int x; + #pragma omp taskloop default(none) lastprivate (x) allocate (h1:x) firstprivate(y) allocate (h2:y) + for (int i = 0; i < 64; i++) + x = y + i; + return x; +} + +int +bar (int y) +{ + int x; + #pragma omp taskloop default(none) lastprivate (x) allocate (baz (0):x) allocate (baz (1):y) firstprivate(y) + for (int i = 0; i < 64; i++) + x = y + i; + return x; +} diff --git a/gcc/testsuite/c-c++-common/gomp/allocate-4.c b/gcc/testsuite/c-c++-common/gomp/allocate-4.c new file mode 100644 index 0000000..4e0f44a --- /dev/null +++ b/gcc/testsuite/c-c++-common/gomp/allocate-4.c @@ -0,0 +1,39 @@ +void +foo (void) +{ + int s[4] = { 0, 0, 0, 0 }; + int *p = s; +#pragma omp parallel reduction (+: s) allocate(s) + s[0]++; +#pragma omp parallel reduction (+: s[0:3]) allocate(s) + s[0]++; +#pragma omp parallel reduction (+: s[2:2]) allocate(s) + s[2]++; +#pragma omp parallel reduction (+: p[:2]) allocate(p) + p[0]++; +#pragma omp parallel reduction (+: p[2:2]) allocate(p) + p[2]++; +} + +void +bar (void) +{ + int s[4] = { 0, 0, 0, 0 }; + int *p = s; + int i; +#pragma omp teams distribute parallel for reduction (+: s) allocate(s) + for (i = 0; i < 64; i++) + s[0]++; +#pragma omp teams distribute parallel for reduction (+: s[0:3]) allocate(s) + for (i = 0; i < 64; i++) + s[0]++; +#pragma omp teams distribute parallel for reduction (+: s[2:2]) allocate(s) + for (i = 0; i < 64; i++) + s[2]++; +#pragma omp teams distribute parallel for reduction (+: p[:2]) allocate(p) + for (i = 0; i < 64; i++) + p[0]++; +#pragma omp teams distribute parallel for reduction (+: p[2:2]) allocate(p) + for (i = 0; i < 64; i++) + p[2]++; +} diff --git a/gcc/testsuite/c-c++-common/gomp/clauses-1.c b/gcc/testsuite/c-c++-common/gomp/clauses-1.c index be42797..105288e 100644 --- a/gcc/testsuite/c-c++-common/gomp/clauses-1.c +++ b/gcc/testsuite/c-c++-common/gomp/clauses-1.c @@ -1,6 +1,23 @@ /* { dg-do compile } */ /* { dg-additional-options "-std=c99" { target c } } */ +typedef enum omp_allocator_handle_t +#if __cplusplus >= 201103L +: __UINTPTR_TYPE__ +#endif +{ + omp_null_allocator = 0, + omp_default_mem_alloc = 1, + omp_large_cap_mem_alloc = 2, + omp_const_mem_alloc = 3, + omp_high_bw_mem_alloc = 4, + omp_low_lat_mem_alloc = 5, + omp_cgroup_mem_alloc = 6, + omp_pteam_mem_alloc = 7, + omp_thread_mem_alloc = 8, + __omp_allocator_handle_t_max__ = __UINTPTR_MAX__ +} omp_allocator_handle_t; + int t; #pragma omp threadprivate (t) @@ -14,20 +31,20 @@ foo (int d, int m, int i1, int i2, int p, int *idp, int s, #pragma omp distribute parallel for \ private (p) firstprivate (f) collapse(1) dist_schedule(static, 16) \ if (parallel: i2) default(shared) shared(s) reduction(+:r) num_threads (nth) proc_bind(spread) \ - lastprivate (l) schedule(static, 4) order(concurrent) + lastprivate (l) schedule(static, 4) order(concurrent) allocate (omp_default_mem_alloc:f) for (int i = 0; i < 64; i++) ll++; #pragma omp distribute parallel for simd \ private (p) firstprivate (f) collapse(1) dist_schedule(static, 16) \ if (parallel: i2) if(simd: i1) default(shared) shared(s) reduction(+:r) num_threads (nth) proc_bind(spread) \ lastprivate (l) schedule(static, 4) nontemporal(ntm) \ - safelen(8) simdlen(4) aligned(q: 32) order(concurrent) + safelen(8) simdlen(4) aligned(q: 32) order(concurrent) allocate (omp_default_mem_alloc:f) for (int i = 0; i < 64; i++) ll++; #pragma omp distribute simd \ private (p) firstprivate (f) collapse(1) dist_schedule(static, 16) \ safelen(8) simdlen(4) aligned(q: 32) reduction(+:r) if(i1) nontemporal(ntm) \ - order(concurrent) + order(concurrent) allocate (omp_default_mem_alloc:f) for (int i = 0; i < 64; i++) ll++; } @@ -49,20 +66,20 @@ baz (int d, int m, int i1, int i2, int p, int *idp, int s, #pragma omp distribute parallel for \ private (p) firstprivate (f) collapse(1) dist_schedule(static, 16) \ if (parallel: i2) default(shared) shared(s) reduction(+:r) num_threads (nth) proc_bind(spread) \ - lastprivate (l) schedule(static, 4) copyin(t) order(concurrent) + lastprivate (l) schedule(static, 4) copyin(t) order(concurrent) allocate (p) for (int i = 0; i < 64; i++) ll++; #pragma omp distribute parallel for simd \ private (p) firstprivate (f) collapse(1) dist_schedule(static, 16) \ if (parallel: i2) if(simd: i1) default(shared) shared(s) reduction(+:r) num_threads (nth) proc_bind(spread) \ lastprivate (l) schedule(static, 4) nontemporal(ntm) \ - safelen(8) simdlen(4) aligned(q: 32) copyin(t) order(concurrent) + safelen(8) simdlen(4) aligned(q: 32) copyin(t) order(concurrent) allocate (f) for (int i = 0; i < 64; i++) ll++; #pragma omp distribute simd \ private (p) firstprivate (f) collapse(1) dist_schedule(static, 16) \ safelen(8) simdlen(4) aligned(q: 32) reduction(+:r) if(i1) nontemporal(ntm) \ - order(concurrent) + order(concurrent) allocate (f) for (int i = 0; i < 64; i++) ll++; #pragma omp loop bind(parallel) order(concurrent) \ @@ -77,28 +94,28 @@ bar (int d, int m, int i1, int i2, int i3, int p, int *idp, int s, { #pragma omp for simd \ private (p) firstprivate (f) lastprivate (l) linear (ll:1) reduction(+:r) schedule(static, 4) collapse(1) nowait \ - safelen(8) simdlen(4) aligned(q: 32) nontemporal(ntm) if(i1) order(concurrent) + safelen(8) simdlen(4) aligned(q: 32) nontemporal(ntm) if(i1) order(concurrent) allocate (f) for (int i = 0; i < 64; i++) ll++; #pragma omp parallel for \ private (p) firstprivate (f) if (parallel: i2) default(shared) shared(s) copyin(t) reduction(+:r) num_threads (nth) proc_bind(spread) \ - lastprivate (l) linear (ll:1) ordered schedule(static, 4) collapse(1) + lastprivate (l) linear (ll:1) ordered schedule(static, 4) collapse(1) allocate (f) for (int i = 0; i < 64; i++) ll++; #pragma omp parallel for \ private (p) firstprivate (f) if (parallel: i2) default(shared) shared(s) copyin(t) reduction(+:r) num_threads (nth) proc_bind(spread) \ - lastprivate (l) linear (ll:1) schedule(static, 4) collapse(1) order(concurrent) + lastprivate (l) linear (ll:1) schedule(static, 4) collapse(1) order(concurrent) allocate (f) for (int i = 0; i < 64; i++) ll++; #pragma omp parallel for simd \ private (p) firstprivate (f) if (i2) default(shared) shared(s) copyin(t) reduction(+:r) num_threads (nth) proc_bind(spread) \ lastprivate (l) linear (ll:1) schedule(static, 4) collapse(1) \ - safelen(8) simdlen(4) aligned(q: 32) nontemporal(ntm) order(concurrent) + safelen(8) simdlen(4) aligned(q: 32) nontemporal(ntm) order(concurrent) allocate (f) for (int i = 0; i < 64; i++) ll++; #pragma omp parallel sections \ private (p) firstprivate (f) if (parallel: i2) default(shared) shared(s) copyin(t) reduction(+:r) num_threads (nth) proc_bind(spread) \ - lastprivate (l) + lastprivate (l) allocate (f) { #pragma omp section {} @@ -108,35 +125,39 @@ bar (int d, int m, int i1, int i2, int i3, int p, int *idp, int s, #pragma omp target parallel \ device(d) map (tofrom: m) if (target: i1) private (p) firstprivate (f) defaultmap(tofrom: scalar) is_device_ptr (idp) \ if (parallel: i2) default(shared) shared(s) reduction(+:r) num_threads (nth) proc_bind(spread) \ - nowait depend(inout: dd[0]) + nowait depend(inout: dd[0]) allocate (omp_default_mem_alloc:f) ; #pragma omp target parallel for \ device(d) map (tofrom: m) if (target: i1) private (p) firstprivate (f) defaultmap(tofrom: scalar) is_device_ptr (idp) \ if (parallel: i2) default(shared) shared(s) reduction(+:r) num_threads (nth) proc_bind(spread) \ - lastprivate (l) linear (ll:1) ordered schedule(static, 4) collapse(1) nowait depend(inout: dd[0]) + lastprivate (l) linear (ll:1) ordered schedule(static, 4) collapse(1) nowait depend(inout: dd[0]) \ + allocate (omp_default_mem_alloc:f) for (int i = 0; i < 64; i++) ll++; #pragma omp target parallel for \ device(d) map (tofrom: m) if (target: i1) private (p) firstprivate (f) defaultmap(tofrom: scalar) is_device_ptr (idp) \ if (parallel: i2) default(shared) shared(s) reduction(+:r) num_threads (nth) proc_bind(spread) \ - lastprivate (l) linear (ll:1) schedule(static, 4) collapse(1) nowait depend(inout: dd[0]) order(concurrent) + lastprivate (l) linear (ll:1) schedule(static, 4) collapse(1) nowait depend(inout: dd[0]) order(concurrent) \ + allocate (omp_default_mem_alloc:f) for (int i = 0; i < 64; i++) ll++; #pragma omp target parallel for simd \ device(d) map (tofrom: m) if (target: i1) private (p) firstprivate (f) defaultmap(tofrom: scalar) is_device_ptr (idp) \ if (parallel: i2) default(shared) shared(s) reduction(+:r) num_threads (nth) proc_bind(spread) \ lastprivate (l) linear (ll:1) schedule(static, 4) collapse(1) \ - safelen(8) simdlen(4) aligned(q: 32) nowait depend(inout: dd[0]) nontemporal(ntm) if (simd: i3) order(concurrent) + safelen(8) simdlen(4) aligned(q: 32) nowait depend(inout: dd[0]) nontemporal(ntm) if (simd: i3) order(concurrent) \ + allocate (omp_default_mem_alloc:f) for (int i = 0; i < 64; i++) ll++; #pragma omp target teams \ device(d) map (tofrom: m) if (target: i1) private (p) firstprivate (f) defaultmap(tofrom: scalar) is_device_ptr (idp) \ - shared(s) default(shared) reduction(+:r) num_teams(nte) thread_limit(tl) nowait depend(inout: dd[0]) + shared(s) default(shared) reduction(+:r) num_teams(nte) thread_limit(tl) nowait depend(inout: dd[0]) \ + allocate (omp_default_mem_alloc:f) ; #pragma omp target teams distribute \ device(d) map (tofrom: m) if (target: i1) private (p) firstprivate (f) defaultmap(tofrom: scalar) is_device_ptr (idp) \ shared(s) default(shared) reduction(+:r) num_teams(nte) thread_limit(tl) \ - collapse(1) dist_schedule(static, 16) nowait depend(inout: dd[0]) + collapse(1) dist_schedule(static, 16) nowait depend(inout: dd[0]) allocate (omp_default_mem_alloc:f) for (int i = 0; i < 64; i++) ; #pragma omp target teams distribute parallel for \ @@ -144,7 +165,8 @@ bar (int d, int m, int i1, int i2, int i3, int p, int *idp, int s, shared(s) default(shared) reduction(+:r) num_teams(nte) thread_limit(tl) \ collapse(1) dist_schedule(static, 16) \ if (parallel: i2) num_threads (nth) proc_bind(spread) \ - lastprivate (l) schedule(static, 4) nowait depend(inout: dd[0]) order(concurrent) + lastprivate (l) schedule(static, 4) nowait depend(inout: dd[0]) order(concurrent) \ + allocate (omp_default_mem_alloc:f) for (int i = 0; i < 64; i++) ll++; #pragma omp target teams distribute parallel for simd \ @@ -153,47 +175,50 @@ bar (int d, int m, int i1, int i2, int i3, int p, int *idp, int s, collapse(1) dist_schedule(static, 16) \ if (parallel: i2) num_threads (nth) proc_bind(spread) \ lastprivate (l) schedule(static, 4) order(concurrent) \ - safelen(8) simdlen(4) aligned(q: 32) nowait depend(inout: dd[0]) nontemporal(ntm) if (simd: i3) + safelen(8) simdlen(4) aligned(q: 32) nowait depend(inout: dd[0]) nontemporal(ntm) if (simd: i3) \ + allocate (omp_default_mem_alloc:f) for (int i = 0; i < 64; i++) ll++; #pragma omp target teams distribute simd \ device(d) map (tofrom: m) if (i1) private (p) firstprivate (f) defaultmap(tofrom: scalar) is_device_ptr (idp) \ shared(s) default(shared) reduction(+:r) num_teams(nte) thread_limit(tl) \ collapse(1) dist_schedule(static, 16) order(concurrent) \ - safelen(8) simdlen(4) aligned(q: 32) nowait depend(inout: dd[0]) nontemporal(ntm) + safelen(8) simdlen(4) aligned(q: 32) nowait depend(inout: dd[0]) nontemporal(ntm) \ + allocate (omp_default_mem_alloc:f) for (int i = 0; i < 64; i++) ll++; #pragma omp target simd \ device(d) map (tofrom: m) if (target: i1) private (p) firstprivate (f) defaultmap(tofrom: scalar) is_device_ptr (idp) \ safelen(8) simdlen(4) lastprivate (l) linear(ll: 1) aligned(q: 32) reduction(+:r) \ - nowait depend(inout: dd[0]) nontemporal(ntm) if(simd:i3) order(concurrent) + nowait depend(inout: dd[0]) nontemporal(ntm) if(simd:i3) order(concurrent) \ + allocate (omp_default_mem_alloc:f) for (int i = 0; i < 64; i++) ll++; - #pragma omp taskgroup task_reduction(+:r2) + #pragma omp taskgroup task_reduction(+:r2) allocate (r2) #pragma omp taskloop simd \ private (p) firstprivate (f) lastprivate (l) shared (s) default(shared) grainsize (g) collapse(1) untied if(taskloop: i1) if(simd: i2) final(fi) mergeable priority (pp) \ safelen(8) simdlen(4) linear(ll: 1) aligned(q: 32) reduction(default, +:r) in_reduction(+:r2) nontemporal(ntm) \ - order(concurrent) + order(concurrent) allocate (f) for (int i = 0; i < 64; i++) ll++; - #pragma omp taskgroup task_reduction(+:r) + #pragma omp taskgroup task_reduction(+:r) allocate (r) #pragma omp taskloop simd \ private (p) firstprivate (f) lastprivate (l) shared (s) default(shared) grainsize (g) collapse(1) untied if(i1) final(fi) mergeable nogroup priority (pp) \ safelen(8) simdlen(4) linear(ll: 1) aligned(q: 32) in_reduction(+:r) nontemporal(ntm) \ - order(concurrent) + order(concurrent) allocate (f) for (int i = 0; i < 64; i++) ll++; #pragma omp taskwait #pragma omp taskloop simd \ private (p) firstprivate (f) lastprivate (l) shared (s) default(shared) num_tasks (nta) collapse(1) if(taskloop: i1) final(fi) priority (pp) \ safelen(8) simdlen(4) linear(ll: 1) aligned(q: 32) reduction(+:r) if (simd: i3) nontemporal(ntm) \ - order(concurrent) + order(concurrent) allocate (f) for (int i = 0; i < 64; i++) ll++; #pragma omp target nowait depend(inout: dd[0]) #pragma omp teams distribute \ private(p) firstprivate (f) shared(s) default(shared) reduction(+:r) num_teams(nte) thread_limit(tl) \ - collapse(1) dist_schedule(static, 16) + collapse(1) dist_schedule(static, 16) allocate (omp_default_mem_alloc: f) for (int i = 0; i < 64; i++) ; #pragma omp target @@ -201,7 +226,7 @@ bar (int d, int m, int i1, int i2, int i3, int p, int *idp, int s, private(p) firstprivate (f) shared(s) default(shared) reduction(+:r) num_teams(nte) thread_limit(tl) \ collapse(1) dist_schedule(static, 16) \ if (parallel: i2) num_threads (nth) proc_bind(spread) \ - lastprivate (l) schedule(static, 4) order(concurrent) + lastprivate (l) schedule(static, 4) order(concurrent) allocate (omp_default_mem_alloc: f) for (int i = 0; i < 64; i++) ll++; #pragma omp target @@ -210,21 +235,23 @@ bar (int d, int m, int i1, int i2, int i3, int p, int *idp, int s, collapse(1) dist_schedule(static, 16) \ if (parallel: i2) num_threads (nth) proc_bind(spread) \ lastprivate (l) schedule(static, 4) order(concurrent) \ - safelen(8) simdlen(4) aligned(q: 32) if (simd: i3) nontemporal(ntm) + safelen(8) simdlen(4) aligned(q: 32) if (simd: i3) nontemporal(ntm) \ + allocate (omp_default_mem_alloc: f) for (int i = 0; i < 64; i++) ll++; #pragma omp target #pragma omp teams distribute simd \ private(p) firstprivate (f) shared(s) default(shared) reduction(+:r) num_teams(nte) thread_limit(tl) \ collapse(1) dist_schedule(static, 16) order(concurrent) \ - safelen(8) simdlen(4) aligned(q: 32) if(i3) nontemporal(ntm) + safelen(8) simdlen(4) aligned(q: 32) if(i3) nontemporal(ntm) \ + allocate (omp_default_mem_alloc: f) for (int i = 0; i < 64; i++) ll++; #pragma omp teams distribute parallel for \ private(p) firstprivate (f) shared(s) default(shared) reduction(+:r) num_teams(nte) thread_limit(tl) \ collapse(1) dist_schedule(static, 16) order(concurrent) \ if (parallel: i2) num_threads (nth) proc_bind(spread) \ - lastprivate (l) schedule(static, 4) copyin(t) + lastprivate (l) schedule(static, 4) copyin(t) allocate (f) for (int i = 0; i < 64; i++) ll++; #pragma omp teams distribute parallel for simd \ @@ -232,65 +259,66 @@ bar (int d, int m, int i1, int i2, int i3, int p, int *idp, int s, collapse(1) dist_schedule(static, 16) \ if (parallel: i2) num_threads (nth) proc_bind(spread) \ lastprivate (l) schedule(static, 4) order(concurrent) \ - safelen(8) simdlen(4) aligned(q: 32) if (simd: i3) nontemporal(ntm) copyin(t) + safelen(8) simdlen(4) aligned(q: 32) if (simd: i3) nontemporal(ntm) copyin(t) \ + allocate (f) for (int i = 0; i < 64; i++) ll++; #pragma omp teams distribute simd \ private(p) firstprivate (f) shared(s) default(shared) reduction(+:r) num_teams(nte) thread_limit(tl) \ collapse(1) dist_schedule(static, 16) order(concurrent) \ - safelen(8) simdlen(4) aligned(q: 32) if(i3) nontemporal(ntm) + safelen(8) simdlen(4) aligned(q: 32) if(i3) nontemporal(ntm) allocate(f) for (int i = 0; i < 64; i++) ll++; #pragma omp parallel master \ private (p) firstprivate (f) if (parallel: i2) default(shared) shared(s) reduction(+:r) \ - num_threads (nth) proc_bind(spread) copyin(t) + num_threads (nth) proc_bind(spread) copyin(t) allocate (f) ; - #pragma omp taskgroup task_reduction (+:r2) + #pragma omp taskgroup task_reduction (+:r2) allocate (r2) #pragma omp master taskloop \ private (p) firstprivate (f) lastprivate (l) shared (s) default(shared) grainsize (g) collapse(1) untied if(taskloop: i1) final(fi) mergeable priority (pp) \ - reduction(default, +:r) in_reduction(+:r2) + reduction(default, +:r) in_reduction(+:r2) allocate (f) for (int i = 0; i < 64; i++) ll++; - #pragma omp taskgroup task_reduction (+:r2) + #pragma omp taskgroup task_reduction (+:r2) allocate (r2) #pragma omp master taskloop simd \ private (p) firstprivate (f) lastprivate (l) shared (s) default(shared) grainsize (g) collapse(1) untied if(taskloop: i1) if(simd: i2) final(fi) mergeable priority (pp) \ safelen(8) simdlen(4) linear(ll: 1) aligned(q: 32) reduction(default, +:r) in_reduction(+:r2) nontemporal(ntm) \ - order(concurrent) + order(concurrent) allocate (f) for (int i = 0; i < 64; i++) ll++; #pragma omp parallel master taskloop \ private (p) firstprivate (f) lastprivate (l) shared (s) default(shared) grainsize (g) collapse(1) untied if(taskloop: i1) final(fi) mergeable priority (pp) \ - reduction(default, +:r) if (parallel: i2) num_threads (nth) proc_bind(spread) copyin(t) + reduction(default, +:r) if (parallel: i2) num_threads (nth) proc_bind(spread) copyin(t) allocate (f) for (int i = 0; i < 64; i++) ll++; #pragma omp parallel master taskloop simd \ private (p) firstprivate (f) lastprivate (l) shared (s) default(shared) grainsize (g) collapse(1) untied if(taskloop: i1) if(simd: i2) final(fi) mergeable priority (pp) \ safelen(8) simdlen(4) linear(ll: 1) aligned(q: 32) reduction(default, +:r) nontemporal(ntm) if (parallel: i2) num_threads (nth) proc_bind(spread) copyin(t) \ - order(concurrent) + order(concurrent) allocate (f) for (int i = 0; i < 64; i++) ll++; - #pragma omp taskgroup task_reduction (+:r2) + #pragma omp taskgroup task_reduction (+:r2) allocate (r2) #pragma omp master taskloop \ private (p) firstprivate (f) lastprivate (l) shared (s) default(shared) num_tasks (nta) collapse(1) untied if(i1) final(fi) mergeable priority (pp) \ reduction(default, +:r) in_reduction(+:r2) for (int i = 0; i < 64; i++) ll++; - #pragma omp taskgroup task_reduction (+:r2) + #pragma omp taskgroup task_reduction (+:r2) allocate (r2) #pragma omp master taskloop simd \ private (p) firstprivate (f) lastprivate (l) shared (s) default(shared) num_tasks (nta) collapse(1) untied if(i1) final(fi) mergeable priority (pp) \ safelen(8) simdlen(4) linear(ll: 1) aligned(q: 32) reduction(default, +:r) in_reduction(+:r2) nontemporal(ntm) \ - order(concurrent) + order(concurrent) allocate (f) for (int i = 0; i < 64; i++) ll++; #pragma omp parallel master taskloop \ private (p) firstprivate (f) lastprivate (l) shared (s) default(shared) num_tasks (nta) collapse(1) untied if(i1) final(fi) mergeable priority (pp) \ - reduction(default, +:r) num_threads (nth) proc_bind(spread) copyin(t) + reduction(default, +:r) num_threads (nth) proc_bind(spread) copyin(t) allocate (f) for (int i = 0; i < 64; i++) ll++; #pragma omp parallel master taskloop simd \ private (p) firstprivate (f) lastprivate (l) shared (s) default(shared) num_tasks (nta) collapse(1) untied if(i1) final(fi) mergeable priority (pp) \ safelen(8) simdlen(4) linear(ll: 1) aligned(q: 32) reduction(default, +:r) nontemporal(ntm) num_threads (nth) proc_bind(spread) copyin(t) \ - order(concurrent) + order(concurrent) allocate (f) for (int i = 0; i < 64; i++) ll++; #pragma omp loop bind(thread) order(concurrent) \ @@ -299,46 +327,50 @@ bar (int d, int m, int i1, int i2, int i3, int p, int *idp, int s, ll++; #pragma omp parallel loop \ private (p) firstprivate (f) if (parallel: i2) default(shared) shared(s) copyin(t) reduction(+:r) num_threads (nth) proc_bind(spread) \ - lastprivate (l) collapse(1) bind(parallel) order(concurrent) + lastprivate (l) collapse(1) bind(parallel) order(concurrent) allocate (f) for (l = 0; l < 64; l++) ll++; #pragma omp parallel loop \ private (p) firstprivate (f) if (parallel: i2) default(shared) shared(s) copyin(t) reduction(+:r) num_threads (nth) proc_bind(spread) \ - lastprivate (l) collapse(1) + lastprivate (l) collapse(1) allocate (f) for (l = 0; l < 64; l++) ll++; #pragma omp teams loop \ private(p) firstprivate (f) shared(s) default(shared) reduction(+:r) num_teams(nte) thread_limit(tl) \ - collapse(1) lastprivate (l) bind(teams) + collapse(1) lastprivate (l) bind(teams) allocate (f) for (l = 0; l < 64; ++l) ; #pragma omp teams loop \ private(p) firstprivate (f) shared(s) default(shared) reduction(+:r) num_teams(nte) thread_limit(tl) \ - collapse(1) lastprivate (l) order(concurrent) + collapse(1) lastprivate (l) order(concurrent) allocate (f) for (l = 0; l < 64; ++l) ; #pragma omp target parallel loop \ device(d) map (tofrom: m) if (target: i1) private (p) firstprivate (f) defaultmap(tofrom: scalar) is_device_ptr (idp) \ if (parallel: i2) default(shared) shared(s) reduction(+:r) num_threads (nth) proc_bind(spread) \ - nowait depend(inout: dd[0]) lastprivate (l) bind(parallel) order(concurrent) collapse(1) + nowait depend(inout: dd[0]) lastprivate (l) bind(parallel) order(concurrent) collapse(1) \ + allocate (omp_default_mem_alloc: f) for (l = 0; l < 64; ++l) ; #pragma omp target parallel loop \ device(d) map (tofrom: m) if (target: i1) private (p) firstprivate (f) defaultmap(tofrom: scalar) is_device_ptr (idp) \ if (parallel: i2) default(shared) shared(s) reduction(+:r) num_threads (nth) proc_bind(spread) \ - nowait depend(inout: dd[0]) lastprivate (l) order(concurrent) collapse(1) + nowait depend(inout: dd[0]) lastprivate (l) order(concurrent) collapse(1) \ + allocate (omp_default_mem_alloc: f) for (l = 0; l < 64; ++l) ; #pragma omp target teams loop \ device(d) map (tofrom: m) if (target: i1) private (p) firstprivate (f) defaultmap(tofrom: scalar) is_device_ptr (idp) \ shared(s) default(shared) reduction(+:r) num_teams(nte) thread_limit(tl) nowait depend(inout: dd[0]) \ - lastprivate (l) bind(teams) collapse(1) + lastprivate (l) bind(teams) collapse(1) \ + allocate (omp_default_mem_alloc: f) for (l = 0; l < 64; ++l) ; #pragma omp target teams loop \ device(d) map (tofrom: m) if (target: i1) private (p) firstprivate (f) defaultmap(tofrom: scalar) is_device_ptr (idp) \ shared(s) default(shared) reduction(+:r) num_teams(nte) thread_limit(tl) nowait depend(inout: dd[0]) \ - lastprivate (l) order(concurrent) collapse(1) + lastprivate (l) order(concurrent) collapse(1) \ + allocate (omp_default_mem_alloc: f) for (l = 0; l < 64; ++l) ; } diff --git a/gcc/testsuite/c-c++-common/gomp/clauses-2.c b/gcc/testsuite/c-c++-common/gomp/clauses-2.c index ded1d74..bbc8fb4 100644 --- a/gcc/testsuite/c-c++-common/gomp/clauses-2.c +++ b/gcc/testsuite/c-c++-common/gomp/clauses-2.c @@ -13,35 +13,35 @@ foo (int *p, int q, struct S t, int i, int j, int k, int l) bar (p); #pragma omp target map (p[0]) map (p) /* { dg-error "appears both in data and map clauses" } */ bar (p); - #pragma omp target map (p) , map (p[0]) /* { dg-error "appears both in data and map clauses" } */ + #pragma omp target map (p) , map (p[0]) bar (p); #pragma omp target map (q) map (q) /* { dg-error "appears more than once in map clauses" } */ bar (&q); #pragma omp target map (p[0]) map (p[0]) /* { dg-error "appears more than once in data clauses" } */ bar (p); - #pragma omp target map (t) map (t.r) /* { dg-error "appears more than once in map clauses" } */ + #pragma omp target map (t) map (t.r) bar (&t.r); - #pragma omp target map (t.r) map (t) /* { dg-error "appears more than once in map clauses" } */ + #pragma omp target map (t.r) map (t) bar (&t.r); - #pragma omp target map (t.r) map (t.r) /* { dg-error "appears more than once in map clauses" } */ + #pragma omp target map (t.r) map (t.r) bar (&t.r); #pragma omp target firstprivate (t), map (t.r) /* { dg-error "appears both in data and map clauses" } */ bar (&t.r); #pragma omp target map (t.r) firstprivate (t) /* { dg-error "appears both in data and map clauses" } */ bar (&t.r); - #pragma omp target map (t.s[0]) map (t) /* { dg-error "appears more than once in map clauses" } */ + #pragma omp target map (t.s[0]) map (t) bar (t.s); - #pragma omp target map (t) map(t.s[0]) /* { dg-error "appears more than once in map clauses" } */ + #pragma omp target map (t) map(t.s[0]) bar (t.s); #pragma omp target firstprivate (t) map (t.s[0]) /* { dg-error "appears both in data and map clauses" } */ bar (t.s); #pragma omp target map (t.s[0]) firstprivate (t) /* { dg-error "appears both in data and map clauses" } */ bar (t.s); - #pragma omp target map (t.s[0]) map (t.s[2]) /* { dg-error "appears more than once in map clauses" } */ + #pragma omp target map (t.s[0]) map (t.s[2]) bar (t.s); - #pragma omp target map (t.t[0:2]) map (t.t[4:6]) /* { dg-error "appears more than once in map clauses" } */ + #pragma omp target map (t.t[0:2]) map (t.t[4:6]) bar (t.t); - #pragma omp target map (t.t[i:j]) map (t.t[k:l]) /* { dg-error "appears more than once in map clauses" } */ + #pragma omp target map (t.t[i:j]) map (t.t[k:l]) bar (t.t); #pragma omp target map (t.s[0]) map (t.r) bar (t.s); @@ -50,5 +50,5 @@ foo (int *p, int q, struct S t, int i, int j, int k, int l) #pragma omp target map (t.r) map (t) map (t.s[0]) firstprivate (t) /* { dg-error "appears both in data and map clauses" } */ bar (t.s); #pragma omp target map (t) map (t.r) firstprivate (t) map (t.s[0]) /* { dg-error "appears both in data and map clauses" } */ - bar (t.s); /* { dg-error "appears more than once in map clauses" "" { target *-*-* } .-1 } */ + bar (t.s); } diff --git a/gcc/testsuite/c-c++-common/gomp/map-5.c b/gcc/testsuite/c-c++-common/gomp/map-5.c new file mode 100644 index 0000000..1d9d925 --- /dev/null +++ b/gcc/testsuite/c-c++-common/gomp/map-5.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-additional-options "-fdump-tree-gimple" } */ + +void foo (void) +{ + /* Basic test to ensure to,from,tofrom is ordered before alloc,release,delete clauses. */ + int a, b, c; + #pragma omp target enter data map(alloc:a) map(to:b) map(alloc:c) + #pragma omp target exit data map(from:a) map(release:b) map(from:c) + + #pragma omp target map(alloc:a) map(tofrom:b) map(alloc:c) + a = b = c = 1; + + #pragma omp target enter data map(to:a) map(alloc:b) map(to:c) + #pragma omp target exit data map(from:a) map(delete:b) map(from:c) +} + +/* { dg-final { scan-tree-dump "pragma omp target enter data map\\(to:.* map\\(alloc:.* map\\(alloc:.*" "gimple" } } */ +/* { dg-final { scan-tree-dump "pragma omp target exit data map\\(from:.* map\\(from:.* map\\(release:.*" "gimple" } } */ + +/* { dg-final { scan-tree-dump "pragma omp target num_teams.* map\\(tofrom:.* map\\(alloc:.* map\\(alloc:.*" "gimple" } } */ + +/* { dg-final { scan-tree-dump "pragma omp target enter data map\\(to:.* map\\(to:.* map\\(alloc:.*" "gimple" } } */ +/* { dg-final { scan-tree-dump "pragma omp target exit data map\\(from:.* map\\(from:.* map\\(delete:.*" "gimple" } } */ diff --git a/gcc/testsuite/c-c++-common/ident-0b.c b/gcc/testsuite/c-c++-common/ident-0b.c index 67b593c..b46d850 100644 --- a/gcc/testsuite/c-c++-common/ident-0b.c +++ b/gcc/testsuite/c-c++-common/ident-0b.c @@ -2,6 +2,7 @@ * Make sure scan-assembler-not turns off .ident unless -fident in testcase */ /* { dg-do compile } */ /* { dg-options "-fident" } */ +/* { dg-require-effective-target ident_directive }*/ /* { dg-skip-if "no assembler .ident support" { { hppa*-*-hpux* && { ! lp64 } } || powerpc*-*-darwin* } } */ int i; diff --git a/gcc/testsuite/c-c++-common/pr97164.c b/gcc/testsuite/c-c++-common/pr97164.c new file mode 100644 index 0000000..8ffb928 --- /dev/null +++ b/gcc/testsuite/c-c++-common/pr97164.c @@ -0,0 +1,15 @@ +/* PR tree-optimization/97164 */ +/* { dg-do compile } */ + +typedef struct { int *a; char b[64]; } A __attribute__((aligned (64))); +struct B { A d[4]; } b; /* { dg-error "size of array element is not a multiple of its alignment" } */ +void foo (void); + +int * +bar (void) +{ + struct B *h = &b; + if (h->d[1].a) + foo (); + return h->d[1].a; +} diff --git a/gcc/testsuite/c-c++-common/zero-scratch-regs-1.c b/gcc/testsuite/c-c++-common/zero-scratch-regs-1.c new file mode 100644 index 0000000..2463353 --- /dev/null +++ b/gcc/testsuite/c-c++-common/zero-scratch-regs-1.c @@ -0,0 +1,15 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -fzero-call-used-regs=skip" } */ + +volatile int result = 0; +int +__attribute__((noipa)) +foo (int x) +{ + return x; +} +int main() +{ + result = foo (2); + return 0; +} diff --git a/gcc/testsuite/c-c++-common/zero-scratch-regs-10.c b/gcc/testsuite/c-c++-common/zero-scratch-regs-10.c new file mode 100644 index 0000000..d63a57d --- /dev/null +++ b/gcc/testsuite/c-c++-common/zero-scratch-regs-10.c @@ -0,0 +1,93 @@ +/* { dg-do run } */ +/* { dg-skip-if "not implemented" { powerpc*-*-darwin* } } */ +/* { dg-options "-O2" } */ + +#include <assert.h> +int result = 0; + +int +__attribute__((noipa)) +__attribute__ ((zero_call_used_regs("skip"))) +foo1 (int x) +{ + return (x + 1); +} + +int +__attribute__((noipa)) +__attribute__ ((zero_call_used_regs("used-gpr-arg"))) +foo2 (int x) +{ + return (x + 2); +} + +int +__attribute__((noipa)) +__attribute__ ((zero_call_used_regs("used-gpr"))) +foo3 (int x) +{ + return (x + 3); +} + +int +__attribute__((noipa)) +__attribute__ ((zero_call_used_regs("used-arg"))) +foo4 (int x) +{ + return (x + 4); +} + +int +__attribute__((noipa)) +__attribute__ ((zero_call_used_regs("used"))) +foo5 (int x) +{ + return (x + 5); +} + +int +__attribute__((noipa)) +__attribute__ ((zero_call_used_regs("all-gpr-arg"))) +foo6 (int x) +{ + return (x + 6); +} + +int +__attribute__((noipa)) +__attribute__ ((zero_call_used_regs("all-gpr"))) +foo7 (int x) +{ + return (x + 7); +} + +int +__attribute__((noipa)) +__attribute__ ((zero_call_used_regs("all-arg"))) +foo8 (int x) +{ + return (x + 8); +} + +int +__attribute__((noipa)) +__attribute__ ((zero_call_used_regs("all"))) +foo9 (int x) +{ + return (x + 9); +} + +int main() +{ + result = foo1 (1); + result += foo2 (1); + result += foo3 (1); + result += foo4 (1); + result += foo5 (1); + result += foo6 (1); + result += foo7 (1); + result += foo8 (1); + result += foo9 (1); + assert (result == 54); + return 0; +} diff --git a/gcc/testsuite/c-c++-common/zero-scratch-regs-11.c b/gcc/testsuite/c-c++-common/zero-scratch-regs-11.c new file mode 100644 index 0000000..1d8cabb --- /dev/null +++ b/gcc/testsuite/c-c++-common/zero-scratch-regs-11.c @@ -0,0 +1,5 @@ +/* { dg-do run } */ +/* { dg-skip-if "not implemented" { powerpc*-*-darwin* } } */ +/* { dg-options "-O2 -fzero-call-used-regs=all" } */ + +#include "zero-scratch-regs-10.c" diff --git a/gcc/testsuite/c-c++-common/zero-scratch-regs-2.c b/gcc/testsuite/c-c++-common/zero-scratch-regs-2.c new file mode 100644 index 0000000..25891ac --- /dev/null +++ b/gcc/testsuite/c-c++-common/zero-scratch-regs-2.c @@ -0,0 +1,4 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -fzero-call-used-regs=used-gpr-arg" } */ + +#include "zero-scratch-regs-1.c" diff --git a/gcc/testsuite/c-c++-common/zero-scratch-regs-3.c b/gcc/testsuite/c-c++-common/zero-scratch-regs-3.c new file mode 100644 index 0000000..7c3d286 --- /dev/null +++ b/gcc/testsuite/c-c++-common/zero-scratch-regs-3.c @@ -0,0 +1,4 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -fzero-call-used-regs=used-gpr" } */ + +#include "zero-scratch-regs-1.c" diff --git a/gcc/testsuite/c-c++-common/zero-scratch-regs-4.c b/gcc/testsuite/c-c++-common/zero-scratch-regs-4.c new file mode 100644 index 0000000..ba28c06 --- /dev/null +++ b/gcc/testsuite/c-c++-common/zero-scratch-regs-4.c @@ -0,0 +1,4 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -fzero-call-used-regs=used-arg" } */ + +#include "zero-scratch-regs-1.c" diff --git a/gcc/testsuite/c-c++-common/zero-scratch-regs-5.c b/gcc/testsuite/c-c++-common/zero-scratch-regs-5.c new file mode 100644 index 0000000..26679a4 --- /dev/null +++ b/gcc/testsuite/c-c++-common/zero-scratch-regs-5.c @@ -0,0 +1,4 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -fzero-call-used-regs=used" } */ + +#include "zero-scratch-regs-1.c" diff --git a/gcc/testsuite/c-c++-common/zero-scratch-regs-6.c b/gcc/testsuite/c-c++-common/zero-scratch-regs-6.c new file mode 100644 index 0000000..80f5bbb --- /dev/null +++ b/gcc/testsuite/c-c++-common/zero-scratch-regs-6.c @@ -0,0 +1,4 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -fzero-call-used-regs=all-gpr-arg" } */ + +#include "zero-scratch-regs-1.c" diff --git a/gcc/testsuite/c-c++-common/zero-scratch-regs-7.c b/gcc/testsuite/c-c++-common/zero-scratch-regs-7.c new file mode 100644 index 0000000..159f35c --- /dev/null +++ b/gcc/testsuite/c-c++-common/zero-scratch-regs-7.c @@ -0,0 +1,4 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -fzero-call-used-regs=all-gpr" } */ + +#include "zero-scratch-regs-1.c" diff --git a/gcc/testsuite/c-c++-common/zero-scratch-regs-8.c b/gcc/testsuite/c-c++-common/zero-scratch-regs-8.c new file mode 100644 index 0000000..7fef0d2 --- /dev/null +++ b/gcc/testsuite/c-c++-common/zero-scratch-regs-8.c @@ -0,0 +1,5 @@ +/* { dg-do run } */ +/* { dg-skip-if "not implemented" { powerpc*-*-darwin* } } */ +/* { dg-options "-O2 -fzero-call-used-regs=all-arg" } */ + +#include "zero-scratch-regs-1.c" diff --git a/gcc/testsuite/c-c++-common/zero-scratch-regs-9.c b/gcc/testsuite/c-c++-common/zero-scratch-regs-9.c new file mode 100644 index 0000000..1561656 --- /dev/null +++ b/gcc/testsuite/c-c++-common/zero-scratch-regs-9.c @@ -0,0 +1,5 @@ +/* { dg-do run } */ +/* { dg-skip-if "not implemented" { powerpc*-*-darwin* } } */ +/* { dg-options "-O2 -fzero-call-used-regs=all" } */ + +#include "zero-scratch-regs-1.c" diff --git a/gcc/testsuite/c-c++-common/zero-scratch-regs-attr-usages.c b/gcc/testsuite/c-c++-common/zero-scratch-regs-attr-usages.c new file mode 100644 index 0000000..1e75795 --- /dev/null +++ b/gcc/testsuite/c-c++-common/zero-scratch-regs-attr-usages.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +int result __attribute__ ((zero_call_used_regs("all"))); /* { dg-error "attribute applies only to functions" } */ +int +__attribute__ ((zero_call_used_regs("gpr-arg-all"))) +foo1 (int x) /* { dg-error "unrecognized 'zero_call_used_regs' attribute argument" } */ +{ + return (x + 1); +} +int +__attribute__ ((zero_call_used_regs(1))) +foo2 (int x) /* { dg-error "argument not a string" } */ +{ + return (x + 2); +} diff --git a/gcc/testsuite/g++.dg/DRs/dr2303.C b/gcc/testsuite/g++.dg/DRs/dr2303.C new file mode 100644 index 0000000..b6acb6e --- /dev/null +++ b/gcc/testsuite/g++.dg/DRs/dr2303.C @@ -0,0 +1,37 @@ +// DR 2303 +// PR c++/97453 +// { dg-do compile { target c++11 } } + +template <typename... T> struct A; +template <> struct A<> +{ +}; +template <typename T, typename... Ts> struct A<T, Ts...> : A<Ts...> +{ +}; +struct B : A<int, int> +{ +}; + +struct C : A<int, int>, A<int> // { dg-warning "direct base .A<int>. inaccessible in .C. due to ambiguity" } +{ +}; + +struct D : A<int>, A<int, int> // { dg-warning "direct base .A<int>. inaccessible in .D. due to ambiguity" } +{ +}; +template <typename... T> +void +f (const A<T...> &) +{ + static_assert (sizeof...(T) == 2, "it should duduce to A<int,int>"); +} + + +void +g () +{ + f (B{}); + f (C{}); + f (D{}); +} diff --git a/gcc/testsuite/g++.dg/DRs/dr625.C b/gcc/testsuite/g++.dg/DRs/dr625.C new file mode 100644 index 0000000..ce30a92 --- /dev/null +++ b/gcc/testsuite/g++.dg/DRs/dr625.C @@ -0,0 +1,15 @@ +// DR 625 - Use of auto as a template-argument +// PR c++/97479 +// { dg-do compile { target c++14 } } + +template<typename> +struct A { }; + +void f(int); + +int main() +{ + A<decltype(auto)> x = A<void>(); // { dg-error "not permitted|invalid|cannot convert" } + A<auto> a = A<void>(); // { dg-error "not permitted|invalid|cannot convert" } + void (*p)(auto); // { dg-error "parameter" } +} diff --git a/gcc/testsuite/g++.dg/Wclass-memaccess.C b/gcc/testsuite/g++.dg/Wclass-memaccess.C index 57573b3..1dc23df 100644 --- a/gcc/testsuite/g++.dg/Wclass-memaccess.C +++ b/gcc/testsuite/g++.dg/Wclass-memaccess.C @@ -23,6 +23,10 @@ typedef unsigned char byte; #endif } +#if __cplusplus < 201103L +typedef unsigned short char16_t; +#endif + /* Ordinary bzcopy and bzero aren't recognized as special. */ #define bcopy __builtin_bcopy #define bzero __builtin_bzero @@ -190,6 +194,7 @@ struct HasDefault { char a[4]; HasDefault (); }; void test (HasDefault *p, const HasDefault &x, void *q, const unsigned char *s, const std::byte *b, + const signed char *ss, const char16_t *ws, const int ia[]) { const int i = *ia; @@ -247,6 +252,8 @@ void test (HasDefault *p, const HasDefault &x, T (memcpy, (p, ia, sizeof *p)); // { dg-warning ".void\\* memcpy(\[^\n\r\]*). copying an object of non-trivial type .struct HasDefault. from an array of .const int." } extern long *ip; T (memcpy, (p, ip, sizeof *p)); // { dg-warning ".void\\* memcpy(\[^\n\r\]*). copying an object of non-trivial type .struct HasDefault. from an array of .long." } + T (memcpy, (p, ss, sizeof *p)); // { dg-warning ".void\\* memcpy(\[^\n\r\]*). copying an object of non-trivial type .struct HasDefault. from an array of .const signed char." } + T (memcpy, (p, ws, sizeof *p)); // { dg-warning ".void\\* memcpy(\[^\n\r\]*). copying an object of non-trivial type .struct HasDefault. from an array of .const \(char16_t\|unsigned short\)." } T (memmove, (p, ia, sizeof *p)); // { dg-warning ".void\\* memmove(\[^\n\r\]*). copying an object of non-trivial type .struct HasDefault. from an array of .const int." } @@ -274,6 +281,7 @@ struct HasTemplateDefault void test (HasTemplateDefault *p, const HasTemplateDefault &x, const void *q, const unsigned char *s, const std::byte *b, + const signed char *ss, const char16_t *ws, const int ia[]) { const int i = *ia; @@ -291,24 +299,32 @@ void test (HasTemplateDefault *p, const HasTemplateDefault &x, T (bcopy, (q, p, sizeof *p)); T (bcopy, (s, p, sizeof *p)); T (bcopy, (b, p, sizeof *p)); + T (bcopy, (ss, p, sizeof *p)); // { dg-warning "bcopy" } + T (bcopy, (ws, p, sizeof *p)); // { dg-warning "bcopy" } T (bcopy, (ia, p, sizeof *p)); // { dg-warning "bcopy" } T (memcpy, (p, &x, sizeof *p)); T (memcpy, (p, q, sizeof *p)); T (memcpy, (p, s, sizeof *p)); T (memcpy, (p, b, sizeof *p)); + T (memcpy, (p, ss, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ws, sizeof *p)); // { dg-warning "memcpy" } T (memcpy, (p, ia, sizeof *p)); // { dg-warning "memcpy" } T (memmove, (p, &x, sizeof *p)); T (memmove, (p, q, sizeof *p)); T (memmove, (p, s, sizeof *p)); T (memmove, (p, b, sizeof *p)); + T (memmove, (p, ss, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ws, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, ia, sizeof *p)); // { dg-warning "memmove" } T (mempcpy, (p, &x, sizeof *p)); T (mempcpy, (p, q, sizeof *p)); T (mempcpy, (p, s, sizeof *p)); T (mempcpy, (p, b, sizeof *p)); + T (mempcpy, (p, ss, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ws, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, ia, sizeof *p)); // { dg-warning "mempcpy" } // Reallocating is the same as calling memcpy. @@ -329,6 +345,7 @@ struct HasCopy { int i; HasCopy (const HasCopy&); }; void test (HasCopy *p, const HasCopy &x, const void *q, const unsigned char *s, const std::byte *b, + const signed char *ss, const char16_t *ws, const int ia[]) { const int i = *ia; @@ -348,24 +365,32 @@ void test (HasCopy *p, const HasCopy &x, T (bcopy, (q, p, sizeof *p)); // { dg-warning "bcopy" } T (bcopy, (s, p, sizeof *p)); // { dg-warning "bcopy" } T (bcopy, (b, p, sizeof *p)); // { dg-warning "bcopy" } + T (bcopy, (ss, p, sizeof *p)); // { dg-warning "bcopy" } + T (bcopy, (ws, p, sizeof *p)); // { dg-warning "bcopy" } T (bcopy, (ia, p, sizeof *p)); // { dg-warning "bcopy" } T (memcpy, (p, &x, sizeof *p)); // { dg-warning "memcpy" } T (memcpy, (p, q, sizeof *p)); // { dg-warning "memcpy" } T (memcpy, (p, s, sizeof *p)); // { dg-warning "memcpy" } T (memcpy, (p, b, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ss, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ws, sizeof *p)); // { dg-warning "memcpy" } T (memcpy, (p, ia, sizeof *p)); // { dg-warning "memcpy" } T (memmove, (p, &x, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, q, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, s, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, b, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ss, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ws, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, ia, sizeof *p)); // { dg-warning "memmove" } T (mempcpy, (p, &x, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, q, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, s, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, b, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ss, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ws, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, ia, sizeof *p)); // { dg-warning "mempcpy" } // Reallocating is the same as calling memcpy. @@ -410,6 +435,7 @@ private: void test (HasPrivateCopy *p, const HasPrivateCopy &x, const void *q, const unsigned char *s, const std::byte *b, + const signed char *ss, const char16_t *ws, const int ia[]) { const int i = *ia; @@ -429,18 +455,24 @@ void test (HasPrivateCopy *p, const HasPrivateCopy &x, T (memcpy, (p, q, sizeof *p)); // { dg-warning "memcpy" } T (memcpy, (p, s, sizeof *p)); // { dg-warning "memcpy" } T (memcpy, (p, b, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ss, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ws, sizeof *p)); // { dg-warning "memcpy" } T (memcpy, (p, ia, sizeof *p)); // { dg-warning "memcpy" } T (memmove, (p, &x, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, q, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, s, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, b, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ss, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ws, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, ia, sizeof *p)); // { dg-warning "memmove" } T (mempcpy, (p, &x, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, q, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, s, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, b, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ss, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ws, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, ia, sizeof *p)); // { dg-warning "mempcpy" } // Reallocating is the same as calling memcpy. @@ -459,6 +491,7 @@ struct HasDtor { int i; ~HasDtor (); }; void test (HasDtor *p, const HasDtor &x, const void *q, const unsigned char *s, const std::byte *b, + const signed char *ss, const char16_t *ws, const int ia[]) { const int i = *ia; @@ -479,18 +512,24 @@ void test (HasDtor *p, const HasDtor &x, T (memcpy, (p, q, sizeof *p)); // { dg-warning "memcpy" } T (memcpy, (p, s, sizeof *p)); // { dg-warning "memcpy" } T (memcpy, (p, b, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ss, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ws, sizeof *p)); // { dg-warning "memcpy" } T (memcpy, (p, ia, sizeof *p)); // { dg-warning "memcpy" } T (memmove, (p, &x, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, q, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, s, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, b, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ss, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ws, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, ia, sizeof *p)); // { dg-warning "memmove" } T (mempcpy, (p, &x, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, q, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, s, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, b, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ss, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ws, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, ia, sizeof *p)); // { dg-warning "mempcpy" } // Reallocating is the same as calling memcpy. @@ -503,7 +542,7 @@ void test (HasDtor *p, const HasDtor &x, #if !defined TEST || TEST == TEST_HAS_DELETED_DTOR -// HasDeletedDtor is trivial so clearing and cpying it is okay. +// HasDeletedDtor is trivial so clearing and copying it is okay. // Relocation would bypass the deleted dtor and so it's diagnosed. struct HasDeletedDtor @@ -514,6 +553,7 @@ struct HasDeletedDtor void test (HasDeletedDtor *p, const HasDeletedDtor &x, const void *q, const unsigned char *s, const std::byte *b, + const signed char *ss, const char16_t *ws, const int ia[]) { const int i = *ia; @@ -528,18 +568,24 @@ void test (HasDeletedDtor *p, const HasDeletedDtor &x, T (memcpy, (p, q, sizeof *p)); T (memcpy, (p, s, sizeof *p)); T (memcpy, (p, b, sizeof *p)); + T (memcpy, (p, ss, sizeof *p)); + T (memcpy, (p, ws, sizeof *p)); T (memcpy, (p, ia, sizeof *p)); T (memmove, (p, &x, sizeof *p)); T (memmove, (p, q, sizeof *p)); T (memmove, (p, s, sizeof *p)); T (memmove, (p, b, sizeof *p)); + T (memmove, (p, ss, sizeof *p)); + T (memmove, (p, ws, sizeof *p)); T (memmove, (p, ia, sizeof *p)); T (mempcpy, (p, &x, sizeof *p)); T (mempcpy, (p, q, sizeof *p)); T (mempcpy, (p, s, sizeof *p)); T (mempcpy, (p, b, sizeof *p)); + T (mempcpy, (p, ss, sizeof *p)); + T (mempcpy, (p, ws, sizeof *p)); T (mempcpy, (p, ia, sizeof *p)); // Reallocating is diagnosed. @@ -564,6 +610,7 @@ private: void test (HasPrivateDtor *p, const HasPrivateDtor &x, const void *q, const unsigned char *s, const std::byte *b, + const signed char *ss, const char16_t *ws, const int ia[]) { const int i = *ia; @@ -578,18 +625,24 @@ void test (HasPrivateDtor *p, const HasPrivateDtor &x, T (memcpy, (p, q, sizeof *p)); // { dg-warning "memcpy" } T (memcpy, (p, s, sizeof *p)); // { dg-warning "memcpy" } T (memcpy, (p, b, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ss, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ws, sizeof *p)); // { dg-warning "memcpy" } T (memcpy, (p, ia, sizeof *p)); // { dg-warning "memcpy" } T (memmove, (p, &x, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, q, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, s, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, b, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ss, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ws, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, ia, sizeof *p)); // { dg-warning "memmove" } T (mempcpy, (p, &x, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, q, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, s, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, b, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ss, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ws, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, ia, sizeof *p)); // { dg-warning "mempcpy" } // Reallocating is diagnosed. @@ -608,6 +661,7 @@ struct HasCopyAssign { void operator= (HasCopyAssign&); }; void test (HasCopyAssign *p, const HasCopyAssign &x, const void *q, const unsigned char *s, const std::byte *b, + const signed char *ss, const char16_t *ws, const int ia[]) { const int i = *ia; @@ -626,18 +680,24 @@ void test (HasCopyAssign *p, const HasCopyAssign &x, T (memcpy, (p, q, sizeof *p)); // { dg-warning "memcpy" } T (memcpy, (p, s, sizeof *p)); // { dg-warning "memcpy" } T (memcpy, (p, b, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ss, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ws, sizeof *p)); // { dg-warning "memcpy" } T (memcpy, (p, ia, sizeof *p)); // { dg-warning "memcpy" } T (memmove, (p, &x, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, q, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, s, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, b, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ss, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ws, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, ia, sizeof *p)); // { dg-warning "memmove" } T (mempcpy, (p, &x, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, q, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, s, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, b, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ss, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ws, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, ia, sizeof *p)); // { dg-warning "mempcpy" } // Reallocating is the same as calling memcpy. @@ -665,6 +725,7 @@ struct HasMoveAssign void test (HasMoveAssign *p, const HasMoveAssign &x, const void *q, const unsigned char *s, const std::byte *b, + const signed char *ss, const char16_t *ws, const int ia[]) { const int i = *ia; @@ -683,18 +744,24 @@ void test (HasMoveAssign *p, const HasMoveAssign &x, T (memcpy, (p, q, sizeof *p)); // { dg-warning "memcpy" } T (memcpy, (p, s, sizeof *p)); // { dg-warning "memcpy" } T (memcpy, (p, b, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ss, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ws, sizeof *p)); // { dg-warning "memcpy" } T (memcpy, (p, ia, sizeof *p)); // { dg-warning "memcpy" } T (memmove, (p, &x, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, q, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, s, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, b, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ss, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ws, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, ia, sizeof *p)); // { dg-warning "memmove" } T (mempcpy, (p, &x, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, q, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, s, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, b, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ss, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ws, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, ia, sizeof *p)); // { dg-warning "mempcpy" } // Reallocating is the same as calling memcpy. @@ -727,6 +794,7 @@ struct TrivialCopyHasMoveAssign void test (TrivialCopyHasMoveAssign *p, const TrivialCopyHasMoveAssign &x, const void *q, const unsigned char *s, const std::byte *b, + const signed char *ss, const char16_t *ws, const int ia[]) { const int i = *ia; @@ -745,18 +813,24 @@ void test (TrivialCopyHasMoveAssign *p, const TrivialCopyHasMoveAssign &x, T (memcpy, (p, q, sizeof *p)); // { dg-warning "memcpy" } T (memcpy, (p, s, sizeof *p)); // { dg-warning "memcpy" } T (memcpy, (p, b, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ss, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ws, sizeof *p)); // { dg-warning "memcpy" } T (memcpy, (p, ia, sizeof *p)); // { dg-warning "memcpy" } T (memmove, (p, &x, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, q, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, s, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, b, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ss, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ws, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, ia, sizeof *p)); // { dg-warning "memmove" } T (mempcpy, (p, &x, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, q, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, s, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, b, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ss, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ws, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, ia, sizeof *p)); // { dg-warning "mempcpy" } // Reallocating is the same as calling memcpy. @@ -786,6 +860,7 @@ struct TrivialMoveNontrivialCopyAssign void test (TrivialMoveNontrivialCopyAssign *p, const TrivialMoveNontrivialCopyAssign &x, const void *q, const unsigned char *s, const std::byte *b, + const signed char *ss, const char16_t *ws, const int ia[]) { const int i = *ia; @@ -804,18 +879,24 @@ void test (TrivialMoveNontrivialCopyAssign *p, T (memcpy, (p, q, sizeof *p)); // { dg-warning "memcpy" } T (memcpy, (p, s, sizeof *p)); // { dg-warning "memcpy" } T (memcpy, (p, b, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ss, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ws, sizeof *p)); // { dg-warning "memcpy" } T (memcpy, (p, ia, sizeof *p)); // { dg-warning "memcpy" } T (memmove, (p, &x, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, q, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, s, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, b, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ss, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ws, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, ia, sizeof *p)); // { dg-warning "memmove" } T (mempcpy, (p, &x, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, q, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, s, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, b, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ss, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ws, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, ia, sizeof *p)); // { dg-warning "mempcpy" } // Reallocating is the same as calling memcpy. @@ -841,6 +922,7 @@ struct TrivialAssignRefOverload { void test (TrivialAssignRefOverload *p, const TrivialAssignRefOverload &x, const void *q, const unsigned char *s, const std::byte *b, + const signed char *ss, const char16_t *ws, const int ia[]) { const int i = *ia; @@ -855,18 +937,24 @@ void test (TrivialAssignRefOverload *p, const TrivialAssignRefOverload &x, T (memcpy, (p, q, sizeof *p)); T (memcpy, (p, s, sizeof *p)); T (memcpy, (p, b, sizeof *p)); + T (memcpy, (p, ss, sizeof *p)); + T (memcpy, (p, ws, sizeof *p)); T (memcpy, (p, ia, sizeof *p)); T (memmove, (p, &x, sizeof *p)); T (memmove, (p, q, sizeof *p)); T (memmove, (p, s, sizeof *p)); T (memmove, (p, b, sizeof *p)); + T (memmove, (p, ss, sizeof *p)); + T (memmove, (p, ws, sizeof *p)); T (memmove, (p, ia, sizeof *p)); T (mempcpy, (p, &x, sizeof *p)); T (mempcpy, (p, q, sizeof *p)); T (mempcpy, (p, s, sizeof *p)); T (mempcpy, (p, b, sizeof *p)); + T (mempcpy, (p, ss, sizeof *p)); + T (mempcpy, (p, ws, sizeof *p)); T (mempcpy, (p, ia, sizeof *p)); T (q = realloc, (p, 1)); @@ -892,6 +980,7 @@ struct TrivialAssignCstRefOverload { void test (TrivialAssignCstRefOverload *p, const TrivialAssignCstRefOverload &x, const void *q, const unsigned char *s, std::byte *b, + const signed char *ss, const char16_t *ws, const int ia[]) { const int i = *ia; @@ -906,18 +995,24 @@ void test (TrivialAssignCstRefOverload *p, T (memcpy, (p, q, sizeof *p)); T (memcpy, (p, s, sizeof *p)); T (memcpy, (p, b, sizeof *p)); + T (memcpy, (p, ss, sizeof *p)); + T (memcpy, (p, ws, sizeof *p)); T (memcpy, (p, ia, sizeof *p)); T (memmove, (p, &x, sizeof *p)); T (memmove, (p, q, sizeof *p)); T (memmove, (p, s, sizeof *p)); T (memmove, (p, b, sizeof *p)); + T (memmove, (p, ss, sizeof *p)); + T (memmove, (p, ws, sizeof *p)); T (memmove, (p, ia, sizeof *p)); T (mempcpy, (p, &x, sizeof *p)); T (mempcpy, (p, q, sizeof *p)); T (mempcpy, (p, s, sizeof *p)); T (mempcpy, (p, b, sizeof *p)); + T (mempcpy, (p, ss, sizeof *p)); + T (mempcpy, (p, ws, sizeof *p)); T (mempcpy, (p, ia, sizeof *p)); T (q = realloc, (p, 1)); @@ -940,6 +1035,7 @@ struct TrivialRefHasVolRefAssign void test (TrivialRefHasVolRefAssign *p, const TrivialRefHasVolRefAssign &x, const void *q, const unsigned char *s, const std::byte *b, + const signed char *ss, const char16_t *ws, const int ia[]) { const int i = *ia; @@ -958,18 +1054,24 @@ void test (TrivialRefHasVolRefAssign *p, T (memcpy, (p, q, sizeof *p)); // { dg-warning "memcpy" } T (memcpy, (p, s, sizeof *p)); // { dg-warning "memcpy" } T (memcpy, (p, b, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ss, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ws, sizeof *p)); // { dg-warning "memcpy" } T (memcpy, (p, ia, sizeof *p)); // { dg-warning "memcpy" } T (memmove, (p, &x, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, q, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, s, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, b, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ss, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ws, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, ia, sizeof *p)); // { dg-warning "memmove" } T (mempcpy, (p, &x, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, q, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, s, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, b, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ss, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ws, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, ia, sizeof *p)); // { dg-warning "mempcpy" } // Reallocating is the same as calling memcpy. @@ -991,6 +1093,7 @@ struct HasVolRefAssign { void test (HasVolRefAssign *p, const HasVolRefAssign &x, const void *q, const unsigned char *s, const std::byte *b, + const signed char *ss, const char16_t *ws, const int ia[]) { const int i = *ia; @@ -1009,18 +1112,24 @@ void test (HasVolRefAssign *p, const HasVolRefAssign &x, T (memcpy, (p, q, sizeof *p)); // { dg-warning "memcpy" } T (memcpy, (p, s, sizeof *p)); // { dg-warning "memcpy" } T (memcpy, (p, b, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ss, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ws, sizeof *p)); // { dg-warning "memcpy" } T (memcpy, (p, ia, sizeof *p)); // { dg-warning "memcpy" } T (memmove, (p, &x, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, q, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, s, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, b, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ss, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ws, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, ia, sizeof *p)); // { dg-warning "memmove" } T (mempcpy, (p, &x, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, q, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, s, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, b, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ss, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ws, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, ia, sizeof *p)); // { dg-warning "mempcpy" } // Reallocating is the same as calling memcpy. @@ -1040,6 +1149,7 @@ struct HasVirtuals { int i; virtual void foo (); }; void test (HasVirtuals *p, const HasVirtuals &x, const void *q, const unsigned char *s, const std::byte *b, + const signed char *ss, const char16_t *ws, const int ia[]) { const int i = *ia; @@ -1057,18 +1167,24 @@ void test (HasVirtuals *p, const HasVirtuals &x, T (memcpy, (p, q, sizeof *p)); // { dg-warning "memcpy" } T (memcpy, (p, s, sizeof *p)); // { dg-warning "memcpy" } T (memcpy, (p, b, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ss, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ws, sizeof *p)); // { dg-warning "memcpy" } T (memcpy, (p, ia, sizeof *p)); // { dg-warning "memcpy" } T (memmove, (p, &x, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, q, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, s, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, b, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ss, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ws, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, ia, sizeof *p)); // { dg-warning "memmove" } T (mempcpy, (p, &x, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, q, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, s, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, b, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ss, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ws, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, ia, sizeof *p)); // { dg-warning "mempcpy" } // Reallocating is the same as calling memcpy. @@ -1089,6 +1205,7 @@ struct HasConstData { const char a[4]; }; void test (HasConstData *p, const HasConstData &x, const void *q, const unsigned char *s, const std::byte *b, + const signed char *ss, const char16_t *ws, const int ia[]) { const int i = *ia; @@ -1115,18 +1232,24 @@ void test (HasConstData *p, const HasConstData &x, T (memcpy, (p, q, sizeof *p)); // { dg-warning "memcpy" } T (memcpy, (p, s, sizeof *p)); // { dg-warning "memcpy" } T (memcpy, (p, b, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ss, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ws, sizeof *p)); // { dg-warning "memcpy" } T (memcpy, (p, ia, sizeof *p)); // { dg-warning "memcpy" } T (memmove, (p, &x, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, q, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, s, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, b, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ss, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ws, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, ia, sizeof *p)); // { dg-warning "memmove" } T (mempcpy, (p, &x, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, q, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, s, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, b, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ss, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ws, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, ia, sizeof *p)); // { dg-warning "mempcpy" } // Reallocating is not diagnosed except in C++ 98 due to a bug. @@ -1147,6 +1270,7 @@ struct HasReference { int &ci; }; void test (HasReference *p, const HasReference &x, const void *q, const unsigned char *s, const std::byte *b, + const signed char *ss, const char16_t *ws, const int ia[]) { const int i = *ia; @@ -1181,6 +1305,10 @@ void test (HasReference *p, const HasReference &x, T (memcpy, (p, s, n)); // { dg-warning "memcpy" } T (memcpy, (p, b, sizeof *p)); // { dg-warning "memcpy" } T (memcpy, (p, b, n)); // { dg-warning "memcpy" } + T (memcpy, (p, ss, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ss, n)); // { dg-warning "memcpy" } + T (memcpy, (p, ws, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ws, n)); // { dg-warning "memcpy" } T (memcpy, (p, ia, sizeof *p)); // { dg-warning "memcpy" } T (memcpy, (p, ia, n)); // { dg-warning "memcpy" } @@ -1188,12 +1316,16 @@ void test (HasReference *p, const HasReference &x, T (memmove, (p, q, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, s, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, b, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ss, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ws, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, ia, sizeof *p)); // { dg-warning "memmove" } T (mempcpy, (p, &x, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, q, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, s, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, b, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ss, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ws, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, ia, sizeof *p)); // { dg-warning "mempcpy" } // Reallocating is not diagnosed because a type with a reference @@ -1218,6 +1350,7 @@ struct HasMemDataPtr { int HasMemDataPtr::*p; }; void test (HasMemDataPtr *p, const HasMemDataPtr &x, const void *q, const unsigned char *s, const std::byte *b, + const signed char *ss, const char16_t *ws, const int ia[]) { const int i = *ia; @@ -1243,6 +1376,10 @@ void test (HasMemDataPtr *p, const HasMemDataPtr &x, T (memcpy, (p, s, n)); T (memcpy, (p, b, sizeof *p)); T (memcpy, (p, b, n)); + T (memcpy, (p, ss, sizeof *p)); + T (memcpy, (p, ss, n)); + T (memcpy, (p, ws, sizeof *p)); + T (memcpy, (p, ws, n)); T (memcpy, (p, ia, sizeof *p)); T (memcpy, (p, ia, n)); @@ -1250,12 +1387,16 @@ void test (HasMemDataPtr *p, const HasMemDataPtr &x, T (memmove, (p, q, sizeof *p)); T (memmove, (p, s, sizeof *p)); T (memmove, (p, b, sizeof *p)); + T (memmove, (p, ss, sizeof *p)); + T (memmove, (p, ws, sizeof *p)); T (memmove, (p, ia, sizeof *p)); T (mempcpy, (p, &x, sizeof *p)); T (mempcpy, (p, q, sizeof *p)); T (mempcpy, (p, s, sizeof *p)); T (mempcpy, (p, b, sizeof *p)); + T (mempcpy, (p, ss, sizeof *p)); + T (mempcpy, (p, ws, sizeof *p)); T (mempcpy, (p, ia, sizeof *p)); // Reallocating is the same as calling memcpy. @@ -1276,6 +1417,7 @@ struct HasSomePrivateData { char a[2]; private: char b[2]; }; void test (HasSomePrivateData *p, const HasSomePrivateData &x, const void *q, const unsigned char *s, const std::byte *b, + const signed char *ss, const char16_t *ws, const int ia[]) { const int i = *ia; @@ -1298,6 +1440,10 @@ void test (HasSomePrivateData *p, const HasSomePrivateData &x, T (memcpy, (p, q, sizeof *p)); T (memcpy, (p, s, sizeof *p)); T (memcpy, (p, b, sizeof *p)); + T (memcpy, (p, ss, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ss, n)); // { dg-warning "memcpy" } + T (memcpy, (p, ws, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ws, n)); // { dg-warning "memcpy" } T (memcpy, (p, ia, sizeof *p)); // { dg-warning "memcpy" } T (memcpy, (p, ia, n)); // { dg-warning "memcpy" } @@ -1307,6 +1453,10 @@ void test (HasSomePrivateData *p, const HasSomePrivateData &x, T (memmove, (p, q, sizeof *p)); T (memmove, (p, s, sizeof *p)); T (memmove, (p, b, sizeof *p)); + T (memmove, (p, ss, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ss, n)); // { dg-warning "memmove" } + T (memmove, (p, ws, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ws, n)); // { dg-warning "memmove" } T (memmove, (p, ia, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, ia, n)); // { dg-warning "memmove" } @@ -1319,6 +1469,10 @@ void test (HasSomePrivateData *p, const HasSomePrivateData &x, T (mempcpy, (p, s, n)); T (mempcpy, (p, b, sizeof *p)); T (mempcpy, (p, b, n)); + T (mempcpy, (p, ss, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ss, n)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ws, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ws, n)); // { dg-warning "mempcpy" } T (mempcpy, (p, ia, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, ia, n)); // { dg-warning "mempcpy" } @@ -1342,6 +1496,7 @@ struct HasSomeProtectedData { char a[2]; protected: char b[2]; }; void test (HasSomeProtectedData *p, const HasSomeProtectedData &x, const void *q, const unsigned char *s, const std::byte *b, + const signed char *ss, const char16_t *ws, const int ia[]) { const int i = *ia; @@ -1364,6 +1519,10 @@ void test (HasSomeProtectedData *p, const HasSomeProtectedData &x, T (memcpy, (p, q, sizeof *p)); T (memcpy, (p, s, sizeof *p)); T (memcpy, (p, b, sizeof *p)); + T (memcpy, (p, ss, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ss, n)); // { dg-warning "memcpy" } + T (memcpy, (p, ws, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ws, n)); // { dg-warning "memcpy" } T (memcpy, (p, ia, sizeof *p)); // { dg-warning "memcpy" } T (memcpy, (p, ia, n)); // { dg-warning "memcpy" } @@ -1373,6 +1532,10 @@ void test (HasSomeProtectedData *p, const HasSomeProtectedData &x, T (memmove, (p, q, sizeof *p)); T (memmove, (p, s, sizeof *p)); T (memmove, (p, b, sizeof *p)); + T (memmove, (p, ss, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ss, n)); // { dg-warning "memmove" } + T (memmove, (p, ws, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ws, n)); // { dg-warning "memmove" } T (memmove, (p, ia, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, ia, n)); // { dg-warning "memmove" } @@ -1385,6 +1548,10 @@ void test (HasSomeProtectedData *p, const HasSomeProtectedData &x, T (mempcpy, (p, s, n)); T (mempcpy, (p, b, sizeof *p)); T (mempcpy, (p, b, n)); + T (mempcpy, (p, ss, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ss, n)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ws, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ws, n)); // { dg-warning "mempcpy" } T (mempcpy, (p, ia, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, ia, n)); // { dg-warning "mempcpy" } @@ -1408,6 +1575,7 @@ struct HasAllPrivateData { private: char a[4]; }; void test (HasAllPrivateData *p, const HasAllPrivateData &x, const void *q, const unsigned char *s, const std::byte *b, + const signed char *ss, const char16_t *ws, const int ia[]) { const int i = *ia; @@ -1430,6 +1598,10 @@ void test (HasAllPrivateData *p, const HasAllPrivateData &x, T (memcpy, (p, q, sizeof *p)); T (memcpy, (p, s, sizeof *p)); T (memcpy, (p, b, sizeof *p)); + T (memcpy, (p, ss, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ss, n)); // { dg-warning "memcpy" } + T (memcpy, (p, ws, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ws, n)); // { dg-warning "memcpy" } T (memcpy, (p, ia, sizeof *p)); // { dg-warning "memcpy" } T (memcpy, (p, ia, n)); // { dg-warning "memcpy" } @@ -1439,6 +1611,10 @@ void test (HasAllPrivateData *p, const HasAllPrivateData &x, T (memmove, (p, q, sizeof *p)); T (memmove, (p, s, sizeof *p)); T (memmove, (p, b, sizeof *p)); + T (memmove, (p, ss, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ss, n)); // { dg-warning "memmove" } + T (memmove, (p, ws, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ws, n)); // { dg-warning "memmove" } T (memmove, (p, ia, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, ia, n)); // { dg-warning "memmove" } @@ -1451,6 +1627,10 @@ void test (HasAllPrivateData *p, const HasAllPrivateData &x, T (mempcpy, (p, s, n)); T (mempcpy, (p, b, sizeof *p)); T (mempcpy, (p, b, n)); + T (mempcpy, (p, ss, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ss, n)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ws, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ws, n)); // { dg-warning "mempcpy" } T (mempcpy, (p, ia, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, ia, n)); // { dg-warning "mempcpy" } @@ -1474,6 +1654,7 @@ struct HasAllProtectedData { protected: char a[4]; }; void test (HasAllProtectedData *p, const HasAllProtectedData &x, const void *q, const unsigned char *s, const std::byte *b, + const signed char *ss, const char16_t *ws, const int ia[]) { const int i = *ia; @@ -1496,6 +1677,10 @@ void test (HasAllProtectedData *p, const HasAllProtectedData &x, T (memcpy, (p, q, sizeof *p)); T (memcpy, (p, s, sizeof *p)); T (memcpy, (p, b, sizeof *p)); + T (memcpy, (p, ss, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ss, n)); // { dg-warning "memcpy" } + T (memcpy, (p, ws, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ws, n)); // { dg-warning "memcpy" } T (memcpy, (p, ia, sizeof *p)); // { dg-warning "memcpy" } T (memcpy, (p, ia, n)); // { dg-warning "memcpy" } @@ -1505,6 +1690,10 @@ void test (HasAllProtectedData *p, const HasAllProtectedData &x, T (memmove, (p, q, sizeof *p)); T (memmove, (p, s, sizeof *p)); T (memmove, (p, b, sizeof *p)); + T (memmove, (p, ss, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ss, n)); // { dg-warning "memmove" } + T (memmove, (p, ws, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ws, n)); // { dg-warning "memmove" } T (memmove, (p, ia, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, ia, n)); // { dg-warning "memmove" } @@ -1517,6 +1706,10 @@ void test (HasAllProtectedData *p, const HasAllProtectedData &x, T (mempcpy, (p, s, n)); T (mempcpy, (p, b, sizeof *p)); T (mempcpy, (p, b, n)); + T (mempcpy, (p, ss, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ss, n)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ws, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ws, n)); // { dg-warning "mempcpy" } T (mempcpy, (p, ia, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, ia, n)); // { dg-warning "mempcpy" } @@ -1543,6 +1736,7 @@ private: void test (HasDefaultPrivateAssign *p, const HasDefaultPrivateAssign &x, const void *q, const unsigned char *s, const std::byte *b, + const signed char *ss, const char16_t *ws, const int ia[]) { const int i = *ia; @@ -1596,8 +1790,14 @@ void test (HasDefaultPrivateAssign *p, const HasDefaultPrivateAssign &x, T (mempcpy, (p, q, 3)); // { dg-warning "mempcpy" } */ // Otherwise, copying from an object of an unrelated type is diagnosed. + T (memcpy, (p, ss, sizeof *p)); // { dg-warning "writing to an object of type .struct HasDefaultPrivateAssign. with (deleted|no trivial) copy-assignment." } + T (memcpy, (p, ws, sizeof *p)); // { dg-warning "writing to an object of type .struct HasDefaultPrivateAssign. with (deleted|no trivial) copy-assignment." } T (memcpy, (p, ia, sizeof *p)); // { dg-warning "writing to an object of type .struct HasDefaultPrivateAssign. with (deleted|no trivial) copy-assignment." } + T (memmove, (p, ss, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ws, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, ia, sizeof *p)); // { dg-warning "memmove" } + T (mempcpy, (p, ss, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ws, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, ia, sizeof *p)); // { dg-warning "mempcpy" } // Reallocating is the same as calling memcpy. @@ -1621,6 +1821,7 @@ private: void test (HasDefaultDeletedAssign *p, const HasDefaultDeletedAssign &x, const void *q, const unsigned char *s, const std::byte *b, + const signed char *ss, const char16_t *ws, const int ia[]) { const int i = *ia; @@ -1674,8 +1875,14 @@ void test (HasDefaultDeletedAssign *p, const HasDefaultDeletedAssign &x, T (mempcpy, (p, q, 3)); // { dg-warning "mempcpy" } */ // Otherwise, copying from an object of an unrelated type is diagnosed. + T (memcpy, (p, ss, sizeof *p)); // { dg-warning "writing to an object of type .struct HasDefaultDeletedAssign. with (deleted|no trivial) copy-assignment." } + T (memcpy, (p, ws, sizeof *p)); // { dg-warning "writing to an object of type .struct HasDefaultDeletedAssign. with (deleted|no trivial) copy-assignment." } T (memcpy, (p, ia, sizeof *p)); // { dg-warning "writing to an object of type .struct HasDefaultDeletedAssign. with (deleted|no trivial) copy-assignment." } + T (memmove, (p, ss, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ws, sizeof *p)); // { dg-warning "memmove" } T (memmove, (p, ia, sizeof *p)); // { dg-warning "memmove" } + T (mempcpy, (p, ss, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ws, sizeof *p)); // { dg-warning "mempcpy" } T (mempcpy, (p, ia, sizeof *p)); // { dg-warning "mempcpy" } // Reallocating is the same as calling memcpy. diff --git a/gcc/testsuite/g++.dg/analyzer/ctor-dtor-1.C b/gcc/testsuite/g++.dg/analyzer/ctor-dtor-1.C new file mode 100644 index 0000000..440ac4d --- /dev/null +++ b/gcc/testsuite/g++.dg/analyzer/ctor-dtor-1.C @@ -0,0 +1,26 @@ +#include "../../gcc.dg/analyzer/analyzer-decls.h" + +int foo_count; + +struct foo +{ + foo () __attribute__((noinline)) + { + foo_count++; + } + ~foo () __attribute__((noinline)) + { + foo_count--; + } +}; + +int main () +{ + __analyzer_eval (foo_count == 0); // { dg-warning "TRUE" } + { + foo f; + __analyzer_eval (foo_count == 1); // { dg-warning "TRUE" } + } + __analyzer_eval (foo_count == 0); // { dg-warning "TRUE" } + return 0; +} diff --git a/gcc/testsuite/g++.dg/analyzer/dyncast-1.C b/gcc/testsuite/g++.dg/analyzer/dyncast-1.C new file mode 100644 index 0000000..14acb91 --- /dev/null +++ b/gcc/testsuite/g++.dg/analyzer/dyncast-1.C @@ -0,0 +1,21 @@ +#include "../../gcc.dg/analyzer/analyzer-decls.h" + +struct base +{ + virtual ~base () {} +}; +struct sub : public base +{ + int m_field; +}; + +int +test_1 (base *p) +{ + if (sub *q = dynamic_cast <sub*> (p)) + { + __analyzer_dump_path (); // { dg-message "path" } + return q->m_field; + } + return 0; +} diff --git a/gcc/testsuite/g++.dg/analyzer/pr97489.C b/gcc/testsuite/g++.dg/analyzer/pr97489.C new file mode 100644 index 0000000..9322e72 --- /dev/null +++ b/gcc/testsuite/g++.dg/analyzer/pr97489.C @@ -0,0 +1,6 @@ +struct X { + virtual ~X() {} + virtual void key_function(); +}; + +void X::key_function() {} diff --git a/gcc/testsuite/g++.dg/analyzer/vfunc-1.C b/gcc/testsuite/g++.dg/analyzer/vfunc-1.C new file mode 100644 index 0000000..349ab33 --- /dev/null +++ b/gcc/testsuite/g++.dg/analyzer/vfunc-1.C @@ -0,0 +1,14 @@ +struct base +{ + virtual int fn () const; +}; +struct sub : public base +{ + int fn () const; +}; + +int +test_1 (base *p) +{ + return p->fn (); +} diff --git a/gcc/testsuite/g++.dg/asan/asan_test.C b/gcc/testsuite/g++.dg/asan/asan_test.C index ca989a3..c62568f 100644 --- a/gcc/testsuite/g++.dg/asan/asan_test.C +++ b/gcc/testsuite/g++.dg/asan/asan_test.C @@ -2,7 +2,7 @@ // { dg-skip-if "" { *-*-* } { "*" } { "-O2" } } // { dg-skip-if "" { *-*-* } { "-flto" } { "" } } // { dg-additional-sources "asan_globals_test-wrapper.cc" } -// { dg-options "-std=c++11 -fsanitize=address -fno-builtin -Wall -Werror -Wno-alloc-size-larger-than -g -DASAN_UAR=0 -DASAN_HAS_EXCEPTIONS=1 -DASAN_HAS_BLACKLIST=0 -DSANITIZER_USE_DEJAGNU_GTEST=1 -lasan -lpthread" } +// { dg-options "-std=c++11 -fsanitize=address -fno-builtin -Wall -Werror -Wno-alloc-size-larger-than -Wno-stringop-overflow -g -DASAN_UAR=0 -DASAN_HAS_EXCEPTIONS=1 -DASAN_HAS_BLACKLIST=0 -DSANITIZER_USE_DEJAGNU_GTEST=1 -lasan -lpthread" } // { dg-additional-options "-ldl" { target { ! *-*-freebsd* } } } // { dg-additional-options "-DASAN_NEEDS_SEGV=1" { target { ! arm*-*-* } } } // { dg-additional-options "-DASAN_LOW_MEMORY=1 -DASAN_NEEDS_SEGV=0" { target arm*-*-* } } diff --git a/gcc/testsuite/g++.dg/asan/pr97414.C b/gcc/testsuite/g++.dg/asan/pr97414.C new file mode 100644 index 0000000..6ea0390 --- /dev/null +++ b/gcc/testsuite/g++.dg/asan/pr97414.C @@ -0,0 +1,19 @@ +/* PR sanitizer/97414 */ +/* { dg-do run } */ +/* { dg-set-target-env-var ASAN_OPTIONS "detect_invalid_pointer_pairs=1:halt_on_error=1,detect_stack_use_after_return=1" } */ +/* { dg-options "-fsanitize=address,pointer-compare,pointer-subtract" } */ + +[[gnu::noinline]] auto pointer_diff(const int *begin, const int *end) { + return end - begin; +} + +int main() { + constexpr auto size = (2048 / sizeof(int)) + 1; + + auto buf = new int[size]; + auto end = buf + size; + pointer_diff(end, buf); + delete[] buf; + + return 0; +} diff --git a/gcc/testsuite/g++.dg/compat/eh/filter2_y.C b/gcc/testsuite/g++.dg/compat/eh/filter2_y.C index 87c6fea..67a4ffe 100644 --- a/gcc/testsuite/g++.dg/compat/eh/filter2_y.C +++ b/gcc/testsuite/g++.dg/compat/eh/filter2_y.C @@ -9,6 +9,12 @@ struct a a () { } ~a () +#if __cplusplus >= 201103L + // Give this destructor a potentially-throwing exception specification so + // that we verify std::terminate gets called due to an exception during + // unwinding, not just because the destructor is noexcept. + noexcept(false) +#endif { try { diff --git a/gcc/testsuite/g++.dg/concepts/pack-1.C b/gcc/testsuite/g++.dg/concepts/pack-1.C new file mode 100644 index 0000000..b4f2c36 --- /dev/null +++ b/gcc/testsuite/g++.dg/concepts/pack-1.C @@ -0,0 +1,31 @@ +// { dg-do compile { target c++17 } } +// { dg-options "-fconcepts" } + +// distilled from <concepts>, via header units + +template<typename _ArgTypes> +struct is_invocable; + +template<typename... _Args> +concept invocable = is_invocable<_Args...>::value; + +template<typename _Is> +requires invocable<_Is> +class BUG; + +template<typename _Is> +requires invocable<_Is> +class BUG {}; // { dg-bogus "different constraints" } + +template<int> struct is_invocable_NT; + +template<int... Ints> +concept invocable_NT = is_invocable_NT<Ints...>::value; + +template<int _Is> +requires invocable_NT<_Is> +class BUG_NT; + +template<int _Is> +requires invocable_NT<_Is> +class BUG_NT {}; diff --git a/gcc/testsuite/g++.dg/coroutines/pr97438.C b/gcc/testsuite/g++.dg/coroutines/pr97438.C new file mode 100644 index 0000000..9537664 --- /dev/null +++ b/gcc/testsuite/g++.dg/coroutines/pr97438.C @@ -0,0 +1,30 @@ +#if __has_include(<coroutine>) +#include <coroutine> +#else +#include <experimental/coroutine> +namespace std { using namespace experimental; } +#endif + +struct dummy_coroutine {}; + +namespace std { + +template<> +class coroutine_traits<::dummy_coroutine> { +public: + struct promise_type { + void return_value(int x) { } + void return_void() {} + std::suspend_never initial_suspend() noexcept { return {}; } + std::suspend_never final_suspend() noexcept { return {}; } + dummy_coroutine get_return_object() { return {}; } + void unhandled_exception() {} + }; +}; + +} + +dummy_coroutine +foo() { // { dg-error {the coroutine promise type 'std::__n4861::coroutine_traits<dummy_coroutine>::promise_type' declares both 'return_value' and 'return_void'} } + co_return 17; +} diff --git a/gcc/testsuite/g++.dg/cpp0x/auto3.C b/gcc/testsuite/g++.dg/cpp0x/auto3.C index 709898d..2cd0520 100644 --- a/gcc/testsuite/g++.dg/cpp0x/auto3.C +++ b/gcc/testsuite/g++.dg/cpp0x/auto3.C @@ -17,7 +17,7 @@ struct A { }; A<int> A1; // CWG issue 625 -A<auto> A2 = A1; // { dg-error "" "" { target { ! concepts } } } +A<auto> A2 = A1; // { dg-error "" } auto foo() { } // { dg-error "auto" "" { target { ! c++14 } } } diff --git a/gcc/testsuite/g++.dg/cpp0x/auto9.C b/gcc/testsuite/g++.dg/cpp0x/auto9.C index a3f9be5..0e80c30 100644 --- a/gcc/testsuite/g++.dg/cpp0x/auto9.C +++ b/gcc/testsuite/g++.dg/cpp0x/auto9.C @@ -114,7 +114,7 @@ badthrow2 () throw (auto &) // { dg-error "invalid use of|expected" } template <auto V = 4> struct G {}; // { dg-error "11:parameter" "" { target { ! c++17 } } } template <typename T> struct H { H (); ~H (); }; -H<auto> h; // { dg-error "invalid|initializer" } +H<auto> h; // { dg-error "invalid|initializer|not permitted in template argument" } void qq (auto); // { dg-error "auto" "" { target { ! concepts } } } void qr (auto*); // { dg-error "auto" "" { target { ! concepts } } } diff --git a/gcc/testsuite/g++.dg/cpp0x/constexpr-96241.C b/gcc/testsuite/g++.dg/cpp0x/constexpr-96241.C new file mode 100644 index 0000000..5994053 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp0x/constexpr-96241.C @@ -0,0 +1,18 @@ +// PR c++/96241 +// { dg-do compile { target c++11 } } + +template <typename T, T...> struct S {}; +template <typename T, T t> using U = S<T, __integer_pack(t)...>; +template <long... N> using f = S<unsigned long, N...>; +template <long N> using V = U<unsigned long, N>; +template <int N> struct A { typedef int type[N]; }; +template <int N> struct B { typename A<N>::type k; }; +template <typename T, int N, unsigned long... P> +constexpr B<N> bar(T (&arr)[N], f<P...>) { + return {arr[P]...}; +} +template <typename T, int N> constexpr B<N> foo(T (&arr)[N]) { + return bar(arr, V<N>{}); +} +constexpr char arr[2]{}; +B<2> b = foo(arr); diff --git a/gcc/testsuite/g++.dg/cpp0x/fallthrough2.C b/gcc/testsuite/g++.dg/cpp0x/fallthrough2.C index f2d0ce1..071c2cb 100644 --- a/gcc/testsuite/g++.dg/cpp0x/fallthrough2.C +++ b/gcc/testsuite/g++.dg/cpp0x/fallthrough2.C @@ -14,7 +14,7 @@ f (int i) [[fallthrough]]; case 3: bar (1); - [[gnu::fallthrough, gnu::fallthrough]]; // { dg-warning ".fallthrough. attribute specified multiple times" } + [[gnu::fallthrough, gnu::fallthrough]]; // { dg-warning ".fallthrough. specified multiple times" } case 2: bar (2); } diff --git a/gcc/testsuite/g++.dg/cpp0x/gen-attrs-60.C b/gcc/testsuite/g++.dg/cpp0x/gen-attrs-60.C index cb0c31e..9203d1d 100644 --- a/gcc/testsuite/g++.dg/cpp0x/gen-attrs-60.C +++ b/gcc/testsuite/g++.dg/cpp0x/gen-attrs-60.C @@ -1,4 +1,4 @@ // PR c++/60365 // { dg-do compile { target c++11 } } -void func [[noreturn, noreturn]] (); // { dg-error "at most once" } +void func [[noreturn, noreturn]] (); // { dg-warning "specified multiple times" } diff --git a/gcc/testsuite/g++.dg/cpp0x/gen-attrs-72.C b/gcc/testsuite/g++.dg/cpp0x/gen-attrs-72.C new file mode 100644 index 0000000..3c235b5 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp0x/gen-attrs-72.C @@ -0,0 +1,45 @@ +// DR 1914 - Duplicate standard attributes +// { dg-do compile { target c++11 } } + +#define ATTR_NORETURN [[noreturn, noreturn]] + +[[noreturn, noreturn]] void fn0(); // { dg-warning "specified multiple times" } +ATTR_NORETURN void fn0a(); +[[noreturn]] [[noreturn]] void fn1(); +[[deprecated, deprecated]] void fn2(); // { dg-warning "specified multiple times" } +[[deprecated]] [[deprecated]] void fn3(); +[[maybe_unused]] [[maybe_unused]] int fn4(); +[[maybe_unused, maybe_unused]] int fn5(); // { dg-warning "specified multiple times" } +[[nodiscard]] [[nodiscard]] int fn6(); +[[nodiscard, nodiscard]] int fn7(); // { dg-warning "specified multiple times" } + +struct E { }; +struct A { + [[no_unique_address]] [[no_unique_address]] E e; +}; +struct B { + [[no_unique_address, no_unique_address]] E e; // { dg-warning "specified multiple times" } +}; + +int +f (int n) +{ + switch (n) + { + case 1: + [[fallthrough, fallthrough]]; // { dg-warning "specified multiple times" } + case 2: + [[fallthrough]] [[fallthrough]]; // { dg-warning "specified multiple times" } + case 3: + return 15; + } + + if (n == 10) + [[likely]] [[likely]] return 42; // { dg-warning "ignoring attribute" } + else if (n == 11) + [[unlikely]] [[unlikely]] return 10; // { dg-warning "ignoring attribute" } + else if (n == 12) + [[likely, likely]] return 42; // { dg-warning "specified multiple times" } + else + [[unlikely, unlikely]] return 0; // { dg-warning "specified multiple times" } +} diff --git a/gcc/testsuite/g++.dg/cpp0x/initlist-deduce3.C b/gcc/testsuite/g++.dg/cpp0x/initlist-deduce3.C new file mode 100644 index 0000000..b8417d7 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp0x/initlist-deduce3.C @@ -0,0 +1,22 @@ +// PR c++/93107 +// { dg-do compile { target c++11 } } + +using size_t = decltype(sizeof 0); + +namespace std { + template<typename T> struct initializer_list { + const T *ptr; + size_t n; + initializer_list(const T*, size_t); + }; +} + +template<typename T> +void Task() {} + +auto a = &Task<int>; +auto b = { &Task<int> }; +auto e{ &Task<int> }; +auto f = { &Task<int>, &Task<int> }; +std::initializer_list<void(*)()> c = { &Task<int> }; +auto d = { static_cast<void(*)()>(&Task<int>) }; diff --git a/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-variadic11.C b/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-variadic11.C new file mode 100644 index 0000000..aa4ffd7 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-variadic11.C @@ -0,0 +1,20 @@ +// PR c++/97358 +// { dg-do compile { target c++11 } } + +template <typename... T> void foo (T... x) {} + +template <typename... T> void bar (T... x) +{ + foo ([x...] { return x; }...); // { dg-error "not expanded|no parameter packs" } +#if __cpp_init_captures >= 201803L + foo ([...y = x] { return y; }...); // { dg-error "not expanded|no parameter packs" "" { target c++20 } } +#endif +} + +void +test () +{ + bar (); + bar (1); + bar (2.0, 3LL, 4); +} diff --git a/gcc/testsuite/g++.dg/cpp0x/linkage2.C b/gcc/testsuite/g++.dg/cpp0x/linkage2.C index 5285868..549bd82 100644 --- a/gcc/testsuite/g++.dg/cpp0x/linkage2.C +++ b/gcc/testsuite/g++.dg/cpp0x/linkage2.C @@ -29,5 +29,5 @@ void f() { ba.g(a); // OK ba.h(a); // error, B<T>::h never defined i(ba, a); // OK - e1+e2+e3; + e1+e2+e3; // { dg-warning "arithmetic between different enumeration types" "" { target c++20 } } } diff --git a/gcc/testsuite/g++.dg/cpp0x/static_assert16.C b/gcc/testsuite/g++.dg/cpp0x/static_assert16.C new file mode 100644 index 0000000..5b40b77 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp0x/static_assert16.C @@ -0,0 +1,14 @@ +// PR c++/82239 +// { dg-do compile { target c++11 } } + +template<typename T> +struct C { + static constexpr int x = 5; + void f() + { + static_assert(0 < x, ""); + static_assert(0 < (x), ""); + static_assert(true || (0 < x), ""); + static_assert(true || (0 < (x)), ""); + } +}; diff --git a/gcc/testsuite/g++.dg/cpp1y/attr-deprecated-2.C b/gcc/testsuite/g++.dg/cpp1y/attr-deprecated-2.C index 12c75c7..ac6c4ae 100644 --- a/gcc/testsuite/g++.dg/cpp1y/attr-deprecated-2.C +++ b/gcc/testsuite/g++.dg/cpp1y/attr-deprecated-2.C @@ -1,4 +1,4 @@ // PR c++/60365 // { dg-do compile { target c++14 } } -void func [[deprecated, deprecated]] (); // { dg-error "at most once" } +void func [[deprecated, deprecated]] (); // { dg-warning "specified multiple times" } diff --git a/gcc/testsuite/g++.dg/cpp1y/constexpr-96241.C b/gcc/testsuite/g++.dg/cpp1y/constexpr-96241.C new file mode 100644 index 0000000..107f2b0 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp1y/constexpr-96241.C @@ -0,0 +1,47 @@ +// PR c++/96241 +// { dg-do compile { target c++14 } } + +#define assert(expr) static_assert (expr, #expr) + +enum E { o }; + +struct S { + int e = o; +}; + +using T = S[3]; + +constexpr struct S s[1][1][1] = { }; +assert (0 == s[0][0][0].e); + +constexpr int +fn0 () +{ + return T{}[0].e; +} +assert(fn0 () == 0); + +constexpr int +fn1 () +{ + S d[1]; + int x = d[0].e; + return x; +} +assert(fn1 () == 0); + +constexpr int +fn2 () +{ + S d[1]; + return d[0].e; +} +assert(fn2 () == 0); + +constexpr int +fn3 () +{ + struct X { int e = o; } d[1]{}; + return d[0].e; +} +assert(fn3 () == 0); diff --git a/gcc/testsuite/g++.dg/cpp1y/decltype-auto1.C b/gcc/testsuite/g++.dg/cpp1y/decltype-auto1.C new file mode 100644 index 0000000..13baf8e --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp1y/decltype-auto1.C @@ -0,0 +1,8 @@ +// PR c++/78209 +// { dg-do compile { target c++14 } } + +int main() +{ + int &&i = 0; + decltype(auto) j = i; // { dg-error "cannot bind rvalue reference" } +} diff --git a/gcc/testsuite/g++.dg/cpp1z/class-deduction75.C b/gcc/testsuite/g++.dg/cpp1z/class-deduction75.C new file mode 100644 index 0000000..52e6131 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp1z/class-deduction75.C @@ -0,0 +1,15 @@ +// PR c++/97663 + +template <class T> struct foo {}; +template <class T> struct bar {}; +template <class T> struct baz {}; +template <class T> struct qux {}; +template <class T> struct corge {}; + +namespace N { + unsigned foo (); + signed bar (); + long baz (); + long long qux (); + short corge (); +} diff --git a/gcc/testsuite/g++.dg/cpp1z/constexpr-96575.C b/gcc/testsuite/g++.dg/cpp1z/constexpr-96575.C new file mode 100644 index 0000000..5820c18 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp1z/constexpr-96575.C @@ -0,0 +1,19 @@ +// PR c++/96575 +// { dg-do compile { target c++17 } } + +struct S { }; + +constexpr auto g = [] (S s) { + if (__builtin_is_constant_evaluated()) + return s; +}; + +template <class T> +constexpr auto f (T cb) { + return [=] { + auto ret = cb({}); + return ret; + }(); +} + +constexpr auto x = f(g); diff --git a/gcc/testsuite/g++.dg/cpp1z/fold12.C b/gcc/testsuite/g++.dg/cpp1z/fold12.C new file mode 100644 index 0000000..90d74cc --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp1z/fold12.C @@ -0,0 +1,13 @@ +// PR c++/86773 +// { dg-do compile { target c++17 } } + +template <typename ... Param> +auto work(Param && ...param) +{ + return ("asda" ... / param); // { dg-error "expected" } +} + +int main() +{ + work(1.0, 2.0, 5, 4.0); +} diff --git a/gcc/testsuite/g++.dg/cpp2a/attr-likely2.C b/gcc/testsuite/g++.dg/cpp2a/attr-likely2.C index ee178de..0bc5f1e 100644 --- a/gcc/testsuite/g++.dg/cpp2a/attr-likely2.C +++ b/gcc/testsuite/g++.dg/cpp2a/attr-likely2.C @@ -4,7 +4,7 @@ bool b; int main() { if (b) - [[likely, likely]] b; // { dg-warning "ignoring" } + [[likely, likely]] b; // { dg-warning "specified multiple times" } else [[unlikely]] [[likely]] b; // { dg-warning "ignoring" } diff --git a/gcc/testsuite/g++.dg/cpp2a/concepts-complete1.C b/gcc/testsuite/g++.dg/cpp2a/concepts-complete1.C deleted file mode 100644 index 63f3696..0000000 --- a/gcc/testsuite/g++.dg/cpp2a/concepts-complete1.C +++ /dev/null @@ -1,11 +0,0 @@ -// { dg-do compile { target c++20 } } - -template <class T> concept has_mem_type = requires { typename T::type; }; - -template <has_mem_type T> int f () { return 0; } -template <class T> char f() { return 0; } - -struct A; -static_assert (sizeof (f<A>()) == 1); -struct A { typedef int type; }; -static_assert (sizeof (f<A>()) > 1); diff --git a/gcc/testsuite/g++.dg/cpp2a/concepts-decltype2.C b/gcc/testsuite/g++.dg/cpp2a/concepts-decltype2.C new file mode 100644 index 0000000..529dab1 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp2a/concepts-decltype2.C @@ -0,0 +1,12 @@ +// { dg-do compile { target c++20 } } + +template <class T> concept C = requires(T t) { t; }; + +template <class T> using A = decltype((T{}, int{})); + +template <class T> concept D = C<A<T>>; + +template <class T> void f() requires D<T>; + +template <class, class> +void g() { f<int>(); } diff --git a/gcc/testsuite/g++.dg/cpp2a/concepts-fn7.C b/gcc/testsuite/g++.dg/cpp2a/concepts-fn7.C new file mode 100644 index 0000000..62111df --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp2a/concepts-fn7.C @@ -0,0 +1,11 @@ +// PR c++/95132 +// { dg-do compile { target c++20 } } + +template <class T> struct A { + static auto f() requires false { return T::fail; } +}; + +template <class T> +concept C = requires { A<T>::f(); }; + +static_assert(!C<int>); diff --git a/gcc/testsuite/g++.dg/cpp2a/concepts-pr84979-2.C b/gcc/testsuite/g++.dg/cpp2a/concepts-pr84979-2.C index ce69a0f..290aaf8 100644 --- a/gcc/testsuite/g++.dg/cpp2a/concepts-pr84979-2.C +++ b/gcc/testsuite/g++.dg/cpp2a/concepts-pr84979-2.C @@ -4,9 +4,9 @@ template <typename T> void foo1(T& t) { typename T::template C<void> tcv = t; - typename T::template C<auto> u = tcv; - T::template C<auto>::f (tcv, u); // { dg-error "incomplete" } - (typename T::template D<auto> (t)); // { dg-error "invalid" } + typename T::template C<auto> u = tcv; // { dg-error "not permitted" "" { target c++20 } } + T::template C<auto>::f (tcv, u); // { dg-error "incomplete|not permitted" } + (typename T::template D<auto> (t)); // { dg-error "invalid|not permitted" } } struct T1 { @@ -22,9 +22,9 @@ struct T1 { template <typename T> void foo2(T& t) { typename T::template C<void> tcv = t; - typename T::template C<auto> u = tcv; - T::template C<auto>::f (tcv, u); // { dg-error "incomplete" } - T::template D<auto> (t); // { dg-error "invalid" } + typename T::template C<auto> u = tcv; // { dg-error "not permitted" "" { target c++20 } } + T::template C<auto>::f (tcv, u); // { dg-error "incomplete|not permitted" } + T::template D<auto> (t); // { dg-error "invalid|not permitted" } } struct T2 { diff --git a/gcc/testsuite/g++.dg/cpp2a/concepts-pr84979-3.C b/gcc/testsuite/g++.dg/cpp2a/concepts-pr84979-3.C index 3809c2d..d612327 100644 --- a/gcc/testsuite/g++.dg/cpp2a/concepts-pr84979-3.C +++ b/gcc/testsuite/g++.dg/cpp2a/concepts-pr84979-3.C @@ -8,9 +8,9 @@ template <typename T> void foo1(T& t) { typename T::template C<void> tcv = t; - typename T::template C<auto> u = tcv; - T::template C<auto>::f (tcv, u); // { dg-error "incomplete" } - (typename T::template D<auto> (t)); // { dg-error "invalid" } + typename T::template C<auto> u = tcv; // { dg-error "not permitted" "" { target c++20 } } + T::template C<auto>::f (tcv, u); // { dg-error "incomplete|not permitted" } + (typename T::template D<auto> (t)); // { dg-error "invalid|not permitted" } } struct T1 { @@ -26,9 +26,9 @@ struct T1 { template <typename T> void foo2(T& t) { typename T::template C<void> tcv = t; - typename T::template C<auto> u = tcv; - T::template C<auto>::f (tcv, u); // { dg-error "incomplete" } - T::template D<auto> (t); // { dg-error "yields a type" } + typename T::template C<auto> u = tcv; // { dg-error "not permitted" "" { target c++20 } } + T::template C<auto>::f (tcv, u); // { dg-error "incomplete|not permitted" } + T::template D<auto> (t); // { dg-error "yields a type|not permitted" } } struct T2 { diff --git a/gcc/testsuite/g++.dg/cpp2a/concepts-pr84979.C b/gcc/testsuite/g++.dg/cpp2a/concepts-pr84979.C index 9bd40df..81555eb 100644 --- a/gcc/testsuite/g++.dg/cpp2a/concepts-pr84979.C +++ b/gcc/testsuite/g++.dg/cpp2a/concepts-pr84979.C @@ -5,5 +5,5 @@ template<typename> void foo() {} void bar() { - foo<auto>(); // { dg-error "invalid" } + foo<auto>(); // { dg-error "not permitted|invalid|no matching function" } } diff --git a/gcc/testsuite/g++.dg/cpp2a/concepts-using3.C b/gcc/testsuite/g++.dg/cpp2a/concepts-using3.C new file mode 100644 index 0000000..2c8ad40 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp2a/concepts-using3.C @@ -0,0 +1,52 @@ +// PR c++/93907 +// { dg-options -std=gnu++20 } + +// This testcase is a variadic version of concepts-using2.C; the only +// difference is that 'cd' and 'ce' are now variadic concepts. + +template <int a> struct c { + static constexpr int d = a; + typedef c e; +}; +template <typename> struct f; +template <typename b> using g = typename f<b>::e; +struct b; +template <typename b> struct f { using e = b; }; +template <typename ai> struct m { typedef g<ai> aj; }; +template <typename b> struct n { typedef typename m<b>::aj e; }; +template <typename b> using an = typename n<b>::e; +template <typename> constexpr bool ao = c<true>::d; +template <typename> constexpr bool i = c<1>::d; +template <typename> concept bb = i<b>; +#ifdef __SIZEOF_INT128__ +using cc = __int128; +#else +using cc = long long; +#endif +template <typename...> concept cd = bb<cc>; +template <typename... bt> concept ce = requires { requires cd<bt...>; }; +template <typename bt> concept h = ce<bt>; +template <typename bt> concept l = h<bt>; +template <typename> concept cl = ao<b>; +template <typename b> concept cp = requires(b j) { + requires h<an<decltype(j.begin())>>; +}; +struct o { + template <cl b> requires cp<b> auto operator()(b) {} +}; +template <typename b> using cm = decltype(o{}(b())); +template <typename bt> concept ct = l<bt>; +template <typename da> concept dd = ct<cm<da>>; +template <typename da> concept de = dd<da>; +struct { + template <de da, typename b> void operator()(da, b); +} di; +struct p { + void begin(); +}; +template <typename> using df = p; +template <int> void q() { + df<int> k; + int d; + di(k, d); +} diff --git a/gcc/testsuite/g++.dg/cpp2a/concepts-variadic2.C b/gcc/testsuite/g++.dg/cpp2a/concepts-variadic2.C new file mode 100644 index 0000000..ce61aef --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp2a/concepts-variadic2.C @@ -0,0 +1,12 @@ +// PR c++/97412 +// { dg-do compile { target c++20 } } + +template <class T, class... TArgs> +concept call_bar_with = requires(T t, TArgs... args) { + t.bar(args...); +}; + +template <class T, class... TArgs> +concept foo = requires { + requires call_bar_with<T, TArgs...>; +}; diff --git a/gcc/testsuite/g++.dg/cpp2a/constexpr-dtor5.C b/gcc/testsuite/g++.dg/cpp2a/constexpr-dtor5.C new file mode 100644 index 0000000..1739afb --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp2a/constexpr-dtor5.C @@ -0,0 +1,35 @@ +// PR c++/97388 +// { dg-do compile { target c++20 } } + +struct S { + int m; + constexpr S () : m(1) {} + constexpr ~S () noexcept (false) { if (m == 1) { throw; } } +}; + +constexpr bool +foo (S v) +{ + v.m = 2; + return true; +} + +constexpr bool +bar () +{ + return foo (S ()); +} + +constexpr bool +baz () +{ + foo (S ()); + return foo (S ()); +} + +static_assert (foo (S ())); +static_assert (bar ()); +static_assert (baz ()); +constexpr bool x = foo (S ()); +constexpr bool y = bar (); +constexpr bool z = baz (); diff --git a/gcc/testsuite/g++.dg/cpp2a/constexpr-dtor6.C b/gcc/testsuite/g++.dg/cpp2a/constexpr-dtor6.C new file mode 100644 index 0000000..ce783a1 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp2a/constexpr-dtor6.C @@ -0,0 +1,36 @@ +// PR c++/97388 +// { dg-do compile { target c++20 } } + +struct S { + int *s; + constexpr S () : s(new int ()) {} + constexpr S (S &&x) noexcept : s(x.s) { x.s = nullptr; } + constexpr ~S () noexcept { delete s; } +}; + +constexpr bool +foo (S v) +{ + auto x = static_cast<S &&> (v); + return true; +} + +constexpr bool +bar () +{ + return foo (S ()); +} + +constexpr bool +baz () +{ + foo (S ()); + return foo (S ()); +} + +static_assert (foo (S ())); +static_assert (bar ()); +static_assert (baz ()); +constexpr bool x = foo (S ()); +constexpr bool y = bar (); +constexpr bool z = baz (); diff --git a/gcc/testsuite/g++.dg/cpp2a/constexpr-dtor7.C b/gcc/testsuite/g++.dg/cpp2a/constexpr-dtor7.C new file mode 100644 index 0000000..463eaca --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp2a/constexpr-dtor7.C @@ -0,0 +1,19 @@ +// PR c++/97388 +// { dg-do compile { target c++20 } } + +struct S { + int *s; + constexpr S () : s(new int) {} // { dg-error "is not a constant expression because allocated storage has not been deallocated" } + S (const S &) = delete; + S &operator= (const S &) = delete; + constexpr ~S () { delete s; } +}; + +constexpr bool +foo (S v) +{ + v.s = nullptr; + return true; +} + +static_assert (foo (S ())); // { dg-error "non-constant condition for static assertion" } diff --git a/gcc/testsuite/g++.dg/cpp2a/constexpr-dtor8.C b/gcc/testsuite/g++.dg/cpp2a/constexpr-dtor8.C new file mode 100644 index 0000000..3048110 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp2a/constexpr-dtor8.C @@ -0,0 +1,19 @@ +// PR c++/97388 +// { dg-do compile { target c++20 } } + +struct S { + int *s; + constexpr S () : s(new int) {} + S (const S &) = delete; + S &operator= (const S &) = delete; + constexpr ~S () { delete s; } // { dg-error "already deallocated" } +}; + +constexpr bool +foo (S v) +{ + delete v.s; + return true; +} + +static_assert (foo (S ())); // { dg-error "non-constant condition for static assertion" } diff --git a/gcc/testsuite/g++.dg/cpp2a/constexpr-init19.C b/gcc/testsuite/g++.dg/cpp2a/constexpr-init19.C new file mode 100644 index 0000000..d354c5a --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp2a/constexpr-init19.C @@ -0,0 +1,15 @@ +// PR c++/97328 +// { dg-do compile { target c++20 } } + +struct vector { + struct storage { + int t; + constexpr storage() {} + } data[8]; +}; + +constexpr auto foo() { + vector i; + return i; +} +auto val = foo(); diff --git a/gcc/testsuite/g++.dg/cpp2a/constexpr-init20.C b/gcc/testsuite/g++.dg/cpp2a/constexpr-init20.C new file mode 100644 index 0000000..1a6ed8d --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp2a/constexpr-init20.C @@ -0,0 +1,15 @@ +// PR c++/97328 +// { dg-do compile { target c++20 } } + +struct vector { + union storage { + int t; + constexpr storage() {} + } data[8]; +}; + +constexpr auto foo() { + vector i; + return i; +} +auto val = foo(); diff --git a/gcc/testsuite/g++.dg/cpp2a/constexpr-new15.C b/gcc/testsuite/g++.dg/cpp2a/constexpr-new15.C new file mode 100644 index 0000000..e97e7aa --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp2a/constexpr-new15.C @@ -0,0 +1,21 @@ +// PR c++/95808 +// { dg-do compile { target c++20 } } + +constexpr +bool foo () +{ + int *p = new int; // { dg-message "allocation performed here" } + delete[] p; // { dg-error "array deallocation of object allocated with non-array allocation" } + return false; +} + +constexpr +bool bar () +{ + int *p = new int[1]; // { dg-message "allocation performed here" } + delete p; // { dg-error "non-array deallocation of object allocated with array allocation" } + return false; +} + +constexpr auto x = foo (); +constexpr auto y = bar (); diff --git a/gcc/testsuite/g++.dg/cpp2a/enum-conv1.C b/gcc/testsuite/g++.dg/cpp2a/enum-conv1.C new file mode 100644 index 0000000..4571b5e --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp2a/enum-conv1.C @@ -0,0 +1,117 @@ +// PR c++/97573 +// { dg-do compile } +// No special options. In C++20 (only), we should get the deprecated warnings +// by default. -Wenum-compare is enabled by default so some of them will be +// printed even pre-C++20. + +enum E1 { e } e1; +enum E2 { f } e2; +__extension__ static enum { } u1; +__extension__ static enum { } u2; +static double d; + +void +conv () +{ + bool b1 = e == e1; + bool b2 = e == f; // { dg-warning "comparison between .enum E1. and .enum E2." } + bool b3 = e == 0.0; // { dg-warning "comparison of enumeration type .E1. with floating-point type .double." "" { target c++20 } } + bool b4 = 0.0 == f; // { dg-warning "comparison of floating-point type .double. with enumeration type .E2." "" { target c++20 } } + int n1 = true ? e : f; // { dg-warning "enumerated mismatch" } + int n2 = true ? e : 0.0; // { dg-warning "conditional expression between" "" { target c++20 } } +} + +int +enum_enum (bool b) +{ + int r = 0; + const E1 e1c = e; + + r += e - e; + r += e - e1; + r += e - f; // { dg-warning "arithmetic between different enumeration types .E1. and .E2." "" { target c++20 } } + r += f - e; // { dg-warning "arithmetic between different enumeration types .E2. and .E1." "" { target c++20 } } + + r += f + f; + r += f + e; // { dg-warning "arithmetic between different enumeration types .E2. and .E1." "" { target c++20 } } + r += e + f; // { dg-warning "arithmetic between different enumeration types .E1. and .E2." "" { target c++20 } } + + r += e1 - e2; // { dg-warning "arithmetic between different enumeration types .E1. and .E2." "" { target c++20 } } + r += e1 - e1c; + r += e1c - e1; + + r += e * f; // { dg-warning "arithmetic between different enumeration types .E1. and .E2." "" { target c++20 } } + r += f * e; // { dg-warning "arithmetic between different enumeration types .E2. and .E1." "" { target c++20 } } + r += e * e; + + r += e1 < e1c; + r += e < e1; + r += e1 < e2; // { dg-warning "comparison between .enum E1. and .enum E2." } + r += e < f; // { dg-warning "comparison between .enum E1. and .enum E2." } + r += f < e; // { dg-warning "comparison between .enum E2. and .enum E1." } + + r += e1 == e1c; + r += e == e1; + r += e == f; // { dg-warning "comparison between .enum E1. and .enum E2." } + r += f == e; // { dg-warning "comparison between .enum E2. and .enum E1." } + r += e1 == e2; // { dg-warning "comparison between .enum E1. and .enum E2." } + r += e2 == e1; // { dg-warning "comparison between .enum E2. and .enum E1." } + + r += b ? e1 : e1c; + r += b ? e1 : e; + r += b ? f : e; // { dg-warning "enumerated mismatch in conditional expression: .E2. vs .E1." } + r += b ? e1 : e2; // { dg-warning "enumerated mismatch in conditional expression: .E1. vs .E2." } + + r += e | f; // { dg-warning "bitwise operation between different enumeration types .E1. and .E2." "" { target c++20 } } + r += e ^ f; // { dg-warning "bitwise operation between different enumeration types .E1. and .E2." "" { target c++20 } } + r += e & f; // { dg-warning "bitwise operation between different enumeration types .E1. and .E2." "" { target c++20 } } + r += !e; + r += e1 | e; + + r += e << f; + r += e >> f; + r += e || f; + r += e && f; + e1 = e1c; + + // Anonymous enum. + r += u1 - u1; + r += u1 + u2; // { dg-warning "arithmetic between different enumeration types" "" { target c++20 } } + r += u1 * u2; // { dg-warning "arithmetic between different enumeration types" "" { target c++20 } } + r += u1 == u2; // { dg-warning "comparison between" } + r += u1 & u2; // { dg-warning "bitwise operation between different enumeration types" "" { target c++20 } } + + return r; +} + +double +enum_float (bool b) +{ + double r = 0.0; + + r += e1 - d; // { dg-warning "arithmetic between enumeration type .E1. and floating-point type .double." "" { target c++20 } } + r += d - e1; // { dg-warning "arithmetic between floating-point type .double. and enumeration type .E1." "" { target c++20 } } + r += e1 + d; // { dg-warning "arithmetic between enumeration type .E1. and floating-point type .double." "" { target c++20 } } + r += d + e1; // { dg-warning "arithmetic between floating-point type .double. and enumeration type .E1." "" { target c++20 } } + r += e1 * d; // { dg-warning "arithmetic between enumeration type .E1. and floating-point type .double." "" { target c++20 } } + r += d * e1; // { dg-warning "arithmetic between floating-point type .double. and enumeration type .E1." "" { target c++20 } } + r += u1 * d; // { dg-warning "arithmetic between enumeration type" "" { target c++20 } } + r += d * u1; // { dg-warning "arithmetic between floating-point type" "" { target c++20 } } + + r += e1 < d; // { dg-warning "comparison of enumeration type .E1. with floating-point type .double." "" { target c++20 } } + r += d < e1; // { dg-warning "comparison of floating-point type .double. with enumeration type .E1." "" { target c++20 } } + r += d == e1; // { dg-warning "comparison of floating-point type .double. with enumeration type .E1." "" { target c++20 } } + r += e1 == d; // { dg-warning "comparison of enumeration type .E1. with floating-point type .double." "" { target c++20 } } + r += u1 == d; // { dg-warning "comparison of enumeration type" "" { target c++20 } } + r += d == u1; // { dg-warning "comparison of floating-point type" "" { target c++20 } } + + r += b ? e1 : d; // { dg-warning "conditional expression between enumeration type .E1. and floating-point type .double." "" { target c++20 } } + r += b ? d : e1; // { dg-warning "conditional expression between floating-point type .double. and enumeration type .E1." "" { target c++20 } } + r += b ? d : u1; // { dg-warning "conditional expression between" "" { target c++20 } } + r += b ? u1 : d; // { dg-warning "conditional expression between" "" { target c++20 } } + + d += e1; // { dg-warning "arithmetic between floating-point type .double. and enumeration type .E1." "" { target c++20 } } + d = e1; + + return r; +} diff --git a/gcc/testsuite/g++.dg/cpp2a/enum-conv2.C b/gcc/testsuite/g++.dg/cpp2a/enum-conv2.C new file mode 100644 index 0000000..f15827b --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp2a/enum-conv2.C @@ -0,0 +1,115 @@ +// PR c++/97573 +// { dg-do compile { target c++20 } } +// { dg-options "-Wno-deprecated -Wno-enum-compare" } + +enum E1 { e } e1; +enum E2 { f } e2; +__extension__ static enum { } u1; +__extension__ static enum { } u2; +static double d; + +void +conv () +{ + bool b1 = e == e1; + bool b2 = e == f; + bool b3 = e == 0.0; + bool b4 = 0.0 == f; + int n1 = true ? e : f; + int n2 = true ? e : 0.0; +} + +int +enum_enum (bool b) +{ + int r = 0; + const E1 e1c = e; + + r += e - e; + r += e - e1; + r += e - f; + r += f - e; + + r += f + f; + r += f + e; + r += e + f; + + r += e1 - e2; + r += e1 - e1c; + r += e1c - e1; + + r += e * f; + r += f * e; + r += e * e; + + r += e1 < e1c; + r += e < e1; + r += e1 < e2; + r += e < f; + r += f < e; + + r += e1 == e1c; + r += e == e1; + r += e == f; + r += f == e; + r += e1 == e2; + r += e2 == e1; + + r += b ? e1 : e1c; + r += b ? e1 : e; + r += b ? f : e; + r += b ? e1 : e2; + + r += e | f; + r += e ^ f; + r += e & f; + r += !e; + r += e1 | e; + + r += e << f; + r += e >> f; + r += e || f; + r += e && f; + e1 = e1c; + + // Anonymous enum. + r += u1 - u1; + r += u1 + u2; + r += u1 * u2; + r += u1 == u2; + r += u1 & u2; + + return r; +} + +double +enum_float (bool b) +{ + double r = 0.0; + + r += e1 - d; + r += d - e1; + r += e1 + d; + r += d + e1; + r += e1 * d; + r += d * e1; + r += u1 * d; + r += d * u1; + + r += e1 < d; + r += d < e1; + r += d == e1; + r += e1 == d; + r += u1 == d; + r += d == u1; + + r += b ? e1 : d; + r += b ? d : e1; + r += b ? d : u1; + r += b ? u1 : d; + + d += e1; + d = e1; + + return r; +} diff --git a/gcc/testsuite/g++.dg/cpp2a/enum-conv3.C b/gcc/testsuite/g++.dg/cpp2a/enum-conv3.C new file mode 100644 index 0000000..67bdf16 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp2a/enum-conv3.C @@ -0,0 +1,115 @@ +// PR c++/97573 +// { dg-do compile { target { c++17_down } } } +// { dg-options "-Wenum-conversion" } + +enum E1 { e } e1; +enum E2 { f } e2; +__extension__ static enum { } u1; +__extension__ static enum { } u2; +static double d; + +void +conv () +{ + bool b1 = e == e1; + bool b2 = e == f; // { dg-warning "comparison between .enum E1. and .enum E2." } + bool b3 = e == 0.0; // { dg-warning "comparison of enumeration type .E1. with floating-point type .double." } + bool b4 = 0.0 == f; // { dg-warning "comparison of floating-point type .double. with enumeration type .E2." } + int n1 = true ? e : f; // { dg-warning "enumerated mismatch" } + int n2 = true ? e : 0.0; // { dg-warning "enumerated and non-enumerated type in conditional expression" } +} + +int +enum_enum (bool b) +{ + int r = 0; + const E1 e1c = e; + + r += e - e; + r += e - e1; + r += e - f; // { dg-warning "arithmetic between different enumeration types .E1. and .E2." } + r += f - e; // { dg-warning "arithmetic between different enumeration types .E2. and .E1." } + + r += f + f; + r += f + e; // { dg-warning "arithmetic between different enumeration types .E2. and .E1." } + r += e + f; // { dg-warning "arithmetic between different enumeration types .E1. and .E2." } + + r += e1 - e2; // { dg-warning "arithmetic between different enumeration types .E1. and .E2." } + r += e1 - e1c; + r += e1c - e1; + + r += e * f; // { dg-warning "arithmetic between different enumeration types .E1. and .E2." } + r += f * e; // { dg-warning "arithmetic between different enumeration types .E2. and .E1." } + r += e * e; + + r += e1 < e1c; + r += e < e1; + r += e1 < e2; // { dg-warning "comparison between .enum E1. and .enum E2." } + r += e < f; // { dg-warning "comparison between .enum E1. and .enum E2." } + r += f < e; // { dg-warning "comparison between .enum E2. and .enum E1." } + + r += e1 == e1c; + r += e == e1; + r += e == f; // { dg-warning "comparison between .enum E1. and .enum E2." } + r += f == e; // { dg-warning "comparison between .enum E2. and .enum E1." } + r += e1 == e2; // { dg-warning "comparison between .enum E1. and .enum E2." } + r += e2 == e1; // { dg-warning "comparison between .enum E2. and .enum E1." } + + r += b ? e1 : e1c; + r += b ? e1 : e; + r += b ? f : e; // { dg-warning "enumerated mismatch in conditional expression: .E2. vs .E1." } + r += b ? e1 : e2; // { dg-warning "enumerated mismatch in conditional expression: .E1. vs .E2." } + + r += e | f; // { dg-warning "bitwise operation between different enumeration types .E1. and .E2." } + r += e ^ f; // { dg-warning "bitwise operation between different enumeration types .E1. and .E2." } + r += e & f; // { dg-warning "bitwise operation between different enumeration types .E1. and .E2." } + r += !e; + r += e1 | e; + + r += e << f; + r += e >> f; + r += e || f; + r += e && f; + e1 = e1c; + + // Anonymous enum. + r += u1 - u1; + r += u1 + u2; // { dg-warning "arithmetic between different enumeration types" } + r += u1 * u2; // { dg-warning "arithmetic between different enumeration types" } + r += u1 == u2; // { dg-warning "comparison between" } + r += u1 & u2; // { dg-warning "bitwise operation between different enumeration types" } + + return r; +} + +double +enum_float (bool b) +{ + double r = 0.0; + + r += e1 - d; // { dg-warning "arithmetic between enumeration type .E1. and floating-point type .double." } + r += d - e1; // { dg-warning "arithmetic between floating-point type .double. and enumeration type .E1." } + r += e1 + d; // { dg-warning "arithmetic between enumeration type .E1. and floating-point type .double." } + r += d + e1; // { dg-warning "arithmetic between floating-point type .double. and enumeration type .E1." } + r += e1 * d; // { dg-warning "arithmetic between enumeration type .E1. and floating-point type .double." } + r += d * e1; // { dg-warning "arithmetic between floating-point type .double. and enumeration type .E1." } + r += u1 * d; // { dg-warning "arithmetic between enumeration type" } + r += d * u1; // { dg-warning "arithmetic between floating-point type" } + + r += e1 < d; // { dg-warning "comparison of enumeration type .E1. with floating-point type .double." } + r += d < e1; // { dg-warning "comparison of floating-point type .double. with enumeration type .E1." } + r += d == e1; // { dg-warning "comparison of floating-point type .double. with enumeration type .E1." } + r += e1 == d; // { dg-warning "comparison of enumeration type .E1. with floating-point type .double." } + r += u1 == d; // { dg-warning "comparison of enumeration type" } + r += d == u1; // { dg-warning "comparison of floating-point type" } + + r += b ? e1 : d; // { dg-warning "enumerated and non-enumerated type in conditional expression" } + r += b ? d : e1; // { dg-warning "enumerated and non-enumerated type in conditional expression" } + r += b ? d : u1; // { dg-warning "enumerated and non-enumerated type in conditional expression" } + r += b ? u1 : d; // { dg-warning "enumerated and non-enumerated type in conditional expression" } + + d += e1; // { dg-warning "arithmetic between floating-point type .double. and enumeration type .E1." } + d = e1; + + return r; +} diff --git a/gcc/testsuite/g++.dg/cpp2a/fn-template16.C b/gcc/testsuite/g++.dg/cpp2a/fn-template16.C index becaff1..8ee783a 100644 --- a/gcc/testsuite/g++.dg/cpp2a/fn-template16.C +++ b/gcc/testsuite/g++.dg/cpp2a/fn-template16.C @@ -7,7 +7,7 @@ struct undeclared<int> { }; // { dg-error "not a class template" } int main () { - int foo (); + int foo (); // { dg-warning "empty parentheses" } int foo (int); int foo (int, int); int a, b = 10; diff --git a/gcc/testsuite/g++.dg/cpp2a/fn-template7.C b/gcc/testsuite/g++.dg/cpp2a/fn-template7.C index d048606..2c5ee12 100644 --- a/gcc/testsuite/g++.dg/cpp2a/fn-template7.C +++ b/gcc/testsuite/g++.dg/cpp2a/fn-template7.C @@ -7,7 +7,7 @@ struct undeclared<int> { }; // { dg-error "not a class template" } int main () { - int foo (); + int foo (); // { dg-warning "empty parentheses" } int a, b = 10; a = foo<; // { dg-error "invalid template-argument-list|invalid" } a = foo < b; // { dg-error "invalid template-argument-list|invalid" } diff --git a/gcc/testsuite/g++.dg/cpp2a/nodiscard-once.C b/gcc/testsuite/g++.dg/cpp2a/nodiscard-once.C index c810fd0..c95fa1b 100644 --- a/gcc/testsuite/g++.dg/cpp2a/nodiscard-once.C +++ b/gcc/testsuite/g++.dg/cpp2a/nodiscard-once.C @@ -2,7 +2,7 @@ /* { dg-do compile { target c++20 } } */ /* { dg-options "-O -ftrack-macro-expansion=0" } */ -[[nodiscard, nodiscard]] int check1 (void); /* { dg-error "nodiscard\[^\n\r]*can appear at most once" } */ +[[nodiscard, nodiscard]] int check1 (void); // { dg-warning "specified multiple times" } void test (void) diff --git a/gcc/testsuite/g++.dg/cpp2a/spaceship-eq10.C b/gcc/testsuite/g++.dg/cpp2a/spaceship-eq10.C new file mode 100644 index 0000000..93f5e25 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp2a/spaceship-eq10.C @@ -0,0 +1,11 @@ +// PR c++/95844 +// { dg-do compile { target c++20 } } + +#include <compare> + +struct F { + [[deprecated("oh no")]] std::strong_ordering operator<=>(const F&) const = default; // { dg-message "" } +}; +void use_f(F f) { + void(f == f); // { dg-warning "deprecated" } +} diff --git a/gcc/testsuite/g++.dg/cpp2a/spaceship-err5.C b/gcc/testsuite/g++.dg/cpp2a/spaceship-err5.C new file mode 100644 index 0000000..3dc2a0f --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp2a/spaceship-err5.C @@ -0,0 +1,23 @@ +// { dg-do compile { target c++20 } } +// Test [depr.arith.conv.enum] for <=>. + +#include <compare> + +enum E1 { e } e1; +enum E2 { f } e2; +static double d; + +void +g () +{ + void(e1 <=> e); + e1 <=> d; // { dg-error "invalid operands of types .E1. and .double." } + d <=> e1; // { dg-error "invalid operands of types .double. and .E1." } + e <=> d; // { dg-error "invalid operands of types .E1. and .double." } + d <=> e; // { dg-error "invalid operands of types .double. and .E1." } + + e <=> f; // { dg-error "invalid operands of types .E1. and .E2." } + f <=> e; // { dg-error "invalid operands of types .E2. and .E1." } + e1 <=> e2; // { dg-error "invalid operands of types .E1. and .E2." } + e2 <=> e1; // { dg-error "invalid operands of types .E2. and .E1." } +} diff --git a/gcc/testsuite/g++.dg/diagnostic/ptrtomem1.C b/gcc/testsuite/g++.dg/diagnostic/ptrtomem1.C new file mode 100644 index 0000000..bb1327f --- /dev/null +++ b/gcc/testsuite/g++.dg/diagnostic/ptrtomem1.C @@ -0,0 +1,31 @@ +// PR c++/97406 +// { dg-do compile { target c++20 } } + +struct X { + void f() { } + int a; + int arr[5]; +}; + +// Duplicated so that I can check dg-message. +template<typename T> +requires (sizeof(T)==1) // { dg-message {\[with T = void \(X::\*\)\(\)\]} } +void f1(T) +{ } + +template<typename T> +requires (sizeof(T)==1) // { dg-message {\[with T = int X::\*\]} } +void f2(T) +{ } + +template<typename T> +requires (sizeof(T)==1) // dg-message {\[with T = int \(X::\*\)\[5\]\]} } +void f3(T) +{ } + +int main() +{ + f1(&X::f); // { dg-error "no matching function for call" } + f2(&X::a); // { dg-error "no matching function for call" } + f3(&X::arr); // { dg-error "no matching function for call" } +} diff --git a/gcc/testsuite/g++.dg/diagnostic/ptrtomem2.C b/gcc/testsuite/g++.dg/diagnostic/ptrtomem2.C new file mode 100644 index 0000000..f3b29a0 --- /dev/null +++ b/gcc/testsuite/g++.dg/diagnostic/ptrtomem2.C @@ -0,0 +1,14 @@ +// PR c++/85901 +// { dg-do compile { target c++11 } } + +template<class> struct A; + +template<class U> +struct A<int U::*> { + template<class TT> + static auto c(int U::*p, TT o) -> decltype(o.*p); // { dg-message {A<int U::\*>} } +}; + +struct X {}; + +int x = A<int X::*>::c(); // { dg-error "no matching function for call" } diff --git a/gcc/testsuite/g++.dg/eh/pr42859.C b/gcc/testsuite/g++.dg/eh/pr42859.C index a9f1473..0de9140 100644 --- a/gcc/testsuite/g++.dg/eh/pr42859.C +++ b/gcc/testsuite/g++.dg/eh/pr42859.C @@ -13,7 +13,7 @@ ptw32_terminate (void) catch (int) { } - catch (int) + catch (int) // { dg-warning "will be caught by earlier handler" } { } } diff --git a/gcc/testsuite/g++.dg/ext/attr-used-2.C b/gcc/testsuite/g++.dg/ext/attr-used-2.C new file mode 100644 index 0000000..d7cf6e9 --- /dev/null +++ b/gcc/testsuite/g++.dg/ext/attr-used-2.C @@ -0,0 +1,15 @@ +// PR c++/67453 +// { dg-do compile } +// { dg-final { scan-assembler "_ZN1SC\[12]Ev" } } +// { dg-final { scan-assembler "_ZN1SD\[12]Ev" } } +// { dg-final { scan-assembler "_ZN1SC\[12]ERKS_" } } + +struct S { + S(); + ~S(); + S(const S&); +}; + +__attribute__((used)) inline S::S() { } +__attribute__((used)) inline S::~S() { } +__attribute__((used)) inline S::S(const S&) { } diff --git a/gcc/testsuite/g++.dg/ext/is_nothrow_constructible1.C b/gcc/testsuite/g++.dg/ext/is_nothrow_constructible1.C new file mode 100644 index 0000000..472acf9 --- /dev/null +++ b/gcc/testsuite/g++.dg/ext/is_nothrow_constructible1.C @@ -0,0 +1,48 @@ +// { dg-do compile { target c++11 } } + +struct A { }; +struct B { B(); operator int(); }; +struct C { + C() = default; + C(const C&); + C(C&&) = default; + C& operator=(C&&); + C& operator= (const C&) = default; +}; +struct D { ~D() noexcept(false) {} }; + +#define SA(X) static_assert((X),#X) + +SA(__is_nothrow_constructible(A)); +SA(__is_nothrow_constructible(A,A)); +SA(!__is_nothrow_constructible(B)); +SA(__is_nothrow_constructible(B,B)); + +SA(!__is_nothrow_constructible(A,B)); +SA(!__is_nothrow_constructible(B,A)); + +SA(__is_nothrow_constructible(C)); +SA(__is_nothrow_constructible(C,C)); +SA(!__is_nothrow_constructible(C,C&)); +SA(__is_nothrow_assignable(C,C&)); +SA(!__is_nothrow_assignable(C,C)); +SA(!__is_nothrow_assignable(C,C&&)); +SA(!__is_nothrow_assignable(void,int)); +SA(!__is_nothrow_assignable(const void,int)); +SA(!__is_nothrow_assignable(volatile void,int)); +SA(!__is_nothrow_assignable(const volatile void,int)); + +SA(__is_nothrow_constructible(int,int)); +SA(__is_nothrow_constructible(int,double)); +SA(!__is_nothrow_constructible(int,B)); +SA(!__is_nothrow_constructible(void,int)); +SA(!__is_nothrow_constructible(const void,int)); +SA(!__is_nothrow_constructible(volatile void,int)); +SA(!__is_nothrow_constructible(const volatile void,int)); +SA(!__is_nothrow_constructible(int, void*)); +SA(!__is_nothrow_constructible(int, int*)); +SA(!__is_nothrow_constructible(int, const int*)); +SA(!__is_nothrow_constructible(int*, void*)); +SA(!__is_nothrow_constructible(int*, const int*)); + +SA(!__is_nothrow_constructible(D)); diff --git a/gcc/testsuite/g++.dg/ext/is_nothrow_constructible2.C b/gcc/testsuite/g++.dg/ext/is_nothrow_constructible2.C new file mode 100644 index 0000000..86b9668 --- /dev/null +++ b/gcc/testsuite/g++.dg/ext/is_nothrow_constructible2.C @@ -0,0 +1,15 @@ +// { dg-do compile { target c++11 } } + +struct X { + X() = default; + template<class... U> X(U...) noexcept; +}; + +struct Y { + template<class... U> Y(U...); +}; + +#define SA(X) static_assert((X),#X) + +SA(__is_nothrow_constructible(X)); +SA(!__is_nothrow_constructible(Y)); diff --git a/gcc/testsuite/g++.dg/ext/is_nothrow_constructible3.C b/gcc/testsuite/g++.dg/ext/is_nothrow_constructible3.C new file mode 100644 index 0000000..220ee0b --- /dev/null +++ b/gcc/testsuite/g++.dg/ext/is_nothrow_constructible3.C @@ -0,0 +1,8 @@ +// { dg-do compile { target c++11 } } + +template <class T, class... Args> void bar() { + static_assert(__is_nothrow_constructible(T, Args...), ""); +} + +template void bar<int>(); +template void bar<int,int>(); diff --git a/gcc/testsuite/g++.dg/ext/is_nothrow_constructible4.C b/gcc/testsuite/g++.dg/ext/is_nothrow_constructible4.C new file mode 100644 index 0000000..9448c2d --- /dev/null +++ b/gcc/testsuite/g++.dg/ext/is_nothrow_constructible4.C @@ -0,0 +1,11 @@ +// { dg-do compile { target c++11 } } + +#define SA(X) static_assert((X),#X) + +void f() +{ + int x; + auto l = [=]{ return x; }; + typedef decltype(l) C; + SA(__is_nothrow_constructible(C,C)); +} diff --git a/gcc/testsuite/g++.dg/ext/is_nothrow_constructible5.C b/gcc/testsuite/g++.dg/ext/is_nothrow_constructible5.C new file mode 100644 index 0000000..b847113 --- /dev/null +++ b/gcc/testsuite/g++.dg/ext/is_nothrow_constructible5.C @@ -0,0 +1,12 @@ +// PR c++/80991 +// { dg-do compile { target c++11 } } + +template<bool> void foo() +{ + static_assert(__is_nothrow_constructible(int, int), ""); +} + +void bar() +{ + foo<true>(); +} diff --git a/gcc/testsuite/g++.dg/ext/is_nothrow_constructible6.C b/gcc/testsuite/g++.dg/ext/is_nothrow_constructible6.C new file mode 100644 index 0000000..bdfdfb9 --- /dev/null +++ b/gcc/testsuite/g++.dg/ext/is_nothrow_constructible6.C @@ -0,0 +1,11 @@ +// { dg-do compile { target c++11 } } +// PR c++/81589 + +template <typename k> +struct z { + z() noexcept { + k::error; + } +}; + +int x = __is_nothrow_constructible(z<int>); diff --git a/gcc/testsuite/g++.dg/gomp/allocate-1.C b/gcc/testsuite/g++.dg/gomp/allocate-1.C new file mode 100644 index 0000000..e70c65e --- /dev/null +++ b/gcc/testsuite/g++.dg/gomp/allocate-1.C @@ -0,0 +1,88 @@ +// { dg-do compile } +// { dg-additional-options "-std=c++11" } + +typedef enum omp_allocator_handle_t +#if __cplusplus >= 201103L +: __UINTPTR_TYPE__ +#endif +{ + omp_null_allocator = 0, + omp_default_mem_alloc = 1, + omp_large_cap_mem_alloc = 2, + omp_const_mem_alloc = 3, + omp_high_bw_mem_alloc = 4, + omp_low_lat_mem_alloc = 5, + omp_cgroup_mem_alloc = 6, + omp_pteam_mem_alloc = 7, + omp_thread_mem_alloc = 8, + __omp_allocator_handle_t_max__ = __UINTPTR_MAX__ +} omp_allocator_handle_t; + +namespace N1 +{ + using ::omp_allocator_handle_t; + void + foo (const omp_allocator_handle_t h) + { + int x = 0; + #pragma omp parallel allocate (h: x) private (x) + x = 1; + } +} + +namespace N2 +{ + typedef enum omp_allocator_handle_t { my = 0 } omp_allocator_handle_t; + void + foo (omp_allocator_handle_t h) + { + int x = 0; + #pragma omp parallel allocate (h: x) private (x) // { dg-error "'allocate' clause allocator expression has type 'N2::omp_allocator_handle_t' rather than 'omp_allocator_handle_t'" } + x = 1; + } +} + +struct S +{ + void foo () + { + #pragma omp parallel allocate (omp_default_mem_alloc:s) firstprivate (s) + s++; + } + int s; +}; + +template <typename T> +struct U +{ + int foo () + { + #pragma omp parallel allocate (omp_default_mem_alloc:s) firstprivate (s) + s++; + return 1; + } + T s; +}; + +template <typename T> +int foo (T t) +{ + int x = 0; + #pragma omp parallel firstprivate (x) allocate (t: x) + x = 1; + return 0; +} + +template <typename T> +int bar (T t) +{ + int x = 0; + #pragma omp parallel firstprivate (x) allocate (t: x) // { dg-error "'allocate' clause allocator expression has type 'int' rather than 'omp_allocator_handle_t'" } + x = 1; + return 0; +} + +omp_allocator_handle_t h; +int a = foo (h); +int b = bar (0); +int c = U<int> ().foo (); diff --git a/gcc/testsuite/g++.dg/gomp/allocate-2.C b/gcc/testsuite/g++.dg/gomp/allocate-2.C new file mode 100644 index 0000000..b8cf480 --- /dev/null +++ b/gcc/testsuite/g++.dg/gomp/allocate-2.C @@ -0,0 +1,11 @@ +// PR c++/97670 + +struct S { int s; }; + +void +foo () +{ + S s[1] = { S () }; +#pragma omp parallel reduction (+: s) allocate(s) // { dg-error "user defined reduction not found for 's'" } + s[0].s++; +} diff --git a/gcc/testsuite/g++.dg/gomp/allocate-3.C b/gcc/testsuite/g++.dg/gomp/allocate-3.C new file mode 100644 index 0000000..e778314 --- /dev/null +++ b/gcc/testsuite/g++.dg/gomp/allocate-3.C @@ -0,0 +1,206 @@ +template <typename T> +void +foo (T &x, T (&y)[4], T *&z, int &u, int (&v)[4], int *&w) +{ + T s[4] = { 0, 0, 0, 0 }; + T *p = s; +#pragma omp parallel reduction (+: s) allocate(s) + s[0]++; +#pragma omp parallel reduction (+: s[0:3]) allocate(s) + s[0]++; +#pragma omp parallel reduction (+: s[2:2]) allocate(s) + s[2]++; +#pragma omp parallel reduction (+: p[:2]) allocate(p) + p[0]++; +#pragma omp parallel reduction (+: p[2:2]) allocate(p) + p[2]++; + int s2[4] = { 0, 0, 0, 0 }; + int *p2 = s2; +#pragma omp parallel reduction (+: s2) allocate(s2) + s2[0]++; +#pragma omp parallel reduction (+: s2[0:3]) allocate(s2) + s2[0]++; +#pragma omp parallel reduction (+: s2[2:2]) allocate(s2) + s2[2]++; +#pragma omp parallel reduction (+: p2[:2]) allocate(p2) + p2[0]++; +#pragma omp parallel reduction (+: p2[2:2]) allocate(p2) + p2[2]++; +#pragma omp parallel reduction (+: x) allocate(x) + x++; +#pragma omp parallel reduction (+: y) allocate(y) + y[0]++; +#pragma omp parallel reduction (+: y[0:3]) allocate(y) + y[0]++; +#pragma omp parallel reduction (+: y[2:2]) allocate(y) + y[2]++; +#pragma omp parallel reduction (+: z[:2]) allocate(z) + z[0]++; +#pragma omp parallel reduction (+: z[2:2]) allocate(z) + z[2]++; +#pragma omp parallel reduction (+: u) allocate(u) + u++; +#pragma omp parallel reduction (+: v) allocate(v) + v[0]++; +#pragma omp parallel reduction (+: v[0:3]) allocate(v) + v[0]++; +#pragma omp parallel reduction (+: v[2:2]) allocate(v) + v[2]++; +#pragma omp parallel reduction (+: w[:2]) allocate(w) + w[0]++; +#pragma omp parallel reduction (+: w[2:2]) allocate(w) + w[2]++; +} + +template <typename T> +void +bar (T &x, T (&y)[4], T *&z, int &u, int (&v)[4], int *&w) +{ + T s[4] = { 0, 0, 0, 0 }; + T *p = s; + int i; +#pragma omp teams distribute parallel for reduction (+: s) allocate(s) + for (i = 0; i < 64; i++) + s[0]++; +#pragma omp teams distribute parallel for reduction (+: s[0:3]) allocate(s) + for (i = 0; i < 64; i++) + s[0]++; +#pragma omp teams distribute parallel for reduction (+: s[2:2]) allocate(s) + for (i = 0; i < 64; i++) + s[2]++; +#pragma omp teams distribute parallel for reduction (+: p[:2]) allocate(p) + for (i = 0; i < 64; i++) + p[0]++; +#pragma omp teams distribute parallel for reduction (+: p[2:2]) allocate(p) + for (i = 0; i < 64; i++) + p[2]++; + int s2[4] = { 0, 0, 0, 0 }; + int *p2 = s2; +#pragma omp teams distribute parallel for reduction (+: s2) allocate(s2) + for (i = 0; i < 64; i++) + s2[0]++; +#pragma omp teams distribute parallel for reduction (+: s2[0:3]) allocate(s2) + for (i = 0; i < 64; i++) + s2[0]++; +#pragma omp teams distribute parallel for reduction (+: s2[2:2]) allocate(s2) + for (i = 0; i < 64; i++) + s2[2]++; +#pragma omp teams distribute parallel for reduction (+: p2[:2]) allocate(p2) + for (i = 0; i < 64; i++) + p2[0]++; +#pragma omp teams distribute parallel for reduction (+: p2[2:2]) allocate(p2) + for (i = 0; i < 64; i++) + p2[2]++; +#pragma omp teams distribute parallel for reduction (+: x) allocate(x) + for (i = 0; i < 64; i++) + x++; +#pragma omp teams distribute parallel for reduction (+: y) allocate(y) + for (i = 0; i < 64; i++) + y[0]++; +#pragma omp teams distribute parallel for reduction (+: y[0:3]) allocate(y) + for (i = 0; i < 64; i++) + y[0]++; +#pragma omp teams distribute parallel for reduction (+: y[2:2]) allocate(y) + for (i = 0; i < 64; i++) + y[2]++; +#pragma omp teams distribute parallel for reduction (+: z[:2]) allocate(z) + for (i = 0; i < 64; i++) + z[0]++; +#pragma omp teams distribute parallel for reduction (+: z[2:2]) allocate(z) + for (i = 0; i < 64; i++) + z[2]++; +#pragma omp teams distribute parallel for reduction (+: u) allocate(u) + for (i = 0; i < 64; i++) + u++; +#pragma omp teams distribute parallel for reduction (+: v) allocate(v) + for (i = 0; i < 64; i++) + v[0]++; +#pragma omp teams distribute parallel for reduction (+: v[0:3]) allocate(v) + for (i = 0; i < 64; i++) + v[0]++; +#pragma omp teams distribute parallel for reduction (+: v[2:2]) allocate(v) + for (i = 0; i < 64; i++) + v[2]++; +#pragma omp teams distribute parallel for reduction (+: w[:2]) allocate(w) + for (i = 0; i < 64; i++) + w[0]++; +#pragma omp teams distribute parallel for reduction (+: w[2:2]) allocate(w) + for (i = 0; i < 64; i++) + w[2]++; +} + +void +baz (long int &x, long int (&y)[4], long int *&z) +{ +#pragma omp parallel reduction (+: x) allocate(x) + x++; +#pragma omp parallel reduction (+: y) allocate(y) + y[0]++; +#pragma omp parallel reduction (+: y[0:3]) allocate(y) + y[0]++; +#pragma omp parallel reduction (+: y[2:2]) allocate(y) + y[2]++; +#pragma omp parallel reduction (+: z[:2]) allocate(z) + z[0]++; +#pragma omp parallel reduction (+: z[2:2]) allocate(z) + z[2]++; +} + +void +qux (long long int &x, long long int (&y)[4], long long int *&z) +{ + int i; +#pragma omp teams distribute parallel for reduction (+: x) allocate(x) + for (i = 0; i < 64; i++) + x++; +#pragma omp teams distribute parallel for reduction (+: y) allocate(y) + for (i = 0; i < 64; i++) + y[0]++; +#pragma omp teams distribute parallel for reduction (+: y[0:3]) allocate(y) + for (i = 0; i < 64; i++) + y[0]++; +#pragma omp teams distribute parallel for reduction (+: y[2:2]) allocate(y) + for (i = 0; i < 64; i++) + y[2]++; +#pragma omp teams distribute parallel for reduction (+: z[:2]) allocate(z) + for (i = 0; i < 64; i++) + z[0]++; +#pragma omp teams distribute parallel for reduction (+: z[2:2]) allocate(z) + for (i = 0; i < 64; i++) + z[2]++; +} + +void +test () +{ + long int x = 0; + long int y[4] = { 0, 0, 0, 0 }; + long int *z = y; + int u = 0; + int v[4] = { 0, 0, 0, 0 }; + int *w = v; + long long int x2 = 0; + long long int y2[4] = { 0, 0, 0, 0 }; + long long int *z2 = y2; + foo (x, y, z, u, v, w); + bar (x2, y2, z2, u, v, w); +} + +namespace N +{ + int a; + void foo () + { + int i; + #pragma omp parallel firstprivate (N::a) allocate (a) + a++; + #pragma omp parallel firstprivate (a) allocate (N::a) + a++; + #pragma omp teams distribute parallel for firstprivate (N::a) allocate (a) + for (i = 0; i < 64; i++) + a++; + #pragma omp teams distribute parallel for firstprivate (a) allocate (N::a) + for (i = 0; i < 64; i++) + a++; + } +} diff --git a/gcc/testsuite/g++.dg/guality/guality.exp b/gcc/testsuite/g++.dg/guality/guality.exp index 33571f1..1d5b65f 100644 --- a/gcc/testsuite/g++.dg/guality/guality.exp +++ b/gcc/testsuite/g++.dg/guality/guality.exp @@ -38,7 +38,7 @@ global GDB if ![info exists ::env(GUALITY_GDB_NAME)] { if [info exists GDB] { set guality_gdb_name "$GDB" - } elseif [file exists $rootme/../gdb/gdb] { + } elseif { [info exists rootme] && [file exists $rootme/../gdb/gdb] } { # If we're doing a combined build, and gdb is available, use it. set guality_gdb_name "$rootme/../gdb/gdb" } else { diff --git a/gcc/testsuite/g++.dg/inherit/thunk8.C b/gcc/testsuite/g++.dg/inherit/thunk8.C index ef64535..ecb9cbf 100644 --- a/gcc/testsuite/g++.dg/inherit/thunk8.C +++ b/gcc/testsuite/g++.dg/inherit/thunk8.C @@ -4,6 +4,7 @@ /* { dg-do compile } */ /* { dg-require-effective-target arm_thumb1_ok } */ +/* { dg-require-effective-target fpic } */ /* { dg-options "-mthumb -fPIC" } */ struct A { diff --git a/gcc/testsuite/g++.dg/ipa/devirt-24.C b/gcc/testsuite/g++.dg/ipa/devirt-24.C index eaef1f5..7b5b806 100644 --- a/gcc/testsuite/g++.dg/ipa/devirt-24.C +++ b/gcc/testsuite/g++.dg/ipa/devirt-24.C @@ -37,4 +37,4 @@ C *b = new (C); } } /* { dg-final { scan-ipa-dump-times "Discovered a virtual call to a known target" 1 "inline" { xfail *-*-* } } } */ -/* { dg-final { scan-ipa-dump-times "Aggregate passed by reference" 1 "cp" } } */ +/* { dg-final { scan-ipa-dump-times "Aggregate passed by reference" 2 "cp" } } */ diff --git a/gcc/testsuite/g++.dg/lookup/extern-redecl2.C b/gcc/testsuite/g++.dg/lookup/extern-redecl2.C new file mode 100644 index 0000000..9c5caa6 --- /dev/null +++ b/gcc/testsuite/g++.dg/lookup/extern-redecl2.C @@ -0,0 +1,18 @@ +// PR 97395 +// ICE injecting hidden decl in wrong namespace + +namespace pr { + template<typename WW> + void + kp () + { + extern WW hz; + } + + void + n5 () + { + kp<int[]> (); + kp<int[1]> (); + } +} diff --git a/gcc/testsuite/g++.dg/lookup/local-extern.C b/gcc/testsuite/g++.dg/lookup/local-extern.C new file mode 100644 index 0000000..1d6d861 --- /dev/null +++ b/gcc/testsuite/g++.dg/lookup/local-extern.C @@ -0,0 +1,13 @@ +int foo () +{ + extern int baz (int i = 5); + return baz (); +} + +int baz (int i = 0); + +int bar () +{ + extern int baz (int i = 6); + return baz (); +} diff --git a/gcc/testsuite/g++.dg/lookup/pr80891-5.C b/gcc/testsuite/g++.dg/lookup/pr80891-5.C index e018922..10d1ce3 100644 --- a/gcc/testsuite/g++.dg/lookup/pr80891-5.C +++ b/gcc/testsuite/g++.dg/lookup/pr80891-5.C @@ -14,7 +14,7 @@ template <typename, typename, typename, typename, struct B { B(A, A, int, int, int, int); void m_fn1(SubGraphIsoMapCallback p1) { - __normal_iterator __trans_tmp_1(); + __normal_iterator __trans_tmp_1(); // { dg-warning "empty parentheses" } p1(__trans_tmp_1, 0); } }; diff --git a/gcc/testsuite/g++.dg/lookup/using26.C b/gcc/testsuite/g++.dg/lookup/using26.C index 857c134..dd4e130 100644 --- a/gcc/testsuite/g++.dg/lookup/using26.C +++ b/gcc/testsuite/g++.dg/lookup/using26.C @@ -17,9 +17,9 @@ struct C int next; }; -struct D : A, B, C // { dg-error "context" } +struct D : A, B, C { - using B::next; + using B::next; // { dg-error "context" } void f() { next = 12; diff --git a/gcc/testsuite/g++.dg/lookup/using53.C b/gcc/testsuite/g++.dg/lookup/using53.C index 595612e..f9e59e6 100644 --- a/gcc/testsuite/g++.dg/lookup/using53.C +++ b/gcc/testsuite/g++.dg/lookup/using53.C @@ -43,6 +43,7 @@ template class DT<int>; namespace N { int i; + enum bob {Q}; } void diff --git a/gcc/testsuite/g++.dg/lto/pr79050_0.C b/gcc/testsuite/g++.dg/lto/pr79050_0.C index 1f31b5d..464f559 100644 --- a/gcc/testsuite/g++.dg/lto/pr79050_0.C +++ b/gcc/testsuite/g++.dg/lto/pr79050_0.C @@ -3,5 +3,5 @@ int main () { - auto foo (); + extern auto foo (); } diff --git a/gcc/testsuite/g++.dg/lto/pr84805_0.C b/gcc/testsuite/g++.dg/lto/pr84805_0.C index 1509eae..668ba36 100644 --- a/gcc/testsuite/g++.dg/lto/pr84805_0.C +++ b/gcc/testsuite/g++.dg/lto/pr84805_0.C @@ -149,5 +149,5 @@ public: class XclImpRoot : XclRoot {}; class XclImpColRowSettings : XclImpRoot {}; void lcl_ExportExcelBiff() { -XclRootData aExpData(); +extern XclRootData aExpData(); } diff --git a/gcc/testsuite/g++.dg/no-stack-protector-attr-2.C b/gcc/testsuite/g++.dg/no-stack-protector-attr-2.C new file mode 100644 index 0000000..6db6fef --- /dev/null +++ b/gcc/testsuite/g++.dg/no-stack-protector-attr-2.C @@ -0,0 +1,7 @@ +/* PR c/94722 */ +/* { dg-do compile } */ + +int __attribute__((no_stack_protector, stack_protect)) c() /* { dg-warning "ignoring attribute 'stack_protect' because it conflicts with attribute 'no_stack_protector'" } */ +{ + return 0; +} diff --git a/gcc/testsuite/g++.dg/no-stack-protector-attr-3.C b/gcc/testsuite/g++.dg/no-stack-protector-attr-3.C new file mode 100644 index 0000000..dd9cd49 --- /dev/null +++ b/gcc/testsuite/g++.dg/no-stack-protector-attr-3.C @@ -0,0 +1,23 @@ +/* PR c/94722 */ +/* Test that stack protection is disabled via no_stack_protector attribute. */ + +/* { dg-do compile { target i?86-*-* x86_64-*-* } } */ +/* { dg-options "-O2 -fstack-protector-explicit" } */ + +/* { dg-do compile } */ + +int __attribute__((no_stack_protector)) foo() +{ + int a; + char b[34]; + return 0; +} + +int __attribute__((stack_protect)) bar() +{ + int a; + char b[34]; + return 0; +} + +/* { dg-final { scan-assembler-times "stack_chk_fail" 1 } } */ diff --git a/gcc/testsuite/g++.dg/no-stack-protector-attr.C b/gcc/testsuite/g++.dg/no-stack-protector-attr.C new file mode 100644 index 0000000..e5105bf --- /dev/null +++ b/gcc/testsuite/g++.dg/no-stack-protector-attr.C @@ -0,0 +1,16 @@ +/* PR c/94722 */ +/* Test that stack protection is disabled via no_stack_protector attribute. */ + +/* { dg-do compile { target i?86-*-* x86_64-*-* } } */ +/* { dg-options "-O2 -fstack-protector-all" } */ + +/* { dg-do compile } */ + +int __attribute__((no_stack_protector)) c() +{ + int a; + char b[34]; + return 0; +} + +/* { dg-final { scan-assembler-not "stack_chk_fail" } } */ diff --git a/gcc/testsuite/g++.dg/opt/pr64411.C b/gcc/testsuite/g++.dg/opt/pr64411.C index 122b9ee..6ecc0a8 100644 --- a/gcc/testsuite/g++.dg/opt/pr64411.C +++ b/gcc/testsuite/g++.dg/opt/pr64411.C @@ -1,5 +1,6 @@ // PR target/64411 // { dg-do compile { target { { i?86-*-* x86_64-*-* } && lp64 } } } +// { dg-require-effective-target fpic } // { dg-options "-Os -mcmodel=medium -fPIC -fschedule-insns -fselective-scheduling" } typedef __SIZE_TYPE__ size_t; diff --git a/gcc/testsuite/g++.dg/opt/pr97767.C b/gcc/testsuite/g++.dg/opt/pr97767.C new file mode 100644 index 0000000..da0879d --- /dev/null +++ b/gcc/testsuite/g++.dg/opt/pr97767.C @@ -0,0 +1,10 @@ +// { dg-do compile } +// { dg-options "-O -fstrict-enums -ftree-vrp -w" } + +enum { E0 = 0, E1 = 1, E2 = 2 } e; + +int +foo (void) +{ + return __builtin_popcount ((int) e); +} diff --git a/gcc/testsuite/g++.dg/other/i386-2.C b/gcc/testsuite/g++.dg/other/i386-2.C index 449f30d..b964248 100644 --- a/gcc/testsuite/g++.dg/other/i386-2.C +++ b/gcc/testsuite/g++.dg/other/i386-2.C @@ -1,5 +1,5 @@ /* { dg-do compile { target i?86-*-* x86_64-*-* } } */ -/* { dg-options "-O -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mavx512vbmi2 -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mavx512bitalg -mpconfig -mwbnoinvd -mavx512bf16 -menqcmd -mavx512vp2intersect -mserialize -mtsxldtrk -mamx-tile -mamx-int8 -mamx-bf16" } */ +/* { dg-options "-O -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mavx512vbmi2 -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mavx512bitalg -mpconfig -mwbnoinvd -mavx512bf16 -menqcmd -mavx512vp2intersect -mserialize -mtsxldtrk -mamx-tile -mamx-int8 -mamx-bf16 -mkl -mwidekl" } */ /* Test that {,x,e,p,t,s,w,a,b,i}mmintrin.h, mm3dnow.h, fma4intrin.h, xopintrin.h, abmintrin.h, bmiintrin.h, tbmintrin.h, lwpintrin.h, diff --git a/gcc/testsuite/g++.dg/other/i386-3.C b/gcc/testsuite/g++.dg/other/i386-3.C index 29e9891..2f73de2 100644 --- a/gcc/testsuite/g++.dg/other/i386-3.C +++ b/gcc/testsuite/g++.dg/other/i386-3.C @@ -1,5 +1,5 @@ /* { dg-do compile { target i?86-*-* x86_64-*-* } } */ -/* { dg-options "-O -fkeep-inline-functions -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mavx512vbmi2 -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mavx512bitalg -mpconfig -mwbnoinvd -mavx512bf16 -menqcmd -mavx512vp2intersect -mserialize -mtsxldtrk -mamx-tile -mamx-int8 -mamx-bf16" } */ +/* { dg-options "-O -fkeep-inline-functions -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mavx512vbmi2 -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mavx512bitalg -mpconfig -mwbnoinvd -mavx512bf16 -menqcmd -mavx512vp2intersect -mserialize -mtsxldtrk -mamx-tile -mamx-int8 -mamx-bf16 -mkl -mwidekl" } */ /* Test that {,x,e,p,t,s,w,a,b,i}mmintrin.h, mm3dnow.h, fma4intrin.h, xopintrin.h, abmintrin.h, bmiintrin.h, tbmintrin.h, lwpintrin.h, diff --git a/gcc/testsuite/g++.dg/parse/attr3.C b/gcc/testsuite/g++.dg/parse/attr3.C index 57fa60e..de09598 100644 --- a/gcc/testsuite/g++.dg/parse/attr3.C +++ b/gcc/testsuite/g++.dg/parse/attr3.C @@ -10,5 +10,5 @@ int main () { S::F y; // { dg-warning "'F' is deprecated" } y = S::f; - return x + y; + return x + y; // { dg-warning "arithmetic between different enumeration types" "" { target c++20 } } } diff --git a/gcc/testsuite/g++.dg/parse/pr58898.C b/gcc/testsuite/g++.dg/parse/pr58898.C index e788c91..e67011d2 100644 --- a/gcc/testsuite/g++.dg/parse/pr58898.C +++ b/gcc/testsuite/g++.dg/parse/pr58898.C @@ -5,12 +5,12 @@ struct Foo { Foo() { - int t(int()); // Error + int t(int()); // { dg-warning "parentheses were disambiguated" } } }; int main() { - int t(int()); // OK + int t(int()); // { dg-warning "parentheses were disambiguated" } Foo<> a; // Error } diff --git a/gcc/testsuite/g++.dg/parse/pr96258.C b/gcc/testsuite/g++.dg/parse/pr96258.C new file mode 100644 index 0000000..1b642e1 --- /dev/null +++ b/gcc/testsuite/g++.dg/parse/pr96258.C @@ -0,0 +1,5 @@ +// { dg-additional-options -fopenmp } +// { dg-require-effective-target fopenmp } +#pragma omp declare simd // { dg-error "not immediately followed by" } + +// { dg-error "-:expected unqualified-id" "" { target *-*-* } .+1 } diff --git a/gcc/testsuite/g++.dg/pr57878.C b/gcc/testsuite/g++.dg/pr57878.C index 5df2b7c9e..ee9142b 100644 --- a/gcc/testsuite/g++.dg/pr57878.C +++ b/gcc/testsuite/g++.dg/pr57878.C @@ -1,5 +1,6 @@ /* { dg-do compile { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */ // { dg-require-effective-target c++11 } +// { dg-require-effective-target fpic } /* { dg-options "-O2 -fno-omit-frame-pointer -fPIC" } */ typedef int int32; diff --git a/gcc/testsuite/g++.dg/pr65032.C b/gcc/testsuite/g++.dg/pr65032.C index d6b6768..6e348f8 100644 --- a/gcc/testsuite/g++.dg/pr65032.C +++ b/gcc/testsuite/g++.dg/pr65032.C @@ -1,4 +1,5 @@ // { dg-do compile { target i?86-*-* x86_64-*-* } } +// { dg-require-effective-target fpic } // { dg-options "-Os -std=c++11 -fPIC -fstack-protector-strong -fomit-frame-pointer" } #pragma GCC visibility push(hidden) diff --git a/gcc/testsuite/g++.dg/pr84279.C b/gcc/testsuite/g++.dg/pr84279.C index a88d3fb..b2b5b8e 100644 --- a/gcc/testsuite/g++.dg/pr84279.C +++ b/gcc/testsuite/g++.dg/pr84279.C @@ -1,6 +1,7 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ /* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-require-effective-target fpic } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-O3 -mcpu=power8 -g -fPIC -fvisibility=hidden -fstack-protector-strong" } */ diff --git a/gcc/testsuite/g++.dg/pr97538.C b/gcc/testsuite/g++.dg/pr97538.C new file mode 100644 index 0000000..b29b1e4 --- /dev/null +++ b/gcc/testsuite/g++.dg/pr97538.C @@ -0,0 +1,27 @@ +// { dg-do compile } +// { dg-options "-fno-guess-branch-probability -fno-tree-pta -O1" } + +void *b, *c; +struct H { + virtual bool accept(const char *, unsigned long, int *, bool); +}; +char accept_bt[1], accept_cd[1]; +int accept_cb; +bool accept_cb_0; +class t : H { + bool accept(const char *, unsigned long bd, int *bg, bool) { + long bu = sizeof(int) + bd; + char *bw = bu > sizeof(accept_bt) ? new char : accept_bt, + *cf = bd ? new char : accept_cd; + __builtin___memcpy_chk(b, c, bd, 0); + if (bw != accept_bt) + delete bw; + bool ci = cj((int *)cf, bg), atran = bp && accept_cb_0; + atran &&ci &&cm(&accept_cb); + return ci; + } + bool cj(int *, int *); + bool cm(int *); + bool bp; +}; +void bj() { new t; } diff --git a/gcc/testsuite/g++.dg/pr97560.C b/gcc/testsuite/g++.dg/pr97560.C new file mode 100644 index 0000000..59313f9 --- /dev/null +++ b/gcc/testsuite/g++.dg/pr97560.C @@ -0,0 +1,45 @@ +// PR tree-optimization/97560 +// { dg-do compile { target c++11 } } +// { dg-options "-O2 -fno-tree-forwprop -fnon-call-exceptions" } + +template <typename> +struct pv; + +template <typename CY> +struct pv<CY &> { + typedef CY g7; +}; + +template <typename Q6> +typename pv<Q6>::g7 hq (Q6 &&lb) +{ + return static_cast<typename pv<Q6>::g7 &&> (lb); +} + +struct fk { + fk *j6; + fk *od; +}; + +fk *qi; + +struct xz : fk { + xz (xz &&) + { + qi = this; + + if (j6) + od = this; + } +}; + +struct el { + struct { + xz ls; + } eu; +}; + +struct be : el { +}; + +be l1 = hq (l1); diff --git a/gcc/testsuite/g++.dg/pr97609.C b/gcc/testsuite/g++.dg/pr97609.C new file mode 100644 index 0000000..8e582c9 --- /dev/null +++ b/gcc/testsuite/g++.dg/pr97609.C @@ -0,0 +1,46 @@ +// PR tree-optimization/97609 +// { dg-do compile { target c++11 } } +// { dg-options "-O2 -fno-tree-fre -fnon-call-exceptions" } + +struct _Fwd_list_node_base { + _Fwd_list_node_base *_M_next; + void _M_transfer_after() { _Fwd_list_node_base *__keep = _M_next = __keep; } +}; +struct _Fwd_list_const_iterator { + _Fwd_list_const_iterator(_Fwd_list_node_base *__n) : _M_node(__n) {} + _Fwd_list_const_iterator(int); + _Fwd_list_node_base *_M_node; +}; +template <typename, typename> struct forward_list { + _Fwd_list_node_base _M_head; + template <typename _InputIterator> + forward_list(_InputIterator, _InputIterator); + forward_list(int); + _Fwd_list_const_iterator cbefore_begin() { return &_M_head; } + void splice_after(_Fwd_list_const_iterator) noexcept; + void splice_after(_Fwd_list_const_iterator __pos, forward_list &) { + splice_after(__pos, 0); + } + using __remove_return_type = void; + __remove_return_type unique() { unique(0); } + template <typename _BinPred> __remove_return_type unique(_BinPred); +}; +template <typename _Tp, typename _Alloc> +void forward_list<_Tp, _Alloc>::splice_after(_Fwd_list_const_iterator __pos) + noexcept { + __pos._M_node->_M_transfer_after(); +} +template <typename _Tp, typename _Alloc> +template <typename _BinPred> +auto forward_list<_Tp, _Alloc>::unique(_BinPred) -> __remove_return_type { + forward_list __to_destroy(0); + splice_after(__to_destroy.cbefore_begin()); +} + +void +foo () +{ + forward_list<int, int> c1 (0, 0); + c1.unique (); +} + diff --git a/gcc/testsuite/g++.dg/template/error25.C b/gcc/testsuite/g++.dg/template/error25.C index 8901157..77b59cd 100644 --- a/gcc/testsuite/g++.dg/template/error25.C +++ b/gcc/testsuite/g++.dg/template/error25.C @@ -12,5 +12,5 @@ extern void f2 (); template<> extern void f2<void> (); // { dg-error "explicit template specialization cannot have a storage class" } -export template<class T> // { dg-warning "keyword 'export' not implemented" } +export template<class T> // { dg-warning "keyword 'export'" } static void* f3 (); diff --git a/gcc/testsuite/g++.dg/template/lookup16.C b/gcc/testsuite/g++.dg/template/lookup16.C new file mode 100644 index 0000000..5b34c08 --- /dev/null +++ b/gcc/testsuite/g++.dg/template/lookup16.C @@ -0,0 +1,23 @@ +// PR c++/94799 +// { dg-do compile { target c++11 } } + +template <typename> struct A { + typedef int type; + operator int(); +}; + +template <typename T> using B = A<T>; + +template <typename T> typename B<T>::type foo(B<T> b) +{ + auto r1 = b.operator typename A<T>::type(); + auto r2 = b.operator typename A<T>::template A<T>::type(); + auto r3 = b.operator typename B<T>::type(); + auto r4 = b.operator typename B<T>::template A<T>::type(); + return r1 + r2 + r3 + r4; +} + +void bar() +{ + foo(A<int>()); +} diff --git a/gcc/testsuite/g++.dg/template/pr97460.C b/gcc/testsuite/g++.dg/template/pr97460.C new file mode 100644 index 0000000..6dea489 --- /dev/null +++ b/gcc/testsuite/g++.dg/template/pr97460.C @@ -0,0 +1,9 @@ +// PR 97460 +// ICE, null dereference + +class io_context { + template <int> class basic_executor_type; +}; +template <int> class io_context::basic_executor_type { + template <int> friend class basic_executor_type; +}; diff --git a/gcc/testsuite/g++.dg/template/scope5.C b/gcc/testsuite/g++.dg/template/scope5.C index cf23a08..b20d897 100644 --- a/gcc/testsuite/g++.dg/template/scope5.C +++ b/gcc/testsuite/g++.dg/template/scope5.C @@ -59,7 +59,7 @@ template <typename av> struct ac : ao<av> { typedef c::e<am::an> aq; }; template <typename aw, typename i, typename ax> void ay(aw, i, ax) { // Not sure if this has been creduced from an initialization of a // variable to a block-scope extern function decl - au<c::e<ap<typename ak<i>::o>::f> > az2(); + au<c::e<ap<typename ak<i>::o>::f> > az2(); // { dg-warning "empty parentheses" } } void v() { ad a; diff --git a/gcc/testsuite/g++.dg/template/shadow3.C b/gcc/testsuite/g++.dg/template/shadow3.C new file mode 100644 index 0000000..a5f2563 --- /dev/null +++ b/gcc/testsuite/g++.dg/template/shadow3.C @@ -0,0 +1,4 @@ +// PR c++/97511 +// { dg-do compile { target c++11 } } + +template <class Z> using Z = Z; // { dg-error "shadow|declaration" } diff --git a/gcc/testsuite/g++.dg/torture/pr81659.C b/gcc/testsuite/g++.dg/torture/pr81659.C index 3696957..074099b 100644 --- a/gcc/testsuite/g++.dg/torture/pr81659.C +++ b/gcc/testsuite/g++.dg/torture/pr81659.C @@ -12,7 +12,7 @@ a (int b) catch (int) { } - catch (int) + catch (int) // { dg-warning "will be caught by earlier handler" } { } } diff --git a/gcc/testsuite/g++.dg/torture/pr92421.C b/gcc/testsuite/g++.dg/torture/pr92421.C index 2146e94..0489eb7 100644 --- a/gcc/testsuite/g++.dg/torture/pr92421.C +++ b/gcc/testsuite/g++.dg/torture/pr92421.C @@ -2,6 +2,10 @@ // { dg-do compile } // { dg-additional-options "-Wno-return-type" } +// VRP jump threading will create additional __builtin___memcpy_chk calls that +// may be out of bounds. +// { dg-additional-options "-Wno-stringop-overflow" } + typedef long a; void *b, *c; template <typename, typename> class d {}; diff --git a/gcc/testsuite/g++.dg/vect/simd-11.cc b/gcc/testsuite/g++.dg/vect/simd-11.cc new file mode 100644 index 0000000..912d184 --- /dev/null +++ b/gcc/testsuite/g++.dg/vect/simd-11.cc @@ -0,0 +1,61 @@ +// { dg-do compile } +// { dg-require-effective-target c++11 } +// { dg-additional-options "-Ofast" } + +template <typename> class h { +public: + ~h(); +}; +template <typename> struct l; +template <typename c> struct l<h<c> > { + using d = c; + template <typename e> using f = h<e>; +}; +template <typename g> struct o { + typedef l<g> j; + typedef typename j::d k; + template <typename c> struct p { typedef typename j::f<c> m; }; +}; +template <typename c, typename g> struct F { + typedef typename o<g>::p<c>::m q; + struct : q { + } r; +}; +template <typename c, typename g = h<c> > class s : F<c, g> { +public: + s(long); + typename o<typename F<c, g>::q>::k operator[](long); +}; +template <int> class t { +public: + int dimension; + t(const t &); + void operator+=(t); + double values[]; +}; +template <int dim> t<dim>::t(const t &p1) { + for (int i = 0; i < dim; ++i) + values[i] = p1.values[i]; +} +template <int dim> class u : public t<dim> { +public: + double m_fn1(const u &) const; +}; +template <int dim> double u<dim>::m_fn1(const u &) const { + double a; + for (int i = 0; i < dim; ++i) { + double b = this->values[i]; + a += b; + } + return a; +} +int m_fn2(const u<2> &p1, const u<2> &w) { + int n; + s<u<2> > c(n); + s<double> d(n); + double e = p1.m_fn1(w); + for (;;) { + c[0] += p1; + d = e; + } +} diff --git a/gcc/testsuite/g++.dg/vect/slp-pr97636.cc b/gcc/testsuite/g++.dg/vect/slp-pr97636.cc new file mode 100644 index 0000000..0123420 --- /dev/null +++ b/gcc/testsuite/g++.dg/vect/slp-pr97636.cc @@ -0,0 +1,83 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target c++17 } */ + +struct u { + int b; + int c; + template <typename d, typename e> u(d, e); +}; +template <class, class> struct f { u g; }; +template <class h, class i> class v { + typedef f<h, i> k; + k *l[4]; + k m; +public: + v(h, h); + void aa(h, i); +}; +template <class h, class i> void v<h, i>::aa(h, i) { n(&l[1], &m); } +template <class h, class i> void n(f<h, i> **o, f<h, i> *ab) { + bool p, r; + f q = **o; + f<h, i> *t; + h a = q.g; + h b = t->g; + if (r) + ; + else + goto ac; +s: + p = a.b || a.c < b.c; + if (p) + goto s; +ac: + ab->g = b; + b = t->g; + goto s; +} +template <class, class, class> class w {}; +template <class> class x; +template <class, class> class z; +class ad { +public: + template <typename, typename y, typename ae, typename af, typename ag> + static void ah(const z<y, ae> &, const z<y, af> &, x<ag> *&); +}; +template <typename, typename y, typename ae, typename af, typename ag> +void ad::ah(const z<y, ae> &ai, const z<y, af> &aj, x<ag> *&) { + u c(0, 0), d(0, 0), g(aj, ai); + v<u, y> e(c, d); + e.aa(g, 0); +} +template <class, class> class ak; +template <class, class, class al, class am, class an> +void ao(ak<al, am> ap, ak<al, an> aq) { + x<double> *f; + ad::ah<int>(*ap.ar, *aq.ar, f); +} +template <typename, typename, typename al, typename am, typename an, + typename as, typename at> +void au(w<al, am, as> ap, w<al, an, at> aq) { + ao<int, double>(static_cast<as &>(ap), static_cast<at &>(aq)); +} +template <class, class> class z {}; +template <class, class> class ak : public w<int, int, ak<int, int>> { +public: + z<int, int> *ar; +}; +template <class, class, class> class av; +template <typename, typename, typename, typename al, typename am, typename an, + typename aw, typename ax> +void ay(av<al, am, aw>, av<al, an, ax>) { + aw h, i; + au<int, double>(h, i); +} +template <class, class, class> class av {}; +class az { +public: + typedef av<int, double, ak<int, double>> ba; +}; +int main() { + az::ba j, k; + ay<int, double, az>(j, k); +} diff --git a/gcc/testsuite/g++.dg/warn/Wdiv-by-zero-3.C b/gcc/testsuite/g++.dg/warn/Wdiv-by-zero-3.C index 424eb0c..01f691f 100644 --- a/gcc/testsuite/g++.dg/warn/Wdiv-by-zero-3.C +++ b/gcc/testsuite/g++.dg/warn/Wdiv-by-zero-3.C @@ -5,8 +5,10 @@ foo (T t, int i) { int m1 = 10 / t; int m2 = 10 / i; - int m3 = 10 / (sizeof(T) - sizeof(int)); // { dg-warning "division by" } - int m4 = 10 / N; // { dg-warning "division by" } + // People don't want to see warnings for type- or value-dependent + // expressions. + int m3 = 10 / (sizeof(T) - sizeof(int)); // { dg-bogus "division by" } + int m4 = 10 / N; // { dg-bogus "division by" } return m1 + m2 + m3 + m4; } diff --git a/gcc/testsuite/g++.dg/warn/Wexceptions1.C b/gcc/testsuite/g++.dg/warn/Wexceptions1.C new file mode 100644 index 0000000..af140fd --- /dev/null +++ b/gcc/testsuite/g++.dg/warn/Wexceptions1.C @@ -0,0 +1,9 @@ +// PR c++/97675 + +struct Base { }; +struct Child : Base { }; +int main() { + try { throw Child(); } + catch (Base const&) { } + catch (Child const&) { } // { dg-warning "exception of type .Child. will be caught by earlier handler" } +} diff --git a/gcc/testsuite/g++.dg/warn/Wexceptions2.C b/gcc/testsuite/g++.dg/warn/Wexceptions2.C new file mode 100644 index 0000000..07c5155 --- /dev/null +++ b/gcc/testsuite/g++.dg/warn/Wexceptions2.C @@ -0,0 +1,10 @@ +// PR c++/97675 +// { dg-additional-options -Wno-exceptions } + +struct Base { }; +struct Child : Base { }; +int main() { + try { throw Child(); } + catch (Base const&) { } + catch (Child const&) { } // { dg-bogus "exception of type .Child. will be caught by earlier handler" } +} diff --git a/gcc/testsuite/g++.dg/warn/Wexceptions3.C b/gcc/testsuite/g++.dg/warn/Wexceptions3.C new file mode 100644 index 0000000..97fda9d --- /dev/null +++ b/gcc/testsuite/g++.dg/warn/Wexceptions3.C @@ -0,0 +1,29 @@ +// PR c++/81660 + +void bar (int); + +void +fn (int b) +{ + if (b) + throw; + try + { + bar (3); + } + catch (int) + { + } + catch (int) // { dg-warning "will be caught by earlier handler" } + { + } + catch (const int) // { dg-warning "will be caught by earlier handler" } + { + } + catch (int &) // { dg-warning "will be caught by earlier handler" } + { + } + catch (const int &) // { dg-warning "will be caught by earlier handler" } + { + } +} diff --git a/gcc/testsuite/g++.dg/warn/Winit-list4.C b/gcc/testsuite/g++.dg/warn/Winit-list4.C new file mode 100644 index 0000000..d136187 --- /dev/null +++ b/gcc/testsuite/g++.dg/warn/Winit-list4.C @@ -0,0 +1,15 @@ +// PR c++/97632 +// { dg-do compile { target c++20 } } +// Test we don't warn in an unevaluated operand. + +#include <initializer_list> + +template<typename _Tp> +concept default_initializable + = requires + { + _Tp{}; + (void) ::new _Tp; // { dg-bogus "does not extend the lifetime" } + }; + +static_assert(default_initializable<std::initializer_list<int>>); diff --git a/gcc/testsuite/g++.dg/warn/Wsizeof-array-div1.C b/gcc/testsuite/g++.dg/warn/Wsizeof-array-div1.C new file mode 100644 index 0000000..da220cd --- /dev/null +++ b/gcc/testsuite/g++.dg/warn/Wsizeof-array-div1.C @@ -0,0 +1,37 @@ +// PR c++/91741 +// { dg-do compile { target c++11 } } +// { dg-options "-Wall" } + +int +fn1 () +{ + int arr[10]; + return sizeof (arr) / sizeof (decltype(arr[0])); +} + +template<typename T, int N> +int fn2 (T (&arr)[N]) +{ + return sizeof (arr) / sizeof (T); +} + +template<typename T, int N> +int fn3 (T (&arr)[N]) +{ + return sizeof (arr) / sizeof (bool); // { dg-warning "expression does not compute" } +} + +template<typename U, int N, typename T> +int fn4 (T (&arr)[N]) +{ + return sizeof (arr) / sizeof (U); // { dg-warning "expression does not compute" } +} + +void +fn () +{ + int arr[10]; + fn2 (arr); + fn3 (arr); + fn4<short> (arr); +} diff --git a/gcc/testsuite/g++.dg/warn/Wsizeof-array-div2.C b/gcc/testsuite/g++.dg/warn/Wsizeof-array-div2.C new file mode 100644 index 0000000..66fe72a --- /dev/null +++ b/gcc/testsuite/g++.dg/warn/Wsizeof-array-div2.C @@ -0,0 +1,15 @@ +// PR c++/91741 +// { dg-do compile { target { lp64 } } } +// { dg-options "-Wall" } +// From <https://www.viva64.com/en/examples/v706/>. + +const int kBaudrates[] = { 50, 75, 110 }; + +void +foo () +{ + for(int i = sizeof(kBaudrates) / sizeof(char*); // { dg-warning "expression does not compute" } + --i >= 0;) + { + } +} diff --git a/gcc/testsuite/g++.dg/warn/Wtautological-compare3.C b/gcc/testsuite/g++.dg/warn/Wtautological-compare3.C new file mode 100644 index 0000000..89bf1b6 --- /dev/null +++ b/gcc/testsuite/g++.dg/warn/Wtautological-compare3.C @@ -0,0 +1,11 @@ +// PR c++/96675 +// { dg-do compile { target c++11 } } +// { dg-additional-options "-Wtautological-compare" } + +template<char c> +constexpr bool f(char d) { + return 'a' <= c && c <= 'z' ? (d | 0x20) == c : + 'A' <= c && c <= 'Z' ? (d & ~0x20) == c : + d == c; +} +static_assert(f<'p'>('P'), ""); diff --git a/gcc/testsuite/g++.dg/warn/Wtype-limits5.C b/gcc/testsuite/g++.dg/warn/Wtype-limits5.C new file mode 100644 index 0000000..5e79123 --- /dev/null +++ b/gcc/testsuite/g++.dg/warn/Wtype-limits5.C @@ -0,0 +1,11 @@ +// PR c++/96742 +// { dg-additional-options "-Wtype-limits" } + +template <unsigned N> +bool f(unsigned x) { + return unsigned(x < N); +} + +int main() { + f<0>(1); +} diff --git a/gcc/testsuite/g++.dg/warn/Wvexing-parse.C b/gcc/testsuite/g++.dg/warn/Wvexing-parse.C new file mode 100644 index 0000000..b02e904 --- /dev/null +++ b/gcc/testsuite/g++.dg/warn/Wvexing-parse.C @@ -0,0 +1,110 @@ +// PR c++/25814 +// { dg-do compile } +// Test -Wvexing-parse. + +struct T { }; + +struct X { + X(); +}; + +struct S { + S(int); + S foo (int (int)); + S(T); + int m; +}; + +struct W { + W(); + W(X, X); + int m; +}; + +int g; +int g1(int(g)); +int g2(int()); +void fg(int); + +void +fn1 (double (a)) +{ + extern int f0(); + extern int f1(int(a)); + int f2(int(a)); // { dg-warning "parentheses were disambiguated as a function declaration" } + int (*f3)(int(a)); + int f4(int a); + int f5(int()); // { dg-warning "parentheses were disambiguated as a function declaration" } + int f6(...); + int f7((int(a))); + int (f8); + int f9(S(s)); // { dg-warning "parentheses were disambiguated as a function declaration" } + int(f10) __attribute__(()); + int(f11(int())); + if (int(a) = 1) { } + int j, k, l(); // { dg-warning "empty parentheses were disambiguated as a function declaration" } + int m, f12(int(j)); // { dg-warning "parentheses were disambiguated as a function declaration" } + + T t1(); // { dg-warning "empty parentheses were disambiguated as a function declaration" } + T t2(T()); // { dg-warning "parentheses were disambiguated as a function declaration" } + /* Declares a variable t3. */ + T(t3); + T t4(), // { dg-warning "empty parentheses were disambiguated as a function declaration" } + t5(); // { dg-warning "empty parentheses were disambiguated as a function declaration" } + + extern S s1(int(a)); + S s2(int(a)); // { dg-warning "parentheses were disambiguated as a function declaration" } + S s3(int a); + S s4(int()); // { dg-warning "parentheses were disambiguated as a function declaration" } + S s5(int(int)); // { dg-warning "parentheses were disambiguated as a function declaration" } + S s6(...); + S s7((int(a))); + S s8((int)a); + S s9 = int(a); + S(T()); + S s10(S()); // { dg-warning "parentheses were disambiguated as a function declaration" } + S s11(T()); + S s12(X()); // { dg-warning "parentheses were disambiguated as a function declaration" } + S s13 = S(T()); + S(T()).foo(0); + S (S::*foo)(int (int)); + S(*s14)(int(a)); + S s15(); // { dg-warning "empty parentheses were disambiguated as a function declaration" } + S s16(void); + + /* Don't warn here. */ + void fv1(int(a)); + void fv2(int()); + void (fv3)(); + void (fv4)(void); + void (fv5)(int); + + int n(); // { dg-warning "empty parentheses were disambiguated as a function declaration" } + int (n2)(); // { dg-warning "empty parentheses were disambiguated as a function declaration" } + int n3(void); + + typedef int F(const char*); + typedef int F2(); + typedef int F3() const; + typedef int F4(int(a)) const; + + W w(X(), X()); // { dg-warning "parentheses were disambiguated as a function declaration" } +} + +struct C1 { + C1(int); +}; + +struct C2 { + C2(C1, int); +}; + +template<int N> int value() { return N; } + +void +fn2 () +{ + int i = 0; + C2 c2(C1(int(i)), i); + C1(value<0>()); +} diff --git a/gcc/testsuite/g++.dg/warn/Wvexing-parse2.C b/gcc/testsuite/g++.dg/warn/Wvexing-parse2.C new file mode 100644 index 0000000..0dbeb72 --- /dev/null +++ b/gcc/testsuite/g++.dg/warn/Wvexing-parse2.C @@ -0,0 +1,24 @@ +// PR c++/25814 +// { dg-do compile { target c++11 } } +// Test -Wvexing-parse. C++11 features. + +struct X { }; +struct T { + T(X); +}; + +void +fn1 (double (a)) +{ + auto l = [](){ + int f(int(a)); // { dg-warning "parentheses were disambiguated as a function declaration" } + }; + + [[noreturn]] int(e)(); // { dg-warning "empty parentheses were disambiguated as a function declaration" } + + T t1{X()}; + T t2(X{}); + T t3{X{}}; + + using U = int(); +} diff --git a/gcc/testsuite/g++.dg/warn/Wvexing-parse3.C b/gcc/testsuite/g++.dg/warn/Wvexing-parse3.C new file mode 100644 index 0000000..43fcdf2 --- /dev/null +++ b/gcc/testsuite/g++.dg/warn/Wvexing-parse3.C @@ -0,0 +1,129 @@ +// PR c++/25814 +// { dg-do compile { target c++11 } } +// { dg-additional-options "-fdiagnostics-show-caret" } +// Test -Wvexing-parse's fix-it hints in C++11. + +#include <initializer_list> + +struct X { }; + +struct S { + S(X); + S(std::initializer_list<X>); + int m; +}; + +struct T { + T(X); + int m; +}; + +struct W { + W(); + W(std::initializer_list<X>); + int m; +}; + +struct U { + U(); + int m; +}; + +int +main () +{ + /* + Careful what we're suggesting: + S a((X())) -> S(X) + S a({X()}) -> (std::initializer_list<X>) + S a{X()} -> (std::initializer_list<X>) + */ + S a(X()); // { dg-warning "6:parentheses were disambiguated as a function declaration" } + /* { dg-begin-multiline-output "" } + S a(X()); + ^~~~~ + { dg-end-multiline-output "" } */ + // { dg-message "6:add parentheses to declare a variable" "" { target *-*-* } 41 } + /* { dg-begin-multiline-output "" } + S a(X()); + ^~~~~ + ( ) + { dg-end-multiline-output "" } */ + + T t(X()); // { dg-warning "6:parentheses were disambiguated as a function declaration" } + /* { dg-begin-multiline-output "" } + T t(X()); + ^~~~~ + { dg-end-multiline-output "" } */ + // { dg-message "6:replace parentheses with braces to declare a variable" "" { target *-*-* } 53 } + /* { dg-begin-multiline-output "" } + T t(X()); + ^~~~~ + - + { - + } + { dg-end-multiline-output "" } */ + + int n( ); // { dg-warning "8:empty parentheses were disambiguated as a function declaration" } + /* { dg-begin-multiline-output "" } + int n( ); + ^~~~~ + { dg-end-multiline-output "" } */ + // { dg-message "8:remove parentheses to default-initialize a variable" "" { target *-*-* } 67 } + /* { dg-begin-multiline-output "" } + int n( ); + ^~~~~ + ----- + { dg-end-multiline-output "" } */ + // { dg-message "8:or replace parentheses with braces to value-initialize a variable" "" { target *-*-* } 67 } + + S s(); // { dg-warning "6:empty parentheses were disambiguated as a function declaration" } + /* { dg-begin-multiline-output "" } + S s(); + ^~ + { dg-end-multiline-output "" } */ + + X x(); // { dg-warning "6:empty parentheses were disambiguated as a function declaration" } + /* { dg-begin-multiline-output "" } + X x(); + ^~ + { dg-end-multiline-output "" } */ + // { dg-message "6:remove parentheses to default-initialize a variable" "" { target *-*-* } 86 } + /* { dg-begin-multiline-output "" } + X x(); + ^~ + -- + { dg-end-multiline-output "" } */ + // { dg-message "6:or replace parentheses with braces to aggregate-initialize a variable" "" { target *-*-* } 86 } + + W w(); // { dg-warning "6:empty parentheses were disambiguated as a function declaration" } + /* { dg-begin-multiline-output "" } + W w(); + ^~ + { dg-end-multiline-output "" } */ + // { dg-message "6:remove parentheses to default-initialize a variable" "" { target *-*-* } 99 } + /* { dg-begin-multiline-output "" } + W w(); + ^~ + -- + { dg-end-multiline-output "" } */ + + T t2(); // { dg-warning "7:empty parentheses were disambiguated as a function declaration" } + /* { dg-begin-multiline-output "" } + T t2(); + ^~ + { dg-end-multiline-output "" } */ + + U u(); // { dg-warning "6:empty parentheses were disambiguated as a function declaration" } + /* { dg-begin-multiline-output "" } + U u(); + ^~ + { dg-end-multiline-output "" } */ + // { dg-message "6:remove parentheses to default-initialize a variable" "" { target *-*-* } 117 } + /* { dg-begin-multiline-output "" } + U u(); + ^~ + -- + { dg-end-multiline-output "" } */ + // { dg-message "6:or replace parentheses with braces to value-initialize a variable" "" { target *-*-* } 117 } +} diff --git a/gcc/testsuite/g++.dg/warn/Wvexing-parse4.C b/gcc/testsuite/g++.dg/warn/Wvexing-parse4.C new file mode 100644 index 0000000..3e010aa --- /dev/null +++ b/gcc/testsuite/g++.dg/warn/Wvexing-parse4.C @@ -0,0 +1,74 @@ +// PR c++/25814 +// { dg-do compile { target c++98_only } } +// { dg-additional-options "-fdiagnostics-show-caret" } +// Test -Wvexing-parse's fix-it hints in C++98. + +struct X { }; + +struct T { + T(X); + int m; +}; + +struct U { + U(); + int m; +}; + +int +main () +{ + T t(X()); // { dg-warning "6:parentheses were disambiguated as a function declaration" } + /* { dg-begin-multiline-output "" } + T t(X()); + ^~~~~ + { dg-end-multiline-output "" } */ + // { dg-message "6:add parentheses to declare a variable" "" { target *-*-* } 21 } + /* { dg-begin-multiline-output "" } + T t(X()); + ^~~~~ + ( ) + { dg-end-multiline-output "" } */ + + int n( ); // { dg-warning "8:empty parentheses were disambiguated as a function declaration" } + /* { dg-begin-multiline-output "" } + int n( ); + ^~~~~ + { dg-end-multiline-output "" } */ + // { dg-message "8:remove parentheses to default-initialize a variable" "" { target *-*-* } 33 } + /* { dg-begin-multiline-output "" } + int n( ); + ^~~~~ + ----- + { dg-end-multiline-output "" } */ + + T y(); // { dg-warning "6:empty parentheses were disambiguated as a function declaration" } + /* { dg-begin-multiline-output "" } + T y(); + ^~ + { dg-end-multiline-output "" } */ + + X x(); // { dg-warning "6:empty parentheses were disambiguated as a function declaration" } + /* { dg-begin-multiline-output "" } + X x(); + ^~ + { dg-end-multiline-output "" } */ + // { dg-message "6:remove parentheses to default-initialize a variable" "" { target *-*-* } 51 } + /* { dg-begin-multiline-output "" } + X x(); + ^~ + -- + { dg-end-multiline-output "" } */ + + U u(); // { dg-warning "6:empty parentheses were disambiguated as a function declaration" } + /* { dg-begin-multiline-output "" } + U u(); + ^~ + { dg-end-multiline-output "" } */ + // { dg-message "6:remove parentheses to default-initialize a variable" "" { target *-*-* } 63 } + /* { dg-begin-multiline-output "" } + U u(); + ^~ + -- + { dg-end-multiline-output "" } */ +} diff --git a/gcc/testsuite/g++.dg/warn/Wvexing-parse5.C b/gcc/testsuite/g++.dg/warn/Wvexing-parse5.C new file mode 100644 index 0000000..3422e70 --- /dev/null +++ b/gcc/testsuite/g++.dg/warn/Wvexing-parse5.C @@ -0,0 +1,14 @@ +// PR c++/25814 +// { dg-do compile } +// Test -Wvexing-parse in a template. + +struct X { }; + +template<typename T> +void fn () +{ + T t(); // { dg-warning "empty parentheses were disambiguated as a function declaration" } + T a(X()); // { dg-warning "parentheses were disambiguated as a function declaration" } + X x(T()); // { dg-warning "parentheses were disambiguated as a function declaration" } + int i(T()); // { dg-warning "parentheses were disambiguated as a function declaration" } +} diff --git a/gcc/testsuite/g++.dg/warn/Wvexing-parse6.C b/gcc/testsuite/g++.dg/warn/Wvexing-parse6.C new file mode 100644 index 0000000..58fa725 --- /dev/null +++ b/gcc/testsuite/g++.dg/warn/Wvexing-parse6.C @@ -0,0 +1,24 @@ +// PR c++/25814 +// { dg-do compile } +// Test from Wikipedia. + +class Timer { + public: + Timer(); +}; + +class TimeKeeper { + public: + TimeKeeper(const Timer& t); + + int get_time(); +}; + +void f(double adouble) { + int i(int(adouble)); // { dg-warning "parentheses were disambiguated as a function declaration" } +} + +int main() { + TimeKeeper time_keeper(Timer()); // { dg-warning "parentheses were disambiguated as a function declaration" } + return time_keeper.get_time(); // { dg-error "request for member" } +} diff --git a/gcc/testsuite/g++.dg/warn/Wvexing-parse7.C b/gcc/testsuite/g++.dg/warn/Wvexing-parse7.C new file mode 100644 index 0000000..9f4c702 --- /dev/null +++ b/gcc/testsuite/g++.dg/warn/Wvexing-parse7.C @@ -0,0 +1,27 @@ +// PR c++/25814 +// { dg-do compile } + +struct X { }; +struct W { + W(X, X); +}; + +void +fn () +{ + W w1(X(), X()); // { dg-warning "parentheses" } + W w2(X(a), X()); // { dg-warning "parentheses" } + W w3(X(), X(a)); // { dg-warning "parentheses" } + W w4(X(a), X(b)); // { dg-warning "parentheses" } + W w5(X, X); + W w6(X(a), X); + W w7(X, X(a)); + W w8(X(a), X()); // { dg-warning "parentheses" } + W w9(X, X()); + W w10(X, X()); + + // Not function declarations. + W z1(X(), (X())); + W z2((X()), X()); + W z3((X()), (X())); +} diff --git a/gcc/testsuite/g++.dg/warn/Wvexing-parse8.C b/gcc/testsuite/g++.dg/warn/Wvexing-parse8.C new file mode 100644 index 0000000..2d26d22 --- /dev/null +++ b/gcc/testsuite/g++.dg/warn/Wvexing-parse8.C @@ -0,0 +1,11 @@ +// PR c++/97762 +// { dg-do compile } + +void +g () +{ + long a(); // { dg-warning "empty parentheses" } + signed b(); // { dg-warning "empty parentheses" } + unsigned c(); // { dg-warning "empty parentheses" } + short d(); // { dg-warning "empty parentheses" } +} diff --git a/gcc/testsuite/g++.dg/warn/mvp3.C b/gcc/testsuite/g++.dg/warn/mvp3.C new file mode 100644 index 0000000..4d371c5 --- /dev/null +++ b/gcc/testsuite/g++.dg/warn/mvp3.C @@ -0,0 +1,30 @@ +// { dg-do compile } +// { dg-options "-Wparentheses -fdiagnostics-show-caret" } +// Test fix-it hints for the MVP warning. + +void +g () +{ + int (i); // { dg-warning "7:unnecessary parentheses" } +/* { dg-begin-multiline-output "" } + int (i); + ^~~ + { dg-end-multiline-output "" } */ +// { dg-message "7:remove parentheses" "" { target *-*-* } 8 } +/* { dg-begin-multiline-output "" } + int (i); + ^~~ + - - + { dg-end-multiline-output "" } */ + int (fn(void)); // { dg-warning "7:unnecessary parentheses" } +/* { dg-begin-multiline-output "" } + int (fn(void)); + ^~~~~~~~~~ + { dg-end-multiline-output "" } */ +// { dg-message "7:remove parentheses" "" { target *-*-* } 19 } +/* { dg-begin-multiline-output "" } + int (fn(void)); + ^~~~~~~~~~ + - - + { dg-end-multiline-output "" } */ +} diff --git a/gcc/testsuite/g++.old-deja/g++.brendan/recurse.C b/gcc/testsuite/g++.old-deja/g++.brendan/recurse.C index de20a07..0af1c14 100644 --- a/gcc/testsuite/g++.old-deja/g++.brendan/recurse.C +++ b/gcc/testsuite/g++.old-deja/g++.brendan/recurse.C @@ -73,7 +73,7 @@ public: int main() { - DBpathrec a(), b(); + DBpathrec a(), b(); // { dg-warning "empty parentheses" } a = b;// { dg-error "" } non-lvalue in assignment.* } diff --git a/gcc/testsuite/g++.old-deja/g++.eh/catch10.C b/gcc/testsuite/g++.old-deja/g++.eh/catch10.C index 2300a94..7cc6096 100644 --- a/gcc/testsuite/g++.old-deja/g++.eh/catch10.C +++ b/gcc/testsuite/g++.old-deja/g++.eh/catch10.C @@ -13,8 +13,8 @@ void g() catch (A*) { } try { f(); } - catch (A*) { } // { dg-warning "" } A* before B* - catch (B*) { } // { dg-warning "" } A* before B* + catch (A*) { } // { dg-message "for type" } A* before B* + catch (B*) { } // { dg-warning "will be caught" } A* before B* try { f(); } catch (A*) { } diff --git a/gcc/testsuite/g++.old-deja/g++.jason/template4.C b/gcc/testsuite/g++.old-deja/g++.jason/template4.C index de7d331..1cf5a61 100644 --- a/gcc/testsuite/g++.old-deja/g++.jason/template4.C +++ b/gcc/testsuite/g++.old-deja/g++.jason/template4.C @@ -17,5 +17,5 @@ template <class T> ccList <T> cc_List<T>::copy (){} int main (int, char **) { - ccList <int> size1(); + ccList <int> size1(); // { dg-warning "empty parentheses" } } diff --git a/gcc/testsuite/g++.old-deja/g++.law/arm4.C b/gcc/testsuite/g++.old-deja/g++.law/arm4.C index bbcf7df..59492ca 100644 --- a/gcc/testsuite/g++.old-deja/g++.law/arm4.C +++ b/gcc/testsuite/g++.old-deja/g++.law/arm4.C @@ -20,7 +20,7 @@ int main(void) { double a = 2.0; - S x(int (a)); + S x(int (a)); // { dg-warning "parentheses were disambiguated" } if (count > 0) { printf ("FAIL\n"); return 1; } else diff --git a/gcc/testsuite/g++.old-deja/g++.mike/for2.C b/gcc/testsuite/g++.old-deja/g++.mike/for2.C index 6eb5d66..4a7c304 100644 --- a/gcc/testsuite/g++.old-deja/g++.mike/for2.C +++ b/gcc/testsuite/g++.old-deja/g++.mike/for2.C @@ -14,7 +14,7 @@ void bar() { void bee () { int i = 0; - for (int fun() = 0; i != 2; ++i) { // { dg-warning "extern" "extern" } + for (int fun() = 0; i != 2; ++i) { // { dg-warning "extern|empty parentheses" "extern" } // { dg-error "initialized" "init" { target *-*-* } .-1 } } } diff --git a/gcc/testsuite/g++.old-deja/g++.other/local4.C b/gcc/testsuite/g++.old-deja/g++.other/local4.C index b5514a5..492ce2b 100644 --- a/gcc/testsuite/g++.old-deja/g++.other/local4.C +++ b/gcc/testsuite/g++.old-deja/g++.other/local4.C @@ -6,6 +6,6 @@ int f (int); int main () { - int f (); + int f (); // { dg-warning "empty parentheses" } return f (); } diff --git a/gcc/testsuite/g++.old-deja/g++.other/using1.C b/gcc/testsuite/g++.old-deja/g++.other/using1.C index 6cebc29..8910091 100644 --- a/gcc/testsuite/g++.old-deja/g++.other/using1.C +++ b/gcc/testsuite/g++.old-deja/g++.other/using1.C @@ -10,9 +10,9 @@ protected: friend class D2; }; -class D : public B { // { dg-error "" } within this context +class D : public B { public: - using B::a; + using B::a; // { dg-error "" } within this context using B::b; }; diff --git a/gcc/testsuite/g++.old-deja/g++.pt/crash10.C b/gcc/testsuite/g++.old-deja/g++.pt/crash10.C index 012e3d0..a84b190 100644 --- a/gcc/testsuite/g++.old-deja/g++.pt/crash10.C +++ b/gcc/testsuite/g++.old-deja/g++.pt/crash10.C @@ -6,7 +6,6 @@ public: enum { val = (N == 0) ? M : GCD<N, M % N>::val }; // { dg-error "constant expression" "valid" { target *-*-* } .-1 } // { dg-message "template argument" "valid" { target *-*-* } .-2 } -// { dg-warning "division by" "" { target *-*-* } .-3 } }; int main() { diff --git a/gcc/testsuite/g++.old-deja/g++.pt/crash3.C b/gcc/testsuite/g++.old-deja/g++.pt/crash3.C index 52701b7..d1d9b12 100644 --- a/gcc/testsuite/g++.old-deja/g++.pt/crash3.C +++ b/gcc/testsuite/g++.old-deja/g++.pt/crash3.C @@ -7,11 +7,13 @@ public: { // local-extern :) CVector<int> v(); // { dg-message "old declaration" } + // { dg-warning "empty parentheses" "" { target *-*-* } .-1 } return v; // { dg-error "convert" } } CVector<long> g() const { CVector<long> v(); // { dg-error "ambiguating new" } + // { dg-warning "empty parentheses" "" { target *-*-* } .-1 } return v; // { dg-error "convert" } } }; diff --git a/gcc/testsuite/g++.target/riscv/pr96759.C b/gcc/testsuite/g++.target/riscv/pr96759.C new file mode 100644 index 0000000..673999a --- /dev/null +++ b/gcc/testsuite/g++.target/riscv/pr96759.C @@ -0,0 +1,8 @@ +/* { dg-options "-mno-strict-align -std=gnu++17" } */ +/* { dg-do compile } */ +struct S { + int a; + double b; +}; +S GetNumbers(); +auto [globalC, globalD] = GetNumbers(); diff --git a/gcc/testsuite/gcc.c-torture/compile/limits-externdecl.c b/gcc/testsuite/gcc.c-torture/compile/limits-externdecl.c index d382801..3a2e5ac 100644 --- a/gcc/testsuite/gcc.c-torture/compile/limits-externdecl.c +++ b/gcc/testsuite/gcc.c-torture/compile/limits-externdecl.c @@ -1,4 +1,3 @@ -/* { dg-skip-if "ptxas runs out of memory" { nvptx-*-* } } */ /* { dg-skip-if "Array too big" { "pdp11-*-*" } { "-mint32" } } */ /* { dg-require-effective-target int32plus } */ diff --git a/gcc/testsuite/gcc.c-torture/compile/pr42717.c b/gcc/testsuite/gcc.c-torture/compile/pr42717.c index 7f6fb9d..4fe6f93 100644 --- a/gcc/testsuite/gcc.c-torture/compile/pr42717.c +++ b/gcc/testsuite/gcc.c-torture/compile/pr42717.c @@ -1,4 +1,3 @@ -/* { dg-xfail-if "ptxas crashes" { nvptx-*-* } { "-O0" } { "" } } */ static signed char foo (signed char si1, unsigned char si2) { diff --git a/gcc/testsuite/gcc.c-torture/compile/pr61684.c b/gcc/testsuite/gcc.c-torture/compile/pr61684.c index 9a7b52f..f5b53b7 100644 --- a/gcc/testsuite/gcc.c-torture/compile/pr61684.c +++ b/gcc/testsuite/gcc.c-torture/compile/pr61684.c @@ -1,5 +1,4 @@ /* PR tree-optimization/61684 */ -/* { dg-xfail-if "ptxas crashes" { nvptx-*-* } { "*" } { "-O0" "-O1" "-Os" } } */ int a, c; static int *b = 0; diff --git a/gcc/testsuite/gcc.c-torture/compile/pr96998.c b/gcc/testsuite/gcc.c-torture/compile/pr96998.c new file mode 100644 index 0000000..a75d5dc --- /dev/null +++ b/gcc/testsuite/gcc.c-torture/compile/pr96998.c @@ -0,0 +1,15 @@ +/* { dg-do compile { target arm*-*-* aarch64*-*-* } } */ + +int h(void); +struct c d; +struct c { + int e[1]; +}; + +void f(void) { + int g; + for (;; g = h()) { + int *i = &d.e[g]; + asm("" : "=Q"(*i)); + } +} diff --git a/gcc/testsuite/gcc.c-torture/compile/pr97205.c b/gcc/testsuite/gcc.c-torture/compile/pr97205.c new file mode 100644 index 0000000..6600011 --- /dev/null +++ b/gcc/testsuite/gcc.c-torture/compile/pr97205.c @@ -0,0 +1,7 @@ +int a; +typedef __attribute__((aligned(2))) int x; +int f () +{ + x b = a; + return b; +} diff --git a/gcc/testsuite/gcc.c-torture/compile/pr97576.c b/gcc/testsuite/gcc.c-torture/compile/pr97576.c new file mode 100644 index 0000000..28294c8 --- /dev/null +++ b/gcc/testsuite/gcc.c-torture/compile/pr97576.c @@ -0,0 +1,18 @@ +void +pc (void); + +void __attribute__ ((simd)) +ty (void); + +void __attribute__ ((simd)) +gf () +{ + ty (); +} + +void __attribute__ ((simd)) +ty (void) +{ + gf (pc); + gf (gf); +} diff --git a/gcc/testsuite/gcc.c-torture/compile/pr97578.c b/gcc/testsuite/gcc.c-torture/compile/pr97578.c new file mode 100644 index 0000000..e007724 --- /dev/null +++ b/gcc/testsuite/gcc.c-torture/compile/pr97578.c @@ -0,0 +1,11 @@ +int printf (const char *, ...); + +int a; +static void b(int c) { + if (c) + printf("%d", a); +} +void e() { + int d = 0; + b(d); +} diff --git a/gcc/testsuite/gcc.c-torture/execute/981019-1.c b/gcc/testsuite/gcc.c-torture/execute/981019-1.c index 1cf3741..5d1f009 100644 --- a/gcc/testsuite/gcc.c-torture/execute/981019-1.c +++ b/gcc/testsuite/gcc.c-torture/execute/981019-1.c @@ -1,5 +1,3 @@ -/* { dg-skip-if "ptxas seg faults" { nvptx-*-* } { "-O3*" } { "" } } */ - extern int f2(void); extern int f3(void); extern void f1(void); diff --git a/gcc/testsuite/gcc.c-torture/execute/pr20601-1.c b/gcc/testsuite/gcc.c-torture/execute/pr20601-1.c index 6eab1ef..7c13c91 100644 --- a/gcc/testsuite/gcc.c-torture/execute/pr20601-1.c +++ b/gcc/testsuite/gcc.c-torture/execute/pr20601-1.c @@ -1,5 +1,4 @@ /* PR tree-optimization/20601 */ -/* { dg-xfail-if "ptxas crashes" { nvptx-*-* } { "-O1" } { "" } } */ extern void abort (void); extern void exit (int); diff --git a/gcc/testsuite/gcc.c-torture/execute/pr52129.c b/gcc/testsuite/gcc.c-torture/execute/pr52129.c index ab43ca6..a60bfa8 100644 --- a/gcc/testsuite/gcc.c-torture/execute/pr52129.c +++ b/gcc/testsuite/gcc.c-torture/execute/pr52129.c @@ -1,5 +1,4 @@ /* PR target/52129 */ -/* { dg-xfail-if "ptxas crashes" { nvptx-*-* } { "-O1" } { "" } } */ extern void abort (void); struct S { void *p; unsigned int q; }; diff --git a/gcc/testsuite/gcc.c-torture/execute/pr59221.c b/gcc/testsuite/gcc.c-torture/execute/pr59221.c index b307227..0cd4259 100644 --- a/gcc/testsuite/gcc.c-torture/execute/pr59221.c +++ b/gcc/testsuite/gcc.c-torture/execute/pr59221.c @@ -1,4 +1,3 @@ -/* { dg-xfail-if "ptxas crashes" { nvptx-*-* } { "*" } { "-O0" "-Os" } } */ int a = 1, b, d; diff --git a/gcc/testsuite/gcc.c-torture/execute/pr68185.c b/gcc/testsuite/gcc.c-torture/execute/pr68185.c index a41a557..d82fd0a 100644 --- a/gcc/testsuite/gcc.c-torture/execute/pr68185.c +++ b/gcc/testsuite/gcc.c-torture/execute/pr68185.c @@ -1,4 +1,3 @@ -/* { dg-skip-if "ptxas crashes or executes incorrectly" { nvptx-*-* } { "-O0" "-Os" } { "" } } Reported 2015-11-20 */ int a, b, d = 1, e, f, o, u, w = 1, z; short c, q, t; diff --git a/gcc/testsuite/gcc.c-torture/execute/pr97386-1.c b/gcc/testsuite/gcc.c-torture/execute/pr97386-1.c new file mode 100644 index 0000000..c50e038 --- /dev/null +++ b/gcc/testsuite/gcc.c-torture/execute/pr97386-1.c @@ -0,0 +1,16 @@ +/* PR rtl-optimization/97386 */ + +__attribute__((noipa)) unsigned char +foo (unsigned int c) +{ + return __builtin_bswap16 ((unsigned long long) (0xccccLLU << c | 0xccccLLU >> ((-c) & 63))); +} + +int +main () +{ + unsigned char x = foo (0); + if (__CHAR_BIT__ == 8 && __SIZEOF_SHORT__ == 2 && x != 0xcc) + __builtin_abort (); + return 0; +} diff --git a/gcc/testsuite/gcc.c-torture/execute/pr97386-2.c b/gcc/testsuite/gcc.c-torture/execute/pr97386-2.c new file mode 100644 index 0000000..e61829d --- /dev/null +++ b/gcc/testsuite/gcc.c-torture/execute/pr97386-2.c @@ -0,0 +1,20 @@ +/* PR rtl-optimization/97386 */ + +__attribute__((noipa)) unsigned +foo (int x) +{ + unsigned long long a = (0x800000000000ccccULL << x) | (0x800000000000ccccULL >> (64 - x)); + unsigned int b = a; + return (b << 24) | (b >> 8); +} + +int +main () +{ + if (__CHAR_BIT__ == 8 + && __SIZEOF_INT__ == 4 + && __SIZEOF_LONG_LONG__ == 8 + && foo (1) != 0x99000199U) + __builtin_abort (); + return 0; +} diff --git a/gcc/testsuite/gcc.c-torture/execute/pr97404.c b/gcc/testsuite/gcc.c-torture/execute/pr97404.c new file mode 100644 index 0000000..7e5ce23 --- /dev/null +++ b/gcc/testsuite/gcc.c-torture/execute/pr97404.c @@ -0,0 +1,28 @@ +/* PR ipa/97404 */ +/* { dg-additional-options "-fno-inline" } */ + +char a, b; +long c; +short d, e; +long *f = &c; +int g; +char h(signed char i) { return 0; } +static short j(short i, int k) { return i < 0 ? 0 : i >> k; } +void l(void); +void m(void) +{ + e = j(d | 9766, 11); + *f = e; +} +void l(void) +{ + a = 5 | g; + b = h(a); +} +int main() +{ + m(); + if (c != 4) + __builtin_abort(); + return 0; +} diff --git a/gcc/testsuite/gcc.c-torture/execute/pr97695.c b/gcc/testsuite/gcc.c-torture/execute/pr97695.c new file mode 100644 index 0000000..36f48b4 --- /dev/null +++ b/gcc/testsuite/gcc.c-torture/execute/pr97695.c @@ -0,0 +1,20 @@ +int *a, b, **c = &a, d, e; + +int f(int g, int h) { return !h || (g && h == 1) ? 0 : g / h; } + +static void *i(int g) { + while (e < 2) + if (!f(g, 9)) { + while (b) + ; + return 0; + } + return 0; +} + +void j() { + i(1); + *c = i(d); +} + +int main() { j(); return 0; } diff --git a/gcc/testsuite/gcc.c-torture/execute/pr97764.c b/gcc/testsuite/gcc.c-torture/execute/pr97764.c new file mode 100644 index 0000000..4ceaab8 --- /dev/null +++ b/gcc/testsuite/gcc.c-torture/execute/pr97764.c @@ -0,0 +1,14 @@ +/* PR tree-optimization/97764 */ +/* { dg-require-effective-target int32plus } */ + +struct S { int b : 3; int c : 28; int d : 1; }; + +int +main () +{ + struct S e = {}; + e.c = -1; + if (e.d) + __builtin_abort (); + return 0; +} diff --git a/gcc/testsuite/gcc.dg/20031223-1.c b/gcc/testsuite/gcc.dg/20031223-1.c index 68aa74f..c529739 100644 --- a/gcc/testsuite/gcc.dg/20031223-1.c +++ b/gcc/testsuite/gcc.dg/20031223-1.c @@ -3,11 +3,10 @@ because GCC was trying to expand the trees to rtl. */ /* { dg-do compile } */ -/* { dg-options "" } */ +/* { dg-options "-std=c17 -pedantic-errors" } */ void f () { l: int; /* { dg-error "a label can only be part of a statement and a declaration is not a statement" "not stmt" } */ - /* { dg-warning "useless type name in empty declaration" "type name" { target *-*-* } .-1 } */ - /* { dg-error "label at end of compound statement" "label" { target *-*-* } .-2 } */ + /* { dg-error "useless type name in empty declaration" "type name" { target *-*-* } .-1 } */ } diff --git a/gcc/testsuite/gcc.dg/Walloca-1.c b/gcc/testsuite/gcc.dg/Walloca-1.c index 85e9160..37ee191 100644 --- a/gcc/testsuite/gcc.dg/Walloca-1.c +++ b/gcc/testsuite/gcc.dg/Walloca-1.c @@ -24,8 +24,7 @@ void foo1 (size_t len, size_t len2, size_t len3) char *s = alloca (123); useit (s); // OK, constant argument to alloca - s = alloca (num); // { dg-warning "large due to conversion" "" { target lp64 } } - // { dg-warning "unbounded use of 'alloca'" "" { target { ! lp64 } } .-1 } + s = alloca (num); // { dg-warning "\(may be too large|unbounded use\)" } useit (s); s = alloca (30000); /* { dg-warning "is too large" } */ diff --git a/gcc/testsuite/gcc.dg/Walloca-12.c b/gcc/testsuite/gcc.dg/Walloca-12.c index 059c5f3..d2d9413 100644 --- a/gcc/testsuite/gcc.dg/Walloca-12.c +++ b/gcc/testsuite/gcc.dg/Walloca-12.c @@ -8,5 +8,5 @@ void g (unsigned int n) { if (n == 7) n = 11; - f (__builtin_alloca (n)); /* { dg-warning "unbounded use of 'alloca'" } */ + f (__builtin_alloca (n)); /* { dg-warning "may be too large" } */ } diff --git a/gcc/testsuite/gcc.dg/Walloca-13.c b/gcc/testsuite/gcc.dg/Walloca-13.c index 12e9f6c..99d6206 100644 --- a/gcc/testsuite/gcc.dg/Walloca-13.c +++ b/gcc/testsuite/gcc.dg/Walloca-13.c @@ -8,5 +8,5 @@ void g (int *p, int *q) { __SIZE_TYPE__ n = (__SIZE_TYPE__)(p - q); if (n < 100) - f (__builtin_alloca (n)); // { dg-bogus "may be too large due to conversion" "" { xfail { *-*-* } } } + f (__builtin_alloca (n)); // { dg-bogus "may be too large" "" { xfail { *-*-* } } } } diff --git a/gcc/testsuite/gcc.dg/Walloca-2.c b/gcc/testsuite/gcc.dg/Walloca-2.c index 766ff8d..1cf9165 100644 --- a/gcc/testsuite/gcc.dg/Walloca-2.c +++ b/gcc/testsuite/gcc.dg/Walloca-2.c @@ -24,7 +24,7 @@ g2 (int n) { void *p; if (n < 2000) - p = __builtin_alloca (n); // { dg-warning "large due to conversion" } + p = __builtin_alloca (n); // { dg-warning "may be too large" } else p = __builtin_malloc (n); f (p); @@ -36,9 +36,7 @@ g3 (int n) void *p; if (n > 0 && n < 3000) { - p = __builtin_alloca (n); // { dg-warning "'alloca' may be too large" "" { target lp64} } - // { dg-message "note:.*argument may be as large as 2999" "note" { target lp64 } .-1 } - // { dg-warning "unbounded use of 'alloca'" "" { target { ! lp64 } } .-2 } + p = __builtin_alloca (n); // { dg-warning "may be too large" } } else p = __builtin_malloc (n); diff --git a/gcc/testsuite/gcc.dg/Walloca-3.c b/gcc/testsuite/gcc.dg/Walloca-3.c index f5840673..b8000ff 100644 --- a/gcc/testsuite/gcc.dg/Walloca-3.c +++ b/gcc/testsuite/gcc.dg/Walloca-3.c @@ -13,7 +13,7 @@ g1 (__SIZE_TYPE__ n) { void *p; if (n < LIMIT) - p = __builtin_alloca (n); // { dg-warning "'alloca' bound is unknown" } + p = __builtin_alloca (n); // { dg-warning "may be too large" } else p = __builtin_malloc (n); f (p); @@ -27,7 +27,7 @@ g2 (unsigned short n) { void *p; if (n < SHORT_LIMIT) - p = __builtin_alloca (n); // { dg-warning "'alloca' bound is unknown" } + p = __builtin_alloca (n); // { dg-warning "may be too large" } else p = __builtin_malloc (n); f (p); diff --git a/gcc/testsuite/gcc.dg/Walloca-6.c b/gcc/testsuite/gcc.dg/Walloca-6.c index 16b5d6f..ebe08ae 100644 --- a/gcc/testsuite/gcc.dg/Walloca-6.c +++ b/gcc/testsuite/gcc.dg/Walloca-6.c @@ -1,7 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target alloca } */ /* { dg-options "-Walloca-larger-than=256 -O2" } */ -/* { dg-xfail-if "Currently broken but Andrew's work should fix this" { *-*-* } } */ void f (void*); void g (__SIZE_TYPE__ n) diff --git a/gcc/testsuite/gcc.dg/Warray-bounds-68.c b/gcc/testsuite/gcc.dg/Warray-bounds-68.c new file mode 100644 index 0000000..d661669 --- /dev/null +++ b/gcc/testsuite/gcc.dg/Warray-bounds-68.c @@ -0,0 +1,118 @@ +/* PR middle-end/97391 - bogus -Warray-bounds accessing a multidimensional + array parameter + { dg-do compile } + { dg-options "-O2 -Wall" } */ + + +void nowarn_access_loop_idx (char a[3][5]) +{ + for (int i = 0; i < 3; i++) + for (int j = 0; j < 5; j++) + a[i][j] = 0; +} + +void warn_access_loop_idx (char a[3][5]) +{ + for (int i = 0; i < 3; i++) + for (int j = 0; j < 5; j++) + a[j][i] = 0; // { dg-warning "\\\[-Warray-bounds" } +} + + +void nowarn_access_cst_idx (int a[5][7][9]) +{ + a[0][0][0] = __LINE__; + a[0][0][8] = __LINE__; + + a[0][6][0] = __LINE__; + a[0][6][8] = __LINE__; + + a[4][0][0] = __LINE__; + a[4][0][8] = __LINE__; + a[4][6][8] = __LINE__; +} + + +void test_ptr_access_cst_idx (int a[5][7][9]) +{ + int *p = &a[0][0][0]; + + p[0] = __LINE__; + p[8] = __LINE__; + + /* The following access should trigger a warning but it's represented + the same as the valid access in + p = a[0][1][0]; + p[1] = __LINE__; + both as + MEM[(int *)a_1(D) + 36B] = __LINE__; */ + + p[9] = __LINE__; // { dg-warning "\\\[-Warray-bounds" "pr?????" { xfail *-*-* } } + + p[315] = __LINE__; + // { dg-warning "subscript 315 is outside array bounds of 'int\\\[5]\\\[7]\\\[9]'" "pr97425" { xfail *-*-* } .-1 } + // { dg-warning "subscript 315 is outside array bounds " "" { target *-*-* } .-2 } + + p = &a[0][6][0]; + p[0] = __LINE__; + p[8] = __LINE__; + + p = &a[4][6][0]; + p[0] = __LINE__; + p[8] = __LINE__; +} + + +void warn_access_cst_idx (int a[5][7][9]) +{ + a[0][0][9] = __LINE__; // { dg-warning "subscript 9 is above array bounds of 'int\\\[9]'" } + a[0][7][0] = __LINE__; // { dg-warning "subscript 7 is above array bounds of 'int\\\[7]\\\[9]'" } + a[5][0][0] = __LINE__; + // { dg-warning "subscript 5 is outside array bounds of 'int\\\[5]\\\[7]\\\[9]'" "pr97425" { xfail *-*-* } .-1 } + // { dg-warning "subscript \\d+ is outside array bounds" "" { target *-*-* } .-2 } +} + + +void test_ptrarray_access_cst_idx (int (*pa)[5][7][9]) +{ + (*pa)[0][0][0] = __LINE__; + (*pa)[0][0][8] = __LINE__; + (*pa)[0][0][9] = __LINE__; // { dg-warning "subscript 9 is above array bounds of 'int\\\[9]'" } + + (*pa)[0][6][0] = __LINE__; + (*pa)[0][7][0] = __LINE__; // { dg-warning "subscript 7 is above array bounds of 'int\\\[7]\\\[9]'" } + (*pa)[0][8][0] = __LINE__; // { dg-warning "subscript 8 is above array bounds of 'int\\\[7]\\\[9]'" } + + (*pa)[4][6][8] = __LINE__; + (*pa)[5][0][0] = __LINE__; // { dg-warning "subscript 5 is above array bounds of 'int\\\[5]\\\[7]\\\[9]'" } +} + + +void test_ptr_ptrarray_access_cst_idx (int (*pa)[5][7][9]) +{ + int *p = &(*pa)[0][0][0]; + + p[0] = __LINE__; + p[8] = __LINE__; + + /* The following access should trigger a warning but it's represented + the same as the valid access in + p = a[0][1][0]; + p[1] = __LINE__; + both as + MEM[(int *)a_1(D) + 36B] = __LINE__; */ + + p[9] = __LINE__; // { dg-warning "\\\[-Warray-bounds" "pr?????" { xfail *-*-* } } + + p[315] = __LINE__; // { dg-warning "\\\[-Warray-bounds" "pr97429" { xfail *-*-* } } + + p = &(*pa)[0][6][0]; + p[0] = __LINE__; + p[8] = __LINE__; + + p = &(*pa)[4][6][0]; + p[0] = __LINE__; + p[8] = __LINE__; +} + + diff --git a/gcc/testsuite/gcc.dg/Warray-bounds-70.c b/gcc/testsuite/gcc.dg/Warray-bounds-70.c new file mode 100644 index 0000000..087e255 --- /dev/null +++ b/gcc/testsuite/gcc.dg/Warray-bounds-70.c @@ -0,0 +1,18 @@ +/* PR middle-end/97556 - ICE on excessively large index into a multidimensional + array + { dg-do compile } + { dg-options "-O2 -Wall" } */ + +#define SIZE_MAX __SIZE_MAX__ + +typedef __SIZE_TYPE__ size_t; + +char a[1][3]; + +void f (int c) +{ + size_t i = c ? SIZE_MAX / 2 : SIZE_MAX; + a[i][0] = 0; // { dg-warning "\\\[-Warray-bounds" } +} + +// { dg-prune-output "\\\[-Wstringop-overflow=" } diff --git a/gcc/testsuite/gcc.dg/Wbuiltin-declaration-mismatch-9.c b/gcc/testsuite/gcc.dg/Wbuiltin-declaration-mismatch-9.c index 56a827a..82db8fe 100644 --- a/gcc/testsuite/gcc.dg/Wbuiltin-declaration-mismatch-9.c +++ b/gcc/testsuite/gcc.dg/Wbuiltin-declaration-mismatch-9.c @@ -12,4 +12,5 @@ void a (void) } /* The invalid scanf call may also trigger: - { dg-prune-output "accessing 4 bytes in a region of size 1" } */ + { dg-prune-output "accessing 4 bytes in a region of size 1" } + { dg-prune-output "accessing 2 bytes in a region of size 1" } */ diff --git a/gcc/testsuite/gcc.dg/Wnonnull-5.c b/gcc/testsuite/gcc.dg/Wnonnull-5.c new file mode 100644 index 0000000..ef6ed54 --- /dev/null +++ b/gcc/testsuite/gcc.dg/Wnonnull-5.c @@ -0,0 +1,53 @@ +/* PR middle-end/97552 - missing waning passing null to a VLA argument + declared [static] + { dg-do compile } + { dg-options "-Wall" } */ + +#define A(...) __attribute__ ((__VA_ARGS__)) + +void fptr_array (int(*)[0]); + +void fstatic_array (int[static 0]); +void A (nonnull) fnonnull_static_array (int [static 0]); + +void fvla (int n, int [n]); +void A (nonnull) fnonnull_vla (int n, int [n]); + +void fstatic_vla (int n, int [static n]); +void A (nonnull) fnonnull_static_vla (int n, int [static n]); + + +void test_null (void) +{ + fptr_array (0); + fptr_array (&(int[0]){ }); + + fstatic_array (0); // { dg-warning "\\\[-Wnonnull" } + fnonnull_static_array (0); // { dg-warning "\\\[-Wnonnull" } + + fvla (0, 0); + fnonnull_vla (0, 0); // { dg-warning "\\\[-Wnonnull" } + + fstatic_vla (0, 0); // { dg-warning "\\\[-Wnonnull" } + fnonnull_static_vla (0, 0); // { dg-warning "\\\[-Wnonnull" } +} + + +#pragma GCC optimize ("1") + +void test_null_optimized (void) +{ + int (*pa)[0] = 0; + fptr_array (pa); + + int *p = 0; + + fstatic_array (p); // { dg-warning "\\\[-Wnonnull" } + fnonnull_static_array (p); // { dg-warning "\\\[-Wnonnull" } + + fvla (0, p); + fnonnull_vla (0, p); // { dg-warning "\\\[-Wnonnull" } + + fstatic_vla (0, p); // { dg-warning "\\\[-Wnonnull" } + fnonnull_static_vla (0, p); // { dg-warning "\\\[-Wnonnull" } +} diff --git a/gcc/testsuite/gcc.dg/Wrestrict-22.c b/gcc/testsuite/gcc.dg/Wrestrict-22.c new file mode 100644 index 0000000..46f507b --- /dev/null +++ b/gcc/testsuite/gcc.dg/Wrestrict-22.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -Wrestrict" } */ + +void test_memcpy_warn (char *d, unsigned n) +{ + for (unsigned i = n; i < 30; ++i) + if (i > 10) + __builtin_memcpy (d, d + 2, i); /* { dg-warning "overlaps" } */ +} diff --git a/gcc/testsuite/gcc.dg/Wstringop-overflow-44.s b/gcc/testsuite/gcc.dg/Wstringop-overflow-44.s deleted file mode 100644 index 0fc73a9..0000000 --- a/gcc/testsuite/gcc.dg/Wstringop-overflow-44.s +++ /dev/null @@ -1,271 +0,0 @@ - .file "Wstringop-overflow-44.c" - .text - .p2align 4 - .globl f0 - .type f0, @function -f0: -.LFB0: - .cfi_startproc - ret - .cfi_endproc -.LFE0: - .size f0, .-f0 - .p2align 4 - .globl f1 - .type f1, @function -f1: -.LFB1: - .cfi_startproc - ret - .cfi_endproc -.LFE1: - .size f1, .-f1 - .p2align 4 - .globl f2 - .type f2, @function -f2: -.LFB2: - .cfi_startproc - movl n(%rip), %eax - testl %eax, %eax - jle .L12 -.L4: - ret - .p2align 4,,10 - .p2align 3 -.L12: - movslq %eax, %rdx - movq d(%rip), %rcx - testq %rdx, %rdx - je .L4 - xorl %eax, %eax -.L6: - movb $0, (%rcx,%rax) - addq $1, %rax - cmpq %rdx, %rax - jb .L6 - ret - .cfi_endproc -.LFE2: - .size f2, .-f2 - .p2align 4 - .globl f3 - .type f3, @function -f3: -.LFB3: - .cfi_startproc - movslq n(%rip), %rdx - testl %edx, %edx - jle .L15 - ret - .p2align 4,,10 - .p2align 3 -.L15: - movq %rdi, %rsi - movq d(%rip), %rdi - jmp strncpy - .cfi_endproc -.LFE3: - .size f3, .-f3 - .p2align 4 - .globl f4 - .type f4, @function -f4: -.LFB4: - .cfi_startproc - movl n(%rip), %eax - testl %eax, %eax - jle .L18 - ret - .p2align 4,,10 - .p2align 3 -.L18: - movq d(%rip), %rax - movq %rdi, %rsi - movb $0, (%rax) - movslq n(%rip), %rdx - movq d(%rip), %rdi - jmp strncat - .cfi_endproc -.LFE4: - .size f4, .-f4 - .p2align 4 - .globl g0 - .type g0, @function -g0: -.LFB5: - .cfi_startproc - movl n(%rip), %eax - testl %eax, %eax - jle .L25 - ret - .p2align 4,,10 - .p2align 3 -.L25: - subq $24, %rsp - .cfi_def_cfa_offset 32 - leaq 15(%rsp), %rdi - call sink - addq $24, %rsp - .cfi_def_cfa_offset 8 - ret - .cfi_endproc -.LFE5: - .size g0, .-g0 - .p2align 4 - .globl g1 - .type g1, @function -g1: -.LFB6: - .cfi_startproc - movl n(%rip), %eax - testl %eax, %eax - jle .L32 - ret - .p2align 4,,10 - .p2align 3 -.L32: - subq $24, %rsp - .cfi_def_cfa_offset 32 - leaq 15(%rsp), %rdi - call sink - addq $24, %rsp - .cfi_def_cfa_offset 8 - ret - .cfi_endproc -.LFE6: - .size g1, .-g1 - .p2align 4 - .globl g2 - .type g2, @function -g2: -.LFB7: - .cfi_startproc - movl n(%rip), %eax - testl %eax, %eax - jle .L45 - ret - .p2align 4,,10 - .p2align 3 -.L45: - movslq %eax, %rdx - subq $24, %rsp - .cfi_def_cfa_offset 32 - testq %rdx, %rdx - je .L36 - xorl %eax, %eax -.L35: - movb $0, 15(%rsp,%rax) - addq $1, %rax - cmpq %rdx, %rax - jb .L35 -.L36: - leaq 15(%rsp), %rdi - call sink - addq $24, %rsp - .cfi_def_cfa_offset 8 - ret - .cfi_endproc -.LFE7: - .size g2, .-g2 - .p2align 4 - .globl g3 - .type g3, @function -g3: -.LFB8: - .cfi_startproc - movslq n(%rip), %rdx - testl %edx, %edx - jle .L52 - ret - .p2align 4,,10 - .p2align 3 -.L52: - subq $24, %rsp - .cfi_def_cfa_offset 32 - movq %rdi, %rsi - leaq 15(%rsp), %rdi - call strncpy - leaq 15(%rsp), %rdi - call sink - addq $24, %rsp - .cfi_def_cfa_offset 8 - ret - .cfi_endproc -.LFE8: - .size g3, .-g3 - .p2align 4 - .globl g4 - .type g4, @function -g4: -.LFB9: - .cfi_startproc - movslq n(%rip), %rdx - testl %edx, %edx - jle .L59 - ret - .p2align 4,,10 - .p2align 3 -.L59: - subq $24, %rsp - .cfi_def_cfa_offset 32 - movq %rdi, %rsi - leaq 15(%rsp), %rdi - movb $0, 15(%rsp) - call strncat - leaq 15(%rsp), %rdi - call sink - addq $24, %rsp - .cfi_def_cfa_offset 8 - ret - .cfi_endproc -.LFE9: - .size g4, .-g4 - .p2align 4 - .globl h0 - .type h0, @function -h0: -.LFB10: - .cfi_startproc - movl n(%rip), %eax - testl %eax, %eax - jle .L66 - ret - .p2align 4,,10 - .p2align 3 -.L66: - subq $8, %rsp - .cfi_def_cfa_offset 16 - movl $1, %edi - call malloc - movq %rax, d(%rip) - addq $8, %rsp - .cfi_def_cfa_offset 8 - ret - .cfi_endproc -.LFE10: - .size h0, .-h0 - .p2align 4 - .globl h1 - .type h1, @function -h1: -.LFB16: - .cfi_startproc - movl n(%rip), %eax - testl %eax, %eax - jle .L73 - ret - .p2align 4,,10 - .p2align 3 -.L73: - subq $8, %rsp - .cfi_def_cfa_offset 16 - movl $1, %edi - call malloc - movq %rax, d(%rip) - addq $8, %rsp - .cfi_def_cfa_offset 8 - ret - .cfi_endproc -.LFE16: - .size h1, .-h1 diff --git a/gcc/testsuite/gcc.dg/Wstringop-overflow-56.c b/gcc/testsuite/gcc.dg/Wstringop-overflow-56.c new file mode 100644 index 0000000..b3e598c --- /dev/null +++ b/gcc/testsuite/gcc.dg/Wstringop-overflow-56.c @@ -0,0 +1,163 @@ +/* PR middle-end/92942 - missing -Wstringop-overflow for allocations with + a negative lower bound size + { dg-do compile } + { dg-options "-O2 -Wall" } */ + +#define SIZE_MAX __SIZE_MAX__ +#define UINT8_MAX __UINT8_MAX__ +#define UINT16_MAX __UINT16_MAX__ + +typedef __SIZE_TYPE__ size_t; +typedef __UINT8_TYPE__ uint8_t; +typedef __UINT16_TYPE__ uint16_t; + +void* usr_alloc1 (size_t) __attribute__ ((alloc_size (1))); +void* usr_alloc2 (size_t, size_t) __attribute__ ((alloc_size (1, 2))); + +void* malloc (size_t); +void* memcpy (void*, const void*, size_t); +void* memset (void*, int, size_t); +char* strcpy (char*, const char*); + +void sink (void*); + +void malloc_uint_range_strcpy (unsigned n) +{ + void *p = malloc (5 < n ? 5 : n); + + strcpy (p, "01234"); // { dg-warning "\\\[-Wstringop-overflow" } + sink (p); + + strcpy (p, "0123"); + sink (p); +} + +void malloc_uint16_anti_range_memset (uint16_t n) +{ + if (5 <= n && n <= 9) return; + void *p = malloc (n); + + if (UINT16_MAX < SIZE_MAX) + { + size_t sz = (uint16_t)-1 + (size_t)1; + memset (p, 0, sz); // { dg-warning "\\\[-Wstringop-overflow" } + sink (p); + } + + memset (p, 0, 1); + sink (p); + memset (p, 0, 5); + sink (p); + memset (p, 0, 6); + sink (p); + memset (p, 0, UINT16_MAX - 1); + sink (p); + memset (p, 0, UINT16_MAX); + sink (p); +} + +void malloc_int_strcpy (int n) +{ + void *p = malloc (7 < n ? 7 : n); + + strcpy (p, "0123456"); // { dg-warning "\\\[-Wstringop-overflow" } + sink (p); + + strcpy (p, "012345"); + sink (p); +} + +void vla_int_strcpy (int n) +{ + char a[9 < n ? 9 : n]; + + strcpy (a, "012345678"); // { dg-warning "\\\[-Wstringop-overflow" } + sink (a); + + strcpy (a, "01234567"); + sink (a); +} + +void usr_alloc1_int_strcpy (int n) +{ + void *p = usr_alloc1 (7 < n ? 7 : n); + + strcpy (p, "0123456"); // { dg-warning "\\\[-Wstringop-overflow" } + sink (p); + + strcpy (p, "012345"); + sink (p); +} + +void usr_alloc2_cst_ir_strcpy (int n) +{ + void *p = usr_alloc2 (1, 5 < n ? 5 : n); + + strcpy (p, "01234"); // { dg-warning "\\\[-Wstringop-overflow" } + sink (p); + + strcpy (p, "0123"); + sink (p); +} + +void usr_alloc2_ir_ir_strcpy (int m, int n) +{ + void *p = usr_alloc2 (3 < n ? 3 : n, 5 < n ? 5 : n); + + strcpy (p, "0123456789abcde"); // { dg-warning "\\\[-Wstringop-overflow" } + sink (p); + + strcpy (p, "0123456789abcd"); + sink (p); +} + +void usr_alloc2_uint8_memset (uint8_t m, uint8_t n) +{ + if (3 <= m && m <= 7) return; + if (5 <= n && n <= 9) return; + void *p = usr_alloc2 (m, n); + + size_t sz = UINT8_MAX * UINT8_MAX + 1; + memset (p, 0, sz); // { dg-warning "\\\[-Wstringop-overflow" "" { xfail *-*-* } } + // { dg-warning "\\\[-Warray-bounds" "pr?????" { target *-*-* } .-1 } + sink (p); + + memset (p, 0, sz - 1); + sink (p); + memset (p, 0, 64); + sink (p); + memset (p, 0, 63); + sink (p); + memset (p, 0, 16); + sink (p); + memset (p, 0, 15); + sink (p); + memset (p, 0, 14); + sink (p); + memset (p, 0, 3); + sink (p); +} + + + +void malloc_int_memset (int n) +{ + void *p = malloc (11 < n ? 11 : n); + + memset (p, 0, 12); // { dg-warning "\\\[-Wstringop-overflow" } + sink (p); + + memset (p, 0, 11); + sink (p); +} + +void vla_int_memset (int n) +{ + char a[13 < n ? 13 : n]; + + memset (a, 0, 14); // { dg-warning "\\\[-Wstringop-overflow" } + sink (a); + + memset (a, 0, 13); + sink (a); +} diff --git a/gcc/testsuite/gcc.dg/Wstringop-overflow-57.c b/gcc/testsuite/gcc.dg/Wstringop-overflow-57.c new file mode 100644 index 0000000..173aa16 --- /dev/null +++ b/gcc/testsuite/gcc.dg/Wstringop-overflow-57.c @@ -0,0 +1,91 @@ +/* Verify that an anti-range ~[A, B] with small positive A and B + is handled correctly and doesn't trigger warnings. + { dg-do compile } + { dg-options "-O2 -Wall" } */ + +typedef __typeof__ (sizeof 0) size_t; + +int f (void*, size_t); +int g (void*); + +// Test case distilled from gcc/cp/semantics.c + +int omp_reduction_id (int i, int j, const char *mm) +{ + const char *p = 0; + const char *m = 0; + + switch (i) + { + case 1: + p = "min"; + break; + case 2: + p = "max"; + break; + default: + break; + } + + if (j) + m = mm; + + const char prefix[] = "omp declare reduction "; + size_t lenp = sizeof (prefix); + + if (__builtin_strncmp (p, prefix, lenp - 1) == 0) + lenp = 1; + + size_t len = __builtin_strlen (p); + size_t lenm = m ? __builtin_strlen (m) + 1 : 0; + char *name = ((char *) __builtin_alloca(lenp + len + lenm)); + + if (lenp > 1) + __builtin_memcpy (name, prefix, lenp - 1); + + __builtin_memcpy (name + lenp - 1, p, len + 1); + if (m) + { + name[lenp + len - 1] = '~'; + __builtin_memcpy (name + lenp + len, m, lenm); + } + return (__builtin_constant_p (name) + ? f (name, __builtin_strlen (name)) : g (name)); +} + +// Test case derived from gcc/d/dmd/root/filename.c. + +const char *ext (const char *str) +{ + size_t len = __builtin_strlen(str); + + const char *e = str + len; + for (;;) + { + switch (*e) + { + case '.': return e + 1; + case '/': break; + default: + if (e == str) + break; + e--; + continue; + } + return 0; + } +} + +const char *removeExt (const char *str) +{ + const char *e = ext (str); + if (e) + { + size_t len = (e - str) - 1; + char *n = (char *)__builtin_malloc (len + 1); + __builtin_memcpy(n, str, len); + n[len] = 0; + return n; + } + return 0; +} diff --git a/gcc/testsuite/gcc.dg/Wvla-larger-than-2.c b/gcc/testsuite/gcc.dg/Wvla-larger-than-2.c index 5c0ba51..a3a0534 100644 --- a/gcc/testsuite/gcc.dg/Wvla-larger-than-2.c +++ b/gcc/testsuite/gcc.dg/Wvla-larger-than-2.c @@ -24,7 +24,6 @@ f2 (__SIZE_TYPE__ a) { // 11 * 4 bytes = 44: Not OK. uint32_t x[a]; // { dg-warning "array may be too large" } - // { dg-message "note:.*argument may be as large as 44" "note" { target *-*-* } .-1 } f0 (x); } } diff --git a/gcc/testsuite/gcc.dg/Wvla-parameter-2.c b/gcc/testsuite/gcc.dg/Wvla-parameter-2.c index ba93241..01728e7 100644 --- a/gcc/testsuite/gcc.dg/Wvla-parameter-2.c +++ b/gcc/testsuite/gcc.dg/Wvla-parameter-2.c @@ -67,9 +67,9 @@ void a2pampan (int (*(*(*[2])[n1])[n2])); int f2ia1_1 (int n, int [n][n]); // { sg-message "previously declared as 'int\\\[n]\\\[n]' with bound argument 1" } int f2ia1_1 (int n, int[static n][n]); int f2ia1_1 (int n, int a[static n][n]) { return sizeof *a; } -int f2ia1_1 (int n, int[static n + 1][n]); // { dg-warning "argument 2 of type 'int\\\[n \\\+ 1]\\\[n]' declared with mismatched bound 'n \\\+ 1'" } +int f2ia1_1 (int n, int[static n + 1][n]); // { dg-warning "argument 2 of type 'int\\\[static *n \\\+ 1]\\\[n]' declared with mismatched bound 'n \\\+ 1'" } -int f2ias1_1 (int n, int [static n][n]); // { dg-message "previously declared as 'int\\\[n]\\\[n]' with bound argument 1" } +int f2ias1_1 (int n, int [static n][n]); // { dg-message "previously declared as 'int\\\[static +n]\\\[n]' with bound argument 1" } int f2ias1_1 (int n, int[n][n]); int f2ias1_1 (int n, int a[++n][n]) // { dg-warning "argument 2 of type 'int\\\[\\\+\\\+n]\\\[n]' declared with mismatched bound ' ?\\+\\+n'" } { return sizeof *a; } diff --git a/gcc/testsuite/gcc.dg/Wvla-parameter-8.c b/gcc/testsuite/gcc.dg/Wvla-parameter-8.c new file mode 100644 index 0000000..69e10f7 --- /dev/null +++ b/gcc/testsuite/gcc.dg/Wvla-parameter-8.c @@ -0,0 +1,86 @@ +/* PR c/97413 - bogus error on function declaration with many VLA arguments: + wrong number of arguments specified for 'access' attribute + { dg-do compile } + { dg-options "-Wall" } */ + +extern int n; + +void f1 (int[n]); +void f2 (int[n], int[n]); +void f3 (int[n], int[n], int[n]); +void f4 (int[n], int[n], int[n], int[n]); +void f5 (int[n], int[n], int[n], int[n], int[n]); +void f6 (int[n], int[n], int[n], int[n], int[n], int[n]); +void f7 (int[n], int[n], int[n], int[n], int[n], int[n], int[n]); +void f8 (int[n], int[n], int[n], int[n], int[n], int[n], int[n], int[n]); +void f9 (int[n], int[n], int[n], int[n], int[n], int[n], int[n], int[n], + int[n]); +void f10 (int[n], int[n], int[n], int[n], int[n], int[n], int[n], int[n], + int[n], int[n]); + + +void f1 (int[n]); +void f2 (int[n], int[n]); +void f3 (int[n], int[n], int[n]); +void f4 (int[n], int[n], int[n], int[n]); +void f5 (int[n], int[n], int[n], int[n], int[n]); +void f6 (int[n], int[n], int[n], int[n], int[n], int[n]); +void f7 (int[n], int[n], int[n], int[n], int[n], int[n], int[n]); +void f8 (int[n], int[n], int[n], int[n], int[n], int[n], int[n], int[n]); +void f9 (int[n], int[n], int[n], int[n], int[n], int[n], int[n], int[n], + int[n]); +void f10 (int[n], int[n], int[n], int[n], int[n], int[n], int[n], int[n], + int[n], int[n]); + + +void g (int n) +{ + typedef int A[n]; + + void g1 (A); + void g2 (A, A); + void g3 (A, A, A); + void g4 (A, A, A, A); + void g5 (A, A, A, A, A); + void g6 (A, A, A, A, A, A); + void g7 (A, A, A, A, A, A, A); + void g8 (A, A, A, A, A, A, A, A); + void g9 (A, A, A, A, A, A, A, A, A); + void g10 (A, A, A, A, A, A, A, A, A, A); + + void g1 (A); + void g2 (A, A); + void g3 (A, A, A); + void g4 (A, A, A, A); + void g5 (A, A, A, A, A); + void g6 (A, A, A, A, A, A); + void g7 (A, A, A, A, A, A, A); + void g8 (A, A, A, A, A, A, A, A); + void g9 (A, A, A, A, A, A, A, A, A); + void g10 (A, A, A, A, A, A, A, A, A, A); + + + typedef int B[n][n + 1][n + 2][n + 3][n + 4][n + 5][n + 7]; + + void h1 (B); + void h2 (B, B); + void h3 (B, B, B); + void h4 (B, B, B, B); + void h5 (B, B, B, B, B); + void h6 (B, B, B, B, B, B); + void h7 (B, B, B, B, B, B, B); + void h8 (B, B, B, B, B, B, B, B); + void h9 (B, B, B, B, B, B, B, B, B); + void h10 (B, B, B, B, B, B, B, B, B, B); + + void h1 (B); + void h2 (B, B); + void h3 (B, B, B); + void h4 (B, B, B, B); + void h5 (B, B, B, B, B); + void h6 (B, B, B, B, B, B); + void h7 (B, B, B, B, B, B, B); + void h8 (B, B, B, B, B, B, B, B); + void h9 (B, B, B, B, B, B, B, B, B); + void h10 (B, B, B, B, B, B, B, B, B, B); +} diff --git a/gcc/testsuite/gcc.dg/analyzer/callbacks-1.c b/gcc/testsuite/gcc.dg/analyzer/callbacks-1.c new file mode 100644 index 0000000..52c8fde --- /dev/null +++ b/gcc/testsuite/gcc.dg/analyzer/callbacks-1.c @@ -0,0 +1,25 @@ +/* Reproducer for PR analyzer/97258: we should report the double-free + inside a static callback if the callback escapes. */ + +#include <stdlib.h> + +static void callback_1 (void *p) +{ + free (p); + free (p); /* { dg-warning "double-'free' of 'p'" } */ +} + +struct ops { + void (*cb) (void *); +}; + +static const struct ops ops_1 = { + .cb = callback_1 +}; + +extern void registration (const void *); + +void register_1 (void) +{ + registration (&ops_1); +} diff --git a/gcc/testsuite/gcc.dg/analyzer/callbacks-2.c b/gcc/testsuite/gcc.dg/analyzer/callbacks-2.c new file mode 100644 index 0000000..98915ee --- /dev/null +++ b/gcc/testsuite/gcc.dg/analyzer/callbacks-2.c @@ -0,0 +1,22 @@ +/* Reproducer for PR analyzer/97258: we should report the double-free + inside a static callback if the callback is accessible via a global + initializer. */ + +#include <stdlib.h> + +static void callback_1 (void *p) +{ + free (p); + free (p); /* { dg-warning "double-'free' of 'p'" } */ +} + +struct ops { + void (*cb) (void *); +}; + +/* Callback struct is not static, and so could be accessed via + another TU. */ + +const struct ops ops_1 = { + .cb = callback_1 +}; diff --git a/gcc/testsuite/gcc.dg/analyzer/callbacks-3.c b/gcc/testsuite/gcc.dg/analyzer/callbacks-3.c new file mode 100644 index 0000000..5f12c2a --- /dev/null +++ b/gcc/testsuite/gcc.dg/analyzer/callbacks-3.c @@ -0,0 +1,19 @@ +#include "analyzer-decls.h" + +typedef __SIZE_TYPE__ size_t; +typedef int (*__compar_fn_t)(const void *, const void *); +extern void qsort(void *__base, size_t __nmemb, size_t __size, + __compar_fn_t __compar) + __attribute__((__nonnull__(1, 4))); + +static int +test_1_callback (const void *p1, const void *p2) +{ + __analyzer_dump_path (); /* { dg-message "here" } */ + return 0; +} + +void test_1_caller (int *arr, size_t n) +{ + qsort (arr, n, sizeof (int), test_1_callback); +} diff --git a/gcc/testsuite/gcc.dg/analyzer/data-model-21.c b/gcc/testsuite/gcc.dg/analyzer/data-model-21.c new file mode 100644 index 0000000..b952bcb --- /dev/null +++ b/gcc/testsuite/gcc.dg/analyzer/data-model-21.c @@ -0,0 +1,8 @@ +extern const char XtStrings[]; + +void unknown_fn (void *); + +void test (void) +{ + unknown_fn ((char*)&XtStrings[429]); +} diff --git a/gcc/testsuite/gcc.dg/analyzer/malloc-1.c b/gcc/testsuite/gcc.dg/analyzer/malloc-1.c index c3e1330..38ce1a5 100644 --- a/gcc/testsuite/gcc.dg/analyzer/malloc-1.c +++ b/gcc/testsuite/gcc.dg/analyzer/malloc-1.c @@ -509,6 +509,14 @@ void test_42c (void) free (q - 64); /* this is probably OK. */ } /* { dg-bogus "leak of 'p'" } */ +void * +test_42d (void) +{ + void *p = malloc (1024); + void *q = p + 64; + return q; +} /* { dg-bogus "leak of 'p'" } */ + #if 0 void test_31 (void *p) { diff --git a/gcc/testsuite/gcc.dg/analyzer/pr97514.c b/gcc/testsuite/gcc.dg/analyzer/pr97514.c new file mode 100644 index 0000000..27245f4 --- /dev/null +++ b/gcc/testsuite/gcc.dg/analyzer/pr97514.c @@ -0,0 +1,18 @@ +/* { dg-additional-options "--param analyzer-max-enodes-per-program-point=0 -Wno-analyzer-too-complex" } */ + +typedef void (*sighandler_t) (int); + +void +signal (int, sighandler_t); + +static void +kw (int signum) +{ + (void) signum; +} + +void +gk (int ot) +{ + signal (ot, kw); +} diff --git a/gcc/testsuite/gcc.dg/analyzer/pr97568.c b/gcc/testsuite/gcc.dg/analyzer/pr97568.c new file mode 100644 index 0000000..22d574b --- /dev/null +++ b/gcc/testsuite/gcc.dg/analyzer/pr97568.c @@ -0,0 +1,29 @@ +#include "analyzer-decls.h" + +#define NULL ((void *)0) + +extern int *const p1; + +int *const p2; + +int v3; +extern int *const p3 = &v3; /* { dg-warning "'p3' initialized and declared 'extern'" } */ + +int v4; +int *const p4 = &v4; + +int main (void) +{ + __analyzer_describe (0, p1); /* { dg-message "INIT_VAL\\(p1\\)" } */ + __analyzer_eval (p1 == NULL); /* { dg-message "UNKNOWN" } */ + + __analyzer_eval (p2 == NULL); /* { dg-message "TRUE" } */ + + __analyzer_describe (0, p3); /* { dg-message "&v3" } */ + __analyzer_eval (p3 == NULL); /* { dg-message "FALSE" } */ + + __analyzer_describe (0, p4); /* { dg-message "&v4" } */ + __analyzer_eval (p4 == NULL); /* { dg-message "FALSE" } */ + + return p1[0]; +} diff --git a/gcc/testsuite/gcc.dg/analyzer/pr97608.c b/gcc/testsuite/gcc.dg/analyzer/pr97608.c new file mode 100644 index 0000000..a2bc130 --- /dev/null +++ b/gcc/testsuite/gcc.dg/analyzer/pr97608.c @@ -0,0 +1,17 @@ +#include <stdlib.h> + +void *f (void) +{ + void *p = malloc (8); + if (p == NULL) + abort (); + return (void *) ((char *) p + 0); +} + +void *g (void) +{ + void *p = malloc (8); + if (p == NULL) + abort (); + return (void *) ((char *) p + 1); +} diff --git a/gcc/testsuite/gcc.dg/analyzer/pr97668.c b/gcc/testsuite/gcc.dg/analyzer/pr97668.c new file mode 100644 index 0000000..6ec8164 --- /dev/null +++ b/gcc/testsuite/gcc.dg/analyzer/pr97668.c @@ -0,0 +1,27 @@ +/* { dg-additional-options "-O1" } */ + +void +wb (_Complex double jh) +{ + _Complex double af = 0.0; + + do + { + af += jh; + } + while (af != 0.0); +} + +_Complex double +o6 (void) +{ + _Complex double ba = 0.0; + + for (;;) + { + wb (ba); + ba = 1.0; + } + + return ba; +} diff --git a/gcc/testsuite/gcc.dg/analyzer/setjmp-pr93378.c b/gcc/testsuite/gcc.dg/analyzer/setjmp-pr93378.c index 6e2468e..e31e127 100644 --- a/gcc/testsuite/gcc.dg/analyzer/setjmp-pr93378.c +++ b/gcc/testsuite/gcc.dg/analyzer/setjmp-pr93378.c @@ -1,7 +1,7 @@ /* { dg-additional-options "-O1 -g" } */ /* { dg-require-effective-target indirect_jumps } */ -#include <setjmp.h> +#include "test-setjmp.h" jmp_buf buf; diff --git a/gcc/testsuite/gcc.dg/analyzer/sigsetjmp-5.c b/gcc/testsuite/gcc.dg/analyzer/sigsetjmp-5.c index 2bc73e8..d6a9910 100644 --- a/gcc/testsuite/gcc.dg/analyzer/sigsetjmp-5.c +++ b/gcc/testsuite/gcc.dg/analyzer/sigsetjmp-5.c @@ -1,6 +1,6 @@ /* { dg-require-effective-target sigsetjmp } */ -#include <setjmp.h> +#include "test-setjmp.h" #include <stddef.h> #include "analyzer-decls.h" diff --git a/gcc/testsuite/gcc.dg/analyzer/sigsetjmp-6.c b/gcc/testsuite/gcc.dg/analyzer/sigsetjmp-6.c index d45804b..f89277e 100644 --- a/gcc/testsuite/gcc.dg/analyzer/sigsetjmp-6.c +++ b/gcc/testsuite/gcc.dg/analyzer/sigsetjmp-6.c @@ -1,6 +1,6 @@ /* { dg-require-effective-target sigsetjmp } */ -#include <setjmp.h> +#include "test-setjmp.h" #include <stddef.h> #include <stdlib.h> diff --git a/gcc/testsuite/gcc.dg/analyzer/test-setjmp.h b/gcc/testsuite/gcc.dg/analyzer/test-setjmp.h index ee0e1ec..db24227 100644 --- a/gcc/testsuite/gcc.dg/analyzer/test-setjmp.h +++ b/gcc/testsuite/gcc.dg/analyzer/test-setjmp.h @@ -7,10 +7,19 @@ setjmp is a function on some systems and a macro on others. This header provides a SETJMP macro in a (fake) system header, - for consistency of output across such systems. */ - -#include <setjmp.h> + along with precanned decls of setjmp, for consistency of output across + different systems. */ #pragma GCC system_header +struct __jmp_buf_tag {}; +typedef struct __jmp_buf_tag jmp_buf[1]; +typedef struct __jmp_buf_tag sigjmp_buf[1]; + +extern int setjmp(jmp_buf env); +extern int sigsetjmp(sigjmp_buf env, int savesigs); + +extern void longjmp(jmp_buf env, int val); +extern void siglongjmp(sigjmp_buf env, int val); + #define SETJMP(E) setjmp(E) diff --git a/gcc/testsuite/gcc.dg/asan/pr80166.c b/gcc/testsuite/gcc.dg/asan/pr80166.c index 629dd23..5e153b2 100644 --- a/gcc/testsuite/gcc.dg/asan/pr80166.c +++ b/gcc/testsuite/gcc.dg/asan/pr80166.c @@ -1,5 +1,6 @@ /* PR sanitizer/80166 */ /* { dg-do run } */ +/* { dg-additional-options "-Wno-stringop-overflow" } */ #include <sys/types.h> #include <unistd.h> diff --git a/gcc/testsuite/gcc.dg/atomic/c11-atomic-exec-6.c b/gcc/testsuite/gcc.dg/atomic/c11-atomic-exec-6.c index 2dc91c5..900559b 100644 --- a/gcc/testsuite/gcc.dg/atomic/c11-atomic-exec-6.c +++ b/gcc/testsuite/gcc.dg/atomic/c11-atomic-exec-6.c @@ -3,6 +3,7 @@ still occurs. */ /* { dg-do run } */ /* { dg-options "-std=c11 -pedantic-errors" } */ +/* { dg-xfail-run-if "PR97444: stack atomics" { nvptx*-*-* } }*/ #define TEST_POINTER_ADD_SUB(TYPE) \ do \ diff --git a/gcc/testsuite/gcc.dg/atomic/c11-atomic-exec-7.c b/gcc/testsuite/gcc.dg/atomic/c11-atomic-exec-7.c index eb7082d..d000083 100644 --- a/gcc/testsuite/gcc.dg/atomic/c11-atomic-exec-7.c +++ b/gcc/testsuite/gcc.dg/atomic/c11-atomic-exec-7.c @@ -2,6 +2,7 @@ we generate correct code. */ /* { dg-do run } */ /* { dg-options "-std=c11 -pedantic-errors -fdump-tree-original" } */ +/* { dg-xfail-run-if "PR97444: stack atomics" { nvptx*-*-* } }*/ #include <stdatomic.h> #include <limits.h> diff --git a/gcc/testsuite/gcc.dg/atomic/stdatomic-op-5.c b/gcc/testsuite/gcc.dg/atomic/stdatomic-op-5.c index daba8ec..f0e8581 100644 --- a/gcc/testsuite/gcc.dg/atomic/stdatomic-op-5.c +++ b/gcc/testsuite/gcc.dg/atomic/stdatomic-op-5.c @@ -2,6 +2,7 @@ we generate correct code. */ /* { dg-do run } */ /* { dg-options "-std=c11 -pedantic-errors -fdump-tree-original" } */ +/* { dg-xfail-run-if "PR97444: stack atomics" { nvptx*-*-* } }*/ #include <stdatomic.h> diff --git a/gcc/testsuite/gcc.dg/attr-alloc_size-11.c b/gcc/testsuite/gcc.dg/attr-alloc_size-11.c index a3d95c4..8332b39 100644 --- a/gcc/testsuite/gcc.dg/attr-alloc_size-11.c +++ b/gcc/testsuite/gcc.dg/attr-alloc_size-11.c @@ -47,8 +47,8 @@ typedef __SIZE_TYPE__ size_t; /* The following tests fail because of missing range information. The xfail exclusions are PR79356. */ -TEST (signed char, SCHAR_MIN + 2, ALLOC_MAX); /* { dg-warning "argument 1 range \\\[13, \[0-9\]+\\\] exceeds maximum object size 12" "missing range info for signed char" { xfail { ! { aarch64*-*-* arm*-*-* avr-*-* alpha*-*-* ia64-*-* mips*-*-* or1k*-*-* pdp11*-*-* powerpc*-*-* sparc*-*-* s390*-*-* visium-*-* msp430-*-* } } } } */ -TEST (short, SHRT_MIN + 2, ALLOC_MAX); /* { dg-warning "argument 1 range \\\[13, \[0-9\]+\\\] exceeds maximum object size 12" "missing range info for short" { xfail { ! { aarch64*-*-* arm*-*-* alpha*-*-* avr-*-* ia64-*-* mips*-*-* or1k*-*-* pdp11*-*-* powerpc*-*-* sparc*-*-* s390x-*-* visium-*-* msp430-*-* } } } } */ +TEST (signed char, SCHAR_MIN + 2, ALLOC_MAX); /* { dg-warning "argument 1 range \\\[13, \[0-9\]+\\\] exceeds maximum object size 12" "missing range info for signed char" { xfail { ! { aarch64*-*-* arm*-*-* avr-*-* alpha*-*-* ia64-*-* mips*-*-* or1k*-*-* pdp11*-*-* powerpc*-*-* sparc*-*-* s390*-*-* visium-*-* msp430-*-* nvptx*-*-*} } } } */ +TEST (short, SHRT_MIN + 2, ALLOC_MAX); /* { dg-warning "argument 1 range \\\[13, \[0-9\]+\\\] exceeds maximum object size 12" "missing range info for short" { xfail { ! { aarch64*-*-* arm*-*-* alpha*-*-* avr-*-* ia64-*-* mips*-*-* or1k*-*-* pdp11*-*-* powerpc*-*-* sparc*-*-* s390x-*-* visium-*-* msp430-*-* nvptx*-*-* } } } } */ TEST (int, INT_MIN + 2, ALLOC_MAX); /* { dg-warning "argument 1 range \\\[13, \[0-9\]+\\\] exceeds maximum object size 12" } */ TEST (int, -3, ALLOC_MAX); /* { dg-warning "argument 1 range \\\[13, \[0-9\]+\\\] exceeds maximum object size 12" } */ TEST (int, -2, ALLOC_MAX); /* { dg-warning "argument 1 range \\\[13, \[0-9\]+\\\] exceeds maximum object size 12" } */ diff --git a/gcc/testsuite/gcc.dg/c11-bool-1.c b/gcc/testsuite/gcc.dg/c11-bool-1.c new file mode 100644 index 0000000..0412624 --- /dev/null +++ b/gcc/testsuite/gcc.dg/c11-bool-1.c @@ -0,0 +1,50 @@ +/* Test macro expansions in <stdbool.h> in C11. */ +/* { dg-do run } */ +/* { dg-options "-std=c11 -pedantic-errors" } */ + +#include <stdbool.h> + +#define str(x) xstr(x) +#define xstr(x) #x + +extern void abort (void); +extern void exit (int); +extern int strcmp (const char *, const char *); + +#if false - 1 >= 0 +#error "false unsigned in #if" +#endif + +#if false != 0 +#error "false not 0 in #if" +#endif + +#if true - 2 >= 0 +#error "true unsigned in #if" +#endif + +#if true != 1 +#error "true not 1 in #if" +#endif + +int +main (void) +{ + if (strcmp (str (bool), "_Bool") != 0) + abort (); + if (_Generic (true, int : 1) != 1) + abort (); + if (true != 1) + abort (); + if (strcmp (str (true), "1") != 0) + abort (); + if (_Generic (false, int : 1) != 1) + abort (); + if (false != 0) + abort (); + if (strcmp (str (false), "0") != 0) + abort (); + if (strcmp (str (__bool_true_false_are_defined), "1") != 0) + abort (); + exit (0); +} diff --git a/gcc/testsuite/gcc.dg/c11-labels-1.c b/gcc/testsuite/gcc.dg/c11-labels-1.c new file mode 100644 index 0000000..6350403 --- /dev/null +++ b/gcc/testsuite/gcc.dg/c11-labels-1.c @@ -0,0 +1,15 @@ +/* Tests for labels before declarations and at ends of compound statements. */ +/* { dg-do compile } */ +/* { dg-options "-std=c11" } */ + +int f(int x) +{ + goto b; + a: int i = 2 * x; + goto c; + b: goto a; + { i *= 3; c: } + return i; + d: +} + diff --git a/gcc/testsuite/gcc.dg/c11-labels-2.c b/gcc/testsuite/gcc.dg/c11-labels-2.c new file mode 100644 index 0000000..e9b4924 --- /dev/null +++ b/gcc/testsuite/gcc.dg/c11-labels-2.c @@ -0,0 +1,15 @@ +/* Tests for labels before declarations and at ends of compound statements. */ +/* { dg-do compile } */ +/* { dg-options "-std=c11 -pedantic" } */ + +int f(int x) +{ + goto b; + a: int i = 2 * x; /* { dg-warning "a label can only be part of a statement and a declaration is not a statement" } */ + goto c; + b: goto a; + { i *= 3; c: } /* { dg-warning "label at end of compound statement" } */ + return i; + d: /* { dg-warning "label at end of compound statement" } */ +} + diff --git a/gcc/testsuite/gcc.dg/c11-labels-3.c b/gcc/testsuite/gcc.dg/c11-labels-3.c new file mode 100644 index 0000000..1e4be63 --- /dev/null +++ b/gcc/testsuite/gcc.dg/c11-labels-3.c @@ -0,0 +1,15 @@ +/* Tests for labels before declarations and at ends of compound statements. */ +/* { dg-do compile } */ +/* { dg-options "-std=c11 -pedantic-errors" } */ + +int f(int x) +{ + goto b; + a: int i = 2 * x; /* { dg-error "a label can only be part of a statement and a declaration is not a statement" } */ + goto c; + b: goto a; + { i *= 3; c: } /* { dg-error "label at end of compound statement" } */ + return i; + d: /* { dg-error "label at end of compound statement" } */ +} + diff --git a/gcc/testsuite/gcc.dg/c11-parm-omit-1.c b/gcc/testsuite/gcc.dg/c11-parm-omit-1.c new file mode 100644 index 0000000..83d1b50 --- /dev/null +++ b/gcc/testsuite/gcc.dg/c11-parm-omit-1.c @@ -0,0 +1,5 @@ +/* Test omitted parameter names not in C11: -pedantic-errors. */ +/* { dg-do compile } */ +/* { dg-options "-std=c11 -pedantic-errors" } */ + +void f (int) { } /* { dg-error "omitting parameter names" } */ diff --git a/gcc/testsuite/gcc.dg/c11-parm-omit-2.c b/gcc/testsuite/gcc.dg/c11-parm-omit-2.c new file mode 100644 index 0000000..2efd450 --- /dev/null +++ b/gcc/testsuite/gcc.dg/c11-parm-omit-2.c @@ -0,0 +1,5 @@ +/* Test omitted parameter names not in C11: -pedantic. */ +/* { dg-do compile } */ +/* { dg-options "-std=c11 -pedantic" } */ + +void f (int) { } /* { dg-warning "omitting parameter names" } */ diff --git a/gcc/testsuite/gcc.dg/c11-parm-omit-3.c b/gcc/testsuite/gcc.dg/c11-parm-omit-3.c new file mode 100644 index 0000000..5bf27a0 --- /dev/null +++ b/gcc/testsuite/gcc.dg/c11-parm-omit-3.c @@ -0,0 +1,5 @@ +/* Test omitted parameter names not in C11: -pedantic -Wno-c11-c2x-compat. */ +/* { dg-do compile } */ +/* { dg-options "-std=c11 -pedantic -Wno-c11-c2x-compat" } */ + +void f (int) { } diff --git a/gcc/testsuite/gcc.dg/c11-parm-omit-4.c b/gcc/testsuite/gcc.dg/c11-parm-omit-4.c new file mode 100644 index 0000000..ea4cbfa --- /dev/null +++ b/gcc/testsuite/gcc.dg/c11-parm-omit-4.c @@ -0,0 +1,6 @@ +/* Test omitted parameter names not in C11: accepted by default in the + absence of -pedantic. */ +/* { dg-do compile } */ +/* { dg-options "-std=c11" } */ + +void f (int) { } diff --git a/gcc/testsuite/gcc.dg/c2x-attr-deprecated-4.c b/gcc/testsuite/gcc.dg/c2x-attr-deprecated-4.c index f1848a2..7698434 100644 --- a/gcc/testsuite/gcc.dg/c2x-attr-deprecated-4.c +++ b/gcc/testsuite/gcc.dg/c2x-attr-deprecated-4.c @@ -1,13 +1,11 @@ -/* Test C2x deprecated attribute: duplicates. */ +/* Test C2x deprecated attribute: duplicates (allowed after N2557). */ /* { dg-do compile } */ /* { dg-options "-std=c2x -pedantic-errors" } */ -[[deprecated, __deprecated__]] int a; /* { dg-error "can appear at most once" } */ -[[__deprecated__, deprecated("message")]] int b; /* { dg-error "can appear at most once" } */ -int c [[deprecated("message"), deprecated]]; /* { dg-error "can appear at most once" } */ -[[deprecated, deprecated]]; /* { dg-error "can appear at most once" } */ +[[deprecated, __deprecated__]] int a; +[[__deprecated__, deprecated("message")]] int b; +int c [[deprecated("message"), deprecated]]; +[[deprecated, deprecated]]; /* { dg-error "ignored" "ignored" { target *-*-* } .-1 } */ -/* Separate attribute lists in the same attribute specifier sequence, - with the same attribute in them, are OK. */ [[deprecated]] [[deprecated]] int d [[deprecated]] [[deprecated]]; diff --git a/gcc/testsuite/gcc.dg/c2x-attr-fallthrough-4.c b/gcc/testsuite/gcc.dg/c2x-attr-fallthrough-4.c index 75aceff..a6cedcd 100644 --- a/gcc/testsuite/gcc.dg/c2x-attr-fallthrough-4.c +++ b/gcc/testsuite/gcc.dg/c2x-attr-fallthrough-4.c @@ -1,4 +1,4 @@ -/* Test C2x fallthrough attribute: duplicates. */ +/* Test C2x fallthrough attribute: duplicates (allowed after N2557). */ /* { dg-do compile } */ /* { dg-options "-std=c2x -pedantic-errors" } */ @@ -9,12 +9,9 @@ f (int a) { case 1: a++; - [[fallthrough, __fallthrough__]]; /* { dg-error "can appear at most once" } */ + [[fallthrough, __fallthrough__]]; /* { dg-warning "specified multiple times" } */ case 2: a++; - /* Separate attribute lists in the same attribute specifier - sequence, with the same attribute in them, are OK (but - receive a warning). */ [[fallthrough]] [[fallthrough]]; /* { dg-warning "specified multiple times" } */ case 3: a++; diff --git a/gcc/testsuite/gcc.dg/c2x-attr-maybe_unused-4.c b/gcc/testsuite/gcc.dg/c2x-attr-maybe_unused-4.c index 300c0da..6b997aa 100644 --- a/gcc/testsuite/gcc.dg/c2x-attr-maybe_unused-4.c +++ b/gcc/testsuite/gcc.dg/c2x-attr-maybe_unused-4.c @@ -1,13 +1,11 @@ -/* Test C2x maybe_unused attribute: duplicates. */ +/* Test C2x maybe_unused attribute: duplicates (allowed after N2557). */ /* { dg-do compile } */ /* { dg-options "-std=c2x -pedantic-errors" } */ -[[maybe_unused, __maybe_unused__]] int a; /* { dg-error "can appear at most once" } */ -[[__maybe_unused__, maybe_unused]] int b; /* { dg-error "can appear at most once" } */ -int c [[maybe_unused, maybe_unused]]; /* { dg-error "can appear at most once" } */ -[[maybe_unused, maybe_unused]]; /* { dg-error "can appear at most once" } */ +[[maybe_unused, __maybe_unused__]] int a; +[[__maybe_unused__, maybe_unused]] int b; +int c [[maybe_unused, maybe_unused]]; +[[maybe_unused, maybe_unused]]; /* { dg-error "ignored" "ignored" { target *-*-* } .-1 } */ -/* Separate attribute lists in the same attribute specifier sequence, - with the same attribute in them, are OK. */ [[maybe_unused]] [[maybe_unused]] int d [[maybe_unused]] [[maybe_unused]]; diff --git a/gcc/testsuite/gcc.dg/c2x-attr-nodiscard-1.c b/gcc/testsuite/gcc.dg/c2x-attr-nodiscard-1.c new file mode 100644 index 0000000..f4893bd --- /dev/null +++ b/gcc/testsuite/gcc.dg/c2x-attr-nodiscard-1.c @@ -0,0 +1,62 @@ +/* Test C2x deprecated attribute: valid uses. */ +/* { dg-do compile } */ +/* { dg-options "-std=c2x -pedantic-errors" } */ + +[[nodiscard]] int c1 (void); /* { dg-message "declared here" } */ +[[__nodiscard__ ("some reason")]] int c2 (void); /* { dg-message "declared here" } */ + +struct [[nodiscard ("struct reason")]] s1 { int a; }; +struct [[__nodiscard__]] s2 { long b; }; +struct s1 cs1 (void); /* { dg-message "declared here" } */ +struct s2 cs2 (void); /* { dg-message "declared here" } */ +typedef struct s2 s2t; +s2t cs3 (void); /* { dg-message "declared here" } */ + +union [[nodiscard]] u1 { int a; long b; }; +union [[nodiscard ("union reason")]] u2 { short c; float d; }; +union u1 cu1 (void); /* { dg-message "declared here" } */ +union u2 cu2 (void); /* { dg-message "declared here" } */ + +enum [[nodiscard]] e1 { E1 }; +enum [[nodiscard ("enum reason")]] e2 { E2 }; +enum e1 ce1 (void); /* { dg-message "declared here" } */ +enum e2 ce2 (void); /* { dg-message "declared here" } */ +enum e1 ce1a (void); +int i; + +[[nodiscard]] void v (void); /* { dg-warning "void return type" } */ + +int ok (void); + +void +f (void) +{ + c1 (); /* { dg-warning "ignoring return value" } */ + c2 (); /* { dg-warning "some reason" } */ + cs1 (); /* { dg-warning "struct reason" } */ + cs2 (); /* { dg-warning "ignoring return value of type" } */ + cs3 (); /* { dg-warning "ignoring return value of type" } */ + cu1 (); /* { dg-warning "ignoring return value of type" } */ + cu2 (); /* { dg-warning "union reason" } */ + ce1 (); /* { dg-warning "ignoring return value of type" } */ + ce2 (); /* { dg-warning "enum reason" } */ + ok (); + c1 (), ok (); /* { dg-warning "ignoring return value" } */ + cs1 (), ok (); /* { dg-warning "struct reason" } */ + ok (), cu1 (); /* { dg-warning "ignoring return value" } */ + ok (), (ok (), (ok (), ce2 ())); /* { dg-warning "enum reason" } */ + (ok (), cu1 ()), ok (); /* { dg-warning "ignoring return value" } */ + v (); + (i ? ce1 : ce1a) (); /* { dg-warning "ignoring return value of type" } */ + (void) c1 (); + (void) c2 (); + (void) cs1 (); + (void) cs2 (); + (void) cs3 (); + (void) cu1 (); + (void) cu2 (); + (void) ce1 (); + (void) ce2 (); + (void) (ok (), cu1 ()); + (void) (i ? ce1 : ce1a) (); +} diff --git a/gcc/testsuite/gcc.dg/c2x-attr-nodiscard-2.c b/gcc/testsuite/gcc.dg/c2x-attr-nodiscard-2.c new file mode 100644 index 0000000..45c4d50 --- /dev/null +++ b/gcc/testsuite/gcc.dg/c2x-attr-nodiscard-2.c @@ -0,0 +1,42 @@ +/* Test C2x nodiscard attribute: invalid contexts. */ +/* { dg-do compile } */ +/* { dg-options "-std=c2x -pedantic-errors" } */ + +/* This attribute is not valid on types other than their definitions, + or on declarations other than function declarations, or on + statements, or as an attribute-declaration. */ + +[[nodiscard]]; /* { dg-error "ignored" } */ + +int [[nodiscard]] var; /* { dg-error "ignored" } */ + +int [[nodiscard ("reason")]] var2; /* { dg-error "ignored" } */ + +int array_with_nod_type[2] [[nodiscard]]; /* { dg-error "ignored" } */ + +void fn_with_nod_type () [[nodiscard]]; /* { dg-error "ignored" } */ + +int z = sizeof (int [[__nodiscard__]]); /* { dg-error "ignored" } */ + +[[nodiscard]] typedef int nod_int; /* { dg-error "can only be applied" } */ + +[[nodiscard]] int nvar; /* { dg-error "can only be applied" } */ + +struct s { int a; }; + +[[nodiscard]] typedef struct s nod_s; /* { dg-error "can only be applied" } */ + +struct t { [[nodiscard]] int b; }; /* { dg-error "can only be applied" } */ + +enum e { E [[nodiscard]] }; /* { dg-error "can only be applied" } */ + +void fx ([[nodiscard]] int p); /* { dg-error "can only be applied" } */ + +void +f (void) +{ + int a; + [[nodiscard ("reason")]] int b = 1; /* { dg-error "can only be applied" } */ + [[nodiscard]]; /* { dg-error "ignored" } */ + [[nodiscard]] a = 1; /* { dg-error "ignored" } */ +} diff --git a/gcc/testsuite/gcc.dg/c2x-attr-nodiscard-3.c b/gcc/testsuite/gcc.dg/c2x-attr-nodiscard-3.c new file mode 100644 index 0000000..2e70d12 --- /dev/null +++ b/gcc/testsuite/gcc.dg/c2x-attr-nodiscard-3.c @@ -0,0 +1,11 @@ +/* Test C2x nodiscard attribute: invalid syntax. */ +/* { dg-do compile } */ +/* { dg-options "-std=c2x -pedantic-errors" } */ + +[[nodiscard()]] int a (void); /* { dg-error "parentheses must be omitted if attribute argument list is empty" } */ + +[[nodiscard(0)]] int b (void); /* { dg-error "expected" } */ + +[[nodiscard("", 123)]] int c (void); /* { dg-error "expected" } */ + +[[nodiscard((""))]] int d (void); /* { dg-error "expected" } */ diff --git a/gcc/testsuite/gcc.dg/c2x-attr-nodiscard-4.c b/gcc/testsuite/gcc.dg/c2x-attr-nodiscard-4.c new file mode 100644 index 0000000..278f55d --- /dev/null +++ b/gcc/testsuite/gcc.dg/c2x-attr-nodiscard-4.c @@ -0,0 +1,6 @@ +/* Test C2x nodiscard attribute: duplicates (allowed after N2557). */ +/* { dg-do compile } */ +/* { dg-options "-std=c2x -pedantic-errors" } */ + +[[nodiscard, __nodiscard__]] int f (void); +[[__nodiscard__, nodiscard("message")]] int g (void); diff --git a/gcc/testsuite/gcc.dg/c2x-attr-syntax-3.c b/gcc/testsuite/gcc.dg/c2x-attr-syntax-3.c index 1f883d8..2f0d9f6 100644 --- a/gcc/testsuite/gcc.dg/c2x-attr-syntax-3.c +++ b/gcc/testsuite/gcc.dg/c2x-attr-syntax-3.c @@ -25,13 +25,14 @@ f2 (void) } /* Declarations, including attribute declarations, cannot appear after - labels. */ + labels when a statement is expected. */ void f3 (void) { - x: [[]];; /* { dg-error "can only be part of a statement" } */ -} + if (1) + x: [[]]; /* { dg-error "expected" } */ +} /* Prefix attributes cannot appear on type names. */ diff --git a/gcc/testsuite/gcc.dg/c2x-attr-syntax-5.c b/gcc/testsuite/gcc.dg/c2x-attr-syntax-5.c index 37a2411..b261be0 100644 --- a/gcc/testsuite/gcc.dg/c2x-attr-syntax-5.c +++ b/gcc/testsuite/gcc.dg/c2x-attr-syntax-5.c @@ -49,8 +49,3 @@ func (void) [[unknown_attribute]] { /* { dg-error "attribute ignored" } */ [[unknown_attribute]] x: var = 2; /* { dg-error "attribute ignored" } */ for ([[unknown_attribute]] int zz = 1; zz < 10; zz++) ; /* { dg-error "attribute ignored" } */ } - -/* nodiscard is not yet implemented, but is a standard attribute, so - its use is not a constraint violation and should only receive a - warning. */ -[[nodiscard]] int ndfunc (void); /* { dg-warning "attribute directive ignored" } */ diff --git a/gcc/testsuite/gcc.dg/c2x-bool-1.c b/gcc/testsuite/gcc.dg/c2x-bool-1.c new file mode 100644 index 0000000..b64da1f --- /dev/null +++ b/gcc/testsuite/gcc.dg/c2x-bool-1.c @@ -0,0 +1,50 @@ +/* Test macro expansions in <stdbool.h> in C2x. */ +/* { dg-do run } */ +/* { dg-options "-std=c2x -pedantic-errors" } */ + +#include <stdbool.h> + +#define str(x) xstr(x) +#define xstr(x) #x + +extern void abort (void); +extern void exit (int); +extern int strcmp (const char *, const char *); + +#if false - 1 < 0 +#error "false signed in #if" +#endif + +#if false != 0 +#error "false not 0 in #if" +#endif + +#if true - 2 < 0 +#error "true signed in #if" +#endif + +#if true != 1 +#error "true not 1 in #if" +#endif + +int +main (void) +{ + if (strcmp (str (bool), "_Bool") != 0) + abort (); + if (_Generic (true, _Bool : 1) != 1) + abort (); + if (true != 1) + abort (); + if (strcmp (str (true), "((_Bool)+1u)") != 0) + abort (); + if (_Generic (false, _Bool : 1) != 1) + abort (); + if (false != 0) + abort (); + if (strcmp (str (false), "((_Bool)+0u)") != 0) + abort (); + if (strcmp (str (__bool_true_false_are_defined), "1") != 0) + abort (); + exit (0); +} diff --git a/gcc/testsuite/gcc.dg/c2x-labels-1.c b/gcc/testsuite/gcc.dg/c2x-labels-1.c new file mode 100644 index 0000000..439cf78 --- /dev/null +++ b/gcc/testsuite/gcc.dg/c2x-labels-1.c @@ -0,0 +1,23 @@ +/* Tests for labels before declarations and at ends of compound statements. */ +/* { dg-do run } */ +/* { dg-options "-std=c2x -pedantic-errors" } */ + +int f(int x) +{ + goto b; + a: int i = 2 * x; + aa: int u = 0; int v = 0; + goto c; + b: goto a; + { i *= 3; c: } + return i + u + v; + d: +} + +int main(void) +{ + if (2 != f(1)) + __builtin_abort(); + + return 0; +} diff --git a/gcc/testsuite/gcc.dg/c2x-labels-2.c b/gcc/testsuite/gcc.dg/c2x-labels-2.c new file mode 100644 index 0000000..bd010e9e --- /dev/null +++ b/gcc/testsuite/gcc.dg/c2x-labels-2.c @@ -0,0 +1,15 @@ +/* Tests for labels before declarations and at ends of compound statements. */ +/* { dg-do compile } */ +/* { dg-options "-std=c2x -Wc11-c2x-compat" } */ + +int f(int x) +{ + goto b; + a: int i = 2 * x; /* { dg-warning "a label can only be part of a statement and a declaration is not a statement" } */ + goto c; + b: goto a; + { i *= 3; c: } /* { dg-warning "label at end of compound statement" } */ + return i; + d: /* { dg-warning "label at end of compound statement" } */ +} + diff --git a/gcc/testsuite/gcc.dg/c2x-labels-3.c b/gcc/testsuite/gcc.dg/c2x-labels-3.c new file mode 100644 index 0000000..159116d --- /dev/null +++ b/gcc/testsuite/gcc.dg/c2x-labels-3.c @@ -0,0 +1,38 @@ +/* Tests for labels before declarations and at ends of compound statements + * in combination with attributes. */ +/* { dg-do compile } */ +/* { dg-options "-std=c2x -Wall" } */ + +int f(void) +{ + goto b; + a: int i = 0; + aa: __attribute__((unused)) int u = 0; int v = 0; /* { dg-warning "GNU-style attribute between label and declaration appertains to the label" } */ + goto c; + { c: } + b: goto a; + return i + u + v; + d: __attribute__((unused)) (void)0; + e: __attribute__((unused)) +} + +int g(void) +{ + goto b; + a: int i = 0; + [[maybe_unused]] aa: int u = 0; int v = 0; + goto c; + { c: } + b: goto a; + return i + u + v; + [[maybe_unused]] d: (void)0; + [[maybe_unused]] e: +} + +void h(void) +{ + [[maybe_unused]] a: [[maybe_unused]] b: [[maybe_unused]] int x; + + if (1) + [[maybe_unused]] c: [[maybe_unused]] d: (void)0; +} diff --git a/gcc/testsuite/gcc.dg/c2x-parm-omit-1.c b/gcc/testsuite/gcc.dg/c2x-parm-omit-1.c new file mode 100644 index 0000000..0dc89bb --- /dev/null +++ b/gcc/testsuite/gcc.dg/c2x-parm-omit-1.c @@ -0,0 +1,5 @@ +/* Test omitted parameter names in C2x. */ +/* { dg-do compile } */ +/* { dg-options "-std=c2x -pedantic-errors" } */ + +void f (int) { } diff --git a/gcc/testsuite/gcc.dg/c2x-parm-omit-2.c b/gcc/testsuite/gcc.dg/c2x-parm-omit-2.c new file mode 100644 index 0000000..7d68933 --- /dev/null +++ b/gcc/testsuite/gcc.dg/c2x-parm-omit-2.c @@ -0,0 +1,10 @@ +/* Test omitted parameter names in C2x. Warning test: there should be + no warning for an unnamed parameter being unused. */ +/* { dg-do compile } */ +/* { dg-options "-std=c2x -pedantic-errors -Wall -Wextra" } */ + +int +f (int a, int, int c, int d) /* { dg-warning "unused parameter 'd'" } */ +{ + return a + c; +} diff --git a/gcc/testsuite/gcc.dg/c2x-parm-omit-3.c b/gcc/testsuite/gcc.dg/c2x-parm-omit-3.c new file mode 100644 index 0000000..dac258b --- /dev/null +++ b/gcc/testsuite/gcc.dg/c2x-parm-omit-3.c @@ -0,0 +1,23 @@ +/* Test omitted parameter names in C2x. Execution test. */ +/* { dg-do run } */ +/* { dg-options "-std=c2x -pedantic-errors" } */ + +extern void abort (void); +extern void exit (int); + +void +f (int a, int [++a], int b) +{ + /* Verify array size expression of unnamed parameter is processed as + expected. */ + if (a != 2 || b != 3) + abort (); +} + +int +main (void) +{ + int t[2]; + f (1, t, 3); + exit (0); +} diff --git a/gcc/testsuite/gcc.dg/c2x-parm-omit-4.c b/gcc/testsuite/gcc.dg/c2x-parm-omit-4.c new file mode 100644 index 0000000..a4b0deb --- /dev/null +++ b/gcc/testsuite/gcc.dg/c2x-parm-omit-4.c @@ -0,0 +1,5 @@ +/* Test omitted parameter names in C2x: diagnosed with -Wc11-c2x-compat. */ +/* { dg-do compile } */ +/* { dg-options "-std=c2x -pedantic-errors -Wc11-c2x-compat" } */ + +void f (int) { } /* { dg-warning "omitting parameter names" } */ diff --git a/gcc/testsuite/gcc.dg/c99-bool-4.c b/gcc/testsuite/gcc.dg/c99-bool-4.c new file mode 100644 index 0000000..5cae18a --- /dev/null +++ b/gcc/testsuite/gcc.dg/c99-bool-4.c @@ -0,0 +1,46 @@ +/* Test macro expansions in <stdbool.h> in C99. */ +/* { dg-do run } */ +/* { dg-options "-std=c99 -pedantic-errors" } */ + +#include <stdbool.h> + +#define str(x) xstr(x) +#define xstr(x) #x + +extern void abort (void); +extern void exit (int); +extern int strcmp (const char *, const char *); + +#if false - 1 >= 0 +#error "false unsigned in #if" +#endif + +#if false != 0 +#error "false not 0 in #if" +#endif + +#if true - 2 >= 0 +#error "true unsigned in #if" +#endif + +#if true != 1 +#error "true not 1 in #if" +#endif + +int +main (void) +{ + if (strcmp (str (bool), "_Bool") != 0) + abort (); + if (true != 1) + abort (); + if (strcmp (str (true), "1") != 0) + abort (); + if (false != 0) + abort (); + if (strcmp (str (false), "0") != 0) + abort (); + if (strcmp (str (__bool_true_false_are_defined), "1") != 0) + abort (); + exit (0); +} diff --git a/gcc/testsuite/gcc.dg/darwin-minversion-link.c b/gcc/testsuite/gcc.dg/darwin-minversion-link.c index 0a80048..765fb79 100644 --- a/gcc/testsuite/gcc.dg/darwin-minversion-link.c +++ b/gcc/testsuite/gcc.dg/darwin-minversion-link.c @@ -13,8 +13,9 @@ /* { dg-additional-options "-mmacosx-version-min=010.011.06 -DCHECK=101106" { target *-*-darwin15* } } */ /* { dg-additional-options "-mmacosx-version-min=010.012.06 -DCHECK=101206" { target *-*-darwin16* } } */ /* { dg-additional-options "-mmacosx-version-min=010.013.06 -DCHECK=101306" { target *-*-darwin17* } } */ -/* This next test covers 10.18 and (currently unreleased) 10.19 for now. */ -/* { dg-additional-options "-mmacosx-version-min=010.014.05 -DCHECK=101405" { target *-*-darwin1[89]* } } */ +/* { dg-additional-options "-mmacosx-version-min=010.014.05 -DCHECK=101405" { target *-*-darwin18* } } */ +/* { dg-additional-options "-mmacosx-version-min=010.015.06 -DCHECK=101506" { target *-*-darwin19* } } */ +/* { dg-additional-options "-mmacosx-version-min=011.000.00 -DCHECK=110000" { target *-*-darwin20 } } */ int main () diff --git a/gcc/testsuite/gcc.dg/decl-9.c b/gcc/testsuite/gcc.dg/decl-9.c index eeca8e0..9bb1560 100644 --- a/gcc/testsuite/gcc.dg/decl-9.c +++ b/gcc/testsuite/gcc.dg/decl-9.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-std=gnu89" } */ +/* { dg-options "-std=gnu89 -pedantic-errors" } */ w *x; /* { dg-error "unknown type name 'w'" } */ @@ -12,6 +12,7 @@ int f1() int d, e; d * e; /* { dg-bogus "unknown type name 'd'" } */ g * h; /* { dg-error "unknown type name 'g'" } */ + /* { dg-error "mixed declarations" "" { target *-*-* } .-1 } */ g i; /* { dg-error "unknown type name 'g'" } */ } diff --git a/gcc/testsuite/gcc.dg/dfp/builtin-snan-1.c b/gcc/testsuite/gcc.dg/dfp/builtin-snan-1.c new file mode 100644 index 0000000..49a32c8 --- /dev/null +++ b/gcc/testsuite/gcc.dg/dfp/builtin-snan-1.c @@ -0,0 +1,23 @@ +/* Test __builtin_nansd* functions. Test not requiring runtime + exceptions support. */ +/* { dg-do run } */ +/* { dg-options "" } */ + +volatile _Decimal32 d32 = __builtin_nansd32 (""); +volatile _Decimal64 d64 = __builtin_nansd64 (""); +volatile _Decimal128 d128 = __builtin_nansd128 (""); + +extern void abort (void); +extern void exit (int); + +int +main (void) +{ + if (!__builtin_isnan (d32)) + abort (); + if (!__builtin_isnan (d64)) + abort (); + if (!__builtin_isnan (d128)) + abort (); + exit (0); +} diff --git a/gcc/testsuite/gcc.dg/dfp/builtin-snan-2.c b/gcc/testsuite/gcc.dg/dfp/builtin-snan-2.c new file mode 100644 index 0000000..248481b --- /dev/null +++ b/gcc/testsuite/gcc.dg/dfp/builtin-snan-2.c @@ -0,0 +1,44 @@ +/* Test __builtin_nansd* functions. Test requiring runtime exceptions + support. */ +/* { dg-do run } */ +/* { dg-require-effective-target fenv_exceptions_dfp } */ +/* { dg-options "" } */ + +#include <fenv.h> + +volatile _Decimal32 d32 = __builtin_nansd32 (""); +volatile _Decimal64 d64 = __builtin_nansd64 (""); +volatile _Decimal128 d128 = __builtin_nansd128 (""); + +extern void abort (void); +extern void exit (int); + +int +main (void) +{ + feclearexcept (FE_ALL_EXCEPT); + d32 += d32; + if (!fetestexcept (FE_INVALID)) + abort (); + feclearexcept (FE_ALL_EXCEPT); + d32 += d32; + if (fetestexcept (FE_INVALID)) + abort (); + feclearexcept (FE_ALL_EXCEPT); + d64 += d64; + if (!fetestexcept (FE_INVALID)) + abort (); + feclearexcept (FE_ALL_EXCEPT); + d64 += d64; + if (fetestexcept (FE_INVALID)) + abort (); + feclearexcept (FE_ALL_EXCEPT); + d128 += d128; + if (!fetestexcept (FE_INVALID)) + abort (); + feclearexcept (FE_ALL_EXCEPT); + d128 += d128; + if (fetestexcept (FE_INVALID)) + abort (); + exit (0); +} diff --git a/gcc/testsuite/gcc.dg/dfp/pr97439.c b/gcc/testsuite/gcc.dg/dfp/pr97439.c new file mode 100644 index 0000000..7fcf834 --- /dev/null +++ b/gcc/testsuite/gcc.dg/dfp/pr97439.c @@ -0,0 +1,27 @@ +// { dg-do run } +// { dg-options "-O1" } + +static int +foo(_Decimal128 x, _Decimal128 y) +{ + if (x > y) + return 1; + + return 0; +} + +int __attribute__((noinline)) +bar(_Decimal128 x) +{ + return foo (x, -1.0DL * __builtin_infd32()); +} + +int +main (void) +{ + int res = bar (0.0DL); + if (res != 1) + __builtin_abort (); + + return 0; +} diff --git a/gcc/testsuite/gcc.dg/gomp/barrier-2.c b/gcc/testsuite/gcc.dg/gomp/barrier-2.c index 5a70919..c0d62f5 100644 --- a/gcc/testsuite/gcc.dg/gomp/barrier-2.c +++ b/gcc/testsuite/gcc.dg/gomp/barrier-2.c @@ -1,4 +1,5 @@ /* { dg-do compile } */ +/* { dg-options "-Wall -std=c17 -fopenmp -pedantic-errors" } */ void f1(void) { @@ -16,6 +17,7 @@ void f1(void) void f2(void) { label: /* { dg-error "label at end of compound statement" } */ + /* { dg-warning "defined but not used" "" { target *-*-* } .-1 } */ #pragma omp barrier /* { dg-error "may only be used in compound statements" } */ } diff --git a/gcc/testsuite/gcc.dg/gomp/declare-simd-5.c b/gcc/testsuite/gcc.dg/gomp/declare-simd-5.c index fe23652..b9a4161 100644 --- a/gcc/testsuite/gcc.dg/gomp/declare-simd-5.c +++ b/gcc/testsuite/gcc.dg/gomp/declare-simd-5.c @@ -1,5 +1,6 @@ /* Test parsing of #pragma omp declare simd */ /* { dg-do compile } */ +/* { dg-options "-std=c17 -fopenmp -pedantic-errors" } */ int f1 (int x) @@ -14,7 +15,7 @@ f1 (int x) lab: #pragma omp declare simd simdlen (8) aligned (b : 8 * sizeof (int)) extern int f5 (int a, int *b, int c); /* { dg-error "must be followed by function declaration or definition" } */ - x++; /* { dg-error "expected expression before" "" { target *-*-* } .-1 } */ + x++; /* { dg-error "a label can only be part of a statement and a declaration is not a statement" "" { target *-*-* } .-1 } */ } return x; } diff --git a/gcc/testsuite/gcc.dg/gomp/declare-variant-2.c b/gcc/testsuite/gcc.dg/gomp/declare-variant-2.c index 701d83b..39c2c1d 100644 --- a/gcc/testsuite/gcc.dg/gomp/declare-variant-2.c +++ b/gcc/testsuite/gcc.dg/gomp/declare-variant-2.c @@ -1,5 +1,6 @@ /* Test parsing of #pragma omp declare variant */ /* { dg-do compile } */ +/* { dg-options "-std=c17 -fopenmp -pedantic-errors" } */ int f0 (int, int *, int); @@ -16,7 +17,7 @@ f1 (int x) lab: #pragma omp declare variant (fn0) match (user={condition(0)}) extern int f5 (int a, int *b, int c); /* { dg-error "must be followed by function declaration or definition" } */ - x++; /* { dg-error "expected expression before" "" { target *-*-* } .-1 } */ + x++; /* { dg-error "a label can only be part of a statement and a declaration is not a statement" "" { target *-*-* } .-1 } */ } return x; } diff --git a/gcc/testsuite/gcc.dg/guality/guality.exp b/gcc/testsuite/gcc.dg/guality/guality.exp index 89cd896..ba87132 100644 --- a/gcc/testsuite/gcc.dg/guality/guality.exp +++ b/gcc/testsuite/gcc.dg/guality/guality.exp @@ -38,7 +38,7 @@ global GDB if ![info exists ::env(GUALITY_GDB_NAME)] { if [info exists GDB] { set guality_gdb_name "$GDB" - } elseif [file exists $rootme/../gdb/gdb] { + } elseif { [info exists rootme] && [file exists $rootme/../gdb/gdb] } { # If we're doing a combined build, and gdb is available, use it. set guality_gdb_name "$rootme/../gdb/gdb" } else { diff --git a/gcc/testsuite/gcc.dg/ipa/inlinehint-5.c b/gcc/testsuite/gcc.dg/ipa/inlinehint-5.c new file mode 100644 index 0000000..218f805 --- /dev/null +++ b/gcc/testsuite/gcc.dg/ipa/inlinehint-5.c @@ -0,0 +1,36 @@ +/* { dg-options "-O2 -fdump-ipa-inline-details -fno-early-inlining " } */ +/* { dg-add-options bind_pic_locally } */ +int j,k,l; +int test3(int); +int test4(int); + +static inline int +test2(int i) +{ + if (__builtin_constant_p (i)) + { + switch (i) + { + case 1: return j; + case 2: return k; + case 3: return l; + } + } + else return test3(i)+test4(i); +} + +static inline int +test (int i) +{ + return test2(i) + test2(i+1) + test3 (i) + test3(i) + test3(i) + test3 (i); +} + +int +run (int i) +{ + return test (i) + test (i); +} +/* The test should work by first inlining test2->test and then test to run + Both are called twice, so 4 hints (the second make sure that we propagate + to callers. */ +/* { dg-final { scan-ipa-dump-times "hints: declared_inline builtin_constant_p" 4 "inline" } } */ diff --git a/gcc/testsuite/gcc.dg/ipa/modref-1.c b/gcc/testsuite/gcc.dg/ipa/modref-1.c new file mode 100644 index 0000000..858567d --- /dev/null +++ b/gcc/testsuite/gcc.dg/ipa/modref-1.c @@ -0,0 +1,24 @@ +/* { dg-options "-O2 -fdump-ipa-modref" } */ +/* { dg-do compile } */ +__attribute__((noinline)) +void a(char *ptr, char *ptr2) +{ + (*ptr)++; + (*ptr2)++; +} + +__attribute__((noinline)) +void b(char *ptr) +{ + a(ptr+1,&ptr[2]); +} + +int main() +{ + char c[3]={0,1,0}; + b(c); + return c[0]+c[2]; +} +/* Check that both param offsets are determined correctly. */ +/* { dg-final { scan-ipa-dump "param offset:1" "modref" } } */ +/* { dg-final { scan-ipa-dump "param offset:2" "modref" } } */ diff --git a/gcc/testsuite/gcc.dg/ipa/modref-2.c b/gcc/testsuite/gcc.dg/ipa/modref-2.c new file mode 100644 index 0000000..5ac2c65 --- /dev/null +++ b/gcc/testsuite/gcc.dg/ipa/modref-2.c @@ -0,0 +1,15 @@ +/* { dg-options "-O2 -fdump-ipa-modref" } */ +/* { dg-do compile } */ +void +test (int *a, int size) +{ + __builtin_memset (a, 0, 321); +} +void +test2 (double x, double *y) +{ + __builtin_modf (x,y); +} +/* 321*8 */ +/* { dg-final { scan-ipa-dump "Parm 0 param offset:0 offset:0 size:-1 max_size:2568" "modref" } } */ +/* { dg-final { scan-ipa-dump "Parm 1 param offset:0 offset:0 size:-1 max_size:64" "modref" } } */ diff --git a/gcc/testsuite/gcc.dg/label-compound-stmt-1.c b/gcc/testsuite/gcc.dg/label-compound-stmt-1.c index 2f8fa4e..2ae2b82 100644 --- a/gcc/testsuite/gcc.dg/label-compound-stmt-1.c +++ b/gcc/testsuite/gcc.dg/label-compound-stmt-1.c @@ -1,7 +1,7 @@ /* Test that labels at ends of compound statements are hard errors. */ /* Origin: Joseph Myers <jsm@polyomino.org.uk> */ /* { dg-do compile } */ -/* { dg-options "" } */ +/* { dg-options "-std=c17 -pedantic-errors" } */ void f(void) { g: } /* { dg-bogus "warning" "warning in place of error" } */ /* { dg-error "label|parse|syntax" "label at end of compound statement" { target *-*-* } .-1 } */ diff --git a/gcc/testsuite/gcc.dg/lto/modref-2_0.c b/gcc/testsuite/gcc.dg/lto/modref-2_0.c new file mode 100644 index 0000000..cf84ed9 --- /dev/null +++ b/gcc/testsuite/gcc.dg/lto/modref-2_0.c @@ -0,0 +1,27 @@ +/* { dg-lto-do run } */ +/* { dg-lto-options {"-O2 -flto-partition=max -flto -fno-ipa-sra"} } */ +__attribute__ ((noinline)) +void +test (char *a) +{ + __builtin_memset (a,0,321); +} +__attribute__ ((noinline)) +void +test2 (double *x, double *y) +{ + __builtin_modf (*x,y); +} +int +main (void) +{ + char array[321]; + double x=1, y=2; + char arrayz[321]; + arrayz[0]=1; + test (array); + test2 (&x,&y); + if (!__builtin_constant_p (x==2) || !__builtin_constant_p (arrayz[0]==1)) + __builtin_abort (); + return 0; +} diff --git a/gcc/testsuite/gcc.dg/no-strict-overflow-4.c b/gcc/testsuite/gcc.dg/no-strict-overflow-4.c index b6d3da3..90145ff9 100644 --- a/gcc/testsuite/gcc.dg/no-strict-overflow-4.c +++ b/gcc/testsuite/gcc.dg/no-strict-overflow-4.c @@ -4,7 +4,8 @@ /* Source: Ian Lance Taylor. Dual of strict-overflow-4.c. */ /* We can only simplify the conditional when using strict overflow - semantics. */ + semantics or when using wrap overflow semantics. -fno-strict-overflow is + equivalent to -fwrapv. */ int foo (int i) @@ -12,4 +13,4 @@ foo (int i) return i + 1 > i; } -/* { dg-final { scan-tree-dump "\[^ \]*_.(\\\(D\\\))? (>|<) \[^ \]*_." "optimized" } } */ +/* { dg-final { scan-tree-dump "\[^ \]*_.(\\\(D\\\))? != \[0-9]+" "optimized" } } */ diff --git a/gcc/testsuite/gcc.dg/noncompile/pr79758.c b/gcc/testsuite/gcc.dg/noncompile/pr79758.c index aeaf7c7..a312160 100644 --- a/gcc/testsuite/gcc.dg/noncompile/pr79758.c +++ b/gcc/testsuite/gcc.dg/noncompile/pr79758.c @@ -1,6 +1,6 @@ /* PR c/79758 */ /* { dg-do compile } */ -void fn1 (int[a]) { }; /* { dg-error "undeclared here|parameter name omitted" } */ +void fn1 (int[a]) { }; /* { dg-error "undeclared here" } */ void fn1 (b) { }; /* { dg-error "redefinition" } */ /* { dg-warning "defaults to 'int'" "" { target *-*-* } .-1 } */ diff --git a/gcc/testsuite/gcc.dg/parse-decl-after-label.c b/gcc/testsuite/gcc.dg/parse-decl-after-label.c index 9c9886a..6e2a047e 100644 --- a/gcc/testsuite/gcc.dg/parse-decl-after-label.c +++ b/gcc/testsuite/gcc.dg/parse-decl-after-label.c @@ -1,6 +1,6 @@ /* PR 29062 { dg-do compile } -{ dg-options "-fsyntax-only" } +{ dg-options "-std=c17 -pedantic-errors -fsyntax-only" } */ int f(int x) diff --git a/gcc/testsuite/gcc.c-torture/execute/pr36093.c b/gcc/testsuite/gcc.dg/pr36093.c index dac5720..8474641 100644 --- a/gcc/testsuite/gcc.c-torture/execute/pr36093.c +++ b/gcc/testsuite/gcc.dg/pr36093.c @@ -1,3 +1,4 @@ +/* { dg-do compile } */ /* { dg-skip-if "small alignment" { pdp11-*-* } } */ extern void abort (void); @@ -7,7 +8,7 @@ typedef struct Bar { } Bar __attribute__((__aligned__(128))); typedef struct Foo { - Bar bar[4]; + Bar bar[4]; /* { dg-error "size of array element is not a multiple of its alignment" } */ } Foo; Foo foo[4]; diff --git a/gcc/testsuite/gcc.c-torture/execute/pr43783.c b/gcc/testsuite/gcc.dg/pr43783.c index 1eff2b9..196735b 100644 --- a/gcc/testsuite/gcc.c-torture/execute/pr43783.c +++ b/gcc/testsuite/gcc.dg/pr43783.c @@ -1,3 +1,5 @@ +/* { dg-do compile } */ +/* { dg-options "" } */ /* { dg-skip-if "small alignment" { pdp11-*-* } } */ typedef __attribute__((aligned(16))) @@ -5,7 +7,7 @@ struct { unsigned long long w[3]; } UINT192; -UINT192 bid_Kx192[32]; +UINT192 bid_Kx192[32]; /* { dg-error "size of array element is not a multiple of its alignment" } */ extern void abort (void); diff --git a/gcc/testsuite/gcc.dg/pr66552.c b/gcc/testsuite/gcc.dg/pr66552.c new file mode 100644 index 0000000..7583c9a --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr66552.c @@ -0,0 +1,14 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -fdump-tree-lower" } */ + +unsigned a(unsigned x, int n) +{ + return x >> (n % 32); +} + +unsigned b(unsigned x, int n) +{ + return x << (n % 32); +} + +/* { dg-final { scan-tree-dump-not " % " "lower" } } */ diff --git a/gcc/testsuite/gcc.dg/pr68671.c b/gcc/testsuite/gcc.dg/pr68671.c index 9b473ca..bec4639 100644 --- a/gcc/testsuite/gcc.dg/pr68671.c +++ b/gcc/testsuite/gcc.dg/pr68671.c @@ -1,7 +1,6 @@ /* PR tree-optimization/68671 */ /* { dg-do run } */ /* { dg-options " -O2 -fno-tree-dce" } */ -/* { dg-xfail-if "ptxas crashes" { nvptx-*-* } } */ volatile int a = -1; volatile int b; diff --git a/gcc/testsuite/gcc.target/riscv/pr91441.c b/gcc/testsuite/gcc.dg/pr91441.c index b55df5e..4f7a8fb 100644 --- a/gcc/testsuite/gcc.target/riscv/pr91441.c +++ b/gcc/testsuite/gcc.dg/pr91441.c @@ -1,5 +1,6 @@ /* PR target/91441 */ /* { dg-do compile } */ +/* { dg-require-effective-target no_fsanitize_address }*/ /* { dg-options "--param asan-stack=1 -fsanitize=kernel-address" } */ int *bar(int *); diff --git a/gcc/testsuite/gcc.target/riscv/pr96260.c b/gcc/testsuite/gcc.dg/pr96260.c index 229997f..734832f 100644 --- a/gcc/testsuite/gcc.target/riscv/pr96260.c +++ b/gcc/testsuite/gcc.dg/pr96260.c @@ -1,5 +1,6 @@ /* PR target/96260 */ /* { dg-do compile } */ +/* { dg-require-effective-target no_fsanitize_address }*/ /* { dg-options "--param asan-stack=1 -fsanitize=kernel-address -fasan-shadow-offset=0x100000" } */ int *bar(int *); diff --git a/gcc/testsuite/gcc.dg/pr96307.c b/gcc/testsuite/gcc.dg/pr96307.c new file mode 100644 index 0000000..cd1c17c --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr96307.c @@ -0,0 +1,25 @@ +/* PR target/96307 */ +/* { dg-do compile } */ +/* { dg-require-effective-target no_fsanitize_address }*/ +/* { dg-additional-options "-fsanitize=kernel-address --param=asan-instrumentation-with-call-threshold=8" } */ + +#include <limits.h> +enum a {test1, test2, test3=INT_MAX}; +enum a a; +enum a *b; + +void reset (void); + +void +t() +{ + if (a != test2) + __builtin_abort (); + if (*b != test2) + __builtin_abort (); + reset (); + if (a != test1) + __builtin_abort (); + if (*b != test1) + __builtin_abort (); +} diff --git a/gcc/testsuite/gcc.dg/pr97360-2.c b/gcc/testsuite/gcc.dg/pr97360-2.c new file mode 100644 index 0000000..48aebf1 --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr97360-2.c @@ -0,0 +1,14 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 " } */ + +void *a; +void *b(void); +void *e(void); + +void * +c() { + void *d; + if (d == b && e()) + d = a; + return d; +} diff --git a/gcc/testsuite/gcc.dg/pr97378.c b/gcc/testsuite/gcc.dg/pr97378.c new file mode 100644 index 0000000..27e4a1f --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr97378.c @@ -0,0 +1,15 @@ +// { dg-do compile } +// { dg-options "-O2" } + +int a, b, c; +void d() { +e : { + long f; + long *g = &f; + if ((a != 0) - (b = 0)) + ; + else + a &= (*g %= a *= c) >= (*g || f); + goto e; +} +} diff --git a/gcc/testsuite/gcc.dg/pr97381.c b/gcc/testsuite/gcc.dg/pr97381.c new file mode 100644 index 0000000..947692c --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr97381.c @@ -0,0 +1,13 @@ +// { dg-do compile } +// { dg-options "-O2" } + +int a; +void b() { + char c = 27; + for (; c <= 85; c += 1) { + a /= 148372120 * c; + if (a) + for (;;) + ; + } +} diff --git a/gcc/testsuite/gcc.dg/pr97396.c b/gcc/testsuite/gcc.dg/pr97396.c new file mode 100644 index 0000000..d992c11 --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr97396.c @@ -0,0 +1,23 @@ +// { dg-do compile } +// { dg-options "-O1 -ftree-vrp" } +// { dg-additional-options "-m32" { target { i?86-*-* x86_64-*-* } } } + +unsigned int +po (char *os, unsigned int al) +{ + for (;;) + { + int qx = 0; + + while (al < 1) + { + char *cw; + + cw = os + qx; + if (cw) + return al + qx; + + qx += sizeof *cw; + } + } +} diff --git a/gcc/testsuite/gcc.dg/pr97462.c b/gcc/testsuite/gcc.dg/pr97462.c new file mode 100644 index 0000000..52c0533 --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr97462.c @@ -0,0 +1,10 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -w" } */ + +int a, b; + +void d () +{ + a << ~0 && b; + b = a; +} diff --git a/gcc/testsuite/gcc.dg/pr97463.c b/gcc/testsuite/gcc.dg/pr97463.c new file mode 100644 index 0000000..f93b07c --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr97463.c @@ -0,0 +1,7 @@ +/* PR c/97463 - ICE in warn_parm_ptrarray_mismatch on an incompatible + function redeclaration + { dg-do compile } + { dg-options "-Wall" } */ + +void f (void**); +void f (int n) { } // { dg-error "conflicting types" } diff --git a/gcc/testsuite/gcc.dg/pr97467.c b/gcc/testsuite/gcc.dg/pr97467.c new file mode 100644 index 0000000..dcbd218 --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr97467.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-Os" } */ + +int a; +long b; +unsigned int c = 1; + +int main () { + int e; + for (; c <= 0; c++) { + int f = 0; + b = e; + a = f || b << c; + } + return 0; +} diff --git a/gcc/testsuite/gcc.dg/pr97488.c b/gcc/testsuite/gcc.dg/pr97488.c new file mode 100644 index 0000000..de7396c --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr97488.c @@ -0,0 +1,11 @@ +// { dg-do compile { target int128 } } +// { dg-options "-O1 -ftree-vrp" } + +__int128 +ef (__int128 ms) +{ + int dh = 129; + int *hj = &dh; + + return ms << *hj ? ms : 0; +} diff --git a/gcc/testsuite/gcc.dg/pr97501.c b/gcc/testsuite/gcc.dg/pr97501.c new file mode 100644 index 0000000..aedac83 --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr97501.c @@ -0,0 +1,14 @@ +// { dg-do compile } +// { dg-options "-O2" } + +static int c = 0; + +int main() { + int b = 0; + if (c) { + for (;; b--) + do + b++; + while (b); + } +} diff --git a/gcc/testsuite/gcc.dg/pr97502.c b/gcc/testsuite/gcc.dg/pr97502.c new file mode 100644 index 0000000..d87af9c --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr97502.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O3" } */ + +extern char v[54]; +void bar (char *); +void +foo (void) +{ + int i; + char c[32]; + bar (c); + for (i = 0; i < 32; i++) + c[i] = c[i] && !v[i]; + bar (c); +} diff --git a/gcc/testsuite/gcc.dg/pr97505.c b/gcc/testsuite/gcc.dg/pr97505.c new file mode 100644 index 0000000..f01d912 --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr97505.c @@ -0,0 +1,23 @@ +// { dg-do compile } +// { dg-options "-Os -fsanitize=signed-integer-overflow -fdump-tree-evrp" } + +// Test that .UBSAN_CHECK_SUB(y, x) is treated as y-x for range +// purposes, where X and Y are related to each other. +// +// This effectively checks that range relationals work with builtins. + +void unreachable(); + +int foobar(int x, int y) +{ + if (x < y) + { + int z = y - x; + if (z == 0) + unreachable(); + return z; + } + return 5; +} + +// { dg-final { scan-tree-dump-not "unreachable" "evrp" } } diff --git a/gcc/testsuite/gcc.dg/pr97515.c b/gcc/testsuite/gcc.dg/pr97515.c new file mode 100644 index 0000000..84f145a --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr97515.c @@ -0,0 +1,25 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -fdump-tree-evrp" } */ + +int +e7 (int gg) +{ + int xe = 0; + + while (xe < 1) + { + int ui; + + ui = ~xe; + if (ui == 0) + ui = xe >> gg; + + xe %= !ui; + } + + return xe; +} + +/* EVRP should be able to reduce this to a single goto. */ + +/* { dg-final { scan-tree-dump-times "goto" 1 "evrp" } } */ diff --git a/gcc/testsuite/gcc.dg/pr97520.c b/gcc/testsuite/gcc.dg/pr97520.c new file mode 100644 index 0000000..9f66595 --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr97520.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -fno-tree-fre" } */ + +char a; +void b() { + char *c[5]; + char *d = &a; + &d; + *(c[4] = d); +} +int main() { return 0; } diff --git a/gcc/testsuite/gcc.dg/pr97539.c b/gcc/testsuite/gcc.dg/pr97539.c new file mode 100644 index 0000000..def55e1 --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr97539.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -g" } */ + +int a, b; +void c() { + char d; + for (; b;) + for (;;) + for (; d <= 7; d += 1) { + a = 7; + for (; a; a += 1) + e: + d += d; + d ^= 0; + } + goto e; +} diff --git a/gcc/testsuite/gcc.dg/pr97555.c b/gcc/testsuite/gcc.dg/pr97555.c new file mode 100644 index 0000000..625bc6f --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr97555.c @@ -0,0 +1,22 @@ +// { dg-do run } +// { dg-options "-Os" } + +struct { + int a:1; +} b; + +int c, d, e, f = 1, g; + +int main () +{ + for (; d < 3; d++) { + char h = 1 % f, i = ~(0 || ~0); + c = h; + f = ~b.a; + ~b.a | 1 ^ ~i && g; + if (~e) + i = b.a; + b.a = i; + } + return 0; +} diff --git a/gcc/testsuite/gcc.dg/pr97567-2.c b/gcc/testsuite/gcc.dg/pr97567-2.c new file mode 100644 index 0000000..dee31c6 --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr97567-2.c @@ -0,0 +1,24 @@ +/* { dg-do compile} */ +/* { dg-options "-O2 -fdump-tree-evrp" } */ + +char a[2]; + +extern int x; + +void foo(void); + +signed char g (signed char min, signed char max) +{ + signed char i = x; + return i < min || max < i ? min : i; +} + +void gg (void) +{ + signed char t = g (0, 9); + /* Ranger should be able to remove the call to foo (). */ + if (t > 9 || t < 0) + foo (); +} + +/* { dg-final { scan-tree-dump-not "foo" "evrp" } } */ diff --git a/gcc/testsuite/gcc.dg/pr97567.c b/gcc/testsuite/gcc.dg/pr97567.c new file mode 100644 index 0000000..8922f27 --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr97567.c @@ -0,0 +1,34 @@ +/* { dg-do run } */ +/* { dg-options "-O2" } */ + +int a, b, c, d; +void k() { + unsigned f = 1; + long long g = 4073709551615; + for (; a; a++) + for (;;) { + d = 0; + L1: + break; + } + if (f) + for (; a; a++) + ; + g || f; + int i = 0 - f || g; + long long j = g - f; + if (j || f) { + if (g < 4073709551615) + for (;;) + ; + int e = ~f, h = b / ~e; + if (c) + goto L2; + g = f = h; + } + g || d; +L2: + if (c) + goto L1; +} +int main() { k(); return 0; } diff --git a/gcc/testsuite/gcc.dg/pr97596.c b/gcc/testsuite/gcc.dg/pr97596.c new file mode 100644 index 0000000..b0726ad --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr97596.c @@ -0,0 +1,12 @@ +/* { dg-do compile { target int128 } } */ +/* { dg-options "-O2" } */ + +void +q8 (__int128 *uv, unsigned short int nf) +{ + __int128 i4; + + i4 = -nf; + if (i4 << 1 != 0) + *uv += nf; +} diff --git a/gcc/testsuite/gcc.dg/pr97721.c b/gcc/testsuite/gcc.dg/pr97721.c new file mode 100644 index 0000000..c2a2848 --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr97721.c @@ -0,0 +1,13 @@ +// { dg-do compile } +// { dg-options "-O -fno-tree-dominator-opts" } + +int ot; + +void +z6 (char *tw) +{ + while (ot >= 0) + --ot; + + __builtin_strcpy (&tw[ot], tw); +} diff --git a/gcc/testsuite/gcc.dg/pr97725.c b/gcc/testsuite/gcc.dg/pr97725.c new file mode 100644 index 0000000..2fcb12c --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr97725.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +int a; +unsigned b; + +int main() { + if (a) { + goto L1; + while (1) + while (1) { + long e = -1L, g; + int f, h, i; + L1: + a = f; + L2: + g = e; + f = h || g; + e = ~(f & b); + if (i || g < -1L) { + ~(g || 0); + break; + } + goto L2; + } + } + return 0; +} diff --git a/gcc/testsuite/gcc.dg/pr97737.c b/gcc/testsuite/gcc.dg/pr97737.c new file mode 100644 index 0000000..eef1c35 --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr97737.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +int a = 1, b, c; + +void d() { + int e = 1; +L1: + b = e; +L2: + e = e / a; + if (!(e || c || e - 1)) + goto L1; + if (!b) + goto L2; +} diff --git a/gcc/testsuite/gcc.dg/pr97741.c b/gcc/testsuite/gcc.dg/pr97741.c new file mode 100644 index 0000000..47115d3 --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr97741.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-Wall -Wextra -fno-strict-aliasing -fwrapv -Os -fno-toplevel-reorder -fno-tree-ccp -fno-tree-fre" } */ + +short a = 0; +long b = 0; +char c = 0; +void d() { + int e = 0; +f: + for (a = 6; a;) + c = e; + e = 0; + for (; e == 20; ++e) + for (; b;) + goto f; +} +int main() { return 0; } diff --git a/gcc/testsuite/gcc.dg/pragma-diag-6.c b/gcc/testsuite/gcc.dg/pragma-diag-6.c index 0dca1dc..f2df88d 100644 --- a/gcc/testsuite/gcc.dg/pragma-diag-6.c +++ b/gcc/testsuite/gcc.dg/pragma-diag-6.c @@ -2,7 +2,10 @@ #pragma GCC diagnostic error "-Wnoexcept" /* { dg-warning "is valid for C../ObjC.. but not for C" } */ #pragma GCC diagnostic error "-fstrict-aliasing" /* { dg-warning "not an option that controls warnings" } */ #pragma GCC diagnostic error "-Werror" /* { dg-warning "not an option that controls warnings" } */ -#pragma GCC diagnostic error "-Wvla2" /* { dg-warning "unknown option after '#pragma GCC diagnostic' kind; did you mean '-Wvla'" } */ -#pragma GCC diagnostic error "-Walla" /* { dg-warning "unknown option after '#pragma GCC diagnostic' kind; did you mean '-Wall'" } */ -#pragma GCC diagnostic warning "-Walla" /* { dg-warning "unknown option after '#pragma GCC diagnostic' kind; did you mean '-Wall'" } */ +#pragma GCC diagnostic error "-Wvla2" /* { dg-warning "unknown option after '#pragma GCC diagnostic' kind" } */ +/* { dg-message "did you mean '-Wvla'" "" { target *-*-* } .-1 } */ +#pragma GCC diagnostic error "-Walla" /* { dg-warning "unknown option after '#pragma GCC diagnostic' kind" } */ +/* { dg-message "did you mean '-Wall'" "" { target *-*-* } .-1 } */ +#pragma GCC diagnostic warning "-Walla" /* { dg-warning "unknown option after '#pragma GCC diagnostic' kind" } */ +/* { dg-message "did you mean '-Wall'" "" { target *-*-* } .-1 } */ int i; diff --git a/gcc/testsuite/gcc.dg/self-right-shift.c b/gcc/testsuite/gcc.dg/self-right-shift.c new file mode 100644 index 0000000..c457ee5 --- /dev/null +++ b/gcc/testsuite/gcc.dg/self-right-shift.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -fdump-tree-optimized" } */ + +/* Self right-shift should be optimized to 0. */ + +int +foo (int i) +{ + return i >> i; +} + +/* { dg-final { scan-tree-dump "return 0;" "optimized" } } */ diff --git a/gcc/testsuite/gcc.dg/sin_cos.c b/gcc/testsuite/gcc.dg/sin_cos.c new file mode 100644 index 0000000..aa71dca --- /dev/null +++ b/gcc/testsuite/gcc.dg/sin_cos.c @@ -0,0 +1,41 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +/* This maps to essentially the same gimple that is generated for + gnat.dg/sin_cos.adb, on platforms that use the wraplf variant of + Ada.Numerics.Aux_Float. The value of EPSILON is not relevant to + the test, but the test must be there to keep the conversions in + different BBs long enough to trigger the problem that prevented the + sincos optimization, because the arguments passed to sin and cos + didn't get unified into a single SSA_NAME in time for sincos. */ + +#include <math.h> + +#define EPSILON 3.4526697709225118160247802734375e-4 + +static float my_sinf(float x) { + return (float) sin ((double) x); +} + +static float wrap_sinf(float x) { + if (fabs (x) < EPSILON) + return 0; + return my_sinf (x); +} + +static float my_cosf(float x) { + return (float) cos ((double) x); +} + +static float wrap_cosf(float x) { + if (fabs (x) < EPSILON) + return 1; + return my_cosf (x); +} + +float my_sin_cos(float x, float *s, float *c) { + *s = wrap_sinf (x); + *c = wrap_cosf (x); +} + +/* { dg-final { scan-assembler "sincos\|cexp" { target *-linux-gnu* *-w64-mingw* *-*-vxworks* } } } */ diff --git a/gcc/testsuite/gcc.dg/sms-12.c b/gcc/testsuite/gcc.dg/sms-12.c index aef32ee..3ec50f2 100644 --- a/gcc/testsuite/gcc.dg/sms-12.c +++ b/gcc/testsuite/gcc.dg/sms-12.c @@ -1,5 +1,6 @@ /* { dg-do run } */ /* { dg-skip-if "" { ! { aarch64*-*-* } } } */ +/* { dg-require-effective-target fpic } */ /* { dg-options "-O2 -fmodulo-sched -funroll-loops -fdump-rtl-sms --param sms-min-sc=1 -fmodulo-sched-allow-regmoves -fPIC" } */ extern void abort (void); diff --git a/gcc/testsuite/gcc.dg/tree-prof/pr97461.c b/gcc/testsuite/gcc.dg/tree-prof/pr97461.c new file mode 100644 index 0000000..213fac9 --- /dev/null +++ b/gcc/testsuite/gcc.dg/tree-prof/pr97461.c @@ -0,0 +1,64 @@ +/* PR gcov-profile/97461 */ +/* { dg-options "-O2 -ldl" } */ + +#define _GNU_SOURCE + +#include <stdio.h> +#include <stdlib.h> +#include <string.h> + +static int malloc_depth = 0; + +static char memory[128* 1024]; +static size_t memory_p = 0; + +void f1(void) {} +void f2(void) {} + +typedef void (*fun_t)(void); +static const fun_t funs[2] = { f1, f2, }; + +static void * malloc_impl(size_t size) { + void * r = &memory[memory_p]; + /* The malloc() and calloc() functions return a pointer to the allocated + * memory, which is suitably aligned for any built-in type. Use 16 + * bytes here as the basic alignment requirement for user-defined malloc + * and calloc. See PR97594 for the details. */ + #define ROUND_UP_FOR_16B_ALIGNMENT(x) ((x + 15) & (-16)) + + memory_p += ROUND_UP_FOR_16B_ALIGNMENT(size); + + // force TOPN profile + funs[size % 2](); + return r; +} + +// Override default malloc, check it it get s called recursively +void * malloc(size_t size) { + // Must not be called recursively. Malloc implementation does not support it. + if (malloc_depth != 0) __builtin_trap(); + + ++malloc_depth; + void * r = malloc_impl(size); + --malloc_depth; + return r; +} + +// Called from gcov +void *calloc(size_t nmemb, size_t size) { + // Must not be called recursively. Malloc implementation does not support it. + if (malloc_depth != 0) __builtin_trap(); + + ++malloc_depth; + void * r = malloc_impl(size * nmemb); + memset(r, 0, size * nmemb); + --malloc_depth; + return r; +} + +void free(void *ptr){} + +int main() { + void * p = malloc(8); + return p != 0 ? 0 : 1; +} diff --git a/gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c b/gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c index b7d50ec..b9f8fd2 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c @@ -33,4 +33,4 @@ void test55 (int x, int y) that the && should be emitted (based on BRANCH_COST). Fix this by teaching dom to look through && and register all components as true. */ -/* { dg-final { scan-tree-dump-times "link_error" 0 "optimized" { xfail { ! "alpha*-*-* arm*-*-* aarch64*-*-* powerpc*-*-* cris-*-* hppa*-*-* i?86-*-* mmix-*-* mips*-*-* m68k*-*-* moxie-*-* nds32*-*-* s390*-*-* sh*-*-* sparc*-*-* visium-*-* x86_64-*-* riscv*-*-* or1k*-*-* msp430-*-* pru*-*-*" } } } } */ +/* { dg-final { scan-tree-dump-times "link_error" 0 "optimized" { xfail { ! "alpha*-*-* arm*-*-* aarch64*-*-* powerpc*-*-* cris-*-* hppa*-*-* i?86-*-* mmix-*-* mips*-*-* m68k*-*-* moxie-*-* nds32*-*-* s390*-*-* sh*-*-* sparc*-*-* visium-*-* x86_64-*-* riscv*-*-* or1k*-*-* msp430-*-* pru*-*-* nvptx*-*-*" } } } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/modref-4.c b/gcc/testsuite/gcc.dg/tree-ssa/modref-4.c new file mode 100644 index 0000000..3ac217b --- /dev/null +++ b/gcc/testsuite/gcc.dg/tree-ssa/modref-4.c @@ -0,0 +1,26 @@ +/* { dg-options "-O2 -fdump-tree-modref1" } */ +/* { dg-do compile } */ +__attribute__((noinline)) +void a(char *ptr, char *ptr2) +{ + (*ptr)++; + (*ptr2)++; +} + +__attribute__((noinline)) +void b(char *ptr) +{ + a(ptr+1,&ptr[2]); +} + +int main() +{ + char c[4]={0,1,2,0}; + b(c); + return c[0]+c[3]; +} +/* Check that both param offsets are determined correctly and the computation + is optimized out. */ +/* { dg-final { scan-tree-dump "param offset:1" "modref1" } } */ +/* { dg-final { scan-tree-dump "param offset:2" "modref1" } } */ +/* { dg-final { scan-tree-dump "return 0" "modref1" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-22.c b/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-22.c new file mode 100644 index 0000000..fd37066 --- /dev/null +++ b/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-22.c @@ -0,0 +1,11 @@ +/* PR tree-optimization/97690 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -fdump-tree-phiopt2" } */ + +int foo (_Bool d) { return d ? 2 : 0; } +int bar (_Bool d) { return d ? 1 : 0; } +int baz (_Bool d) { return d ? -__INT_MAX__ - 1 : 0; } +int qux (_Bool d) { return d ? 1024 : 0; } + +/* { dg-final { scan-tree-dump-not "if" "phiopt2" } } */ +/* { dg-final { scan-tree-dump-times " << " 3 "phiopt2" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr71077.c b/gcc/testsuite/gcc.dg/tree-ssa/pr71077.c index 4753740..259055f 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/pr71077.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/pr71077.c @@ -1,5 +1,6 @@ /* PR c++/71077 */ /* { dg-do link { target { i?86-*-* x86_64-*-* } } } */ +/* { dg-require-effective-target lto } */ /* { dg-options "-O3 -flto -march=core-avx2" } */ int *a; diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr84512.c b/gcc/testsuite/gcc.dg/tree-ssa/pr84512.c index 48d829a..3c02701 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/pr84512.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/pr84512.c @@ -13,4 +13,4 @@ int foo() } /* Listed targets xfailed due to PR84958. */ -/* { dg-final { scan-tree-dump "return 285;" "optimized" { xfail { amdgcn*-*-* nvptx*-*-* } } } } */ +/* { dg-final { scan-tree-dump "return 285;" "optimized" { xfail { amdgcn*-*-* } } } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr96789.c b/gcc/testsuite/gcc.dg/tree-ssa/pr96789.c new file mode 100644 index 0000000..d6139a0 --- /dev/null +++ b/gcc/testsuite/gcc.dg/tree-ssa/pr96789.c @@ -0,0 +1,58 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -funroll-loops -ftree-vectorize -fdump-tree-dse-details" } */ + +/* Test if scalar cleanup pass takes effects, mainly check + its secondary pass DSE can remove dead stores on array + tmp. */ + +#include "stdint.h" + +static inline void +foo (int16_t *diff, int i_size, uint8_t *val1, int i_val1, uint8_t *val2, + int i_val2) +{ + for (int y = 0; y < i_size; y++) + { + for (int x = 0; x < i_size; x++) + diff[x + y * i_size] = val1[x] - val2[x]; + val1 += i_val1; + val2 += i_val2; + } +} + +void +bar (int16_t res[16], uint8_t *val1, uint8_t *val2) +{ + int16_t d[16]; + int16_t tmp[16]; + + foo (d, 4, val1, 16, val2, 32); + + for (int i = 0; i < 4; i++) + { + int s03 = d[i * 4 + 0] + d[i * 4 + 3]; + int s12 = d[i * 4 + 1] + d[i * 4 + 2]; + int d03 = d[i * 4 + 0] - d[i * 4 + 3]; + int d12 = d[i * 4 + 1] - d[i * 4 + 2]; + + tmp[0 * 4 + i] = s03 + s12; + tmp[1 * 4 + i] = 2 * d03 + d12; + tmp[2 * 4 + i] = s03 - s12; + tmp[3 * 4 + i] = d03 - 2 * d12; + } + + for (int i = 0; i < 4; i++) + { + int s03 = tmp[i * 4 + 0] + tmp[i * 4 + 3]; + int s12 = tmp[i * 4 + 1] + tmp[i * 4 + 2]; + int d03 = tmp[i * 4 + 0] - tmp[i * 4 + 3]; + int d12 = tmp[i * 4 + 1] - tmp[i * 4 + 2]; + + res[i * 4 + 0] = s03 + s12; + res[i * 4 + 1] = 2 * d03 + d12; + res[i * 4 + 2] = s03 - s12; + res[i * 4 + 3] = d03 - 2 * d12; + } +} + +/* { dg-final { scan-tree-dump {Deleted dead store:.*tmp} "dse3" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr97456.c b/gcc/testsuite/gcc.dg/tree-ssa/pr97456.c new file mode 100644 index 0000000..5171c9b --- /dev/null +++ b/gcc/testsuite/gcc.dg/tree-ssa/pr97456.c @@ -0,0 +1,40 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -fwhole-program" } */ + + +float val2 = 1.710780f; +float val3; +volatile float vf; + +int __attribute__((noipa)) +get_bool (void) +{ + return 1; +} + +int __attribute__((noinline)) +wrong (float *pos) +{ + _Complex float a; + + __real__ a = *pos; + __imag__ a = *pos; + + _Complex float b = 0 + 0i; + + b = b + a; + + if (b == 0.0f) + return 1; + + vf = __imag__ b; + return 0; +} + +int main(int argc, char **argv) { + float val = get_bool () == 1 ? val2 : val3; + + if ((wrong(&val), wrong(&val))) + __builtin_abort (); + return 0; +} diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr97503.c b/gcc/testsuite/gcc.dg/tree-ssa/pr97503.c new file mode 100644 index 0000000..3a3dae6 --- /dev/null +++ b/gcc/testsuite/gcc.dg/tree-ssa/pr97503.c @@ -0,0 +1,19 @@ +/* PR tree-optimization/97503 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -fdump-tree-optimized" } */ +/* { dg-additional-options "-mbmi -mlzcnt" { target i?86-*-* x86_64-*-* } } */ +/* { dg-final { scan-tree-dump-times "\.CLZ" 2 "optimized" { target { { i?86-*-* x86_64-*-* aarch64-*-* powerpc*-*-* } && lp64 } } } } */ +/* { dg-final { scan-tree-dump-not "__builtin_clz" "optimized" { target { { i?86-*-* x86_64-*-* aarch64-*-* powerpc*-*-*} && lp64 } } } } */ +/* { dg-final { scan-tree-dump-not "PHI <" "optimized" { target { { i?86-*-* x86_64-*-* aarch64-*-* powerpc*-*-*} && lp64 } } } } */ + +int +foo (int x) +{ + return x ? __builtin_clz (x) : 32; +} + +int +bar (unsigned long long x) +{ + return x ? __builtin_clzll (x) : 64; +} diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-11.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-11.c index 36b8e7f..d70ea5a 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-11.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-11.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O1 -fdump-tree-optimized" } */ +/* { dg-options "-O2 -fdump-tree-optimized" } */ /* Test for CPROP across a DAG. */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-28.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-28.c index d3a1bbc..b81cabe 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-28.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-28.c @@ -17,5 +17,5 @@ int foo (int *p, int b) /* { dg-final { scan-tree-dump-not "Deleted dead store" "dse1"} } */ /* { dg-final { scan-tree-dump-not "Deleted dead store" "dse2"} } */ -/* { dg-final { scan-tree-dump-not "Deleted dead store" "dse3"} } */ +/* { dg-final { scan-tree-dump-not "Deleted dead store" "dse4"} } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-29.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-29.c index 31529e7..f4ef89c 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-29.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-29.c @@ -22,5 +22,5 @@ foo(int cond, struct z *s) /* { dg-final { scan-tree-dump-times "Deleted dead store" 3 "dse1"} } */ /* { dg-final { scan-tree-dump-not "Deleted dead store" "dse2"} } */ -/* { dg-final { scan-tree-dump-not "Deleted dead store" "dse3"} } */ +/* { dg-final { scan-tree-dump-not "Deleted dead store" "dse4"} } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-hoist-7.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-hoist-7.c new file mode 100644 index 0000000..ce9cec6 --- /dev/null +++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-hoist-7.c @@ -0,0 +1,54 @@ +/* { dg-options "-O2 -fdump-tree-pre-stats" } */ + +void baz(); +int tem; +void foo (int a, int b, int c, int d, int e, int x, int y, int z) +{ + if (a) + { + if (b) + { + if (c) + { + if (d) + { + if (e) + { + tem = x + y; + } + else + { + if (z) baz (); + tem = x + y; + } + } + else + { + if (z) baz (); + tem = x + y; + } + } + else + { + if (z) baz (); + tem = x + y; + } + } + else + { + if (z) baz (); + tem = x + y; + } + } + else + { + if (z) baz (); + tem = x + y; + } +} + +/* Now inserting x + y five times is unnecessary but the cascading + cannot be avoided with the simple-minded dataflow. But make sure + we do the insertions all in the first iteration. */ +/* { dg-final { scan-tree-dump "insert iterations == 2" "pre" } } */ +/* { dg-final { scan-tree-dump "HOIST inserted: 5" "pre" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/switch-4.c b/gcc/testsuite/gcc.dg/tree-ssa/switch-4.c new file mode 100644 index 0000000..5953ef3 --- /dev/null +++ b/gcc/testsuite/gcc.dg/tree-ssa/switch-4.c @@ -0,0 +1,25 @@ +/* { dg-do compile { target { { x86_64-*-* aarch64-*-* ia64-*-* powerpc64-*-* } && lp64 } } } */ +/* { dg-options "-O2 -fno-bit-tests -fdump-tree-switchlower1" } */ + +int global; + +int foo (int x) +{ + switch (x) { + case 0: + case 10: + return 1; + case 20: + case 30: + case 62: + return 2; + case 1000: + case 1010: + case 1025 ... 1030: + return 1; + default: + return 0; + } +} + +/* { dg-final { scan-tree-dump-not "BT:" "switchlower1" } } */ diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-41.c b/gcc/testsuite/gcc.dg/vect/bb-slp-41.c index 7de5ed1..7224511 100644 --- a/gcc/testsuite/gcc.dg/vect/bb-slp-41.c +++ b/gcc/testsuite/gcc.dg/vect/bb-slp-41.c @@ -10,7 +10,10 @@ foo (int *a, int *b) a[i] = b[0] + b[1] + b[i+1] + b[i+2]; } -void bar (int *a, int *b) +/* Disable pre-slp FRE to avoid unexpected SLP on the epilogue + of the 1st loop. */ +void __attribute__((optimize("-fno-tree-fre"))) +bar (int *a, int *b) { int i; for (i = 0; i < (ARR_SIZE - 2); ++i) diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-52.c b/gcc/testsuite/gcc.dg/vect/bb-slp-52.c new file mode 100644 index 0000000..5194af8 --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/bb-slp-52.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ + +int a, e; +void g(float); +typedef struct { + float b, c; +} d; +d f; +void h(double i, double j) { + if (a && e) + return; + f.b = j; + f.c = i; + g(i); +} diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-53.c b/gcc/testsuite/gcc.dg/vect/bb-slp-53.c new file mode 100644 index 0000000..f3b5f31 --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/bb-slp-53.c @@ -0,0 +1,20 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target vect_double } */ + +double a[2], b[2]; + +void foo(double x, double y) +{ + double breakme1 = y + 3.; + double a1 = b[1] + 2.; + double breakme0 = x; + double a0 = b[0] + 1.; + a[0] = a0 * breakme0; + a[1] = a1 * breakme1; +} + +/* We should vectorize the SLP opportunity starting from the + grouped store to a[] including the load from b[] at the + leaf even though the multiplication requires another + vector invariant to be built. */ +/* { dg-final { scan-tree-dump "transform load" "slp2" } } */ diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-54.c b/gcc/testsuite/gcc.dg/vect/bb-slp-54.c new file mode 100644 index 0000000..d05ce33 --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/bb-slp-54.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target vect_double } */ + +double a[2], b[2], c[2]; + +void foo(int flag) +{ + double tem1, tem2; + if (flag) + { + tem1 = a[0]; + tem2 = a[1]; + } + else + { + tem1 = b[0]; + tem2 = b[1]; + } + c[0] = tem1; + c[1] = tem2; +} + +/* { dg-final { scan-tree-dump-times "transform load" 2 "slp2" } } */ diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-55.c b/gcc/testsuite/gcc.dg/vect/bb-slp-55.c new file mode 100644 index 0000000..57a042b --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/bb-slp-55.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ + +typedef struct { + int a; + int b; + int c; + int d; +} e; +e *f; +int g; +void h() { + e *i; + if (g) { + i->c = f[g].b; + i->d = f[g].a; + } else + i->c = i->d = 0; +} diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-56.c b/gcc/testsuite/gcc.dg/vect/bb-slp-56.c new file mode 100644 index 0000000..90d1751 --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/bb-slp-56.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ + +typedef struct { + double a, b; +} c; +int d, e; +int i(void); +void h(c, c); +void f() { + c a, g; + do { + a.a = e ?: g.a; + a.b = g.b + d; + h(g, a); + g = a; + } while (i()); +} diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-57.c b/gcc/testsuite/gcc.dg/vect/bb-slp-57.c new file mode 100644 index 0000000..6f13507 --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/bb-slp-57.c @@ -0,0 +1,38 @@ +/* { dg-do compile } */ +/* { dg-additional-options "-ffast-math" } */ +/* { dg-require-effective-target vect_float } */ + +float *a; +typedef struct { + int c; + float bbmax[3]; +} d; +d e; +int f[3]; +int g, h, i, j; +float k, k; +void l() +{ + for (unsigned z = 0; z < 2048; ++z) { + { + j = e.bbmax[1] > k ? e.bbmax[1] : k; + } + e.bbmax[1] = j; + { i = e.bbmax[2] > k ? e.bbmax[2] : k; } + e.bbmax[2] = i; + f[2] = a[2]; + { + float b; + h = e.bbmax[1] > b ? e.bbmax[1] : b; + } + e.bbmax[1] = h; + { + float b; + g = e.bbmax[2] > b ? e.bbmax[2] : b; + } + e.bbmax[2] = g; + } +} + +/* { dg-final { scan-tree-dump-times "transform load" 1 "slp1" { target { { x86_64-*-* i?86-*-* } && lp64 } } } } */ +/* { dg-final { scan-tree-dump "optimized: basic block" "slp1" { target { { x86_64-*-* i?86-*-* } && lp64 } } } } */ diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-58.c b/gcc/testsuite/gcc.dg/vect/bb-slp-58.c new file mode 100644 index 0000000..5a3d3b7 --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/bb-slp-58.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target vect_double } */ + +double x[1024]; +void bar (void); + +void foo (void) +{ + double tem1 = x[0]; + double tem2 = x[1]; + for (int i = 0; i < 511; ++i) + { + x[2*i] = tem1; + x[2*i+1] = tem2; + bar (); + tem1 = x[2*(i+1)]; + tem2 = x[2*(i+1)+1]; + } +} + +/* We should be able to vectorize the cycle in one SLP attempt including + both load groups. */ +/* { dg-final { scan-tree-dump-times "transform load" 2 "slp1" } } */ +/* { dg-final { scan-tree-dump-times "optimized: basic block" 1 "slp1" } } */ diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-59.c b/gcc/testsuite/gcc.dg/vect/bb-slp-59.c new file mode 100644 index 0000000..815b44e --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/bb-slp-59.c @@ -0,0 +1,26 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target vect_double } */ +/* { dg-additional-options "-fdump-tree-loopdone" } */ + +double x[1024]; +void bar (void); + +void foo (void) +{ + double tem1 = x[0]; + double tem2 = x[1]; + for (int i = 0; i < 511; ++i) + { + x[2*i] = tem2; + x[2*i+1] = tem1; + bar (); + tem1 = x[2*(i+1)]; + tem2 = x[2*(i+1)+1]; + } +} + +/* We should be able to vectorize the cycle in one SLP attempt including + both load groups and do only one permutation. */ +/* { dg-final { scan-tree-dump-times "transform load" 2 "slp1" } } */ +/* { dg-final { scan-tree-dump-times "VEC_PERM_EXPR" 1 "loopdone" } } */ +/* { dg-final { scan-tree-dump-times "optimized: basic block" 1 "slp1" } } */ diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-60.c b/gcc/testsuite/gcc.dg/vect/bb-slp-60.c new file mode 100644 index 0000000..52643bf --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/bb-slp-60.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ + +enum { a = 1, b }; +float *c, *e; +float d, h; +int f, g; +void i() +{ + float j = h; + for (; g;) + for (; f; f++) + { + c[a] = j * d; + c[b] = h * d; + j = 0; + h = e[2]; + } +} diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-61.c b/gcc/testsuite/gcc.dg/vect/bb-slp-61.c new file mode 100644 index 0000000..3323a2b --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/bb-slp-61.c @@ -0,0 +1,26 @@ +/* { dg-do compile } */ + +struct a { + enum { b, c } d; + unsigned e; + unsigned f; +}; +void j(struct a *a, int i, int h) +{ + unsigned f = a->f; + switch (a->d) + while (1) + { + if (i) + { + case b: + if (h) + goto k; + } + else + f = 0; + case c:; + } +k: + a->e = a->f = f; +} diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-62.c b/gcc/testsuite/gcc.dg/vect/bb-slp-62.c new file mode 100644 index 0000000..84ee04c --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/bb-slp-62.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ + +typedef struct { + char a; + int b[]; +} c; +int d, f; +c e; +void g() { + int h, i, j; + for (; i;) + switch (i) + case 4: { + h = (__UINTPTR_TYPE__)g >= 3; + for (; h; h -= 1) + if (d) + j = f; + } + for (; i < 3; i++) + e.b[i] = j; +} diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-63.c b/gcc/testsuite/gcc.dg/vect/bb-slp-63.c new file mode 100644 index 0000000..6519c97 --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/bb-slp-63.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ + +struct { + unsigned a; + unsigned c; +} d; +int e, g; +void h(unsigned b) { + unsigned a, c; + while (e) { + if (b) { + ++e; + continue; + } + c = g; + if (g) + a |= 10; + } + d.a = a; + d.c = c; +} diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-64.c b/gcc/testsuite/gcc.dg/vect/bb-slp-64.c new file mode 100644 index 0000000..dcb6a14 --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/bb-slp-64.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ + +enum { a, b }; +double *c, *e; +int d, f; +void g() { + for (;;) { + c[a] = c[b] = d * e[b]; + f = d -= f; + } +} diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-65.c b/gcc/testsuite/gcc.dg/vect/bb-slp-65.c new file mode 100644 index 0000000..ec1707b --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/bb-slp-65.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-additional-options "-O3" } */ +/* { dg-additional-options "-mavx2" { target x86_64-*-* i?86-*-* } } */ + +int *a; +int b, c, d, e; +void f() { + int g; + for (;;) + for (; b;) + if (d) + for (; c;) + if (g) + e += a[1] = a[2] = e; +} diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-66.c b/gcc/testsuite/gcc.dg/vect/bb-slp-66.c new file mode 100644 index 0000000..b59a2cc --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/bb-slp-66.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-additional-options "-O3" } */ + +typedef struct { + double a, b; +} c; +typedef struct { + c d; + long coordinates; +} e; +int f; +c g; +e h; +void k(int); +int n(); +void j() { int i; k(i); } +void k(int l) { + double a; + int b; + c m[4]; + long i; + for (; l;) + do { + g.a = b ?: a; + m[3] = g; + if (f) + m[0] = m[1] = m[3]; + i = 0; + for (; i < 4; i++) + (&h + i)->d = m[i]; + } while (n()); +} diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-67.c b/gcc/testsuite/gcc.dg/vect/bb-slp-67.c new file mode 100644 index 0000000..ff959c7 --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/bb-slp-67.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target vect_float } */ + +float a[6]; + +void foo (float x, float y) +{ + a[0] = 1.; + a[1] = 2.; + a[2] = 3.; + a[3] = 4.; + a[4] = 5.; + a[5] = x + y; +} + +/* { dg-final { scan-tree-dump "optimized: basic block" "slp2" } } */ diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-68.c b/gcc/testsuite/gcc.dg/vect/bb-slp-68.c new file mode 100644 index 0000000..8718031 --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/bb-slp-68.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target vect_double } */ +/* { dg-additional-options "-mavx" { target avx } } */ + +double x[10], y[6], z[4]; + +void foo () +{ + x[0] = y[0]; + x[1] = y[1]; + x[2] = y[2]; + x[3] = y[3]; + x[4] = y[4]; + x[5] = y[5]; + x[6] = z[0] + 1.; + x[7] = z[1] + 1.; + x[8] = z[2] + 1.; + x[9] = z[3] + 1.; +} + +/* We want to have the store group split into 4, 2, 4 when using 32byte vectors. */ +/* { dg-final { scan-tree-dump-not "from scalars" "slp2" } } */ diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-69.c b/gcc/testsuite/gcc.dg/vect/bb-slp-69.c new file mode 100644 index 0000000..ca72a68 --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/bb-slp-69.c @@ -0,0 +1,45 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target vect_int } */ + +_Bool arr[16]; + +void foo(char *q) +{ + char *p = __builtin_assume_aligned (q, 16); + _Bool b0, b1, b2, b3, b4, b5, b6, b7, b8, b9, b10, b11, b12, b13, b14, b15; + b0 = p[0] != 0; + b1 = p[1] != 0; + b2 = p[2] != 0; + b3 = p[3] != 0; + b4 = p[4] != 0; + b5 = p[5] != 0; + b6 = p[6] != 0; + b7 = p[7] != 0; + b8 = p[8] != 0; + b9 = p[9] != 0; + b10 = p[10] != 0; + b11 = p[11] != 0; + b12 = p[12] != 0; + b13 = p[13] != 0; + b14 = p[14] != 0; + b15 = p[15] != 0; + arr[0] = b0; + arr[1] = b1; + arr[2] = b2; + arr[3] = b3; + arr[4] = b4; + arr[5] = b5; + arr[6] = b6; + arr[7] = b7; + arr[8] = b8; + arr[9] = b9; + arr[10] = b10; + arr[11] = b11; + arr[12] = b12; + arr[13] = b13; + arr[14] = b14; + arr[15] = b15; +} + +/* { dg-final { scan-tree-dump "transform load" "slp2" } } */ +/* { dg-final { scan-tree-dump "optimized: basic block" "slp2" } } */ diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-pattern-2.c b/gcc/testsuite/gcc.dg/vect/bb-slp-pattern-2.c index f6b99ea..c50560b 100644 --- a/gcc/testsuite/gcc.dg/vect/bb-slp-pattern-2.c +++ b/gcc/testsuite/gcc.dg/vect/bb-slp-pattern-2.c @@ -13,13 +13,13 @@ foo (short * __restrict__ a, int * __restrict__ b, int stride) for (i = 0; i < N/stride; i++, a += stride, b += stride) { a[0] = b[0] ? 1 : 7; - a[1] = b[1] ? 2 : 0; + a[1] = b[1] ? 2 : 7; a[2] = b[2] ? 3 : 0; - a[3] = b[3] ? 4 : 0; + a[3] = b[3] ? 4 : 7; a[4] = b[4] ? 5 : 0; a[5] = b[5] ? 6 : 0; a[6] = b[6] ? 7 : 0; - a[7] = b[7] ? 8 : 0; + a[7] = b[7] ? 8 : 7; } } diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-pr65935.c b/gcc/testsuite/gcc.dg/vect/bb-slp-pr65935.c index ea37e4e..5d80f56 100644 --- a/gcc/testsuite/gcc.dg/vect/bb-slp-pr65935.c +++ b/gcc/testsuite/gcc.dg/vect/bb-slp-pr65935.c @@ -60,6 +60,7 @@ int main() /* We should also be able to use 2-lane SLP to initialize the real and imaginary components in the first loop of main. */ /* { dg-final { scan-tree-dump-times "optimized: basic block" 10 "slp1" } } */ -/* We should see the s->phase[dir] operand and only that operand built +/* We should see the s->phase[dir] operand splatted and no other operand built from scalars. See PR97334. */ -/* { dg-final { scan-tree-dump-times "Building vector operands from scalars" 1 "slp1" } } */ +/* { dg-final { scan-tree-dump "Using a splat" "slp1" } } */ +/* { dg-final { scan-tree-dump-times "Building vector operands from scalars" 0 "slp1" } } */ diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-pr97486.c b/gcc/testsuite/gcc.dg/vect/bb-slp-pr97486.c new file mode 100644 index 0000000..17d48a7 --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/bb-slp-pr97486.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ + +struct { + int *end_info; + int *fp; +} png_load_body_c; + +int *png_set_longjmp_fn(); + +void setjmp(); + +void png_load_body() +{ + int *fp; + int png_ptr, info_ptr, *end_info; + if (!fp) + return; + if (png_ptr) { + info_ptr = 0; + end_info = png_set_longjmp_fn(); + } + png_load_body_c.end_info = end_info; + png_load_body_c.fp = fp; + if (png_ptr) + png_set_longjmp_fn(); + setjmp(info_ptr); +} diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-pr97496.c b/gcc/testsuite/gcc.dg/vect/bb-slp-pr97496.c new file mode 100644 index 0000000..fa9e980 --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/bb-slp-pr97496.c @@ -0,0 +1,14 @@ +/* { dg-do compile } */ + +int a; +int b[1024]; +void c(unsigned g) { + if (a) { + long e = g, d = e; + int f = 0; + for (; f < 4; f++) { + b[f] = d; + d >>= 8; + } + } +} diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-pr97615.c b/gcc/testsuite/gcc.dg/vect/bb-slp-pr97615.c new file mode 100644 index 0000000..b4a8aa2 --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/bb-slp-pr97615.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ + +short *a; +int e, f; + +void +foo (int c, int d) +{ + short *a1, *a2, *a3; + a1 = a++; + *a1 = c; + a2 = a++; + *a2 = *a1; + a3 = a++; + *a3 = d; +} + +void +bar (void) +{ + foo (e + f - 2, e + f - 1); + foo (e + f - 1, 0); +} diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-pr97626.c b/gcc/testsuite/gcc.dg/vect/bb-slp-pr97626.c new file mode 100644 index 0000000..943d8a6 --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/bb-slp-pr97626.c @@ -0,0 +1,34 @@ +/* { dg-do compile } */ + +struct { + int x; + int y; +} do_plasma_rect; + +int do_plasma_context_0, do_plasma_x2, do_plasma_y2, do_plasma_plasma_depth, + do_plasma_xm, do_plasma_ym; +void gegl_buffer_set(); + +void do_plasma(int x1, int y1) { + if (__builtin_expect(({ + int _g_boolean_var_; + if (do_plasma_context_0) + _g_boolean_var_ = 1; + else + _g_boolean_var_ = 0; + _g_boolean_var_; + }), + 0)) { + do_plasma_rect.x = x1; + do_plasma_rect.y = y1; + gegl_buffer_set(); + } + do_plasma_xm = (x1 + do_plasma_x2) / 2; + do_plasma_ym = (y1 + do_plasma_y2) / 2; + if (do_plasma_plasma_depth) { + do_plasma_rect.x = do_plasma_xm; + do_plasma_rect.y = do_plasma_ym; + return; + } + do_plasma(do_plasma_xm, do_plasma_ym); +} diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-pr97633.c b/gcc/testsuite/gcc.dg/vect/bb-slp-pr97633.c new file mode 100644 index 0000000..ab0ae1d --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/bb-slp-pr97633.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ + +extern short i (void); + +struct { + short a; + short b; +} c; + +int d, e; +static int f = 1; + +void g () { + if (e) { + if (f) + goto L; + while (d) { + i (); + short j = d, k = i (), l = k; + L: + if (!(d && e) || l) + goto L; + c.a = j; + c.b = k; + } + } +} diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-pr97650.c b/gcc/testsuite/gcc.dg/vect/bb-slp-pr97650.c new file mode 100644 index 0000000..f9c91fb --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/bb-slp-pr97650.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-additional-options "-Os -fallow-store-data-races" } */ + +short a=0; +unsigned long *volatile *volatile *volatile *b; +unsigned long *volatile *volatile *volatile **c[7]; +void d() { + short e=0; + for (; a;) { + e = 0; + for (; e < 7; e++) + c[e] = &b; + } +} +int main() { return 0; } diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-pr97706.c b/gcc/testsuite/gcc.dg/vect/bb-slp-pr97706.c new file mode 100644 index 0000000..228ae70 --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/bb-slp-pr97706.c @@ -0,0 +1,61 @@ +/* { dg-do compile } */ + +_Bool arr[16]; +void bar(); +void foo(int n, char *p) +{ + _Bool b0, b1, b2, b3, b4, b5, b6, b7, b8, b9, b10, b11, b12, b13, b14, b15; + do + { + b0 = p[0] != 0; + b1 = p[1] != 0; + b2 = p[2] != 0; + b3 = p[3] != 0; + b4 = p[4] != 0; + b5 = p[5] != 0; + b6 = p[6] != 0; + b7 = p[7] != 0; + b8 = p[8] != 0; + b9 = p[9] != 0; + b10 = p[10] != 0; + b11 = p[11] != 0; + b12 = p[12] != 0; + b13 = p[13] != 0; + b14 = p[14] != 0; + b15 = p[15] != 0; + arr[0] = b0; + arr[1] = b1; + arr[2] = b2; + arr[3] = b3; + arr[4] = b4; + arr[5] = b5; + arr[6] = b6; + arr[7] = b7; + arr[8] = b8; + arr[9] = b9; + arr[10] = b10; + arr[11] = b11; + arr[12] = b12; + arr[13] = b13; + arr[14] = b14; + arr[15] = b15; + bar (); + } + while (--n); + arr[0] = b0; + arr[1] = b1; + arr[2] = b2; + arr[3] = b3; + arr[4] = b4; + arr[5] = b5; + arr[6] = b6; + arr[7] = b7; + arr[8] = b8; + arr[9] = b9; + arr[10] = b10; + arr[11] = b11; + arr[12] = b12; + arr[13] = b13; + arr[14] = b14; + arr[15] = b15; +} diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-pr97709.c b/gcc/testsuite/gcc.dg/vect/bb-slp-pr97709.c new file mode 100644 index 0000000..672807f --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/bb-slp-pr97709.c @@ -0,0 +1,26 @@ +/* { dg-do compile } */ + +int a; +struct b { + int c; + int d; +}; +void k (struct b); +struct b +e() +{ + void *f[] = {&&g, &&h, &&i, &&j}; + int d, c; +j: + goto *a; +g: + d = 0; +h: + c = 1; + goto *a; +i: + { + struct b b = {c, d}; + k(b); + } +} diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-pr97732.c b/gcc/testsuite/gcc.dg/vect/bb-slp-pr97732.c new file mode 100644 index 0000000..5187090 --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/bb-slp-pr97732.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ + +struct S { int a, b; } *e; +int d; + +void +foo (struct S *x) +{ + for (e = x; d; d++, e++) + e->a = e->b = (int) (__UINTPTR_TYPE__) e; +} diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-pr97746.c b/gcc/testsuite/gcc.dg/vect/bb-slp-pr97746.c new file mode 100644 index 0000000..c5a615d --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/bb-slp-pr97746.c @@ -0,0 +1,20 @@ +/* { dg-do compile } */ + +int a, b; +short c; + +extern void f (short*); + +void d() +{ + short e[2] = {0, 0}; + while (a) + { + f(e); + int g = 0 || a, h = 8 && c; + short i = c; + c = h & g; + if (b) + b = g || i; + } +} diff --git a/gcc/testsuite/gcc.dg/vect/no-vfa-vect-dv-2.c b/gcc/testsuite/gcc.dg/vect/no-vfa-vect-dv-2.c index dcb5370..8cc69ab 100644 --- a/gcc/testsuite/gcc.dg/vect/no-vfa-vect-dv-2.c +++ b/gcc/testsuite/gcc.dg/vect/no-vfa-vect-dv-2.c @@ -75,5 +75,3 @@ int main () /* The initialization induction loop (with aligned access) is also vectorized. */ /* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" } } */ -/* { dg-final { scan-tree-dump-times "accesses have the same alignment." 2 "vect" { target { { vect_aligned_arrays } && {! vect_sizes_32B_16B} } } } } */ -/* { dg-final { scan-tree-dump-times "accesses have the same alignment." 1 "vect" { target { {! vect_aligned_arrays } && {vect_sizes_32B_16B} } } } } */ diff --git a/gcc/testsuite/gcc.dg/vect/pr97428.c b/gcc/testsuite/gcc.dg/vect/pr97428.c new file mode 100644 index 0000000..49d5373 --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/pr97428.c @@ -0,0 +1,44 @@ +/* { dg-do compile } */ + +typedef struct { double re, im; } dcmlx_t; +typedef struct { double re[4], im[4]; } dcmlx4_t; + +void foo_i2(dcmlx4_t dst[], const dcmlx_t src[], int n) +{ + for (int i = 0; i < n; ++i) { + dcmlx_t s00 = src[i*4+0]; + dcmlx_t s01 = src[i*4+1]; + dcmlx_t s02 = src[i*4+2]; + dcmlx_t s03 = src[i*4+3]; + + dcmlx_t s10 = src[i*4+0+n]; + dcmlx_t s11 = src[i*4+1+n]; + dcmlx_t s12 = src[i*4+2+n]; + dcmlx_t s13 = src[i*4+3+n]; + + dst[i*2+0].re[0] = s00.re; + dst[i*2+0].re[1] = s01.re; + dst[i*2+0].re[2] = s02.re; + dst[i*2+0].re[3] = s03.re; + dst[i*2+0].im[0] = s00.im; + dst[i*2+0].im[1] = s01.im; + dst[i*2+0].im[2] = s02.im; + dst[i*2+0].im[3] = s03.im; + + dst[i*2+1].re[0] = s10.re; + dst[i*2+1].re[1] = s11.re; + dst[i*2+1].re[2] = s12.re; + dst[i*2+1].re[3] = s13.re; + dst[i*2+1].im[0] = s10.im; + dst[i*2+1].im[1] = s11.im; + dst[i*2+1].im[2] = s12.im; + dst[i*2+1].im[3] = s13.im; + } +} + +/* The first step to produce optimal code is to appropriately detect the + load and store groups. */ +/* { dg-final { scan-tree-dump "Detected interleaving load of size 8" "vect" } } */ +/* { dg-final { scan-tree-dump "Detected interleaving store of size 16" "vect" } } */ +/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect" } } */ +/* { dg-final { scan-tree-dump-not "gap of 6 elements" "vect" } } */ diff --git a/gcc/testsuite/gcc.dg/vect/pr97457.c b/gcc/testsuite/gcc.dg/vect/pr97457.c new file mode 100644 index 0000000..506ba24 --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/pr97457.c @@ -0,0 +1,15 @@ +/* { dg-additional-options "-O3" } */ + +int a; +long c; +signed char d(char e, char f) { return e + f; } +int main(void) { + for (; a <= 1; a++) { + c = -8; + for (; c != 3; c = d(c, 1)) + ; + } + char b = c; + if (b != 3) + __builtin_abort(); +} diff --git a/gcc/testsuite/gcc.dg/vect/pr97558-2.c b/gcc/testsuite/gcc.dg/vect/pr97558-2.c new file mode 100644 index 0000000..8f08086 --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/pr97558-2.c @@ -0,0 +1,54 @@ +/* { dg-do run } */ +/* { dg-additional-options "-O3 -fno-tree-forwprop -fno-tree-scev-cprop" } */ + +#include "tree-vect.h" + +#define N 40 + +int a[N]; +int b[N]; + +__attribute__ ((noinline)) int +foo (int n){ + int i,j; + int sum,x,y; + + if (n<=0) + return 0; + + for (i = 0; i < N/2; i++) { + sum = 0; + x = b[2*i]; + y = b[2*i+1]; + for (j = 0; j < n; j++) { + sum += j; + } + a[2*i] = sum + x; + a[2*i+1] = sum + y; + } +} + +int main (void) +{ + int i,j; + int sum; + + check_vect (); + + for (i=0; i<N; i++) + b[i] = i; + + foo (N-1); + + /* check results: */ + for (i=0; i<N/2; i++) + { + sum = 0; + for (j = 0; j < N-1; j++) + sum += j; + if (a[2*i] != sum + b[2*i] || a[2*i+1] != sum + b[2*i+1]) + abort(); + } + + return 0; +} diff --git a/gcc/testsuite/gcc.dg/vect/pr97558.c b/gcc/testsuite/gcc.dg/vect/pr97558.c new file mode 100644 index 0000000..fef9623 --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/pr97558.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-additional-options "-fno-tree-dce -Ofast" } */ + +long int x1; +int fr; + +int +us (int sk, int jx) +{ + while (sk < 1) + { + jx *= 2; + fr += x1 + 1; + ++sk; + } + + return jx; +} diff --git a/gcc/testsuite/gcc.dg/vect/pr97678.c b/gcc/testsuite/gcc.dg/vect/pr97678.c new file mode 100644 index 0000000..ebe4a35 --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/pr97678.c @@ -0,0 +1,29 @@ +/* { dg-require-effective-target vect_int } */ +/* { dg-additional-options "-mavx2" { target avx2_runtime } } */ + +#include "tree-vect.h" + +int +main () +{ + unsigned int i = 0; + unsigned short b[158 * 2]; + + check_vect (); + + for (i = 0; i < 158; i++) + { + b[i * 2] = i * 7; + b[i * 2 + 1] = i * 8; + } + + for (i = 0; i < 158; ++i) + if (b[i*2] != (unsigned short)(i*7) + || b[i*2+1] != (unsigned short)(i*8)) + abort (); + + return 0; +} + +/* The init loop should be vectorized with SLP. */ +/* { dg-final { scan-tree-dump "vectorizing stmts using SLP" "vect" } } */ diff --git a/gcc/testsuite/gcc.dg/vect/pr97753.c b/gcc/testsuite/gcc.dg/vect/pr97753.c new file mode 100644 index 0000000..e49a848 --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/pr97753.c @@ -0,0 +1,10 @@ +/* { dg-do compile } */ +/* { dg-additional-options "-O3" } */ + +long a[6]; +void d(int c) +{ + for (; c; c++) + for (int b = 0; b < 8; b++) + ((char *)&a[c])[b] = c; +} diff --git a/gcc/testsuite/gcc.dg/vect/pr97760.c b/gcc/testsuite/gcc.dg/vect/pr97760.c new file mode 100644 index 0000000..da5ac93 --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/pr97760.c @@ -0,0 +1,26 @@ +#include "tree-vect.h" + +int b=1; +static int *g = &b; + +void __attribute__((noipa)) +h (unsigned int n) +{ + int i = 3; + int f = 3; + for (; f <= 50; f += 4) { + i += 4; + *g = i; + i += n; + } +} + +int main () +{ + check_vect (); + + h (9); + if (*g != 150 || b != 150) + __builtin_abort (); + return 0; +} diff --git a/gcc/testsuite/gcc.dg/vect/pr97769.c b/gcc/testsuite/gcc.dg/vect/pr97769.c new file mode 100644 index 0000000..127f91a --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/pr97769.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-additional-options "-O3" } */ + +typedef struct { + int alg; + int h1[8]; + unsigned d1[1]; +} tmp; +typedef struct { + tmp itmp; + tmp otmp; +} h1; +h1 c; + +static void +fn1(char *p1, int p2) +{ + int i = 0; + for (; i < 4; i++) + *p1++ = p2; +} + +static void +fn2(tmp *p1) +{ + char *d = (char *)p1->d1; + int *b = p1->h1; + for (int a; a; a++, d += 4) + fn1(d, *b++); +} + +void fn3() { fn2(&(&c)->otmp); } diff --git a/gcc/testsuite/gcc.dg/vect/slp-11b.c b/gcc/testsuite/gcc.dg/vect/slp-11b.c index 0cc2377..0aece80 100644 --- a/gcc/testsuite/gcc.dg/vect/slp-11b.c +++ b/gcc/testsuite/gcc.dg/vect/slp-11b.c @@ -45,4 +45,5 @@ int main (void) /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_strided4 && vect_int_mult } } } } */ /* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { target { ! { vect_strided4 && vect_int_mult } } } } } */ -/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect" } } */ +/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect" { target { ! vect_load_lanes } } } } */ +/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { target { vect_load_lanes } } } } */ diff --git a/gcc/testsuite/gcc.dg/vect/slp-49.c b/gcc/testsuite/gcc.dg/vect/slp-49.c new file mode 100644 index 0000000..3f53baf --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/slp-49.c @@ -0,0 +1,38 @@ +/* { dg-require-effective-target vect_int } */ + +#include "tree-vect.h" + +int a[1024]; + +void __attribute__((noipa)) +foo(int k) +{ + int j = 5; + for (int i = 0; i < 512; ++i) + { + a[2*i] = j; + a[2*i+1] = k; + j++; + k+=3; + } +} + +int +main() +{ + check_vect (); + + foo (17); + + for (int i = 0; i < 512; ++i) + { + if (a[2*i] != 5 + i + || a[2*i+1] != 17 + 3 * i) + __builtin_abort (); + } + + return 0; +} + +/* { dg-final { scan-tree-dump "vectorizing stmts using SLP" "vect" } } */ +/* { dg-final { scan-tree-dump "Loop contains only SLP stmts" "vect" } } */ diff --git a/gcc/testsuite/gcc.dg/vect/slp-perm-6.c b/gcc/testsuite/gcc.dg/vect/slp-perm-6.c index 3848929..cc863de 100644 --- a/gcc/testsuite/gcc.dg/vect/slp-perm-6.c +++ b/gcc/testsuite/gcc.dg/vect/slp-perm-6.c @@ -106,7 +106,7 @@ int main (int argc, const char* argv[]) /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect" { target { vect_perm3_int && { {! vect_load_lanes } && {! vect_partial_vectors_usage_1 } } } } } } */ /* The epilogues are vectorized using partial vectors. */ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 4 "vect" { target { vect_perm3_int && { {! vect_load_lanes } && vect_partial_vectors_usage_1 } } } } } */ -/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { target vect_load_lanes } } } */ -/* { dg-final { scan-tree-dump "Built SLP cancelled: can use load/store-lanes" "vect" { target { vect_perm3_int && vect_load_lanes } } } } */ -/* { dg-final { scan-tree-dump "LOAD_LANES" "vect" { target vect_load_lanes } } } */ -/* { dg-final { scan-tree-dump "STORE_LANES" "vect" { target vect_load_lanes } } } */ +/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect" { target vect_load_lanes } } } */ +/* { dg-final { scan-tree-dump "Built SLP cancelled: can use load/store-lanes" "vect" { target { vect_perm3_int && vect_load_lanes } xfail { vect_perm3_int && vect_load_lanes } } } } */ +/* { dg-final { scan-tree-dump "LOAD_LANES" "vect" { target { vect_load_lanes } xfail { vect_load_lanes } } } } */ +/* { dg-final { scan-tree-dump "STORE_LANES" "vect" { target { vect_load_lanes } xfail { vect_load_lanes } } } } */ diff --git a/gcc/testsuite/gcc.dg/vect/tree-vect.h b/gcc/testsuite/gcc.dg/vect/tree-vect.h index 5d8d9eb..c4b8144 100644 --- a/gcc/testsuite/gcc.dg/vect/tree-vect.h +++ b/gcc/testsuite/gcc.dg/vect/tree-vect.h @@ -52,7 +52,7 @@ check_vect (void) want_level = 1, want_d = bit_SSE2; # endif - if (!__get_cpuid (want_level, &a, &b, &c, &d) + if (!__get_cpuid_count (want_level, 0, &a, &b, &c, &d) || ((b & want_b) | (c & want_c) | (d & want_d)) == 0) exit (0); } diff --git a/gcc/testsuite/gcc.dg/vect/vect-103.c b/gcc/testsuite/gcc.dg/vect/vect-103.c index 2a45104..d03562f 100644 --- a/gcc/testsuite/gcc.dg/vect/vect-103.c +++ b/gcc/testsuite/gcc.dg/vect/vect-103.c @@ -58,5 +58,3 @@ int main (void) } /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */ -/* { dg-final { scan-tree-dump-times "accesses have the same alignment" 1 "vect" } } */ - diff --git a/gcc/testsuite/gcc.dg/vect/vect-91.c b/gcc/testsuite/gcc.dg/vect/vect-91.c index 91264d9..8983c7da 100644 --- a/gcc/testsuite/gcc.dg/vect/vect-91.c +++ b/gcc/testsuite/gcc.dg/vect/vect-91.c @@ -68,6 +68,4 @@ main3 () } /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 3 "vect" { xfail vect_no_int_add } } } */ -/* { dg-final { scan-tree-dump-times "accesses have the same alignment." 3 "vect" { target { { vect_aligned_arrays } && {! vect_sizes_32B_16B} } } } } */ -/* { dg-final { scan-tree-dump-times "accesses have the same alignment." 2 "vect" { target { {! vect_aligned_arrays } && {vect_sizes_32B_16B} } } } } */ /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 3 "vect" {target { {! vector_alignment_reachable} && {! vect_hw_misalign} } } } } */ diff --git a/gcc/testsuite/gcc.dg/vect/vect-complex-5.c b/gcc/testsuite/gcc.dg/vect/vect-complex-5.c index a2e3590..0648637 100644 --- a/gcc/testsuite/gcc.dg/vect/vect-complex-5.c +++ b/gcc/testsuite/gcc.dg/vect/vect-complex-5.c @@ -40,4 +40,4 @@ main (void) return 0; } -/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect" } } */ +/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect" } } */ diff --git a/gcc/testsuite/gcc.dg/vect/vect-outer-slp-1.c b/gcc/testsuite/gcc.dg/vect/vect-outer-slp-1.c new file mode 100644 index 0000000..62b18bd --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/vect-outer-slp-1.c @@ -0,0 +1,31 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target vect_int } */ + +int a[1024]; + +void foo (void) +{ + for (int i = 0; i < 1020; i += 4) + { + int suma = a[i]; + int sumb = a[i+1]; + int sumc = a[i+2]; + int sumd = a[i+3]; + for (unsigned j = 0; j < 77; ++j) + { + suma = (suma ^ i) + 1; + sumb = (sumb ^ i) + 2; + sumc = (sumc ^ i) + 3; + sumd = (sumd ^ i) + 4; + } + a[i] = suma; + a[i+1] = sumb; + a[i+2] = sumc; + a[i+3] = sumd; + } +} + +/* We should vectorize this outer loop with SLP. */ +/* { dg-final { scan-tree-dump "OUTER LOOP VECTORIZED" "vect" } } */ +/* { dg-final { scan-tree-dump "vectorizing stmts using SLP" "vect" } } */ +/* { dg-final { scan-tree-dump-not "VEC_PERM_EXPR" "vect" } } */ diff --git a/gcc/testsuite/gcc.dg/vect/vect-outer-slp-2.c b/gcc/testsuite/gcc.dg/vect/vect-outer-slp-2.c new file mode 100644 index 0000000..08b4fc5 --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/vect-outer-slp-2.c @@ -0,0 +1,51 @@ +/* { dg-require-effective-target vect_double } */ +/* { dg-require-effective-target vect_intdouble_cvt } */ + +#include "tree-vect.h" + +double image[40]; + +void __attribute__((noipa)) +foo (void) +{ + for (int i = 0; i < 20; i++) + { + double suma = 0; + double sumb = 0; + for (int j = 0; j < 40; j++) + { + suma += j+i; + sumb += j+i; + } + image[2*i] = suma; + image[2*i+1] = sumb; + } +} + +int main () +{ + check_vect (); + + foo (); + + for (int i = 0; i < 20; i++) + { + double suma = 0; + double sumb = 0; + for (int j = 0; j < 40; j++) + { + suma += j+i; + sumb += j+i; + asm ("" : "+g" (suma)); + asm ("" : "+g" (sumb)); + } + if (image[2*i] != suma + || image[2*i+1] != sumb) + abort (); + } + + return 0; +} + +/* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" } } */ +/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" } } */ diff --git a/gcc/testsuite/gcc.dg/vect/vect-outer-slp-3.c b/gcc/testsuite/gcc.dg/vect/vect-outer-slp-3.c new file mode 100644 index 0000000..c67d369 --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/vect-outer-slp-3.c @@ -0,0 +1,62 @@ +/* { dg-require-effective-target vect_double } */ +/* { dg-require-effective-target vect_intdouble_cvt } */ + +#include "tree-vect.h" + +double image[40]; + +void __attribute__((noipa)) +foo (void) +{ + for (int i = 0; i < 20; i++) + { + double suma = 0; + double sumb = 0; + int k = image[2*i]; + int l = image[2*i+1]; + for (int j = 0; j < 40; j++) + { + suma += k+i; + sumb += l+i; + k++; + l++; + } + image[2*i] = suma; + image[2*i+1] = sumb; + } +} + +int main () +{ + check_vect (); + + for (int i = 0; i < 40; ++i) + image[i] = 1.; + + foo (); + + for (int i = 0; i < 20; i++) + { + double suma = 0; + double sumb = 0; + int k = 1; + int l = 1; + for (int j = 0; j < 40; j++) + { + suma += k+i; + sumb += l+i; + asm ("" : "+g" (suma)); + asm ("" : "+g" (sumb)); + k++; + l++; + } + if (image[2*i] != suma + || image[2*i+1] != sumb) + abort (); + } + + return 0; +} + +/* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" } } */ +/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" } } */ diff --git a/gcc/testsuite/gcc.misc-tests/outputs.exp b/gcc/testsuite/gcc.misc-tests/outputs.exp index 1e3cd41..1fdd61a 100644 --- a/gcc/testsuite/gcc.misc-tests/outputs.exp +++ b/gcc/testsuite/gcc.misc-tests/outputs.exp @@ -703,20 +703,20 @@ outest "$b lto sing empty dumpdir empty dumpbase namedb" $sing "-dumpdir \"\" -d outest "$b lto mult empty dumpdir empty dumpbase namedb" $mult "-dumpdir \"\" -dumpbase \"\" -o dir/$b.exe -O2 -flto -flto-partition=one -fdump-ipa-icf-optimized -fdump-rtl-final -fstack-usage" {dir/} {{.exe} {-1.c.???i.icf !$ltop -1.c.???r.final !0 -2.c.???i.icf !$ltop -2.c.???r.final !0 .wpa.???i.icf .ltrans0.ltrans.???r.final .ltrans0.ltrans.su}} # Now -flto with -save-temps, not exhaustive. -outest "$b lto st sing empty dumpbase unnamed" $sing "-dumpbase \"\" -save-temps -O2 -flto -flto-partition=one -fdump-ipa-icf-optimized -fdump-rtl-final -fstack-usage $oaout" {} {{-0.i -0.s -0.o -0.c.???i.icf !$ltop -0.c.???r.final !!$ltop a.lto_wrapper_args !0 a.wpa.???i.icf a.ltrans.out !!$ltop a.res !0 a.ltrans0.o a.ltrans0.ltrans.???r.final a.ltrans0.ltrans.su a.ltrans0.ltrans.s a.ltrans0.ltrans.o $aout}} -outest "$b lto st mult empty dumpbase unnamed" $mult "-dumpbase \"\" -save-temps -O2 -flto -flto-partition=one -fdump-ipa-icf-optimized -fdump-rtl-final -fstack-usage $oaout" {} {{-1.i -1.s -1.o -1.c.???i.icf !$ltop -1.c.???r.final !0 -2.i -2.s -2.o -2.c.???i.icf !$ltop -2.c.???r.final !!$ltop a.lto_wrapper_args !0 a.wpa.???i.icf a.ltrans.out !!$ltop a.res !0 a.ltrans0.o a.ltrans0.ltrans.???r.final a.ltrans0.ltrans.su a.ltrans0.ltrans.s a.ltrans0.ltrans.o $aout}} -outest "$b lto st sing dumpdir empty dumpbase named" $sing "-dumpdir dir/ -dumpbase \"\" -o $b-0.exe -save-temps -O2 -flto -flto-partition=one -fdump-ipa-icf-optimized -fdump-rtl-final -fstack-usage" {dir/} {{-0.i -0.s -0.o -0.c.???i.icf !$ltop -0.c.???r.final !!$ltop -0.lto_wrapper_args !0 -0.wpa.???i.icf -0.ltrans.out !!$ltop -0.res !0 -0.ltrans0.o -0.ltrans0.ltrans.???r.final -0.ltrans0.ltrans.su -0.ltrans0.ltrans.s -0.ltrans0.ltrans.o} {-0.exe}} -outest "$b lto st mult dumpdir empty dumpbase named" $mult "-dumpdir dir/ -dumpbase \"\" -o $b-1.exe -save-temps -O2 -flto -flto-partition=one -fdump-ipa-icf-optimized -fdump-rtl-final -fstack-usage" {dir/} {{-1.i -1.s -1.o -1.c.???i.icf !$ltop -1.c.???r.final !0 -2.i -2.s -2.o -2.c.???i.icf !$ltop -2.c.???r.final !!$ltop -1.lto_wrapper_args !0 -1.wpa.???i.icf -1.ltrans.out !!$ltop -1.res !0 -1.ltrans0.o -1.ltrans0.ltrans.???r.final -1.ltrans0.ltrans.su -1.ltrans0.ltrans.s -1.ltrans0.ltrans.o} {-1.exe}} -outest "$b lto st sing empty dumpbase namedb" $sing "-dumpbase \"\" -o dir/$b.exe -save-temps -O2 -flto -flto-partition=one -fdump-ipa-icf-optimized -fdump-rtl-final -fstack-usage" {dir/} {{-0.i -0.s -0.o -0.c.???i.icf !$ltop -0.c.???r.final !!$ltop .lto_wrapper_args !0 .wpa.???i.icf .ltrans.out !!$ltop .res !0 .ltrans0.o .ltrans0.ltrans.???r.final .ltrans0.ltrans.su .ltrans0.ltrans.s .ltrans0.ltrans.o .exe} {}} -outest "$b lto st mult empty dumpbase namedb" $mult "-dumpbase \"\" -o dir/$b.exe -save-temps -O2 -flto -flto-partition=one -fdump-ipa-icf-optimized -fdump-rtl-final -fstack-usage" {dir/} {{-1.i -1.s -1.o -1.c.???i.icf !$ltop -1.c.???r.final !0 -2.i -2.s -2.o -2.c.???i.icf !$ltop -2.c.???r.final !!$ltop .lto_wrapper_args !0 .wpa.???i.icf .ltrans.out !!$ltop .res !0 .ltrans0.o .ltrans0.ltrans.???r.final .ltrans0.ltrans.su .ltrans0.ltrans.s .ltrans0.ltrans.o .exe} {}} +outest "$b lto st sing empty dumpbase unnamed" $sing "-dumpbase \"\" -save-temps -O2 -flto -flto-partition=one -fdump-ipa-icf-optimized -fdump-rtl-final -fstack-usage $oaout" {} {{-0.i -0.s -0.o -0.c.???i.icf !$ltop -0.c.???r.final !!$ltop a.lto_wrapper_args !0 a.wpa.???i.icf a.ltrans.out a.ltrans_args !!$ltop a.res !0 a.ltrans0.o a.ltrans0.ltrans.???r.final a.ltrans0.ltrans.su a.ltrans0.ltrans.s a.ltrans0.ltrans.o a.ltrans0.ltrans_args $aout}} +outest "$b lto st mult empty dumpbase unnamed" $mult "-dumpbase \"\" -save-temps -O2 -flto -flto-partition=one -fdump-ipa-icf-optimized -fdump-rtl-final -fstack-usage $oaout" {} {{-1.i -1.s -1.o -1.c.???i.icf !$ltop -1.c.???r.final !0 -2.i -2.s -2.o -2.c.???i.icf !$ltop -2.c.???r.final !!$ltop a.lto_wrapper_args !0 a.wpa.???i.icf a.ltrans.out a.ltrans_args !!$ltop a.res !0 a.ltrans0.o a.ltrans0.ltrans.???r.final a.ltrans0.ltrans.su a.ltrans0.ltrans.s a.ltrans0.ltrans.o a.ltrans0.ltrans_args $aout}} +outest "$b lto st sing dumpdir empty dumpbase named" $sing "-dumpdir dir/ -dumpbase \"\" -o $b-0.exe -save-temps -O2 -flto -flto-partition=one -fdump-ipa-icf-optimized -fdump-rtl-final -fstack-usage" {dir/} {{-0.i -0.s -0.o -0.c.???i.icf !$ltop -0.c.???r.final !!$ltop -0.lto_wrapper_args !0 -0.wpa.???i.icf -0.ltrans.out -0.ltrans_args !!$ltop -0.res !0 -0.ltrans0.o -0.ltrans0.ltrans.???r.final -0.ltrans0.ltrans.su -0.ltrans0.ltrans.s -0.ltrans0.ltrans.o -0.ltrans0.ltrans_args} {-0.exe}} +outest "$b lto st mult dumpdir empty dumpbase named" $mult "-dumpdir dir/ -dumpbase \"\" -o $b-1.exe -save-temps -O2 -flto -flto-partition=one -fdump-ipa-icf-optimized -fdump-rtl-final -fstack-usage" {dir/} {{-1.i -1.s -1.o -1.c.???i.icf !$ltop -1.c.???r.final !0 -2.i -2.s -2.o -2.c.???i.icf !$ltop -2.c.???r.final !!$ltop -1.lto_wrapper_args !0 -1.wpa.???i.icf -1.ltrans.out -1.ltrans_args !!$ltop -1.res !0 -1.ltrans0.o -1.ltrans0.ltrans.???r.final -1.ltrans0.ltrans.su -1.ltrans0.ltrans.s -1.ltrans0.ltrans.o -1.ltrans0.ltrans_args} {-1.exe}} +outest "$b lto st sing empty dumpbase namedb" $sing "-dumpbase \"\" -o dir/$b.exe -save-temps -O2 -flto -flto-partition=one -fdump-ipa-icf-optimized -fdump-rtl-final -fstack-usage" {dir/} {{-0.i -0.s -0.o -0.c.???i.icf !$ltop -0.c.???r.final !!$ltop .lto_wrapper_args !0 .wpa.???i.icf .ltrans.out .ltrans_args !!$ltop .res !0 .ltrans0.o .ltrans0.ltrans.???r.final .ltrans0.ltrans.su .ltrans0.ltrans.s .ltrans0.ltrans.o .ltrans0.ltrans_args .exe} {}} +outest "$b lto st mult empty dumpbase namedb" $mult "-dumpbase \"\" -o dir/$b.exe -save-temps -O2 -flto -flto-partition=one -fdump-ipa-icf-optimized -fdump-rtl-final -fstack-usage" {dir/} {{-1.i -1.s -1.o -1.c.???i.icf !$ltop -1.c.???r.final !0 -2.i -2.s -2.o -2.c.???i.icf !$ltop -2.c.???r.final !!$ltop .lto_wrapper_args !0 .wpa.???i.icf .ltrans.out .ltrans_args !!$ltop .res !0 .ltrans0.o .ltrans0.ltrans.???r.final .ltrans0.ltrans.su .ltrans0.ltrans.s .ltrans0.ltrans.o .ltrans0.ltrans_args .exe} {}} # lto save-temps without -dumpbase. -outest "$b lto st sing unnamed" $sing "-save-temps -O2 -flto -flto-partition=one -fdump-ipa-icf-optimized -fdump-rtl-final -fstack-usage $oaout" {} {{a--0.i a--0.s a--0.o a--0.c.???i.icf !$ltop a--0.c.???r.final !!$ltop a.lto_wrapper_args !0 a.wpa.???i.icf a.ltrans.out !!$ltop a.res !0 a.ltrans0.o a.ltrans0.ltrans.???r.final a.ltrans0.ltrans.su a.ltrans0.ltrans.s a.ltrans0.ltrans.o $aout}} -outest "$b lto st mult unnamed" $mult "-save-temps -O2 -flto -flto-partition=one -fdump-ipa-icf-optimized -fdump-rtl-final -fstack-usage $oaout" {} {{a--1.i a--1.s a--1.o a--1.c.???i.icf !$ltop a--1.c.???r.final !0 a--2.i a--2.s a--2.o a--2.c.???i.icf !$ltop a--2.c.???r.final !!$ltop a.lto_wrapper_args !0 a.wpa.???i.icf a.ltrans.out !!$ltop a.res !0 a.ltrans0.o a.ltrans0.ltrans.???r.final a.ltrans0.ltrans.su a.ltrans0.ltrans.s a.ltrans0.ltrans.o $aout}} -outest "$b lto st sing dumpdir named" $sing "-dumpdir dir/$b- -o $b-0.exe -save-temps -O2 -flto -flto-partition=one -fdump-ipa-icf-optimized -fdump-rtl-final -fstack-usage" {dir/} {{--0.i --0.s --0.o --0.c.???i.icf !$ltop --0.c.???r.final !!$ltop -lto_wrapper_args !0 -wpa.???i.icf -ltrans.out !!$ltop -res !0 -ltrans0.o -ltrans0.ltrans.???r.final -ltrans0.ltrans.su -ltrans0.ltrans.s -ltrans0.ltrans.o} {-0.exe}} -outest "$b lto st mult dumpdir named" $mult "-dumpdir dir/$b- -o $b-1.exe -save-temps -O2 -flto -flto-partition=one -fdump-ipa-icf-optimized -fdump-rtl-final -fstack-usage" {dir/} {{--1.i --1.s --1.o --1.c.???i.icf !$ltop --1.c.???r.final !0 --2.i --2.s --2.o --2.c.???i.icf !$ltop --2.c.???r.final !!$ltop -lto_wrapper_args !0 -wpa.???i.icf -ltrans.out !!$ltop -res !0 -ltrans0.o -ltrans0.ltrans.???r.final -ltrans0.ltrans.su -ltrans0.ltrans.s -ltrans0.ltrans.o} {-1.exe}} -outest "$b lto st sing namedb" $sing "-o dir/$b.exe -save-temps -O2 -flto -flto-partition=one -fdump-ipa-icf-optimized -fdump-rtl-final -fstack-usage" {dir/} {{--0.i --0.s --0.o --0.c.???i.icf !$ltop --0.c.???r.final !!$ltop .lto_wrapper_args !0 .wpa.???i.icf .ltrans.out !!$ltop .res !0 .ltrans0.o .ltrans0.ltrans.???r.final .ltrans0.ltrans.su .ltrans0.ltrans.s .ltrans0.ltrans.o .exe} {}} -outest "$b lto st mult namedb" $mult "-o dir/$b.exe -save-temps -O2 -flto -flto-partition=one -fdump-ipa-icf-optimized -fdump-rtl-final -fstack-usage" {dir/} {{--1.i --1.s --1.o --1.c.???i.icf !$ltop --1.c.???r.final !0 --2.i --2.s --2.o --2.c.???i.icf !$ltop --2.c.???r.final !!$ltop .lto_wrapper_args !0 .wpa.???i.icf .ltrans.out !!$ltop .res !0 .ltrans0.o .ltrans0.ltrans.???r.final .ltrans0.ltrans.su .ltrans0.ltrans.s .ltrans0.ltrans.o .exe} {}} +outest "$b lto st sing unnamed" $sing "-save-temps -O2 -flto -flto-partition=one -fdump-ipa-icf-optimized -fdump-rtl-final -fstack-usage $oaout" {} {{a--0.i a--0.s a--0.o a--0.c.???i.icf !$ltop a--0.c.???r.final !!$ltop a.lto_wrapper_args !0 a.wpa.???i.icf a.ltrans.out a.ltrans_args !!$ltop a.res !0 a.ltrans0.o a.ltrans0.ltrans.???r.final a.ltrans0.ltrans.su a.ltrans0.ltrans.s a.ltrans0.ltrans.o a.ltrans0.ltrans_args $aout}} +outest "$b lto st mult unnamed" $mult "-save-temps -O2 -flto -flto-partition=one -fdump-ipa-icf-optimized -fdump-rtl-final -fstack-usage $oaout" {} {{a--1.i a--1.s a--1.o a--1.c.???i.icf !$ltop a--1.c.???r.final !0 a--2.i a--2.s a--2.o a--2.c.???i.icf !$ltop a--2.c.???r.final !!$ltop a.lto_wrapper_args !0 a.wpa.???i.icf a.ltrans.out a.ltrans_args !!$ltop a.res !0 a.ltrans0.o a.ltrans0.ltrans.???r.final a.ltrans0.ltrans.su a.ltrans0.ltrans.s a.ltrans0.ltrans.o a.ltrans0.ltrans_args $aout}} +outest "$b lto st sing dumpdir named" $sing "-dumpdir dir/$b- -o $b-0.exe -save-temps -O2 -flto -flto-partition=one -fdump-ipa-icf-optimized -fdump-rtl-final -fstack-usage" {dir/} {{--0.i --0.s --0.o --0.c.???i.icf !$ltop --0.c.???r.final !!$ltop -lto_wrapper_args !0 -wpa.???i.icf -ltrans.out -ltrans_args !!$ltop -res !0 -ltrans0.o -ltrans0.ltrans.???r.final -ltrans0.ltrans.su -ltrans0.ltrans.s -ltrans0.ltrans.o -ltrans0.ltrans_args} {-0.exe}} +outest "$b lto st mult dumpdir named" $mult "-dumpdir dir/$b- -o $b-1.exe -save-temps -O2 -flto -flto-partition=one -fdump-ipa-icf-optimized -fdump-rtl-final -fstack-usage" {dir/} {{--1.i --1.s --1.o --1.c.???i.icf !$ltop --1.c.???r.final !0 --2.i --2.s --2.o --2.c.???i.icf !$ltop --2.c.???r.final !!$ltop -lto_wrapper_args !0 -wpa.???i.icf -ltrans.out -ltrans_args !!$ltop -res !0 -ltrans0.o -ltrans0.ltrans.???r.final -ltrans0.ltrans.su -ltrans0.ltrans.s -ltrans0.ltrans.o -ltrans0.ltrans_args} {-1.exe}} +outest "$b lto st sing namedb" $sing "-o dir/$b.exe -save-temps -O2 -flto -flto-partition=one -fdump-ipa-icf-optimized -fdump-rtl-final -fstack-usage" {dir/} {{--0.i --0.s --0.o --0.c.???i.icf !$ltop --0.c.???r.final !!$ltop .lto_wrapper_args !0 .wpa.???i.icf .ltrans.out .ltrans_args !!$ltop .res !0 .ltrans0.o .ltrans0.ltrans.???r.final .ltrans0.ltrans.su .ltrans0.ltrans.s .ltrans0.ltrans.o .ltrans0.ltrans_args .exe} {}} +outest "$b lto st mult namedb" $mult "-o dir/$b.exe -save-temps -O2 -flto -flto-partition=one -fdump-ipa-icf-optimized -fdump-rtl-final -fstack-usage" {dir/} {{--1.i --1.s --1.o --1.c.???i.icf !$ltop --1.c.???r.final !0 --2.i --2.s --2.o --2.c.???i.icf !$ltop --2.c.???r.final !!$ltop .lto_wrapper_args !0 .wpa.???i.icf .ltrans.out .ltrans_args !!$ltop .res !0 .ltrans0.o .ltrans0.ltrans.???r.final .ltrans0.ltrans.su .ltrans0.ltrans.s .ltrans0.ltrans.o .ltrans0.ltrans_args .exe} {}} # !$skip_lto } diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h index 791972c..61fe7e7 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h @@ -11,6 +11,8 @@ typedef uint16_t hfloat16_t; typedef uint32_t hfloat32_t; typedef uint64_t hfloat64_t; +typedef uint16_t hbfloat16_t; + extern void abort(void); extern void *memset(void *, int, size_t); extern void *memcpy(void *, const void *, size_t); @@ -107,7 +109,7 @@ extern size_t strlen(const char *); { \ union fp_operand { \ uint##W##_t i; \ - float##W##_t f; \ + T##W##_t f; \ } tmp_res, tmp_exp; \ tmp_res.f = VECT_VAR(result, T, W, N)[i]; \ tmp_exp.i = VECT_VAR(EXPECTED, h##T, W, N)[i]; \ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bf16_get-be.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bf16_get-be.c new file mode 100644 index 0000000..bd9bb11 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bf16_get-be.c @@ -0,0 +1,27 @@ +/* { dg-do assemble { target { aarch64*-*-* } } } */ +/* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ +/* { dg-add-options arm_v8_2a_bf16_neon } */ +/* { dg-additional-options "-mbig-endian -save-temps" } */ +/* { dg-final { check-function-bodies "**" "" {-O[^0]} } } */ +/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */ + +#include <arm_neon.h> + +/* +**test_vget_low_bf16: +** ret +*/ +bfloat16x4_t test_vget_low_bf16 (bfloat16x8_t a) +{ + return vget_low_bf16 (a); +} + +/* +**test_vget_high_bf16: +** dup d0, v0.d\[1\] +** ret +*/ +bfloat16x4_t test_vget_high_bf16 (bfloat16x8_t a) +{ + return vget_high_bf16 (a); +} diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bf16_get.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bf16_get.c new file mode 100644 index 0000000..2193753 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bf16_get.c @@ -0,0 +1,27 @@ +/* { dg-do assemble { target { aarch64*-*-* } } } */ +/* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ +/* { dg-add-options arm_v8_2a_bf16_neon } */ +/* { dg-additional-options "-save-temps" } */ +/* { dg-final { check-function-bodies "**" "" {-O[^0]} } } */ +/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */ + +#include <arm_neon.h> + +/* +**test_vget_low_bf16: +** ret +*/ +bfloat16x4_t test_vget_low_bf16 (bfloat16x8_t a) +{ + return vget_low_bf16 (a); +} + +/* +**test_vget_high_bf16: +** dup d0, v0.d\[1\] +** ret +*/ +bfloat16x4_t test_vget_high_bf16 (bfloat16x8_t a) +{ + return vget_high_bf16 (a); +} diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bf16_vect_copy_lane_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bf16_vect_copy_lane_1.c new file mode 100644 index 0000000..d5aa215 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bf16_vect_copy_lane_1.c @@ -0,0 +1,32 @@ +/* { dg-do assemble { target { aarch64*-*-* } } } */ +/* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ +/* { dg-additional-options "-march=armv8.2-a+bf16 -O3 --save-temps -std=gnu90" } */ + +#include "arm_neon.h" + +bfloat16x4_t __attribute__((noinline,noclone)) +test_vcopy_lane_bf16 (bfloat16x4_t a, bfloat16x4_t b) +{ + return vcopy_lane_bf16 (a, 1, b, 2); +} + +bfloat16x8_t __attribute__((noinline,noclone)) +test_vcopyq_lane_bf16 (bfloat16x8_t a, bfloat16x4_t b) +{ + return vcopyq_lane_bf16 (a, 1, b, 2); +} + +bfloat16x4_t __attribute__((noinline,noclone)) +test_vcopy_laneq_bf16 (bfloat16x4_t a, bfloat16x8_t b) +{ + return vcopy_laneq_bf16 (a, 1, b, 2); +} + +bfloat16x8_t __attribute__((noinline,noclone)) +test_vcopyq_laneq_bf16 (bfloat16x8_t a, bfloat16x8_t b) +{ + return vcopyq_laneq_bf16 (a, 1, b, 2); +} + +/* { dg-final { scan-assembler-times "ins\\tv0.h\\\[1\\\], v1.h\\\[2\\\]" 2 } } */ +/* { dg-final { scan-assembler-times "ins\\tv0.h\\\[1\\\], v1.h\\\[0\\\]" 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bf16_vldN_lane_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bf16_vldN_lane_1.c new file mode 100644 index 0000000..a83ed3e --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bf16_vldN_lane_1.c @@ -0,0 +1,74 @@ +/* { dg-do run { target { aarch64*-*-* } } } */ +/* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ +/* { dg-add-options arm_v8_2a_bf16_neon } */ + +#include <arm_neon.h> + +extern void abort (void); + +typedef union +{ + bfloat16_t bf16; + uint16_t u16; +} bfloat16_u_t; + +#define VARIANTS(VARIANT, STRUCT) \ +VARIANT (bfloat16, , 4, _bf16, 3, STRUCT) \ +VARIANT (bfloat16, q, 8, _bf16, 7, STRUCT) + +#define TESTMETH(BASE, Q, ELTS, SUFFIX, LANE, STRUCT) \ + int \ + test_vld##STRUCT##Q##_lane##SUFFIX (const bfloat16_u_t *data, \ + const bfloat16_u_t *overwrite) \ + { \ + BASE##x##ELTS##x##STRUCT##_t vectors; \ + bfloat16_u_t temp[ELTS]; \ + int i,j; \ + for (i = 0; i < STRUCT; i++, data += ELTS) \ + vectors.val[i] = vld1##Q##SUFFIX ((bfloat16_t *)data); \ + vectors = vld##STRUCT##Q##_lane##SUFFIX ((bfloat16_t *) overwrite, \ + vectors, LANE); \ + while (--i >= 0) \ + { \ + vst1##Q##SUFFIX ((bfloat16_t *)temp, vectors.val[i]); \ + data -= ELTS; /* Point at value loaded before vldN_lane. */ \ + for (j = 0; j < ELTS; j++) \ + if (temp[j].u16 != (j == LANE ? overwrite[i].u16 : data[j].u16)) \ + return 1; \ + } \ + return 0; \ + } + +/* Tests of vld2_lane and vld2q_lane. */ +VARIANTS (TESTMETH, 2) +/* Tests of vld3_lane and vld3q_lane. */ +VARIANTS (TESTMETH, 3) +/* Tests of vld4_lane and vld4q_lane. */ +VARIANTS (TESTMETH, 4) + +#define CHECK(BASE, Q, ELTS, SUFFIX, LANE, STRUCT) \ + if (test_vld##STRUCT##Q##_lane##SUFFIX ((const bfloat16_u_t *)orig_data, \ + BASE##_data) != 0) \ + abort (); + +int +main (int argc, char **argv) +{ + /* Original data for all vector formats. */ + uint64_t orig_data[8] = {0x1234567890abcdefULL, 0x13579bdf02468aceULL, + 0x012389ab4567cdefULL, 0xdeeddadacafe0431ULL, + 0x1032547698badcfeULL, 0xbadbadbadbad0badULL, + 0x0102030405060708ULL, 0x0f0e0d0c0b0a0908ULL}; + + /* Data with which vldN_lane will overwrite some of previous. */ + bfloat16_u_t bfloat16_data[4]; + bfloat16_data[0].u16 = 0xABAB; + bfloat16_data[1].u16 = 0x0; + bfloat16_data[2].u16 = 0xCAFE; + bfloat16_data[3].u16 = 0x1234; + + VARIANTS (CHECK, 2); + VARIANTS (CHECK, 3); + VARIANTS (CHECK, 4); + return 0; +} diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bf16_vldN_lane_2.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bf16_vldN_lane_2.c new file mode 100644 index 0000000..670cf0b --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bf16_vldN_lane_2.c @@ -0,0 +1,52 @@ +/* { dg-do assemble { target { aarch64*-*-* } } } */ +/* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ +/* { dg-add-options arm_v8_2a_bf16_neon } */ +/* { dg-additional-options "-O2 --save-temps" } */ + +#include <arm_neon.h> + +bfloat16x4x2_t +test_vld2_lane_bf16 (const bfloat16_t *ptr, bfloat16x4x2_t b) +{ + return vld2_lane_bf16 (ptr, b, 2); +} + +bfloat16x8x2_t +test_vld2q_lane_bf16 (const bfloat16_t *ptr, bfloat16x8x2_t b) +{ + return vld2q_lane_bf16 (ptr, b, 2); +} + +/* { dg-final { scan-assembler-times "ld2\\t{v2.h - v3.h}\\\[2\\\], \\\[x0\\\]" 2 } } */ + +bfloat16x4x3_t +test_vld3_lane_bf16 (const bfloat16_t *ptr, bfloat16x4x3_t b) +{ + return vld3_lane_bf16 (ptr, b, 2); +} + +/* { dg-final { scan-assembler-times "ld3\t{v4.h - v6.h}\\\[2\\\], \\\[x0\\\]" 1 } } */ + +bfloat16x8x3_t +test_vld3q_lane_bf16 (const bfloat16_t *ptr, bfloat16x8x3_t b) +{ + return vld3q_lane_bf16 (ptr, b, 2); +} + +/* { dg-final { scan-assembler-times "ld3\t{v1.h - v3.h}\\\[2\\\], \\\[x0\\\]" 1 } } */ + +bfloat16x4x4_t +test_vld4_lane_bf16 (const bfloat16_t *ptr, bfloat16x4x4_t b) +{ + return vld4_lane_bf16 (ptr, b, 2); +} + +/* { dg-final { scan-assembler-times "ld4\t{v4.h - v7.h}\\\[2\\\], \\\[x0\\\]" 1 } } */ + +bfloat16x8x4_t +test_vld4q_lane_bf16 (const bfloat16_t *ptr, bfloat16x8x4_t b) +{ + return vld4q_lane_bf16 (ptr, b, 2); +} + +/* { dg-final { scan-assembler-times "ld4\t{v0.h - v3.h}\\\[2\\\], \\\[x0\\\]" 1 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bf16_vstN_lane_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bf16_vstN_lane_1.c new file mode 100644 index 0000000..2c70bb9 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bf16_vstN_lane_1.c @@ -0,0 +1,227 @@ +/* { dg-do run { target { aarch64*-*-* } } } */ +/* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ +/* { dg-add-options arm_v8_2a_bf16_neon } */ + +#include <arm_neon.h> +#include "arm-neon-ref.h" +#include "compute-ref-data.h" + +/* Expected results for vst2, chunk 0. */ +VECT_VAR_DECL(expected_st2_0,hbfloat,16,4) [] = { 0xABAB, 0x3210, 0x0, 0x0 }; +VECT_VAR_DECL(expected_st2_0,hbfloat,16,8) [] = { 0xABAB, 0x3210, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0 }; + +/* Expected results for vst2, chunk 1. */ +VECT_VAR_DECL(expected_st2_1,hbfloat,16,4) [] = { 0x0, 0x0, 0x0, 0x0 }; +VECT_VAR_DECL(expected_st2_1,hbfloat,16,8) [] = { 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0 }; + +/* Expected results for vst3, chunk 0. */ +VECT_VAR_DECL(expected_st3_0,hbfloat,16,4) [] = { 0xABAB, 0x3210, 0xCAFE, 0x0 }; +VECT_VAR_DECL(expected_st3_0,hbfloat,16,8) [] = { 0xABAB, 0x3210, 0xCAFE, 0x0, + 0x0, 0x0, 0x0, 0x0 }; + +/* Expected results for vst3, chunk 1. */ +VECT_VAR_DECL(expected_st3_1,hbfloat,16,4) [] = { 0x0, 0x0, 0x0, 0x0 }; +VECT_VAR_DECL(expected_st3_1,hbfloat,16,8) [] = { 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0 }; + +/* Expected results for vst3, chunk 2. */ +VECT_VAR_DECL(expected_st3_2,hbfloat,16,4) [] = { 0x0, 0x0, 0x0, 0x0 }; +VECT_VAR_DECL(expected_st3_2,hbfloat,16,8) [] = { 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0 }; + +/* Expected results for vst4, chunk 0. */ +VECT_VAR_DECL(expected_st4_0,hbfloat,16,4) [] = + { 0xABAB, 0x3210, 0xCAFE, 0x1234 }; +VECT_VAR_DECL(expected_st4_0,hbfloat,16,8) [] = + { 0xABAB, 0x3210, 0xCAFE, 0x1234, 0x0, 0x0, 0x0, 0x0 }; + +/* Expected results for vst4, chunk 1. */ +VECT_VAR_DECL(expected_st4_1,hbfloat,16,4) [] = { 0x0, 0x0, 0x0, 0x0 }; +VECT_VAR_DECL(expected_st4_1,hbfloat,16,8) [] = { 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0 }; + +/* Expected results for vst4, chunk 2. */ +VECT_VAR_DECL(expected_st4_2,hbfloat,16,4) [] = { 0x0, 0x0, 0x0, 0x0 }; +VECT_VAR_DECL(expected_st4_2,hbfloat,16,8) [] = { 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0 }; + +/* Expected results for vst4, chunk 3. */ +VECT_VAR_DECL(expected_st4_3,hbfloat,16,4) [] = { 0x0, 0x0, 0x0, 0x0 }; +VECT_VAR_DECL(expected_st4_3,hbfloat,16,8) [] = { 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0 }; + +typedef union +{ + bfloat16_t bf16; + uint16_t u16; +} bfloat16_u_t; + +static bfloat16_t result_bfloat16x4[4]; +static bfloat16_t result_bfloat16x8[8]; + +void exec_vstX_lane (void) +{ + bfloat16_u_t bfloat16_data[4]; + bfloat16_data[0].u16 = 0xABAB; + bfloat16_data[1].u16 = 0x3210; + bfloat16_data[2].u16 = 0xCAFE; + bfloat16_data[3].u16 = 0x1234; + + bfloat16_t buffer_vld2_lane_bfloat16x2 [2] = + { bfloat16_data[0].bf16, + bfloat16_data[1].bf16 }; + bfloat16_t buffer_vld3_lane_bfloat16x3 [3] = + { bfloat16_data[0].bf16, + bfloat16_data[1].bf16, + bfloat16_data[2].bf16 }; + bfloat16_t buffer_vld4_lane_bfloat16x4 [4] = + { bfloat16_data[0].bf16, + bfloat16_data[1].bf16, + bfloat16_data[2].bf16, + bfloat16_data[3].bf16 }; + + /* In this case, input variables are arrays of vectors. */ +#define DECL_VSTX_LANE(T1, W, N, X) \ + VECT_ARRAY_TYPE(T1, W, N, X) VECT_ARRAY_VAR(vector, T1, W, N, X); \ + VECT_ARRAY_TYPE(T1, W, N, X) VECT_ARRAY_VAR(vector_src, T1, W, N, X); \ + VECT_VAR_DECL(result_bis_##X, T1, W, N)[X * N] + + /* We need to use a temporary result buffer (result_bis), because + the one used for other tests is not large enough. A subset of the + result data is moved from result_bis to result, and it is this + subset which is used to check the actual behavior. The next + macro enables to move another chunk of data from result_bis to + result. */ + /* We also use another extra input buffer (buffer_src), which we + fill with 0xAA, and which it used to load a vector from which we + read a given lane. */ +#define TEST_VSTX_LANE(Q, T1, T2, W, N, X, L) \ + memset (VECT_VAR(buffer_src, T1, W, N), 0xAA, \ + sizeof(VECT_VAR(buffer_src, T1, W, N))); \ + memset (VECT_VAR(result_bis_##X, T1, W, N), 0, \ + sizeof(VECT_VAR(result_bis_##X, T1, W, N))); \ + \ + VECT_ARRAY_VAR(vector_src, T1, W, N, X) = \ + vld##X##Q##_##T2##W(VECT_VAR(buffer_src, T1, W, N)); \ + \ + VECT_ARRAY_VAR(vector, T1, W, N, X) = \ + /* Use dedicated init buffer, of size X. */ \ + vld##X##Q##_lane_##T2##W(VECT_VAR(buffer_vld##X##_lane, T1, W, X), \ + VECT_ARRAY_VAR(vector_src, T1, W, N, X), \ + L); \ + vst##X##Q##_lane_##T2##W(VECT_VAR(result_bis_##X, T1, W, N), \ + VECT_ARRAY_VAR(vector, T1, W, N, X), \ + L); \ + memcpy(VECT_VAR(result, T1, W, N), VECT_VAR(result_bis_##X, T1, W, N), \ + sizeof(VECT_VAR(result, T1, W, N))); + + /* Overwrite "result" with the contents of "result_bis"[Y]. */ +#define TEST_EXTRA_CHUNK(T1, W, N, X, Y) \ + memcpy(VECT_VAR(result, T1, W, N), \ + &(VECT_VAR(result_bis_##X, T1, W, N)[Y*N]), \ + sizeof(VECT_VAR(result, T1, W, N))); + +#define DUMMY_ARRAY(V, T, W, N, L) VECT_VAR_DECL(V,T,W,N)[N*L] + + DECL_VSTX_LANE(bfloat, 16, 4, 2); + DECL_VSTX_LANE(bfloat, 16, 8, 2); + DECL_VSTX_LANE(bfloat, 16, 4, 3); + DECL_VSTX_LANE(bfloat, 16, 8, 3); + DECL_VSTX_LANE(bfloat, 16, 4, 4); + DECL_VSTX_LANE(bfloat, 16, 8, 4); + + DUMMY_ARRAY(buffer_src, bfloat, 16, 4, 4); + DUMMY_ARRAY(buffer_src, bfloat, 16, 8, 4); + + /* Check vst2_lane/vst2q_lane. */ + clean_results (); + TEST_VSTX_LANE(, bfloat, bf, 16, 4, 2, 2); + TEST_VSTX_LANE(q, bfloat, bf, 16, 8, 2, 6); + +#undef CMT +#define CMT " (chunk 0)" +#undef TEST_MSG +#define TEST_MSG "VST2_LANE/VST2Q_LANE" + CHECK_FP(TEST_MSG, bfloat, 16, 4, PRIx16, expected_st2_0, CMT); + CHECK_FP(TEST_MSG, bfloat, 16, 8, PRIx16, expected_st2_0, CMT); + TEST_EXTRA_CHUNK(bfloat, 16, 4, 2, 1); + TEST_EXTRA_CHUNK(bfloat, 16, 8, 2, 1); + +#undef CMT +#define CMT " (chunk 1)" + CHECK_FP(TEST_MSG, bfloat, 16, 4, PRIx16, expected_st2_1, CMT); + CHECK_FP(TEST_MSG, bfloat, 16, 8, PRIx16, expected_st2_1, CMT); + + /* Check vst3_lane/vst3q_lane. */ + clean_results (); +#undef TEST_MSG +#define TEST_MSG "VST3_LANE/VST3Q_LANE" + TEST_VSTX_LANE(, bfloat, bf, 16, 4, 3, 2); + TEST_VSTX_LANE(q, bfloat, bf, 16, 8, 3, 6); + +#undef CMT +#define CMT " (chunk 0)" + CHECK_FP(TEST_MSG, bfloat, 16, 4, PRIx16, expected_st3_0, CMT); + CHECK_FP(TEST_MSG, bfloat, 16, 8, PRIx16, expected_st3_0, CMT); + + TEST_EXTRA_CHUNK(bfloat, 16, 4, 3, 1); + TEST_EXTRA_CHUNK(bfloat, 16, 8, 3, 1); + + +#undef CMT +#define CMT " (chunk 1)" + CHECK_FP(TEST_MSG, bfloat, 16, 4, PRIx16, expected_st3_1, CMT); + CHECK_FP(TEST_MSG, bfloat, 16, 8, PRIx16, expected_st3_1, CMT); + + TEST_EXTRA_CHUNK(bfloat, 16, 4, 3, 2); + TEST_EXTRA_CHUNK(bfloat, 16, 8, 3, 2); + +#undef CMT +#define CMT " (chunk 2)" + CHECK_FP(TEST_MSG, bfloat, 16, 4, PRIx16, expected_st3_2, CMT); + CHECK_FP(TEST_MSG, bfloat, 16, 8, PRIx16, expected_st3_2, CMT); + + /* Check vst4_lane/vst4q_lane. */ + clean_results (); +#undef TEST_MSG +#define TEST_MSG "VST4_LANE/VST4Q_LANE" + TEST_VSTX_LANE(, bfloat, bf, 16, 4, 4, 2); + TEST_VSTX_LANE(q, bfloat, bf, 16, 8, 4, 6); + +#undef CMT +#define CMT " (chunk 0)" + CHECK_FP(TEST_MSG, bfloat, 16, 4, PRIx16, expected_st4_0, CMT); + CHECK_FP(TEST_MSG, bfloat, 16, 8, PRIx16, expected_st4_0, CMT); + + TEST_EXTRA_CHUNK(bfloat, 16, 4, 4, 1); + TEST_EXTRA_CHUNK(bfloat, 16, 8, 4, 1); + +#undef CMT +#define CMT " (chunk 1)" + CHECK_FP(TEST_MSG, bfloat, 16, 4, PRIx16, expected_st4_1, CMT); + CHECK_FP(TEST_MSG, bfloat, 16, 8, PRIx16, expected_st4_1, CMT); + + TEST_EXTRA_CHUNK(bfloat, 16, 4, 4, 2); + TEST_EXTRA_CHUNK(bfloat, 16, 8, 4, 2); + +#undef CMT +#define CMT " (chunk 2)" + CHECK_FP(TEST_MSG, bfloat, 16, 4, PRIx16, expected_st4_2, CMT); + CHECK_FP(TEST_MSG, bfloat, 16, 8, PRIx16, expected_st4_2, CMT); + + TEST_EXTRA_CHUNK(bfloat, 16, 4, 4, 3); + TEST_EXTRA_CHUNK(bfloat, 16, 8, 4, 3); + +#undef CMT +#define CMT " (chunk 3)" + CHECK_FP(TEST_MSG, bfloat, 16, 4, PRIx16, expected_st4_3, CMT); + CHECK_FP(TEST_MSG, bfloat, 16, 8, PRIx16, expected_st4_3, CMT); +} + +int main (void) +{ + exec_vstX_lane (); + return 0; +} diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bf16_vstN_lane_2.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bf16_vstN_lane_2.c new file mode 100644 index 0000000..f70c34d --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bf16_vstN_lane_2.c @@ -0,0 +1,52 @@ +/* { dg-do assemble { target { aarch64*-*-* } } } */ +/* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ +/* { dg-add-options arm_v8_2a_bf16_neon } */ +/* { dg-additional-options "-O2 --save-temps" } */ + +#include <arm_neon.h> + +void +test_vst2_lane_bf16 (bfloat16_t *ptr, bfloat16x4x2_t b) +{ + vst2_lane_bf16 (ptr, b, 2); +} + +/* { dg-final { scan-assembler-times "st2\\t{v2.h - v3.h}\\\[2\\\], \\\[x0\\\]" 1 } } */ + +void +test_vst2q_lane_bf16 (bfloat16_t *ptr, bfloat16x8x2_t b) +{ + vst2q_lane_bf16 (ptr, b, 2); +} + +/* { dg-final { scan-assembler-times "st2\\t{v0.h - v1.h}\\\[2\\\], \\\[x0\\\]" 1 } } */ + +void +test_vst3_lane_bf16 (bfloat16_t *ptr, bfloat16x4x3_t b) +{ + vst3_lane_bf16 (ptr, b, 2); +} + +void +test_vst3q_lane_bf16 (bfloat16_t *ptr, bfloat16x8x3_t b) +{ + vst3q_lane_bf16 (ptr, b, 2); +} + +/* { dg-final { scan-assembler-times "st3\\t{v4.h - v6.h}\\\[2\\\], \\\[x0\\\]" 2 } } */ + +void +test_vst4_lane_bf16 (bfloat16_t *ptr, bfloat16x4x4_t b) +{ + vst4_lane_bf16 (ptr, b, 2); +} + +/* { dg-final { scan-assembler-times "st4\\t{v4.h - v7.h}\\\[2\\\], \\\[x0\\\]" 1 } } */ + +void +test_vst4q_lane_bf16 (bfloat16_t *ptr, bfloat16x8x4_t b) +{ + vst4q_lane_bf16 (ptr, b, 2); +} + +/* { dg-final { scan-assembler-times "st4\\t{v0.h - v3.h}\\\[2\\\], \\\[x0\\\]" 1 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bfcvt-compile.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bfcvt-compile.c index bbea630..47af7c4 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bfcvt-compile.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bfcvt-compile.c @@ -46,3 +46,43 @@ bfloat16_t test_bfcvt (float32_t a) { return vcvth_bf16_f32 (a); } + +/* +**test_vcvt_f32_bf16: +** shll v0.4s, v0.4h, #16 +** ret +*/ +float32x4_t test_vcvt_f32_bf16 (bfloat16x4_t a) +{ + return vcvt_f32_bf16 (a); +} + +/* +**test_vcvtq_low_f32_bf16: +** shll v0.4s, v0.4h, #16 +** ret +*/ +float32x4_t test_vcvtq_low_f32_bf16 (bfloat16x8_t a) +{ + return vcvtq_low_f32_bf16 (a); +} + +/* +**test_vcvtq_high_f32_bf16: +** shll2 v0.4s, v0.8h, #16 +** ret +*/ +float32x4_t test_vcvtq_high_f32_bf16 (bfloat16x8_t a) +{ + return vcvtq_high_f32_bf16 (a); +} + +/* +**test_vcvtah_f32_bf16: +** shl d0, d0, #16 +** ret +*/ +float32_t test_vcvtah_f32_bf16 (bfloat16_t a) +{ + return vcvtah_f32_bf16 (a); +} diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopy_lane_bf16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopy_lane_bf16_indices_1.c new file mode 100644 index 0000000..7057980 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopy_lane_bf16_indices_1.c @@ -0,0 +1,18 @@ +/* { dg-do compile { target { aarch64*-*-* } } } */ +/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */ +/* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ +/* { dg-add-options arm_v8_2a_bf16_neon } */ + +#include <arm_neon.h> + +bfloat16x4_t +test_vcopy_lane_bf16 (bfloat16x4_t a, bfloat16x4_t b) +{ + bfloat16x4_t res; + res = vcopy_lane_bf16 (a, 0, b, 4); + res = vcopy_lane_bf16 (a, 0, b, -1); + return res; +} + +/* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */ +/* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopy_lane_bf16_indices_2.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopy_lane_bf16_indices_2.c new file mode 100644 index 0000000..a8ef930 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopy_lane_bf16_indices_2.c @@ -0,0 +1,18 @@ +/* { dg-do compile { target { aarch64*-*-* } } } */ +/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */ +/* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ +/* { dg-add-options arm_v8_2a_bf16_neon } */ + +#include <arm_neon.h> + +bfloat16x4_t +test_vcopy_lane_bf16 (bfloat16x4_t a, bfloat16x4_t b) +{ + bfloat16x4_t res; + res = vcopy_lane_bf16 (a, -1, b, 2); + res = vcopy_lane_bf16 (a, 4, b, 2); + return res; +} + +/* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */ +/* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopy_laneq_bf16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopy_laneq_bf16_indices_1.c new file mode 100644 index 0000000..c156204 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopy_laneq_bf16_indices_1.c @@ -0,0 +1,17 @@ +/* { dg-do compile { target { aarch64*-*-* } } } */ +/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */ +/* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ +/* { dg-add-options arm_v8_2a_bf16_neon } */ + +#include <arm_neon.h> + +bfloat16x4_t +test_vcopy_laneq_bf16 (bfloat16x4_t a, bfloat16x8_t b) +{ + bfloat16x4_t res; + /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */ + res = vcopy_laneq_bf16 (a, -1, b, 2); + /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */ + res = vcopy_laneq_bf16 (a, 4, b, 2); + return res; +} diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopy_laneq_bf16_indices_2.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopy_laneq_bf16_indices_2.c new file mode 100644 index 0000000..036690b --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopy_laneq_bf16_indices_2.c @@ -0,0 +1,17 @@ +/* { dg-do compile { target { aarch64*-*-* } } } */ +/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */ +/* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ +/* { dg-add-options arm_v8_2a_bf16_neon } */ + +#include <arm_neon.h> + +bfloat16x4_t +test_vcopy_laneq_bf16 (bfloat16x4_t a, bfloat16x8_t b) +{ + bfloat16x4_t res; + /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */ + res = vcopy_laneq_bf16 (a, 1, b, -1); + /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */ + res = vcopy_laneq_bf16 (a, 1, b, 8); + return res; +} diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopyq_lane_bf16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopyq_lane_bf16_indices_1.c new file mode 100644 index 0000000..15fce1b --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopyq_lane_bf16_indices_1.c @@ -0,0 +1,17 @@ +/* { dg-do compile { target { aarch64*-*-* } } } */ +/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */ +/* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ +/* { dg-add-options arm_v8_2a_bf16_neon } */ + +#include <arm_neon.h> + +bfloat16x8_t +test_vcopyq_lane_bf16 (bfloat16x8_t a, bfloat16x4_t b) +{ + bfloat16x8_t res; + /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */ + res = vcopyq_lane_bf16 (a, -1, b, 2); + /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */ + res = vcopyq_lane_bf16 (a, 8, b, 2); + return res; +} diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopyq_lane_bf16_indices_2.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopyq_lane_bf16_indices_2.c new file mode 100644 index 0000000..6e8004a --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopyq_lane_bf16_indices_2.c @@ -0,0 +1,17 @@ +/* { dg-do compile { target { aarch64*-*-* } } } */ +/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */ +/* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ +/* { dg-add-options arm_v8_2a_bf16_neon } */ + +#include <arm_neon.h> + +bfloat16x8_t +test_vcopyq_lane_bf16 (bfloat16x8_t a, bfloat16x4_t b) +{ + bfloat16x8_t res; + /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */ + res = vcopyq_lane_bf16 (a, 2, b, -1); + /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */ + res = vcopyq_lane_bf16 (a, 2, b, 4); + return res; +} diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopyq_laneq_bf16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopyq_laneq_bf16_indices_1.c new file mode 100644 index 0000000..2a26b42 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopyq_laneq_bf16_indices_1.c @@ -0,0 +1,17 @@ +/* { dg-do compile { target { aarch64*-*-* } } } */ +/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */ +/* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ +/* { dg-add-options arm_v8_2a_bf16_neon } */ + +#include <arm_neon.h> + +bfloat16x8_t +test_vcopyq_laneq_bf16 (bfloat16x8_t a, bfloat16x8_t b) +{ + bfloat16x8_t res; + /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */ + res = vcopyq_laneq_bf16 (a, -1, b, 2); + /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */ + res = vcopyq_laneq_bf16 (a, 8, b, 2); + return res; +} diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopyq_laneq_bf16_indices_2.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopyq_laneq_bf16_indices_2.c new file mode 100644 index 0000000..421cb2a --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopyq_laneq_bf16_indices_2.c @@ -0,0 +1,17 @@ +/* { dg-do compile { target { aarch64*-*-* } } } */ +/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */ +/* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ +/* { dg-add-options arm_v8_2a_bf16_neon } */ + +#include <arm_neon.h> + +bfloat16x8_t +test_vcopyq_laneq_bf16 (bfloat16x8_t a, bfloat16x8_t b) +{ + bfloat16x8_t res; + /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */ + res = vcopyq_laneq_bf16 (a, 2, b, -1); + /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */ + res = vcopyq_laneq_bf16 (a, 2, b, 8); + return res; +} diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_bf16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_bf16_indices_1.c new file mode 100644 index 0000000..d568a26 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_bf16_indices_1.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */ +/* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ +/* { dg-add-options arm_v8_2a_bf16_neon } */ + +#include <arm_neon.h> + +bfloat16x4x2_t +f_vld2_lane_bf16 (bfloat16_t * p, bfloat16x4x2_t v) +{ + bfloat16x4x2_t res; + /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */ + res = vld2_lane_bf16 (p, v, 4); + /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */ + res = vld2_lane_bf16 (p, v, -1); + return res; +} diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_bf16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_bf16_indices_1.c new file mode 100644 index 0000000..b91f14a --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_bf16_indices_1.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */ +/* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ +/* { dg-add-options arm_v8_2a_bf16_neon } */ + +#include <arm_neon.h> + +bfloat16x8x2_t +f_vld2q_lane_bf16 (bfloat16_t * p, bfloat16x8x2_t v) +{ + bfloat16x8x2_t res; + /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */ + res = vld2q_lane_bf16 (p, v, 8); + /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */ + res = vld2q_lane_bf16 (p, v, -1); + return res; +} diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_bf16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_bf16_indices_1.c new file mode 100644 index 0000000..331abf4 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_bf16_indices_1.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */ +/* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ +/* { dg-add-options arm_v8_2a_bf16_neon } */ + +#include <arm_neon.h> + +bfloat16x4x3_t +f_vld3_lane_bf16 (bfloat16_t * p, bfloat16x4x3_t v) +{ + bfloat16x4x3_t res; + /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */ + res = vld3_lane_bf16 (p, v, 4); + /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */ + res = vld3_lane_bf16 (p, v, -1); + return res; +} diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_bf16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_bf16_indices_1.c new file mode 100644 index 0000000..1c52887 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_bf16_indices_1.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */ +/* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ +/* { dg-add-options arm_v8_2a_bf16_neon } */ + +#include <arm_neon.h> + +bfloat16x8x3_t +f_vld3q_lane_bf16 (bfloat16_t * p, bfloat16x8x3_t v) +{ + bfloat16x8x3_t res; + /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */ + res = vld3q_lane_bf16 (p, v, 8); + /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */ + res = vld3q_lane_bf16 (p, v, -1); + return res; +} diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_bf16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_bf16_indices_1.c new file mode 100644 index 0000000..3f486f9 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_bf16_indices_1.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */ +/* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ +/* { dg-add-options arm_v8_2a_bf16_neon } */ + +#include <arm_neon.h> + +bfloat16x4x4_t +f_vld4_lane_bf16 (bfloat16_t * p, bfloat16x4x4_t v) +{ + bfloat16x4x4_t res; + /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */ + res = vld4_lane_bf16 (p, v, 4); + /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */ + res = vld4_lane_bf16 (p, v, -1); + return res; +} diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_bf16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_bf16_indices_1.c new file mode 100644 index 0000000..7159cd8 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_bf16_indices_1.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */ +/* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ +/* { dg-add-options arm_v8_2a_bf16_neon } */ + +#include <arm_neon.h> + +bfloat16x8x4_t +f_vld4q_lane_bf16 (bfloat16_t * p, bfloat16x8x4_t v) +{ + bfloat16x8x4_t res; + /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */ + res = vld4q_lane_bf16 (p, v, 8); + /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */ + res = vld4q_lane_bf16 (p, v, -1); + return res; +} diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrshrn_high_n.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrshrn_high_n.c new file mode 100644 index 0000000..6ebe074 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrshrn_high_n.c @@ -0,0 +1,195 @@ +/* { dg-do run } */ +/* { dg-skip-if "" { arm*-*-* } } */ + +#include <arm_neon.h> +#include "arm-neon-ref.h" +#include "compute-ref-data.h" + +/* Expected results. */ +VECT_VAR_DECL(expected,int,8,16) [] = { 0xf0, 0xf1, 0xf2, 0xf3, + 0xf4, 0xf5, 0xf6, 0xf7, + 0xf8, 0xf9, 0xf9, 0xfa, + 0xfa, 0xfb, 0xfb, 0xfc }; +VECT_VAR_DECL(expected,int,16,8) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3, + 0xfff8, 0xfff9, 0xfff9, 0xfffa }; +VECT_VAR_DECL(expected,int,32,4) [] = { 0xfffffff0, 0xfffffff1, + 0xfffffffc, 0xfffffffc }; +VECT_VAR_DECL(expected,uint,8,16) [] = { 0xf0, 0xf1, 0xf2, 0xf3, + 0xf4, 0xf5, 0xf6, 0xf7, + 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff }; +VECT_VAR_DECL(expected,uint,16,8) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3, + 0xffff, 0xffff, 0xffff, 0xffff }; +VECT_VAR_DECL(expected,uint,32,4) [] = { 0xfffffff0, 0xfffffff1, + 0xffffffff, 0xffffffff }; + +/* Expected results with shift by 3. */ +VECT_VAR_DECL(expected_sh3,int,8,16) [] = { 0x7f, 0x7f, 0x7f, 0x7f, + 0x7f, 0x7f, 0x7f, 0x7f, + 0x7f, 0x7f, 0x7f, 0x7f, + 0x7f, 0x7f, 0x7f, 0x7f }; +VECT_VAR_DECL(expected_sh3,int,16,8) [] = { 0x7fff, 0x7fff, 0x7fff, 0x7fff, + 0x7fff, 0x7fff, 0x7fff, 0x7fff }; +VECT_VAR_DECL(expected_sh3,int,32,4) [] = { 0x7fffffff, 0x7fffffff, + 0x7fffffff, 0x7fffffff }; +VECT_VAR_DECL(expected_sh3,uint,8,16) [] = { 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff }; +VECT_VAR_DECL(expected_sh3,uint,16,8) [] = { 0xffff, 0xffff, 0xffff, 0xffff, + 0xffff, 0xffff, 0xffff, 0xffff }; +VECT_VAR_DECL(expected_sh3,uint,32,4) [] = { 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff }; + +/* Expected results with shift by max amount. */ +VECT_VAR_DECL(expected_shmax,int,8,16) [] = { 0x7f, 0x7f, 0x7f, 0x7f, + 0x7f, 0x7f, 0x7f, 0x7f, + 0x7f, 0x7f, 0x7f, 0x7f, + 0x7f, 0x7f, 0x7f, 0x7f }; +VECT_VAR_DECL(expected_shmax,int,16,8) [] = { 0x7fff, 0x7fff, 0x7fff, 0x7fff, + 0x7fff, 0x7fff, 0x7fff, 0x7fff }; +VECT_VAR_DECL(expected_shmax,int,32,4) [] = { 0x7fffffff, 0x7fffffff, + 0x7fffffff, 0x7fffffff }; +VECT_VAR_DECL(expected_shmax,uint,8,16) [] = { 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff }; +VECT_VAR_DECL(expected_shmax,uint,16,8) [] = { 0xffff, 0xffff, 0xffff, 0xffff, + 0xffff, 0xffff, 0xffff, 0xffff }; +VECT_VAR_DECL(expected_shmax,uint,32,4) [] = { 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff }; + +#define INSN vqrshrn_high_n +#define TEST_MSG "VQRSHRN_HIGH_N" + +#define FNNAME1(NAME) void exec_ ## NAME (void) +#define FNNAME(NAME) FNNAME1(NAME) + +FNNAME (INSN) +{ + /* Basic test: y=vqrshrn_high_n(x,v), then store the result. */ +#define TEST_VQRSHRN_HIGH_N2(INSN, T1, T2, W, W2, N, N2, V) \ + VECT_VAR(vector_res, T1, W2, N2) = \ + INSN##_##T2##W(VECT_VAR(vector1, T1, W2, N), \ + VECT_VAR(vector2, T1, W, N), V); \ + vst1q_##T2##W2(VECT_VAR(result, T1, W2, N2), \ + VECT_VAR(vector_res, T1, W2, N2)); \ + + /* Two auxliary macros are necessary to expand INSN */ +#define TEST_VQRSHRN_HIGH_N1(INSN, T1, T2, W, W2, N, N2, V) \ + TEST_VQRSHRN_HIGH_N2(INSN, T1, T2, W, W2, N, N2, V) + +#define TEST_VQRSHRN_HIGH_N(T1, T2, W, W2, N, N2, V) \ + TEST_VQRSHRN_HIGH_N1(INSN, T1, T2, W, W2, N, N2, V) + + + DECL_VARIABLE(vector1, int, 8, 8); + DECL_VARIABLE(vector1, int, 16, 4); + DECL_VARIABLE(vector1, int, 32, 2); + DECL_VARIABLE(vector1, uint, 8, 8); + DECL_VARIABLE(vector1, uint, 16, 4); + DECL_VARIABLE(vector1, uint, 32, 2); + + /* vector is twice as large as vector_res. */ + DECL_VARIABLE(vector2, int, 16, 8); + DECL_VARIABLE(vector2, int, 32, 4); + DECL_VARIABLE(vector2, int, 64, 2); + DECL_VARIABLE(vector2, uint, 16, 8); + DECL_VARIABLE(vector2, uint, 32, 4); + DECL_VARIABLE(vector2, uint, 64, 2); + + DECL_VARIABLE(vector_res, int, 8, 16); + DECL_VARIABLE(vector_res, int, 16, 8); + DECL_VARIABLE(vector_res, int, 32, 4); + DECL_VARIABLE(vector_res, uint, 8, 16); + DECL_VARIABLE(vector_res, uint, 16, 8); + DECL_VARIABLE(vector_res, uint, 32, 4); + + clean_results (); + + VLOAD(vector1, buffer, , int, s, 8, 8); + VLOAD(vector1, buffer, , int, s, 16, 4); + VLOAD(vector1, buffer, , int, s, 32, 2); + VLOAD(vector1, buffer, , uint, u, 8, 8); + VLOAD(vector1, buffer, , uint, u, 16, 4); + VLOAD(vector1, buffer, , uint, u, 32, 2); + + VLOAD(vector2, buffer, q, int, s, 16, 8); + VLOAD(vector2, buffer, q, int, s, 32, 4); + VLOAD(vector2, buffer, q, int, s, 64, 2); + VLOAD(vector2, buffer, q, uint, u, 16, 8); + VLOAD(vector2, buffer, q, uint, u, 32, 4); + VLOAD(vector2, buffer, q, uint, u, 64, 2); + + /* Choose shift amount arbitrarily. */ +#define CMT "" + TEST_VQRSHRN_HIGH_N(int, s, 16, 8, 8, 16, 1); + TEST_VQRSHRN_HIGH_N(int, s, 32, 16, 4, 8, 1); + TEST_VQRSHRN_HIGH_N(int, s, 64, 32, 2, 4, 2); + TEST_VQRSHRN_HIGH_N(uint, u, 16, 8, 8, 16, 2); + TEST_VQRSHRN_HIGH_N(uint, u, 32, 16, 4, 8, 3); + TEST_VQRSHRN_HIGH_N(uint, u, 64, 32, 2, 4, 3); + + CHECK(TEST_MSG, int, 8, 16, PRIx8, expected, CMT); + CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, CMT); + CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, CMT); + CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected, CMT); + CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, CMT); + CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, CMT); + + + /* Another set of tests, shifting max value by 3. */ + VDUP(vector1, , int, s, 8, 8, 0x7F); + VDUP(vector1, , int, s, 16, 4, 0x7FFF); + VDUP(vector1, , int, s, 32, 2, 0x7FFFFFFFLL); + VDUP(vector1, , uint, u, 8, 8, 0xFF); + VDUP(vector1, , uint, u, 16, 4, 0xFFFF); + VDUP(vector1, , uint, u, 32, 2, 0xFFFFFFFFULL); + + VDUP(vector2, q, int, s, 16, 8, 0x7FFF); + VDUP(vector2, q, int, s, 32, 4, 0x7FFFFFFF); + VDUP(vector2, q, int, s, 64, 2, 0x7FFFFFFFFFFFFFFFLL); + VDUP(vector2, q, uint, u, 16, 8, 0xFFFF); + VDUP(vector2, q, uint, u, 32, 4, 0xFFFFFFFF); + VDUP(vector2, q, uint, u, 64, 2, 0xFFFFFFFFFFFFFFFFULL); + +#undef CMT +#define CMT " (check saturation: shift by 3)" + TEST_VQRSHRN_HIGH_N(int, s, 16, 8, 8, 16, 3); + TEST_VQRSHRN_HIGH_N(int, s, 32, 16, 4, 8, 3); + TEST_VQRSHRN_HIGH_N(int, s, 64, 32, 2, 4, 3); + TEST_VQRSHRN_HIGH_N(uint, u, 16, 8, 8, 16, 3); + TEST_VQRSHRN_HIGH_N(uint, u, 32, 16, 4, 8, 3); + TEST_VQRSHRN_HIGH_N(uint, u, 64, 32, 2, 4, 3); + + CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_sh3, CMT); + CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_sh3, CMT); + CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_sh3, CMT); + CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_sh3, CMT); + CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_sh3, CMT); + CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_sh3, CMT); + + + /* Shift by max amount. */ +#undef CMT +#define CMT " (check saturation: shift by max)" + TEST_VQRSHRN_HIGH_N(int, s, 16, 8, 8, 16, 8); + TEST_VQRSHRN_HIGH_N(int, s, 32, 16, 4, 8, 16); + TEST_VQRSHRN_HIGH_N(int, s, 64, 32, 2, 4, 32); + TEST_VQRSHRN_HIGH_N(uint, u, 16, 8, 8, 16, 8); + TEST_VQRSHRN_HIGH_N(uint, u, 32, 16, 4, 8, 16); + TEST_VQRSHRN_HIGH_N(uint, u, 64, 32, 2, 4, 32); + + CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_shmax, CMT); + CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_shmax, CMT); + CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_shmax, CMT); + CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_shmax, CMT); + CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_shmax, CMT); + CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_shmax, CMT); +} + +int main (void) +{ + exec_vqrshrn_high_n (); + return 0; +} diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrshrun_high_n.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrshrun_high_n.c new file mode 100644 index 0000000..49d319d --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrshrun_high_n.c @@ -0,0 +1,197 @@ +/* { dg-do run } */ +/* { dg-skip-if "" { arm*-*-* } } */ + +#include <arm_neon.h> +#include "arm-neon-ref.h" +#include "compute-ref-data.h" + +/* Expected results with negative input. */ +VECT_VAR_DECL(expected_neg,uint,8,16) [] = { 0xfe, 0xfe, 0xfe, 0xfe, + 0xfe, 0xfe, 0xfe, 0xfe, + 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0 }; +VECT_VAR_DECL(expected_neg,uint,16,8) [] = { 0xfffd, 0xfffd, 0xfffd, 0xfffd, + 0x0, 0x0, 0x0, 0x0 }; +VECT_VAR_DECL(expected_neg,uint,32,4) [] = { 0xfffffffc, 0xfffffffc, 0x0, 0x0 }; + +/* Expected results with max input value shifted by 1. */ +VECT_VAR_DECL(expected_max_sh1,uint,8,16) [] = { 0x7f, 0x7f, 0x7f, 0x7f, + 0x7f, 0x7f, 0x7f, 0x7f, + 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff }; +VECT_VAR_DECL(expected_max_sh1,uint,16,8) [] = { 0x7fff, 0x7fff, 0x7fff, 0x7fff, + 0xffff, 0xffff, 0xffff, 0xffff }; +VECT_VAR_DECL(expected_max_sh1,uint,32,4) [] = { 0x7fffffff, 0x7fffffff, + 0xffffffff, 0xffffffff }; + +/* Expected results with max input value shifted by max amount. */ +VECT_VAR_DECL(expected_max_shmax,uint,8,16) [] = { 0x7f, 0x7f, 0x7f, 0x7f, + 0x7f, 0x7f, 0x7f, 0x7f, + 0x80, 0x80, 0x80, 0x80, + 0x80, 0x80, 0x80, 0x80 }; +VECT_VAR_DECL(expected_max_shmax,uint,16,8) [] = { 0x7fff, 0x7fff, 0x7fff, 0x7fff, + 0x8000, 0x8000, 0x8000, 0x8000 }; +VECT_VAR_DECL(expected_max_shmax,uint,32,4) [] = { 0x7fffffff, 0x7fffffff, + 0x80000000, 0x80000000 }; + +/* Expected results with min input value shifted by max amount. */ +VECT_VAR_DECL(expected_min_shmax,uint,8,16) [] = { 0x80, 0x80, 0x80, 0x80, + 0x80, 0x80, 0x80, 0x80, + 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0 }; +VECT_VAR_DECL(expected_min_shmax,uint,16,8) [] = { 0x8000, 0x8000, 0x8000, 0x8000, + 0x0, 0x0, 0x0, 0x0 }; +VECT_VAR_DECL(expected_min_shmax,uint,32,4) [] = { 0x80000000, 0x80000000, + 0x0, 0x0 }; + +/* Expected results with inputs in usual range. */ +VECT_VAR_DECL(expected,uint,8,16) [] = { 0x12, 0x12, 0x12, 0x12, + 0x12, 0x12, 0x12, 0x12, + 0x49, 0x49, 0x49, 0x49, + 0x49, 0x49, 0x49, 0x49 }; +VECT_VAR_DECL(expected,uint,16,8) [] = { 0x4321, 0x4321, 0x4321, 0x4321, + 0x0, 0x0, 0x0, 0x0 }; +VECT_VAR_DECL(expected,uint,32,4) [] = { 0xdeadbeef, 0xdeadbeef, + 0xdeadbf, 0xdeadbf }; + +#define INSN vqrshrun_high_n +#define TEST_MSG "VQRSHRUN_HIGH_N" + +#define FNNAME1(NAME) void exec_ ## NAME (void) +#define FNNAME(NAME) FNNAME1(NAME) + +FNNAME (INSN) +{ + /* Basic test: y=vqrshrun_high_n(x,v), then store the result. */ +#define TEST_VQRSHRUN_HIGH_N2(INSN, T1, T2, W, W2, N, N2, V) \ + VECT_VAR(vector_res, uint, W2, N2) = \ + INSN##_##T2##W(VECT_VAR(vector1, uint, W2, N), \ + VECT_VAR(vector2, T1, W, N), V); \ + vst1q_u##W2(VECT_VAR(result, uint, W2, N2), \ + VECT_VAR(vector_res, uint, W2, N2)); \ + + /* Two auxliary macros are necessary to expand INSN */ +#define TEST_VQRSHRUN_HIGH_N1(INSN, T1, T2, W, W2, N, N2, V) \ + TEST_VQRSHRUN_HIGH_N2(INSN, T1, T2, W, W2, N, N2, V) + +#define TEST_VQRSHRUN_HIGH_N(T1, T2, W, W2, N, N2, V) \ + TEST_VQRSHRUN_HIGH_N1(INSN, T1, T2, W, W2, N, N2, V) + + + DECL_VARIABLE(vector1, uint, 8, 8); + DECL_VARIABLE(vector1, uint, 16, 4); + DECL_VARIABLE(vector1, uint, 32, 2); + + /* vector is twice as large as vector_res. */ + DECL_VARIABLE(vector2, int, 16, 8); + DECL_VARIABLE(vector2, int, 32, 4); + DECL_VARIABLE(vector2, int, 64, 2); + + DECL_VARIABLE(vector_res, uint, 8, 16); + DECL_VARIABLE(vector_res, uint, 16, 8); + DECL_VARIABLE(vector_res, uint, 32, 4); + + clean_results (); + + /* Fill input vector with negative values, to check saturation on + limits. */ + VDUP(vector1, , uint, u, 8, 8, -2); + VDUP(vector1, , uint, u, 16, 4, -3); + VDUP(vector1, , uint, u, 32, 2, -4); + + VDUP(vector2, q, int, s, 16, 8, -2); + VDUP(vector2, q, int, s, 32, 4, -3); + VDUP(vector2, q, int, s, 64, 2, -4); + + /* Choose shift amount arbitrarily. */ +#define CMT " (negative input)" + TEST_VQRSHRUN_HIGH_N(int, s, 16, 8, 8, 16, 3); + TEST_VQRSHRUN_HIGH_N(int, s, 32, 16, 4, 8, 4); + TEST_VQRSHRUN_HIGH_N(int, s, 64, 32, 2, 4, 2); + + CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_neg, CMT); + CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_neg, CMT); + CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_neg, CMT); + + + /* Fill input vector with max value, to check saturation on + limits. */ + VDUP(vector1, , uint, u, 8, 8, 0x7F); + VDUP(vector1, , uint, u, 16, 4, 0x7FFF); + VDUP(vector1, , uint, u, 32, 2, 0x7FFFFFFFLL); + + VDUP(vector2, q, int, s, 16, 8, 0x7FFF); + VDUP(vector2, q, int, s, 32, 4, 0x7FFFFFFF); + VDUP(vector2, q, int, s, 64, 2, 0x7FFFFFFFFFFFFFFFLL); + + /* shift by 1. */ +#undef CMT +#define CMT " (check cumulative saturation: shift by 1)" + TEST_VQRSHRUN_HIGH_N(int, s, 16, 8, 8, 16, 1); + TEST_VQRSHRUN_HIGH_N(int, s, 32, 16, 4, 8, 1); + TEST_VQRSHRUN_HIGH_N(int, s, 64, 32, 2, 4, 1); + + CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_max_sh1, CMT); + CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_max_sh1, CMT); + CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_max_sh1, CMT); + + + /* shift by max. */ +#undef CMT +#define CMT " (check cumulative saturation: shift by max, positive input)" + TEST_VQRSHRUN_HIGH_N(int, s, 16, 8, 8, 16, 8); + TEST_VQRSHRUN_HIGH_N(int, s, 32, 16, 4, 8, 16); + TEST_VQRSHRUN_HIGH_N(int, s, 64, 32, 2, 4, 32); + + CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_max_shmax, CMT); + CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_max_shmax, CMT); + CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_max_shmax, CMT); + + + /* Fill input vector with min value, to check saturation on limits. */ + VDUP(vector1, , uint, u, 8, 8, 0x80); + VDUP(vector1, , uint, u, 16, 4, 0x8000); + VDUP(vector1, , uint, u, 32, 2, 0x80000000LL); + + VDUP(vector2, q, int, s, 16, 8, 0x8000); + VDUP(vector2, q, int, s, 32, 4, 0x80000000); + VDUP(vector2, q, int, s, 64, 2, 0x8000000000000000LL); + + /* shift by max */ +#undef CMT +#define CMT " (check cumulative saturation: shift by max, negative input)" + TEST_VQRSHRUN_HIGH_N(int, s, 16, 8, 8, 16, 8); + TEST_VQRSHRUN_HIGH_N(int, s, 32, 16, 4, 8, 16); + TEST_VQRSHRUN_HIGH_N(int, s, 64, 32, 2, 4, 32); + + CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_min_shmax, CMT); + CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_min_shmax, CMT); + CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_min_shmax, CMT); + + + /* Fill input vector with positive values, to check normal case. */ + VDUP(vector1, , uint, u, 8, 8, 0x12); + VDUP(vector1, , uint, u, 16, 4, 0x4321); + VDUP(vector1, , uint, u, 32, 2, 0xDEADBEEF); + + VDUP(vector2, q, int, s, 16, 8, 0x1234); + VDUP(vector2, q, int, s, 32, 4, 0x87654321); + VDUP(vector2, q, int, s, 64, 2, 0xDEADBEEF); + + /* shift arbitrary amount. */ +#undef CMT +#define CMT "" + TEST_VQRSHRUN_HIGH_N(int, s, 16, 8, 8, 16, 6); + TEST_VQRSHRUN_HIGH_N(int, s, 32, 16, 4, 8, 7); + TEST_VQRSHRUN_HIGH_N(int, s, 64, 32, 2, 4, 8); + + CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected, CMT); + CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, CMT); + CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, CMT); +} + +int main (void) +{ + exec_vqrshrun_high_n (); + return 0; +} diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshrn_high_n.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshrn_high_n.c new file mode 100644 index 0000000..8d06f11 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshrn_high_n.c @@ -0,0 +1,193 @@ +/* { dg-do run } */ +/* { dg-skip-if "" { arm*-*-* } } */ + +#include <arm_neon.h> +#include "arm-neon-ref.h" +#include "compute-ref-data.h" + +/* Expected results. */ +VECT_VAR_DECL(expected,int,8,16) [] = { 0xf0, 0xf1, 0xf2, 0xf3, + 0xf4, 0xf5, 0xf6, 0xf7, + 0xf8, 0xf8, 0xf9, 0xf9, + 0xfa, 0xfa, 0xfb, 0xfb }; +VECT_VAR_DECL(expected,int,16,8) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3, + 0xfff8, 0xfff8, 0xfff9, 0xfff9 }; +VECT_VAR_DECL(expected,int,32,4) [] = { 0xfffffff0, 0xfffffff1, + 0xfffffffc, 0xfffffffc }; +VECT_VAR_DECL(expected,uint,8,16) [] = { 0xf0, 0xf1, 0xf2, 0xf3, + 0xf4, 0xf5, 0xf6, 0xf7, + 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff }; +VECT_VAR_DECL(expected,uint,16,8) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3, + 0xffff, 0xffff, 0xffff, 0xffff }; +VECT_VAR_DECL(expected,uint,32,4) [] = { 0xfffffff0, 0xfffffff1, + 0xffffffff, 0xffffffff }; + +/* Expected results with max input value shifted by 3. */ +VECT_VAR_DECL(expected_max_sh3,int,8,16) [] = { 0x7f, 0x7f, 0x7f, 0x7f, + 0x7f, 0x7f, 0x7f, 0x7f, + 0x7f, 0x7f, 0x7f, 0x7f, + 0x7f, 0x7f, 0x7f, 0x7f }; +VECT_VAR_DECL(expected_max_sh3,int,16,8) [] = { 0x7fff, 0x7fff, 0x7fff, 0x7fff, + 0x7fff, 0x7fff, 0x7fff, 0x7fff }; +VECT_VAR_DECL(expected_max_sh3,int,32,4) [] = { 0x7fffffff, 0x7fffffff, + 0x7fffffff, 0x7fffffff }; +VECT_VAR_DECL(expected_max_sh3,uint,8,16) [] = { 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff }; +VECT_VAR_DECL(expected_max_sh3,uint,16,8) [] = { 0xffff, 0xffff, 0xffff, 0xffff, + 0xffff, 0xffff, 0xffff, 0xffff }; +VECT_VAR_DECL(expected_max_sh3,uint,32,4) [] = { 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff }; + +/* Expected results with max input value shifted by type size. */ +VECT_VAR_DECL(expected_max_shmax,int,8,16) [] = { 0x7f, 0x7f, 0x7f, 0x7f, + 0x7f, 0x7f, 0x7f, 0x7f, + 0x7f, 0x7f, 0x7f, 0x7f, + 0x7f, 0x7f, 0x7f, 0x7f }; +VECT_VAR_DECL(expected_max_shmax,int,16,8) [] = { 0x7fff, 0x7fff, 0x7fff, 0x7fff, + 0x7fff, 0x7fff, 0x7fff, 0x7fff }; +VECT_VAR_DECL(expected_max_shmax,int,32,4) [] = { 0x7fffffff, 0x7fffffff, + 0x7fffffff, 0x7fffffff }; +VECT_VAR_DECL(expected_max_shmax,uint,8,16) [] = { 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff }; +VECT_VAR_DECL(expected_max_shmax,uint,16,8) [] = { 0xffff, 0xffff, 0xffff, 0xffff, + 0xffff, 0xffff, 0xffff, 0xffff }; +VECT_VAR_DECL(expected_max_shmax,uint,32,4) [] = { 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff }; + +#define INSN vqshrn_high_n +#define TEST_MSG "VQSHRN_HIGH_N" + +#define FNNAME1(NAME) void exec_ ## NAME (void) +#define FNNAME(NAME) FNNAME1(NAME) + +FNNAME (INSN) +{ + /* Basic test: y=vqshrn_high_n(x1,x2,v), then store the result. */ +#define TEST_VQSHRN_HIGH_N2(INSN, T1, T2, W, W2, N, N2, V) \ + VECT_VAR(vector_res, T1, W2, N2) = \ + INSN##_##T2##W(VECT_VAR(vector1, T1, W2, N), \ + VECT_VAR(vector2, T1, W, N), V); \ + vst1q_##T2##W2(VECT_VAR(result, T1, W2, N2), \ + VECT_VAR(vector_res, T1, W2, N2)); + + /* Two auxliary macros are necessary to expand INSN */ +#define TEST_VQSHRN_HIGH_N1(INSN, T1, T2, W, W2, N, N2, V) \ + TEST_VQSHRN_HIGH_N2(INSN, T1, T2, W, W2, N, N2, V) + +#define TEST_VQSHRN_HIGH_N(T1, T2, W, W2, N, N2, V) \ + TEST_VQSHRN_HIGH_N1(INSN, T1, T2, W, W2, N, N2, V) + + + DECL_VARIABLE(vector1, int, 8, 8); + DECL_VARIABLE(vector1, int, 16, 4); + DECL_VARIABLE(vector1, int, 32, 2); + DECL_VARIABLE(vector1, uint, 8, 8); + DECL_VARIABLE(vector1, uint, 16, 4); + DECL_VARIABLE(vector1, uint, 32, 2); + + /* vector is twice as large as vector_res. */ + DECL_VARIABLE(vector2, int, 16, 8); + DECL_VARIABLE(vector2, int, 32, 4); + DECL_VARIABLE(vector2, int, 64, 2); + DECL_VARIABLE(vector2, uint, 16, 8); + DECL_VARIABLE(vector2, uint, 32, 4); + DECL_VARIABLE(vector2, uint, 64, 2); + + DECL_VARIABLE(vector_res, int, 8, 16); + DECL_VARIABLE(vector_res, int, 16, 8); + DECL_VARIABLE(vector_res, int, 32, 4); + DECL_VARIABLE(vector_res, uint, 8, 16); + DECL_VARIABLE(vector_res, uint, 16, 8); + DECL_VARIABLE(vector_res, uint, 32, 4); + + clean_results (); + + VLOAD(vector1, buffer, , int, s, 8, 8); + VLOAD(vector1, buffer, , int, s, 16, 4); + VLOAD(vector1, buffer, , int, s, 32, 2); + VLOAD(vector1, buffer, , uint, u, 8, 8); + VLOAD(vector1, buffer, , uint, u, 16, 4); + VLOAD(vector1, buffer, , uint, u, 32, 2); + + VLOAD(vector2, buffer, q, int, s, 16, 8); + VLOAD(vector2, buffer, q, int, s, 32, 4); + VLOAD(vector2, buffer, q, int, s, 64, 2); + VLOAD(vector2, buffer, q, uint, u, 16, 8); + VLOAD(vector2, buffer, q, uint, u, 32, 4); + VLOAD(vector2, buffer, q, uint, u, 64, 2); + + /* Choose shift amount arbitrarily. */ +#define CMT "" + TEST_VQSHRN_HIGH_N(int, s, 16, 8, 8, 16, 1); + TEST_VQSHRN_HIGH_N(int, s, 32, 16, 4, 8, 1); + TEST_VQSHRN_HIGH_N(int, s, 64, 32, 2, 4, 2); + TEST_VQSHRN_HIGH_N(uint, u, 16, 8, 8, 16, 2); + TEST_VQSHRN_HIGH_N(uint, u, 32, 16, 4, 8, 3); + TEST_VQSHRN_HIGH_N(uint, u, 64, 32, 2, 4, 3); + + CHECK(TEST_MSG, int, 8, 16, PRIx8, expected, CMT); + CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, CMT); + CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, CMT); + CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected, CMT); + CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, CMT); + CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, CMT); + + /* Use max possible value as input. */ + VDUP(vector1, , int, s, 8, 8, 0x7F); + VDUP(vector1, , int, s, 16, 4, 0x7FFF); + VDUP(vector1, , int, s, 32, 2, 0x7FFFFFFFLL); + VDUP(vector1, , uint, u, 8, 8, 0xFF); + VDUP(vector1, , uint, u, 16, 4, 0xFFFF); + VDUP(vector1, , uint, u, 32, 2, 0xFFFFFFFFULL); + + VDUP(vector2, q, int, s, 16, 8, 0x7FFF); + VDUP(vector2, q, int, s, 32, 4, 0x7FFFFFFF); + VDUP(vector2, q, int, s, 64, 2, 0x7FFFFFFFFFFFFFFFLL); + VDUP(vector2, q, uint, u, 16, 8, 0xFFFF); + VDUP(vector2, q, uint, u, 32, 4, 0xFFFFFFFF); + VDUP(vector2, q, uint, u, 64, 2, 0xFFFFFFFFFFFFFFFFULL); + +#undef CMT +#define CMT " (check saturation: shift by 3)" + TEST_VQSHRN_HIGH_N(int, s, 16, 8, 8, 16, 3); + TEST_VQSHRN_HIGH_N(int, s, 32, 16, 4, 8, 3); + TEST_VQSHRN_HIGH_N(int, s, 64, 32, 2, 4, 3); + TEST_VQSHRN_HIGH_N(uint, u, 16, 8, 8, 16, 3); + TEST_VQSHRN_HIGH_N(uint, u, 32, 16, 4, 8, 3); + TEST_VQSHRN_HIGH_N(uint, u, 64, 32, 2, 4, 3); + + CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_max_sh3, CMT); + CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_max_sh3, CMT); + CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_max_sh3, CMT); + CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_max_sh3, CMT); + CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_max_sh3, CMT); + CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_max_sh3, CMT); + + +#undef CMT +#define CMT " (check saturation: shift by max)" + TEST_VQSHRN_HIGH_N(int, s, 16, 8, 8, 16, 8); + TEST_VQSHRN_HIGH_N(int, s, 32, 16, 4, 8, 16); + TEST_VQSHRN_HIGH_N(int, s, 64, 32, 2, 4, 32); + TEST_VQSHRN_HIGH_N(uint, u, 16, 8, 8, 16, 8); + TEST_VQSHRN_HIGH_N(uint, u, 32, 16, 4, 8, 16); + TEST_VQSHRN_HIGH_N(uint, u, 64, 32, 2, 4, 32); + + CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_max_shmax, CMT); + CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_max_shmax, CMT); + CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_max_shmax, CMT); + CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_max_shmax, CMT); + CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_max_shmax, CMT); + CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_max_shmax, CMT); +} + +int main (void) +{ + exec_vqshrn_high_n (); + return 0; +} diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshrun_high_n.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshrun_high_n.c new file mode 100644 index 0000000..e8235fe --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshrun_high_n.c @@ -0,0 +1,143 @@ +/* { dg-do run } */ +/* { dg-skip-if "" { arm*-*-* } } */ + +#include <arm_neon.h> +#include "arm-neon-ref.h" +#include "compute-ref-data.h" + +/* Expected results with negative input. */ +VECT_VAR_DECL(expected_neg,uint,8,16) [] = { 0xfe, 0xfe, 0xfe, 0xfe, + 0xfe, 0xfe, 0xfe, 0xfe, + 0x0, 0x0, 0x0, 0x0, + 0x0,0x0, 0x0, 0x0 }; +VECT_VAR_DECL(expected_neg,uint,16,8) [] = { 0xfffd, 0xfffd, 0xfffd, 0xfffd, + 0x0, 0x0, 0x0, 0x0, 0x0 }; +VECT_VAR_DECL(expected_neg,uint,32,4) [] = { 0xfffffffc, 0xfffffffc, + 0x0, 0x0 }; + +/* Expected results with max input value shifted by 1. */ +VECT_VAR_DECL(expected_max_sh1,uint,8,16) [] = { 0x7f, 0x7f, 0x7f, 0x7f, + 0x7f, 0x7f, 0x7f, 0x7f, + 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff }; +VECT_VAR_DECL(expected_max_sh1,uint,16,8) [] = { 0x7fff, 0x7fff, 0x7fff, 0x7fff, + 0xffff, 0xffff, 0xffff, 0xffff }; +VECT_VAR_DECL(expected_max_sh1,uint,32,4) [] = { 0x7fffffff, 0x7fffffff, + 0xffffffff, 0xffffffff }; + +/* Expected results. */ +VECT_VAR_DECL(expected,uint,8,16) [] = { 0x12, 0x12, 0x12, 0x12, + 0x12, 0x12, 0x12, 0x12, + 0x48, 0x48, 0x48, 0x48, + 0x48, 0x48, 0x48, 0x48 }; +VECT_VAR_DECL(expected,uint,16,8) [] = { 0x4321, 0x4321, 0x4321, 0x4321, + 0x0, 0x0, 0x0, 0x0 }; +VECT_VAR_DECL(expected,uint,32,4) [] = { 0xdeadbeef, 0xdeadbeef, + 0xdeadbe, 0xdeadbe }; + +#define INSN vqshrun_high_n +#define TEST_MSG "VQSHRUN_HIGH_N" + +#define FNNAME1(NAME) void exec_ ## NAME (void) +#define FNNAME(NAME) FNNAME1(NAME) + +FNNAME (INSN) +{ + /* Basic test: y=vqshrun_high_n(x,v), then store the result. */ +#define TEST_VQSHRUN_HIGH_N2(INSN, T1, T2, W, W2, N, N2, V) \ + VECT_VAR(vector_res, uint, W2, N2) = \ + INSN##_##T2##W(VECT_VAR(vector1,uint, W2, N), \ + VECT_VAR(vector2, T1, W, N), V); \ + vst1q_u##W2(VECT_VAR(result, uint, W2, N2), \ + VECT_VAR(vector_res, uint, W2, N2)); \ + + /* Two auxliary macros are necessary to expand INSN */ +#define TEST_VQSHRUN_HIGH_N1(INSN, T1, T2, W, W2, N, N2, V) \ + TEST_VQSHRUN_HIGH_N2(INSN, T1, T2, W, W2, N, N2, V) + +#define TEST_VQSHRUN_HIGH_N(T1, T2, W, W2, N, N2, V) \ + TEST_VQSHRUN_HIGH_N1(INSN, T1, T2, W, W2, N, N2, V) + + + DECL_VARIABLE(vector1, uint, 8, 8); + DECL_VARIABLE(vector1, uint, 16, 4); + DECL_VARIABLE(vector1, uint, 32, 2); + + /* vector is twice as large as vector_res. */ + DECL_VARIABLE(vector2, int, 16, 8); + DECL_VARIABLE(vector2, int, 32, 4); + DECL_VARIABLE(vector2, int, 64, 2); + + DECL_VARIABLE(vector_res, uint, 8, 16); + DECL_VARIABLE(vector_res, uint, 16, 8); + DECL_VARIABLE(vector_res, uint, 32, 4); + + clean_results (); + + /* Fill input vector with negative values, to check saturation on + limits. */ + VDUP(vector1, , uint, u, 8, 8, -2); + VDUP(vector1, , uint, u, 16, 4, -3); + VDUP(vector1, , uint, u, 32, 2, -4); + + VDUP(vector2, q, int, s, 16, 8, -2); + VDUP(vector2, q, int, s, 32, 4, -3); + VDUP(vector2, q, int, s, 64, 2, -4); + + /* Choose shift amount arbitrarily. */ +#define CMT " (negative input)" + TEST_VQSHRUN_HIGH_N(int, s, 16, 8, 8, 16, 3); + TEST_VQSHRUN_HIGH_N(int, s, 32, 16, 4, 8, 4); + TEST_VQSHRUN_HIGH_N(int, s, 64, 32, 2, 4, 2); + + CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_neg, CMT); + CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_neg, CMT); + CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_neg, CMT); + + + /* Fill input vector with max value, to check saturation on + limits. */ + VDUP(vector1, , uint, u, 8, 8, 0x7F); + VDUP(vector1, , uint, u, 16, 4, 0x7FFF); + VDUP(vector1, , uint, u, 32, 2, 0x7FFFFFFFLL); + + VDUP(vector2, q, int, s, 16, 8, 0x7FFF); + VDUP(vector2, q, int, s, 32, 4, 0x7FFFFFFF); + VDUP(vector2, q, int, s, 64, 2, 0x7FFFFFFFFFFFFFFFLL); + +#undef CMT +#define CMT " (check cumulative saturation)" + TEST_VQSHRUN_HIGH_N(int, s, 16, 8, 8, 16, 1); + TEST_VQSHRUN_HIGH_N(int, s, 32, 16, 4, 8, 1); + TEST_VQSHRUN_HIGH_N(int, s, 64, 32, 2, 4, 1); + + CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_max_sh1, CMT); + CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_max_sh1, CMT); + CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_max_sh1, CMT); + + + /* Fill input vector with positive values, to check normal case. */ + VDUP(vector1, , uint, u, 8, 8, 0x12); + VDUP(vector1, , uint, u, 16, 4, 0x4321); + VDUP(vector1, , uint, u, 32, 2, 0xDEADBEEF); + + VDUP(vector2, q, int, s, 16, 8, 0x1234); + VDUP(vector2, q, int, s, 32, 4, 0x87654321); + VDUP(vector2, q, int, s, 64, 2, 0xDEADBEEF); + +#undef CMT +#define CMT "" + TEST_VQSHRUN_HIGH_N(int, s, 16, 8, 8, 16, 6); + TEST_VQSHRUN_HIGH_N(int, s, 32, 16, 4, 8, 7); + TEST_VQSHRUN_HIGH_N(int, s, 64, 32, 2, 4, 8); + + CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected, CMT); + CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, CMT); + CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, CMT); +} + +int main (void) +{ + exec_vqshrun_high_n (); + return 0; +} diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_bf16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_bf16_indices_1.c new file mode 100644 index 0000000..7421dc6 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_bf16_indices_1.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */ +/* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ +/* { dg-add-options arm_v8_2a_bf16_neon } */ + +#include <arm_neon.h> + +void +f_vst2_lane_bf16 (bfloat16_t * p, bfloat16x4x2_t v) +{ + /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */ + vst2_lane_bf16 (p, v, 4); + /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */ + vst2_lane_bf16 (p, v, -1); + return; +} diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_bf16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_bf16_indices_1.c new file mode 100644 index 0000000..92aecfc --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_bf16_indices_1.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */ +/* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ +/* { dg-add-options arm_v8_2a_bf16_neon } */ + +#include <arm_neon.h> + +void +f_vst2q_lane_bf16 (bfloat16_t * p, bfloat16x8x2_t v) +{ + /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */ + vst2q_lane_bf16 (p, v, 8); + /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */ + vst2q_lane_bf16 (p, v, -1); + return; +} diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_bf16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_bf16_indices_1.c new file mode 100644 index 0000000..5d1f4f4 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_bf16_indices_1.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */ +/* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ +/* { dg-add-options arm_v8_2a_bf16_neon } */ + +#include <arm_neon.h> + +void +f_vst3_lane_bf16 (bfloat16_t * p, bfloat16x4x3_t v) +{ + /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */ + vst3_lane_bf16 (p, v, 4); + /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */ + vst3_lane_bf16 (p, v, -1); + return; +} diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_bf16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_bf16_indices_1.c new file mode 100644 index 0000000..65592db --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_bf16_indices_1.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */ +/* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ +/* { dg-add-options arm_v8_2a_bf16_neon } */ + +#include <arm_neon.h> + +void +f_vst3q_lane_bf16 (bfloat16_t * p, bfloat16x8x3_t v) +{ + /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */ + vst3q_lane_bf16 (p, v, 8); + /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */ + vst3q_lane_bf16 (p, v, -1); + return; +} diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_bf16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_bf16_indices_1.c new file mode 100644 index 0000000..8abd402 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_bf16_indices_1.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */ +/* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ +/* { dg-add-options arm_v8_2a_bf16_neon } */ + +#include <arm_neon.h> + +void +f_vst4_lane_bf16 (bfloat16_t * p, bfloat16x4x4_t v) +{ + /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */ + vst4_lane_bf16 (p, v, 4); + /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */ + vst4_lane_bf16 (p, v, -1); + return; +} diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_bf16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_bf16_indices_1.c new file mode 100644 index 0000000..7d4d4ea --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_bf16_indices_1.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */ +/* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ +/* { dg-add-options arm_v8_2a_bf16_neon } */ + +#include <arm_neon.h> + +void +f_vst4q_lane_bf16 (bfloat16_t * p, bfloat16x8x4_t v) +{ + /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */ + vst4q_lane_bf16 (p, v, 8); + /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */ + vst4q_lane_bf16 (p, v, -1); + return; +} diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vstX_lane.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vstX_lane.c index 3329e6b..45062d9 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vstX_lane.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vstX_lane.c @@ -476,7 +476,7 @@ void exec_vstX_lane (void) TEST_ALL_EXTRA_CHUNKS(2, 1); #undef CMT -#define CMT " chunk 1" +#define CMT " (chunk 1)" CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_st2_1, CMT); CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_st2_1, CMT); CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_st2_1, CMT); diff --git a/gcc/testsuite/gcc.target/aarch64/narrow_high-intrinsics.c b/gcc/testsuite/gcc.target/aarch64/narrow_high-intrinsics.c index 8b8a630..07d7803 100644 --- a/gcc/testsuite/gcc.target/aarch64/narrow_high-intrinsics.c +++ b/gcc/testsuite/gcc.target/aarch64/narrow_high-intrinsics.c @@ -113,12 +113,12 @@ ONE (vmovn_high, uint32x4_t, uint32x2_t, uint64x2_t, u64) /* { dg-final { scan-assembler-times "raddhn2\\tv" 6} } */ /* { dg-final { scan-assembler-times "\\trshrn2 v" 6} } */ /* { dg-final { scan-assembler-times "\\tshrn2 v" 6} } */ -/* { dg-final { scan-assembler-times "sqshrun2 v" 3} } */ -/* { dg-final { scan-assembler-times "sqrshrun2 v" 3} } */ -/* { dg-final { scan-assembler-times "sqshrn2 v" 3} } */ -/* { dg-final { scan-assembler-times "uqshrn2 v" 3} } */ -/* { dg-final { scan-assembler-times "sqrshrn2 v" 3} } */ -/* { dg-final { scan-assembler-times "uqrshrn2 v" 3} } */ +/* { dg-final { scan-assembler-times "sqshrun2\\tv" 3} } */ +/* { dg-final { scan-assembler-times "sqrshrun2\\tv" 3} } */ +/* { dg-final { scan-assembler-times "sqshrn2\\tv" 3} } */ +/* { dg-final { scan-assembler-times "uqshrn2\\tv" 3} } */ +/* { dg-final { scan-assembler-times "sqrshrn2\\tv" 3} } */ +/* { dg-final { scan-assembler-times "uqrshrn2\\tv" 3} } */ /* { dg-final { scan-assembler-times "uqxtn2 v" 3} } */ /* { dg-final { scan-assembler-times "sqxtn2 v" 3} } */ /* { dg-final { scan-assembler-times "sqxtun2 v" 3} } */ diff --git a/gcc/testsuite/gcc.target/aarch64/pr97535.c b/gcc/testsuite/gcc.target/aarch64/pr97535.c new file mode 100644 index 0000000..7d4db48 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/pr97535.c @@ -0,0 +1,16 @@ +/* { dg-do compile { target { ! ilp32 } } } */ + +#include <string.h> + +#define SIZE 2181038080 + +extern char raw_buffer[SIZE]; + +void setRaw(const void *raw) +{ + memcpy(raw_buffer, raw, SIZE); +} + +/* At any optimization level this should be a function call + and not inlined. */ +/* { dg-final { scan-assembler "bl\tmemcpy" } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/pr97638.c b/gcc/testsuite/gcc.target/aarch64/pr97638.c new file mode 100644 index 0000000..e5869e8 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/pr97638.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mbranch-protection=bti" } */ + +char *foo (const char *s, const int c) +{ + const char *p = 0; + for (;;) + { + if (*s == c) + p = s; + if (p != 0 || *s++ == 0) + break; + } + return (char *)p; +} + +/* { dg-final { scan-assembler "hint\t34" } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr97546.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr97546.c new file mode 100644 index 0000000..25707cd --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr97546.c @@ -0,0 +1,22 @@ +/* { dg-options "-O2" } */ + +#include <arm_sve.h> + +static svbool_t visinf_vo_vf(svfloat32_t d) +{ + return svcmpeq_n_f32 (svptrue_b8 (), + svabs_f32_x (svptrue_b8 (), d), + __builtin_inff ()); +} + +const svint32_t _ZGVsNxv_ilogbf(svfloat32_t d) +{ + svint32_t e = svreinterpret_s32_f32 (svdup_n_f32 (0.0f)); + e = svsel_s32 (svcmpne_f32 (svptrue_b8(), d, d), + svdup_n_s32 (2147483647), + e); + e = svsel_s32 (visinf_vo_vf (d), + svdup_n_s32 (0x7fffffff), + e); + return e; +} diff --git a/gcc/testsuite/gcc.target/aarch64/sve/dup_lane_2.c b/gcc/testsuite/gcc.target/aarch64/sve/dup_lane_2.c new file mode 100644 index 0000000..3d74ff9 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/dup_lane_2.c @@ -0,0 +1,331 @@ +/* { dg-do assemble { target aarch64_asm_sve_ok } } */ +/* { dg-options "-O -msve-vector-bits=2048 -mlittle-endian --save-temps" } */ +/* { dg-final { check-function-bodies "**" "" } } */ + +typedef unsigned char v128qi __attribute__((vector_size(128))); +typedef unsigned char v64qi __attribute__((vector_size(64))); +typedef unsigned char v32qi __attribute__((vector_size(32))); +typedef unsigned short v64hi __attribute__((vector_size(128))); +typedef unsigned short v32hi __attribute__((vector_size(64))); +typedef _Float16 v64hf __attribute__((vector_size(128))); +typedef _Float16 v32hf __attribute__((vector_size(64))); +typedef __bf16 v64bf __attribute__((vector_size(128))); +typedef __bf16 v32bf __attribute__((vector_size(64))); +typedef unsigned int v32si __attribute__((vector_size(128))); +typedef float v32sf __attribute__((vector_size(128))); + +#define PERM0(B) B, B +#define PERM1(B) PERM0 (B), PERM0 (B) +#define PERM2(B) PERM1 (B), PERM1 (B) +#define PERM3(B) PERM2 (B), PERM2 (B) +#define PERM4(B) PERM3 (B), PERM3 (B) +#define PERM5(B) PERM4 (B), PERM4 (B) +#define PERM6(B) PERM5 (B), PERM5 (B) + +/* +** qi_dup_h_1: +** ptrue (p[0-7])\.b, vl256 +** ld1b (z[0-9]+)\.h, \1/z, \[x0\] +** dup (z[0-9]+)\.h, \2\.h\[1\] +** st1b \3\.h, \1, \[x8\] +** ret +*/ +v128qi +qi_dup_h_1 (v128qi x) +{ + return __builtin_shuffle (x, x, (v128qi) { PERM6 (1) }); +} + +/* +** qi_dup_h_31: +** ptrue (p[0-7])\.b, vl256 +** ld1b (z[0-9]+)\.h, \1/z, \[x0\] +** dup (z[0-9]+)\.h, \2\.h\[31\] +** st1b \3\.h, \1, \[x8\] +** ret +*/ +v128qi +qi_dup_h_31 (v128qi x) +{ + return __builtin_shuffle (x, x, (v128qi) { PERM6 (31) }); +} + +/* +** qi_dup_s_1: +** ptrue (p[0-7])\.b, vl256 +** ld1b (z[0-9]+)\.s, \1/z, \[x0\] +** dup (z[0-9]+)\.s, \2\.s\[1\] +** st1b \3\.s, \1, \[x8\] +** ret +*/ +v64qi +qi_dup_s_1 (v64qi x) +{ + return __builtin_shuffle (x, x, (v64qi) { PERM5 (1) }); +} + +/* +** qi_dup_s_15: +** ptrue (p[0-7])\.b, vl256 +** ld1b (z[0-9]+)\.s, \1/z, \[x0\] +** dup (z[0-9]+)\.s, \2\.s\[15\] +** st1b \3\.s, \1, \[x8\] +** ret +*/ +v64qi +qi_dup_s_15 (v64qi x) +{ + return __builtin_shuffle (x, x, (v64qi) { PERM5 (15) }); +} + +/* +** qi_dup_d_1: +** ptrue (p[0-7])\.b, vl256 +** ld1b (z[0-9]+)\.d, \1/z, \[x0\] +** dup (z[0-9]+)\.d, \2\.d\[1\] +** st1b \3\.d, \1, \[x8\] +** ret +*/ +v32qi +qi_dup_d_1 (v32qi x) +{ + return __builtin_shuffle (x, x, (v32qi) { PERM4 (1) }); +} + +/* +** qi_dup_d_7: +** ptrue (p[0-7])\.b, vl256 +** ld1b (z[0-9]+)\.d, \1/z, \[x0\] +** dup (z[0-9]+)\.d, \2\.d\[7\] +** st1b \3\.d, \1, \[x8\] +** ret +*/ +v32qi +qi_dup_d_7 (v32qi x) +{ + return __builtin_shuffle (x, x, (v32qi) { PERM4 (7) }); +} + +/* +** hi_dup_s_1: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** dup (z[0-9]+)\.s, \2\.s\[1\] +** st1h \3\.s, \1, \[x8\] +** ret +*/ +v64hi +hi_dup_s_1 (v64hi x) +{ + return __builtin_shuffle (x, x, (v64hi) { PERM5 (1) }); +} + +/* +** hi_dup_s_15: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** dup (z[0-9]+)\.s, \2\.s\[15\] +** st1h \3\.s, \1, \[x8\] +** ret +*/ +v64hi +hi_dup_s_15 (v64hi x) +{ + return __builtin_shuffle (x, x, (v64hi) { PERM5 (15) }); +} + +/* +** hf_dup_s_1: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** dup (z[0-9]+)\.s, \2\.s\[1\] +** st1h \3\.s, \1, \[x8\] +** ret +*/ +v64hf +hf_dup_s_1 (v64hf x) +{ + return __builtin_shuffle (x, x, (v64hi) { PERM5 (1) }); +} + +/* +** hf_dup_s_11: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** dup (z[0-9]+)\.s, \2\.s\[11\] +** st1h \3\.s, \1, \[x8\] +** ret +*/ +v64hf +hf_dup_s_11 (v64hf x) +{ + return __builtin_shuffle (x, x, (v64hi) { PERM5 (11) }); +} + +/* +** bf_dup_s_1: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** dup (z[0-9]+)\.s, \2\.s\[1\] +** st1h \3\.s, \1, \[x8\] +** ret +*/ +v64bf +bf_dup_s_1 (v64bf x) +{ + return __builtin_shuffle (x, x, (v64hi) { PERM5 (1) }); +} + +/* +** bf_dup_s_13: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** dup (z[0-9]+)\.s, \2\.s\[13\] +** st1h \3\.s, \1, \[x8\] +** ret +*/ +v64bf +bf_dup_s_13 (v64bf x) +{ + return __builtin_shuffle (x, x, (v64hi) { PERM5 (13) }); +} + +/* +** hi_dup_d_1: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** dup (z[0-9]+)\.d, \2\.d\[1\] +** st1h \3\.d, \1, \[x8\] +** ret +*/ +v32hi +hi_dup_d_1 (v32hi x) +{ + return __builtin_shuffle (x, x, (v32hi) { PERM4 (1) }); +} + +/* +** hi_dup_d_7: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** dup (z[0-9]+)\.d, \2\.d\[7\] +** st1h \3\.d, \1, \[x8\] +** ret +*/ +v32hi +hi_dup_d_7 (v32hi x) +{ + return __builtin_shuffle (x, x, (v32hi) { PERM4 (7) }); +} + +/* +** hf_dup_d_1: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** dup (z[0-9]+)\.d, \2\.d\[1\] +** st1h \3\.d, \1, \[x8\] +** ret +*/ +v32hf +hf_dup_d_1 (v32hf x) +{ + return __builtin_shuffle (x, x, (v32hi) { PERM4 (1) }); +} + +/* +** hf_dup_d_5: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** dup (z[0-9]+)\.d, \2\.d\[5\] +** st1h \3\.d, \1, \[x8\] +** ret +*/ +v32hf +hf_dup_d_5 (v32hf x) +{ + return __builtin_shuffle (x, x, (v32hi) { PERM4 (5) }); +} + +/* +** bf_dup_d_1: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** dup (z[0-9]+)\.d, \2\.d\[1\] +** st1h \3\.d, \1, \[x8\] +** ret +*/ +v32bf +bf_dup_d_1 (v32bf x) +{ + return __builtin_shuffle (x, x, (v32hi) { PERM4 (1) }); +} + +/* +** bf_dup_d_6: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** dup (z[0-9]+)\.d, \2\.d\[6\] +** st1h \3\.d, \1, \[x8\] +** ret +*/ +v32bf +bf_dup_d_6 (v32bf x) +{ + return __builtin_shuffle (x, x, (v32hi) { PERM4 (6) }); +} + +/* +** si_dup_d_1: +** ptrue (p[0-7])\.b, vl256 +** ld1w (z[0-9]+)\.d, \1/z, \[x0\] +** dup (z[0-9]+)\.d, \2\.d\[1\] +** st1w \3\.d, \1, \[x8\] +** ret +*/ +v32si +si_dup_d_1 (v32si x) +{ + return __builtin_shuffle (x, x, (v32si) { PERM4 (1) }); +} + +/* +** si_dup_d_7: +** ptrue (p[0-7])\.b, vl256 +** ld1w (z[0-9]+)\.d, \1/z, \[x0\] +** dup (z[0-9]+)\.d, \2\.d\[7\] +** st1w \3\.d, \1, \[x8\] +** ret +*/ +v32si +si_dup_d_7 (v32si x) +{ + return __builtin_shuffle (x, x, (v32si) { PERM4 (7) }); +} + +/* +** sf_dup_d_1: +** ptrue (p[0-7])\.b, vl256 +** ld1w (z[0-9]+)\.d, \1/z, \[x0\] +** dup (z[0-9]+)\.d, \2\.d\[1\] +** st1w \3\.d, \1, \[x8\] +** ret +*/ +v32sf +sf_dup_d_1 (v32sf x) +{ + return __builtin_shuffle (x, x, (v32si) { PERM4 (1) }); +} + +/* +** sf_dup_d_7: +** ptrue (p[0-7])\.b, vl256 +** ld1w (z[0-9]+)\.d, \1/z, \[x0\] +** dup (z[0-9]+)\.d, \2\.d\[7\] +** st1w \3\.d, \1, \[x8\] +** ret +*/ +v32sf +sf_dup_d_7 (v32sf x) +{ + return __builtin_shuffle (x, x, (v32si) { PERM4 (7) }); +} diff --git a/gcc/testsuite/gcc.target/aarch64/sve/dup_lane_3.c b/gcc/testsuite/gcc.target/aarch64/sve/dup_lane_3.c new file mode 100644 index 0000000..50f73a1 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/dup_lane_3.c @@ -0,0 +1,90 @@ +/* { dg-do assemble { target aarch64_asm_sve_ok } } */ +/* { dg-options "-O -msve-vector-bits=2048 -mlittle-endian --save-temps" } */ + +typedef unsigned char v128qi __attribute__((vector_size(128))); +typedef unsigned char v64qi __attribute__((vector_size(64))); +typedef unsigned char v32qi __attribute__((vector_size(32))); +typedef unsigned short v64hi __attribute__((vector_size(128))); +typedef unsigned short v32hi __attribute__((vector_size(64))); +typedef _Float16 v64hf __attribute__((vector_size(128))); +typedef _Float16 v32hf __attribute__((vector_size(64))); +typedef __bf16 v64bf __attribute__((vector_size(128))); +typedef __bf16 v32bf __attribute__((vector_size(64))); +typedef unsigned int v32si __attribute__((vector_size(128))); +typedef float v32sf __attribute__((vector_size(128))); + +#define PERM0(B) B, B +#define PERM1(B) PERM0 (B), PERM0 (B) +#define PERM2(B) PERM1 (B), PERM1 (B) +#define PERM3(B) PERM2 (B), PERM2 (B) +#define PERM4(B) PERM3 (B), PERM3 (B) +#define PERM5(B) PERM4 (B), PERM4 (B) +#define PERM6(B) PERM5 (B), PERM5 (B) + +v128qi +qi_dup_h_32 (v128qi x) +{ + return __builtin_shuffle (x, x, (v128qi) { PERM6 (32) }); +} + +v64qi +qi_dup_s_16 (v64qi x) +{ + return __builtin_shuffle (x, x, (v64qi) { PERM5 (16) }); +} + +v32qi +qi_dup_d_8 (v32qi x) +{ + return __builtin_shuffle (x, x, (v32qi) { PERM4 (8) }); +} + +v64hi +hi_dup_s_16 (v64hi x) +{ + return __builtin_shuffle (x, x, (v64hi) { PERM5 (16) }); +} + +v64hf +hf_dup_s_16 (v64hf x) +{ + return __builtin_shuffle (x, x, (v64hi) { PERM5 (16) }); +} + +v64bf +bf_dup_s_16 (v64bf x) +{ + return __builtin_shuffle (x, x, (v64hi) { PERM5 (16) }); +} + +v32hi +hi_dup_d_8 (v32hi x) +{ + return __builtin_shuffle (x, x, (v32hi) { PERM4 (8) }); +} + +v32hf +hf_dup_d_8 (v32hf x) +{ + return __builtin_shuffle (x, x, (v32hi) { PERM4 (8) }); +} + +v32bf +bf_dup_d_8 (v32bf x) +{ + return __builtin_shuffle (x, x, (v32hi) { PERM4 (8) }); +} + +v32si +si_dup_d_8 (v32si x) +{ + return __builtin_shuffle (x, x, (v32si) { PERM4 (8) }); +} + +v32sf +sf_dup_d_8 (v32sf x) +{ + return __builtin_shuffle (x, x, (v32si) { PERM4 (8) }); +} + +/* { dg-final { scan-assembler-not {\tdup\tz} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/ext_4.c b/gcc/testsuite/gcc.target/aarch64/sve/ext_4.c new file mode 100644 index 0000000..4637b5c --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/ext_4.c @@ -0,0 +1,353 @@ +/* { dg-do assemble { target aarch64_asm_sve_ok } } */ +/* { dg-options "-O -msve-vector-bits=2048 -mlittle-endian --save-temps" } */ +/* { dg-final { check-function-bodies "**" "" } } */ + +typedef unsigned char v128qi __attribute__((vector_size(128))); +typedef unsigned char v64qi __attribute__((vector_size(64))); +typedef unsigned char v32qi __attribute__((vector_size(32))); +typedef unsigned short v64hi __attribute__((vector_size(128))); +typedef unsigned short v32hi __attribute__((vector_size(64))); +typedef _Float16 v64hf __attribute__((vector_size(128))); +typedef _Float16 v32hf __attribute__((vector_size(64))); +typedef __bf16 v64bf __attribute__((vector_size(128))); +typedef __bf16 v32bf __attribute__((vector_size(64))); +typedef unsigned int v32si __attribute__((vector_size(128))); +typedef float v32sf __attribute__((vector_size(128))); + +#define PERM0(B) B, B + 1 +#define PERM1(B) PERM0 (B), PERM0 (B + 2) +#define PERM2(B) PERM1 (B), PERM1 (B + 4) +#define PERM3(B) PERM2 (B), PERM2 (B + 8) +#define PERM4(B) PERM3 (B), PERM3 (B + 16) +#define PERM5(B) PERM4 (B), PERM4 (B + 32) +#define PERM6(B) PERM5 (B), PERM5 (B + 64) + +/* +** qi_ext_h_1: +** ptrue (p[0-7])\.b, vl256 +** ld1b (z[0-9]+)\.h, \1/z, \[x0\] +** ext \2\.b, \2\.b, \2\.b, #2 +** st1b \2\.h, \1, \[x8\] +** ret +*/ +v128qi +qi_ext_h_1 (v128qi x) +{ + return __builtin_shuffle (x, x, (v128qi) { PERM6 (1) }); +} + +/* +** qi_ext_h_1_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1b (z[0-9]+)\.h, \1/z, \[x1\] +** ld1b (z[0-9]+)\.h, \1/z, \[x0\] +** ext \3\.b, \3\.b, \2\.b, #2 +** st1b \3\.h, \1, \[x8\] +** | +** ld1b (z[0-9]+)\.h, \1/z, \[x0\] +** ld1b (z[0-9]+)\.h, \1/z, \[x1\] +** ext \4\.b, \4\.b, \5\.b, #2 +** st1b \4\.h, \1, \[x8\] +** ) +** ret +*/ +v128qi +qi_ext_h_1_two_op (v128qi x, v128qi y) +{ + return __builtin_shuffle (x, y, (v128qi) { PERM6 (1) }); +} + +/* +** qi_ext_h_127: +** ptrue (p[0-7])\.b, vl256 +** ld1b (z[0-9]+)\.h, \1/z, \[x0\] +** ext \2\.b, \2\.b, \2\.b, #254 +** st1b \2\.h, \1, \[x8\] +** ret +*/ +v128qi +qi_ext_h_127 (v128qi x) +{ + return __builtin_shuffle (x, x, (v128qi) { PERM6 (127) }); +} + +/* +** qi_ext_s_1: +** ptrue (p[0-7])\.b, vl256 +** ld1b (z[0-9]+)\.s, \1/z, \[x0\] +** ext \2\.b, \2\.b, \2\.b, #4 +** st1b \2\.s, \1, \[x8\] +** ret +*/ +v64qi +qi_ext_s_1 (v64qi x) +{ + return __builtin_shuffle (x, x, (v64qi) { PERM5 (1) }); +} + +/* +** qi_ext_s_63: +** ptrue (p[0-7])\.b, vl256 +** ld1b (z[0-9]+)\.s, \1/z, \[x0\] +** ext \2\.b, \2\.b, \2\.b, #252 +** st1b \2\.s, \1, \[x8\] +** ret +*/ +v64qi +qi_ext_s_63 (v64qi x) +{ + return __builtin_shuffle (x, x, (v64qi) { PERM5 (63) }); +} + +/* +** qi_ext_d_1: +** ptrue (p[0-7])\.b, vl256 +** ld1b (z[0-9]+)\.d, \1/z, \[x0\] +** ext \2\.b, \2\.b, \2\.b, #8 +** st1b \2\.d, \1, \[x8\] +** ret +*/ +v32qi +qi_ext_d_1 (v32qi x) +{ + return __builtin_shuffle (x, x, (v32qi) { PERM4 (1) }); +} + +/* +** qi_ext_d_31: +** ptrue (p[0-7])\.b, vl256 +** ld1b (z[0-9]+)\.d, \1/z, \[x0\] +** ext \2\.b, \2\.b, \2\.b, #248 +** st1b \2\.d, \1, \[x8\] +** ret +*/ +v32qi +qi_ext_d_31 (v32qi x) +{ + return __builtin_shuffle (x, x, (v32qi) { PERM4 (31) }); +} + +/* +** hi_ext_s_1: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** ext \2\.b, \2\.b, \2\.b, #4 +** st1h \2\.s, \1, \[x8\] +** ret +*/ +v64hi +hi_ext_s_1 (v64hi x) +{ + return __builtin_shuffle (x, x, (v64hi) { PERM5 (1) }); +} + +/* +** hi_ext_s_63: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** ext \2\.b, \2\.b, \2\.b, #252 +** st1h \2\.s, \1, \[x8\] +** ret +*/ +v64hi +hi_ext_s_63 (v64hi x) +{ + return __builtin_shuffle (x, x, (v64hi) { PERM5 (63) }); +} + +/* +** hf_ext_s_1: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** ext \2\.b, \2\.b, \2\.b, #4 +** st1h \2\.s, \1, \[x8\] +** ret +*/ +v64hf +hf_ext_s_1 (v64hf x) +{ + return __builtin_shuffle (x, x, (v64hi) { PERM5 (1) }); +} + +/* +** hf_ext_s_60: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** ext \2\.b, \2\.b, \2\.b, #240 +** st1h \2\.s, \1, \[x8\] +** ret +*/ +v64hf +hf_ext_s_60 (v64hf x) +{ + return __builtin_shuffle (x, x, (v64hi) { PERM5 (60) }); +} + +/* +** bf_ext_s_1: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** ext \2\.b, \2\.b, \2\.b, #4 +** st1h \2\.s, \1, \[x8\] +** ret +*/ +v64bf +bf_ext_s_1 (v64bf x) +{ + return __builtin_shuffle (x, x, (v64hi) { PERM5 (1) }); +} + +/* +** bf_ext_s_40: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** ext \2\.b, \2\.b, \2\.b, #160 +** st1h \2\.s, \1, \[x8\] +** ret +*/ +v64bf +bf_ext_s_40 (v64bf x) +{ + return __builtin_shuffle (x, x, (v64hi) { PERM5 (40) }); +} + +/* +** hi_ext_d_1: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** ext \2\.b, \2\.b, \2\.b, #8 +** st1h \2\.d, \1, \[x8\] +** ret +*/ +v32hi +hi_ext_d_1 (v32hi x) +{ + return __builtin_shuffle (x, x, (v32hi) { PERM4 (1) }); +} + +/* +** hi_ext_d_31: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** ext \2\.b, \2\.b, \2\.b, #248 +** st1h \2\.d, \1, \[x8\] +** ret +*/ +v32hi +hi_ext_d_31 (v32hi x) +{ + return __builtin_shuffle (x, x, (v32hi) { PERM4 (31) }); +} + +/* +** hf_ext_d_1: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** ext \2\.b, \2\.b, \2\.b, #8 +** st1h \2\.d, \1, \[x8\] +** ret +*/ +v32hf +hf_ext_d_1 (v32hf x) +{ + return __builtin_shuffle (x, x, (v32hi) { PERM4 (1) }); +} + +/* +** hf_ext_d_18: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** ext \2\.b, \2\.b, \2\.b, #144 +** st1h \2\.d, \1, \[x8\] +** ret +*/ +v32hf +hf_ext_d_18 (v32hf x) +{ + return __builtin_shuffle (x, x, (v32hi) { PERM4 (18) }); +} + +/* +** bf_ext_d_1: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** ext \2\.b, \2\.b, \2\.b, #8 +** st1h \2\.d, \1, \[x8\] +** ret +*/ +v32bf +bf_ext_d_1 (v32bf x) +{ + return __builtin_shuffle (x, x, (v32hi) { PERM4 (1) }); +} + +/* +** bf_ext_d_7: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** ext \2\.b, \2\.b, \2\.b, #56 +** st1h \2\.d, \1, \[x8\] +** ret +*/ +v32bf +bf_ext_d_7 (v32bf x) +{ + return __builtin_shuffle (x, x, (v32hi) { PERM4 (7) }); +} + +/* +** si_ext_d_1: +** ptrue (p[0-7])\.b, vl256 +** ld1w (z[0-9]+)\.d, \1/z, \[x0\] +** ext \2\.b, \2\.b, \2\.b, #8 +** st1w \2\.d, \1, \[x8\] +** ret +*/ +v32si +si_ext_d_1 (v32si x) +{ + return __builtin_shuffle (x, x, (v32si) { PERM4 (1) }); +} + +/* +** si_ext_d_31: +** ptrue (p[0-7])\.b, vl256 +** ld1w (z[0-9]+)\.d, \1/z, \[x0\] +** ext \2\.b, \2\.b, \2\.b, #248 +** st1w \2\.d, \1, \[x8\] +** ret +*/ +v32si +si_ext_d_31 (v32si x) +{ + return __builtin_shuffle (x, x, (v32si) { PERM4 (31) }); +} + +/* +** sf_ext_d_1: +** ptrue (p[0-7])\.b, vl256 +** ld1w (z[0-9]+)\.d, \1/z, \[x0\] +** ext \2\.b, \2\.b, \2\.b, #8 +** st1w \2\.d, \1, \[x8\] +** ret +*/ +v32sf +sf_ext_d_1 (v32sf x) +{ + return __builtin_shuffle (x, x, (v32si) { PERM4 (1) }); +} + +/* +** sf_ext_d_31: +** ptrue (p[0-7])\.b, vl256 +** ld1w (z[0-9]+)\.d, \1/z, \[x0\] +** ext \2\.b, \2\.b, \2\.b, #248 +** st1w \2\.d, \1, \[x8\] +** ret +*/ +v32sf +sf_ext_d_31 (v32sf x) +{ + return __builtin_shuffle (x, x, (v32si) { PERM4 (31) }); +} diff --git a/gcc/testsuite/gcc.target/aarch64/sve/rev_2.c b/gcc/testsuite/gcc.target/aarch64/sve/rev_2.c new file mode 100644 index 0000000..417da37 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/rev_2.c @@ -0,0 +1,177 @@ +/* { dg-do assemble { target aarch64_asm_sve_ok } } */ +/* { dg-options "-O -msve-vector-bits=2048 -mlittle-endian --save-temps" } */ +/* { dg-final { check-function-bodies "**" "" } } */ + +typedef unsigned char v128qi __attribute__((vector_size(128))); +typedef unsigned char v64qi __attribute__((vector_size(64))); +typedef unsigned char v32qi __attribute__((vector_size(32))); +typedef unsigned short v64hi __attribute__((vector_size(128))); +typedef unsigned short v32hi __attribute__((vector_size(64))); +typedef _Float16 v64hf __attribute__((vector_size(128))); +typedef _Float16 v32hf __attribute__((vector_size(64))); +typedef __bf16 v64bf __attribute__((vector_size(128))); +typedef __bf16 v32bf __attribute__((vector_size(64))); +typedef unsigned int v32si __attribute__((vector_size(128))); +typedef float v32sf __attribute__((vector_size(128))); + +#define PERM0(B) B, B - 1 +#define PERM1(B) PERM0 (B), PERM0 (B - 2) +#define PERM2(B) PERM1 (B), PERM1 (B - 4) +#define PERM3(B) PERM2 (B), PERM2 (B - 8) +#define PERM4(B) PERM3 (B), PERM3 (B - 16) +#define PERM5(B) PERM4 (B), PERM4 (B - 32) +#define PERM6(B) PERM5 (B), PERM5 (B - 64) + +/* +** qi_rev_h: +** ptrue (p[0-7])\.b, vl256 +** ld1b (z[0-9]+)\.h, \1/z, \[x0\] +** rev (z[0-9]+)\.h, \2\.h +** st1b \3\.h, \1, \[x8\] +** ret +*/ +v128qi +qi_rev_h (v128qi x) +{ + return __builtin_shuffle (x, x, (v128qi) { PERM6 (127) }); +} + +/* +** qi_rev_s: +** ptrue (p[0-7])\.b, vl256 +** ld1b (z[0-9]+)\.s, \1/z, \[x0\] +** rev (z[0-9]+)\.s, \2\.s +** st1b \3\.s, \1, \[x8\] +** ret +*/ +v64qi +qi_rev_s (v64qi x) +{ + return __builtin_shuffle (x, x, (v64qi) { PERM5 (63) }); +} + +/* +** qi_rev_d: +** ptrue (p[0-7])\.b, vl256 +** ld1b (z[0-9]+)\.d, \1/z, \[x0\] +** rev (z[0-9]+)\.d, \2\.d +** st1b \3\.d, \1, \[x8\] +** ret +*/ +v32qi +qi_rev_d (v32qi x) +{ + return __builtin_shuffle (x, x, (v32qi) { PERM4 (31) }); +} + +/* +** hi_rev_s: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** rev (z[0-9]+)\.s, \2\.s +** st1h \3\.s, \1, \[x8\] +** ret +*/ +v64hi +hi_rev_s (v64hi x) +{ + return __builtin_shuffle (x, x, (v64hi) { PERM5 (63) }); +} + +/* +** hf_rev_s: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** rev (z[0-9]+)\.s, \2\.s +** st1h \3\.s, \1, \[x8\] +** ret +*/ +v64hf +hf_rev_s (v64hf x) +{ + return __builtin_shuffle (x, x, (v64hi) { PERM5 (63) }); +} + +/* +** bf_rev_s: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** rev (z[0-9]+)\.s, \2\.s +** st1h \3\.s, \1, \[x8\] +** ret +*/ +v64bf +bf_rev_s (v64bf x) +{ + return __builtin_shuffle (x, x, (v64hi) { PERM5 (63) }); +} + +/* +** hi_rev_d: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** rev (z[0-9]+)\.d, \2\.d +** st1h \3\.d, \1, \[x8\] +** ret +*/ +v32hi +hi_rev_d (v32hi x) +{ + return __builtin_shuffle (x, x, (v32hi) { PERM4 (31) }); +} + +/* +** hf_rev_d: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** rev (z[0-9]+)\.d, \2\.d +** st1h \3\.d, \1, \[x8\] +** ret +*/ +v32hf +hf_rev_d (v32hf x) +{ + return __builtin_shuffle (x, x, (v32hi) { PERM4 (31) }); +} + +/* +** bf_rev_d: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** rev (z[0-9]+)\.d, \2\.d +** st1h \3\.d, \1, \[x8\] +** ret +*/ +v32bf +bf_rev_d (v32bf x) +{ + return __builtin_shuffle (x, x, (v32hi) { PERM4 (31) }); +} + +/* +** si_rev_d: +** ptrue (p[0-7])\.b, vl256 +** ld1w (z[0-9]+)\.d, \1/z, \[x0\] +** rev (z[0-9]+)\.d, \2\.d +** st1w \3\.d, \1, \[x8\] +** ret +*/ +v32si +si_rev_d (v32si x) +{ + return __builtin_shuffle (x, x, (v32si) { PERM4 (31) }); +} + +/* +** sf_rev_d: +** ptrue (p[0-7])\.b, vl256 +** ld1w (z[0-9]+)\.d, \1/z, \[x0\] +** rev (z[0-9]+)\.d, \2\.d +** st1w \3\.d, \1, \[x8\] +** ret +*/ +v32sf +sf_rev_d (v32sf x) +{ + return __builtin_shuffle (x, x, (v32si) { PERM4 (31) }); +} diff --git a/gcc/testsuite/gcc.target/aarch64/sve/revhw_1.c b/gcc/testsuite/gcc.target/aarch64/sve/revhw_1.c new file mode 100644 index 0000000..62de812 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/revhw_1.c @@ -0,0 +1,127 @@ +/* { dg-do assemble { target aarch64_asm_sve_ok } } */ +/* { dg-options "-O -msve-vector-bits=2048 -mlittle-endian --save-temps" } */ +/* { dg-final { check-function-bodies "**" "" } } */ + +typedef unsigned char v128qi __attribute__((vector_size(128))); +typedef unsigned char v64qi __attribute__((vector_size(64))); +typedef unsigned short v64hi __attribute__((vector_size(128))); +typedef _Float16 v64hf __attribute__((vector_size(128))); +typedef __bf16 v64bf __attribute__((vector_size(128))); + +#define PERM0(B) B + 1, B +#define PERM1(B) PERM0 (B), PERM0 (B + 2) +#define PERM2(B) PERM1 (B), PERM1 (B + 4) +#define PERM3(B) PERM2 (B), PERM2 (B + 8) +#define PERM4(B) PERM3 (B), PERM3 (B + 16) +#define PERM5(B) PERM4 (B), PERM4 (B + 32) +#define PERM6(B) PERM5 (B), PERM5 (B + 64) + +/* +** qi_revh_s: +** ptrue (p[0-7])\.b, vl256 +** ld1b (z[0-9]+)\.h, \1/z, \[x0\] +** revh (z[0-9]+)\.s, \1/m, \2\.s +** st1b \3\.h, \1, \[x8\] +** ret +*/ +v128qi +qi_revh_s (v128qi x) +{ + return __builtin_shuffle (x, x, (v128qi) { PERM6 (0) }); +} + +/* +** qi_revw_d: +** ptrue (p[0-7])\.b, vl256 +** ld1b (z[0-9]+)\.s, \1/z, \[x0\] +** revw (z[0-9]+)\.d, \1/m, \2\.d +** st1b \3\.s, \1, \[x8\] +** ret +*/ +v64qi +qi_revw_d (v64qi x) +{ + return __builtin_shuffle (x, x, (v64qi) { PERM5 (0) }); +} + +/* +** hi_revw_d: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** revw (z[0-9]+)\.d, \1/m, \2\.d +** st1h \3\.s, \1, \[x8\] +** ret +*/ +v64hi +hi_revw_d (v64hi x) +{ + return __builtin_shuffle (x, x, (v64hi) { PERM5 (0) }); +} + +/* +** hf_revw_d: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** revw (z[0-9]+)\.d, \1/m, \2\.d +** st1h \3\.s, \1, \[x8\] +** ret +*/ +v64hf +hf_revw_d (v64hf x) +{ + return __builtin_shuffle (x, x, (v64hi) { PERM5 (0) }); +} + +/* +** bf_revw_d: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** revw (z[0-9]+)\.d, \1/m, \2\.d +** st1h \3\.s, \1, \[x8\] +** ret +*/ +v64bf +bf_revw_d (v64bf x) +{ + return __builtin_shuffle (x, x, (v64hi) { PERM5 (0) }); +} + +#undef PERM1 +#define PERM1(B) PERM0 (B + 2), PERM0 (B) + +/* +** qi_revh_d: +** ptrue (p[0-7])\.b, vl256 +** ld1b (z[0-9]+)\.h, \1/z, \[x0\] +** revh (z[0-9]+)\.d, \1/m, \2\.d +** st1b \3\.h, \1, \[x8\] +** ret +*/ +v128qi +qi_revh_d (v128qi x) +{ + return __builtin_shuffle (x, x, (v128qi) { PERM6 (0) }); +} + +v64qi +qi_revw_q (v64qi x) +{ + return __builtin_shuffle (x, x, (v64qi) { PERM5 (0) }); +} + +v64hi +hi_revw_q (v64hi x) +{ + return __builtin_shuffle (x, x, (v64hi) { PERM5 (0) }); +} + +#undef PERM2 +#define PERM2(B) PERM0 (B + 4), PERM0 (B) + +v128qi +qi_revh_q (v128qi x) +{ + return __builtin_shuffle (x, x, (v128qi) { PERM6 (0) }); +} + +/* { dg-final { scan-assembler-times {\trev.\t} 6 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/revhw_2.c b/gcc/testsuite/gcc.target/aarch64/sve/revhw_2.c new file mode 100644 index 0000000..7634d01 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/revhw_2.c @@ -0,0 +1,127 @@ +/* { dg-do assemble { target aarch64_asm_sve_ok } } */ +/* { dg-options "-O -msve-vector-bits=2048 -mbig-endian --save-temps" } */ +/* { dg-final { check-function-bodies "**" "" } } */ + +typedef unsigned char v128qi __attribute__((vector_size(128))); +typedef unsigned char v64qi __attribute__((vector_size(64))); +typedef unsigned short v64hi __attribute__((vector_size(128))); +typedef _Float16 v64hf __attribute__((vector_size(128))); +typedef __bf16 v64bf __attribute__((vector_size(128))); + +#define PERM0(B) B + 1, B +#define PERM1(B) PERM0 (B), PERM0 (B + 2) +#define PERM2(B) PERM1 (B), PERM1 (B + 4) +#define PERM3(B) PERM2 (B), PERM2 (B + 8) +#define PERM4(B) PERM3 (B), PERM3 (B + 16) +#define PERM5(B) PERM4 (B), PERM4 (B + 32) +#define PERM6(B) PERM5 (B), PERM5 (B + 64) + +/* +** qi_revh_s: +** ptrue (p[0-7])\.b, vl256 +** ld1b (z[0-9]+)\.h, \1/z, \[x0\] +** revh (z[0-9]+)\.s, \1/m, \2\.s +** st1b \3\.h, \1, \[x8\] +** ret +*/ +v128qi +qi_revh_s (v128qi x) +{ + return __builtin_shuffle (x, x, (v128qi) { PERM6 (0) }); +} + +/* +** qi_revw_d: +** ptrue (p[0-7])\.b, vl256 +** ld1b (z[0-9]+)\.s, \1/z, \[x0\] +** revw (z[0-9]+)\.d, \1/m, \2\.d +** st1b \3\.s, \1, \[x8\] +** ret +*/ +v64qi +qi_revw_d (v64qi x) +{ + return __builtin_shuffle (x, x, (v64qi) { PERM5 (0) }); +} + +/* +** hi_revw_d: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** revw (z[0-9]+)\.d, \1/m, \2\.d +** st1h \3\.s, \1, \[x8\] +** ret +*/ +v64hi +hi_revw_d (v64hi x) +{ + return __builtin_shuffle (x, x, (v64hi) { PERM5 (0) }); +} + +/* +** hf_revw_d: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** revw (z[0-9]+)\.d, \1/m, \2\.d +** st1h \3\.s, \1, \[x8\] +** ret +*/ +v64hf +hf_revw_d (v64hf x) +{ + return __builtin_shuffle (x, x, (v64hi) { PERM5 (0) }); +} + +/* +** bf_revw_d: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** revw (z[0-9]+)\.d, \1/m, \2\.d +** st1h \3\.s, \1, \[x8\] +** ret +*/ +v64bf +bf_revw_d (v64bf x) +{ + return __builtin_shuffle (x, x, (v64hi) { PERM5 (0) }); +} + +#undef PERM1 +#define PERM1(B) PERM0 (B + 2), PERM0 (B) + +/* +** qi_revh_d: +** ptrue (p[0-7])\.b, vl256 +** ld1b (z[0-9]+)\.h, \1/z, \[x0\] +** revh (z[0-9]+)\.d, \1/m, \2\.d +** st1b \3\.h, \1, \[x8\] +** ret +*/ +v128qi +qi_revh_d (v128qi x) +{ + return __builtin_shuffle (x, x, (v128qi) { PERM6 (0) }); +} + +v64qi +qi_revw_q (v64qi x) +{ + return __builtin_shuffle (x, x, (v64qi) { PERM5 (0) }); +} + +v64hi +hi_revw_q (v64hi x) +{ + return __builtin_shuffle (x, x, (v64hi) { PERM5 (0) }); +} + +#undef PERM2 +#define PERM2(B) PERM0 (B + 4), PERM0 (B) + +v128qi +qi_revh_q (v128qi x) +{ + return __builtin_shuffle (x, x, (v128qi) { PERM6 (0) }); +} + +/* { dg-final { scan-assembler-times {\trev.\t} 6 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/slp_perm_8.c b/gcc/testsuite/gcc.target/aarch64/sve/slp_perm_8.c new file mode 100644 index 0000000..fe25000 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/slp_perm_8.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ftree-vectorize" } */ + +void +f (short *restrict s, signed char *restrict c) +{ + for (int i = 0; i < 8; i += 2) + { + s[i] = c[i]; + s[i + 1] = c[i]; + } +} + +/* Ideally this would use LD1SB, but currently we use LD1B and + sign-extend it after the permute. */ +/* { dg-final { scan-assembler {\tptrue\tp[0-7]\.h, vl6\n} } } */ +/* { dg-final { scan-assembler {\tld1s?b\tz[0-9]+\.h} } } */ +/* { dg-final { scan-assembler {\ttrn1\tz[0-9]+\.h,} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/trn1_2.c b/gcc/testsuite/gcc.target/aarch64/sve/trn1_2.c new file mode 100644 index 0000000..df059dd --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/trn1_2.c @@ -0,0 +1,403 @@ +/* { dg-do assemble { target aarch64_asm_sve_ok } } */ +/* { dg-options "-O -msve-vector-bits=2048 -mlittle-endian --save-temps" } */ +/* { dg-final { check-function-bodies "**" "" } } */ + +typedef unsigned char v128qi __attribute__((vector_size(128))); +typedef unsigned char v64qi __attribute__((vector_size(64))); +typedef unsigned char v32qi __attribute__((vector_size(32))); +typedef unsigned short v64hi __attribute__((vector_size(128))); +typedef unsigned short v32hi __attribute__((vector_size(64))); +typedef _Float16 v64hf __attribute__((vector_size(128))); +typedef _Float16 v32hf __attribute__((vector_size(64))); +typedef __bf16 v64bf __attribute__((vector_size(128))); +typedef __bf16 v32bf __attribute__((vector_size(64))); +typedef unsigned int v32si __attribute__((vector_size(128))); +typedef float v32sf __attribute__((vector_size(128))); + +#define PERM0(B, C) B, B + C +#define PERM1(B, C) PERM0 (B, C), PERM0 (B + 2, C) +#define PERM2(B, C) PERM1 (B, C), PERM1 (B + 4, C) +#define PERM3(B, C) PERM2 (B, C), PERM2 (B + 8, C) +#define PERM4(B, C) PERM3 (B, C), PERM3 (B + 16, C) +#define PERM5(B, C) PERM4 (B, C), PERM4 (B + 32, C) +#define PERM6(B, C) PERM5 (B, C), PERM5 (B + 64, C) + +/* +** qi_trn1_h_a: +** ptrue (p[0-7])\.b, vl256 +** ld1b (z[0-9]+)\.h, \1/z, \[x0\] +** trn1 (z[0-9]+)\.h, \2\.h, \2\.h +** st1b \3\.h, \1, \[x8\] +** ret +*/ +v128qi +qi_trn1_h_a (v128qi x) +{ + return __builtin_shuffle (x, x, (v128qi) { PERM6 (0, 0) }); +} + +/* +** qi_trn1_h_b: +** ptrue (p[0-7])\.b, vl256 +** ld1b (z[0-9]+)\.h, \1/z, \[x0\] +** trn1 (z[0-9]+)\.h, \2\.h, \2\.h +** st1b \3\.h, \1, \[x8\] +** ret +*/ +v128qi +qi_trn1_h_b (v128qi x) +{ + return __builtin_shuffle (x, x, (v128qi) { PERM6 (0, 128) }); +} + +/* +** qi_trn1_h_c: +** ptrue (p[0-7])\.b, vl256 +** ld1b (z[0-9]+)\.h, \1/z, \[x0\] +** trn1 (z[0-9]+)\.h, \2\.h, \2\.h +** st1b \3\.h, \1, \[x8\] +** ret +*/ +v128qi +qi_trn1_h_c (v128qi x) +{ + return __builtin_shuffle (x, x, (v128qi) { PERM6 (128, 0) }); +} + +/* +** qi_trn1_h_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1b (z[0-9]+)\.h, \1/z, \[x1\] +** ld1b (z[0-9]+)\.h, \1/z, \[x0\] +** trn1 \3\.h, \3\.h, \2\.h +** st1b \3\.h, \1, \[x8\] +** | +** ld1b (z[0-9]+)\.h, \1/z, \[x0\] +** ld1b (z[0-9]+)\.h, \1/z, \[x1\] +** trn1 \4\.h, \4\.h, \5\.h +** st1b \4\.h, \1, \[x8\] +** ) +** ret +*/ +v128qi +qi_trn1_h_two_op (v128qi x, v128qi y) +{ + return __builtin_shuffle (x, y, (v128qi) { PERM6 (0, 128) }); +} + +/* +** qi_trn1_s: +** ptrue (p[0-7])\.b, vl256 +** ld1b (z[0-9]+)\.s, \1/z, \[x0\] +** trn1 (z[0-9]+)\.s, \2\.s, \2\.s +** st1b \3\.s, \1, \[x8\] +** ret +*/ +v64qi +qi_trn1_s (v64qi x) +{ + return __builtin_shuffle (x, x, (v64qi) { PERM5 (0, 64) }); +} + +/* +** qi_trn1_s_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1b (z[0-9]+)\.s, \1/z, \[x1\] +** ld1b (z[0-9]+)\.s, \1/z, \[x0\] +** trn1 \3\.s, \3\.s, \2\.s +** st1b \3\.s, \1, \[x8\] +** | +** ld1b (z[0-9]+)\.s, \1/z, \[x0\] +** ld1b (z[0-9]+)\.s, \1/z, \[x1\] +** trn1 \4\.s, \4\.s, \5\.s +** st1b \4\.s, \1, \[x8\] +** ) +** ret +*/ +v64qi +qi_trn1_s_two_op (v64qi x, v64qi y) +{ + return __builtin_shuffle (x, y, (v64qi) { PERM5 (0, 64) }); +} + +/* +** qi_trn1_d: +** ptrue (p[0-7])\.b, vl256 +** ld1b (z[0-9]+)\.d, \1/z, \[x0\] +** trn1 (z[0-9]+)\.d, \2\.d, \2\.d +** st1b \3\.d, \1, \[x8\] +** ret +*/ +v32qi +qi_trn1_d (v32qi x) +{ + return __builtin_shuffle (x, x, (v32qi) { PERM4 (0, 32) }); +} + +/* +** qi_trn1_d_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1b (z[0-9]+)\.d, \1/z, \[x1\] +** ld1b (z[0-9]+)\.d, \1/z, \[x0\] +** trn1 \3\.d, \3\.d, \2\.d +** st1b \3\.d, \1, \[x8\] +** | +** ld1b (z[0-9]+)\.d, \1/z, \[x0\] +** ld1b (z[0-9]+)\.d, \1/z, \[x1\] +** trn1 \4\.d, \4\.d, \5\.d +** st1b \4\.d, \1, \[x8\] +** ) +** ret +*/ +v32qi +qi_trn1_d_two_op (v32qi x, v32qi y) +{ + return __builtin_shuffle (x, y, (v32qi) { PERM4 (0, 32) }); +} + +/* +** hi_trn1_s: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** trn1 (z[0-9]+)\.s, \2\.s, \2\.s +** st1h \3\.s, \1, \[x8\] +** ret +*/ +v64hi +hi_trn1_s (v64hi x) +{ + return __builtin_shuffle (x, x, (v64hi) { PERM5 (0, 64) }); +} + +/* +** hi_trn1_s_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1h (z[0-9]+)\.s, \1/z, \[x1\] +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** trn1 \3\.s, \3\.s, \2\.s +** st1h \3\.s, \1, \[x8\] +** | +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** ld1h (z[0-9]+)\.s, \1/z, \[x1\] +** trn1 \4\.s, \4\.s, \5\.s +** st1h \4\.s, \1, \[x8\] +** ) +** ret +*/ +v64hi +hi_trn1_s_two_op (v64hi x, v64hi y) +{ + return __builtin_shuffle (x, y, (v64hi) { PERM5 (0, 64) }); +} + +/* +** hf_trn1_s: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** trn1 (z[0-9]+)\.s, \2\.s, \2\.s +** st1h \3\.s, \1, \[x8\] +** ret +*/ +v64hf +hf_trn1_s (v64hf x) +{ + return __builtin_shuffle (x, x, (v64hi) { PERM5 (0, 64) }); +} + +/* +** hf_trn1_s_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1h (z[0-9]+)\.s, \1/z, \[x1\] +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** trn1 \3\.s, \3\.s, \2\.s +** st1h \3\.s, \1, \[x8\] +** | +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** ld1h (z[0-9]+)\.s, \1/z, \[x1\] +** trn1 \4\.s, \4\.s, \5\.s +** st1h \4\.s, \1, \[x8\] +** ) +** ret +*/ +v64hf +hf_trn1_s_two_op (v64hf x, v64hf y) +{ + return __builtin_shuffle (x, y, (v64hi) { PERM5 (0, 64) }); +} + +/* +** bf_trn1_s: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** trn1 (z[0-9]+)\.s, \2\.s, \2\.s +** st1h \3\.s, \1, \[x8\] +** ret +*/ +v64bf +bf_trn1_s (v64bf x) +{ + return __builtin_shuffle (x, x, (v64hi) { PERM5 (0, 64) }); +} + +/* +** bf_trn1_s_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1h (z[0-9]+)\.s, \1/z, \[x1\] +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** trn1 \3\.s, \3\.s, \2\.s +** st1h \3\.s, \1, \[x8\] +** | +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** ld1h (z[0-9]+)\.s, \1/z, \[x1\] +** trn1 \4\.s, \4\.s, \5\.s +** st1h \4\.s, \1, \[x8\] +** ) +** ret +*/ +v64bf +bf_trn1_s_two_op (v64bf x, v64bf y) +{ + return __builtin_shuffle (x, y, (v64hi) { PERM5 (0, 64) }); +} + +/* +** hi_trn1_d: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** trn1 (z[0-9]+)\.d, \2\.d, \2\.d +** st1h \3\.d, \1, \[x8\] +** ret +*/ +v32hi +hi_trn1_d (v32hi x) +{ + return __builtin_shuffle (x, x, (v32hi) { PERM4 (0, 32) }); +} + +/* +** hi_trn1_d_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1h (z[0-9]+)\.d, \1/z, \[x1\] +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** trn1 \3\.d, \3\.d, \2\.d +** st1h \3\.d, \1, \[x8\] +** | +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** ld1h (z[0-9]+)\.d, \1/z, \[x1\] +** trn1 \4\.d, \4\.d, \5\.d +** st1h \4\.d, \1, \[x8\] +** ) +** ret +*/ +v32hi +hi_trn1_d_two_op (v32hi x, v32hi y) +{ + return __builtin_shuffle (x, y, (v32hi) { PERM4 (0, 32) }); +} + +/* +** hf_trn1_d: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** trn1 (z[0-9]+)\.d, \2\.d, \2\.d +** st1h \3\.d, \1, \[x8\] +** ret +*/ +v32hf +hf_trn1_d (v32hf x) +{ + return __builtin_shuffle (x, x, (v32hi) { PERM4 (0, 32) }); +} + +/* +** hf_trn1_d_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1h (z[0-9]+)\.d, \1/z, \[x1\] +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** trn1 \3\.d, \3\.d, \2\.d +** st1h \3\.d, \1, \[x8\] +** | +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** ld1h (z[0-9]+)\.d, \1/z, \[x1\] +** trn1 \4\.d, \4\.d, \5\.d +** st1h \4\.d, \1, \[x8\] +** ) +** ret +*/ +v32hf +hf_trn1_d_two_op (v32hf x, v32hf y) +{ + return __builtin_shuffle (x, y, (v32hi) { PERM4 (0, 32) }); +} + +/* +** bf_trn1_d: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** trn1 (z[0-9]+)\.d, \2\.d, \2\.d +** st1h \3\.d, \1, \[x8\] +** ret +*/ +v32bf +bf_trn1_d (v32bf x) +{ + return __builtin_shuffle (x, x, (v32hi) { PERM4 (0, 32) }); +} + +/* +** bf_trn1_d_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1h (z[0-9]+)\.d, \1/z, \[x1\] +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** trn1 \3\.d, \3\.d, \2\.d +** st1h \3\.d, \1, \[x8\] +** | +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** ld1h (z[0-9]+)\.d, \1/z, \[x1\] +** trn1 \4\.d, \4\.d, \5\.d +** st1h \4\.d, \1, \[x8\] +** ) +** ret +*/ +v32bf +bf_trn1_d_two_op (v32bf x, v32bf y) +{ + return __builtin_shuffle (x, y, (v32hi) { PERM4 (0, 32) }); +} + +/* +** si_trn1_d: +** ptrue (p[0-7])\.b, vl256 +** ld1w (z[0-9]+)\.d, \1/z, \[x0\] +** trn1 (z[0-9]+)\.d, \2\.d, \2\.d +** st1w \3\.d, \1, \[x8\] +** ret +*/ +v32si +si_trn1_d (v32si x) +{ + return __builtin_shuffle (x, x, (v32si) { PERM4 (0, 32) }); +} + +/* +** sf_trn1_d: +** ptrue (p[0-7])\.b, vl256 +** ld1w (z[0-9]+)\.d, \1/z, \[x0\] +** trn1 (z[0-9]+)\.d, \2\.d, \2\.d +** st1w \3\.d, \1, \[x8\] +** ret +*/ +v32sf +sf_trn1_d (v32sf x) +{ + return __builtin_shuffle (x, x, (v32si) { PERM4 (0, 32) }); +} diff --git a/gcc/testsuite/gcc.target/aarch64/sve/trn2_2.c b/gcc/testsuite/gcc.target/aarch64/sve/trn2_2.c new file mode 100644 index 0000000..290ce8e --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/trn2_2.c @@ -0,0 +1,403 @@ +/* { dg-do assemble { target aarch64_asm_sve_ok } } */ +/* { dg-options "-O -msve-vector-bits=2048 -mlittle-endian --save-temps" } */ +/* { dg-final { check-function-bodies "**" "" } } */ + +typedef unsigned char v128qi __attribute__((vector_size(128))); +typedef unsigned char v64qi __attribute__((vector_size(64))); +typedef unsigned char v32qi __attribute__((vector_size(32))); +typedef unsigned short v64hi __attribute__((vector_size(128))); +typedef unsigned short v32hi __attribute__((vector_size(64))); +typedef _Float16 v64hf __attribute__((vector_size(128))); +typedef _Float16 v32hf __attribute__((vector_size(64))); +typedef __bf16 v64bf __attribute__((vector_size(128))); +typedef __bf16 v32bf __attribute__((vector_size(64))); +typedef unsigned int v32si __attribute__((vector_size(128))); +typedef float v32sf __attribute__((vector_size(128))); + +#define PERM0(B, C) B, B + C +#define PERM1(B, C) PERM0 (B, C), PERM0 (B + 2, C) +#define PERM2(B, C) PERM1 (B, C), PERM1 (B + 4, C) +#define PERM3(B, C) PERM2 (B, C), PERM2 (B + 8, C) +#define PERM4(B, C) PERM3 (B, C), PERM3 (B + 16, C) +#define PERM5(B, C) PERM4 (B, C), PERM4 (B + 32, C) +#define PERM6(B, C) PERM5 (B, C), PERM5 (B + 64, C) + +/* +** qi_trn2_h_a: +** ptrue (p[0-7])\.b, vl256 +** ld1b (z[0-9]+)\.h, \1/z, \[x0\] +** trn2 (z[0-9]+)\.h, \2\.h, \2\.h +** st1b \3\.h, \1, \[x8\] +** ret +*/ +v128qi +qi_trn2_h_a (v128qi x) +{ + return __builtin_shuffle (x, x, (v128qi) { PERM6 (1, 0) }); +} + +/* +** qi_trn2_h_b: +** ptrue (p[0-7])\.b, vl256 +** ld1b (z[0-9]+)\.h, \1/z, \[x0\] +** trn2 (z[0-9]+)\.h, \2\.h, \2\.h +** st1b \3\.h, \1, \[x8\] +** ret +*/ +v128qi +qi_trn2_h_b (v128qi x) +{ + return __builtin_shuffle (x, x, (v128qi) { PERM6 (1, 128) }); +} + +/* +** qi_trn2_h_c: +** ptrue (p[0-7])\.b, vl256 +** ld1b (z[0-9]+)\.h, \1/z, \[x0\] +** trn2 (z[0-9]+)\.h, \2\.h, \2\.h +** st1b \3\.h, \1, \[x8\] +** ret +*/ +v128qi +qi_trn2_h_c (v128qi x) +{ + return __builtin_shuffle (x, x, (v128qi) { PERM6 (1, 0) }); +} + +/* +** qi_trn2_h_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1b (z[0-9]+)\.h, \1/z, \[x1\] +** ld1b (z[0-9]+)\.h, \1/z, \[x0\] +** trn2 \3\.h, \3\.h, \2\.h +** st1b \3\.h, \1, \[x8\] +** | +** ld1b (z[0-9]+)\.h, \1/z, \[x0\] +** ld1b (z[0-9]+)\.h, \1/z, \[x1\] +** trn2 \4\.h, \4\.h, \5\.h +** st1b \4\.h, \1, \[x8\] +** ) +** ret +*/ +v128qi +qi_trn2_h_two_op (v128qi x, v128qi y) +{ + return __builtin_shuffle (x, y, (v128qi) { PERM6 (1, 128) }); +} + +/* +** qi_trn2_s: +** ptrue (p[0-7])\.b, vl256 +** ld1b (z[0-9]+)\.s, \1/z, \[x0\] +** trn2 (z[0-9]+)\.s, \2\.s, \2\.s +** st1b \3\.s, \1, \[x8\] +** ret +*/ +v64qi +qi_trn2_s (v64qi x) +{ + return __builtin_shuffle (x, x, (v64qi) { PERM5 (1, 64) }); +} + +/* +** qi_trn2_s_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1b (z[0-9]+)\.s, \1/z, \[x1\] +** ld1b (z[0-9]+)\.s, \1/z, \[x0\] +** trn2 \3\.s, \3\.s, \2\.s +** st1b \3\.s, \1, \[x8\] +** | +** ld1b (z[0-9]+)\.s, \1/z, \[x0\] +** ld1b (z[0-9]+)\.s, \1/z, \[x1\] +** trn2 \4\.s, \4\.s, \5\.s +** st1b \4\.s, \1, \[x8\] +** ) +** ret +*/ +v64qi +qi_trn2_s_two_op (v64qi x, v64qi y) +{ + return __builtin_shuffle (x, y, (v64qi) { PERM5 (1, 64) }); +} + +/* +** qi_trn2_d: +** ptrue (p[0-7])\.b, vl256 +** ld1b (z[0-9]+)\.d, \1/z, \[x0\] +** trn2 (z[0-9]+)\.d, \2\.d, \2\.d +** st1b \3\.d, \1, \[x8\] +** ret +*/ +v32qi +qi_trn2_d (v32qi x) +{ + return __builtin_shuffle (x, x, (v32qi) { PERM4 (1, 32) }); +} + +/* +** qi_trn2_d_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1b (z[0-9]+)\.d, \1/z, \[x1\] +** ld1b (z[0-9]+)\.d, \1/z, \[x0\] +** trn2 \3\.d, \3\.d, \2\.d +** st1b \3\.d, \1, \[x8\] +** | +** ld1b (z[0-9]+)\.d, \1/z, \[x0\] +** ld1b (z[0-9]+)\.d, \1/z, \[x1\] +** trn2 \4\.d, \4\.d, \5\.d +** st1b \4\.d, \1, \[x8\] +** ) +** ret +*/ +v32qi +qi_trn2_d_two_op (v32qi x, v32qi y) +{ + return __builtin_shuffle (x, y, (v32qi) { PERM4 (1, 32) }); +} + +/* +** hi_trn2_s: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** trn2 (z[0-9]+)\.s, \2\.s, \2\.s +** st1h \3\.s, \1, \[x8\] +** ret +*/ +v64hi +hi_trn2_s (v64hi x) +{ + return __builtin_shuffle (x, x, (v64hi) { PERM5 (1, 64) }); +} + +/* +** hi_trn2_s_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1h (z[0-9]+)\.s, \1/z, \[x1\] +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** trn2 \3\.s, \3\.s, \2\.s +** st1h \3\.s, \1, \[x8\] +** | +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** ld1h (z[0-9]+)\.s, \1/z, \[x1\] +** trn2 \4\.s, \4\.s, \5\.s +** st1h \4\.s, \1, \[x8\] +** ) +** ret +*/ +v64hi +hi_trn2_s_two_op (v64hi x, v64hi y) +{ + return __builtin_shuffle (x, y, (v64hi) { PERM5 (1, 64) }); +} + +/* +** hf_trn2_s: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** trn2 (z[0-9]+)\.s, \2\.s, \2\.s +** st1h \3\.s, \1, \[x8\] +** ret +*/ +v64hf +hf_trn2_s (v64hf x) +{ + return __builtin_shuffle (x, x, (v64hi) { PERM5 (1, 64) }); +} + +/* +** hf_trn2_s_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1h (z[0-9]+)\.s, \1/z, \[x1\] +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** trn2 \3\.s, \3\.s, \2\.s +** st1h \3\.s, \1, \[x8\] +** | +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** ld1h (z[0-9]+)\.s, \1/z, \[x1\] +** trn2 \4\.s, \4\.s, \5\.s +** st1h \4\.s, \1, \[x8\] +** ) +** ret +*/ +v64hf +hf_trn2_s_two_op (v64hf x, v64hf y) +{ + return __builtin_shuffle (x, y, (v64hi) { PERM5 (1, 64) }); +} + +/* +** bf_trn2_s: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** trn2 (z[0-9]+)\.s, \2\.s, \2\.s +** st1h \3\.s, \1, \[x8\] +** ret +*/ +v64bf +bf_trn2_s (v64bf x) +{ + return __builtin_shuffle (x, x, (v64hi) { PERM5 (1, 64) }); +} + +/* +** bf_trn2_s_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1h (z[0-9]+)\.s, \1/z, \[x1\] +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** trn2 \3\.s, \3\.s, \2\.s +** st1h \3\.s, \1, \[x8\] +** | +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** ld1h (z[0-9]+)\.s, \1/z, \[x1\] +** trn2 \4\.s, \4\.s, \5\.s +** st1h \4\.s, \1, \[x8\] +** ) +** ret +*/ +v64bf +bf_trn2_s_two_op (v64bf x, v64bf y) +{ + return __builtin_shuffle (x, y, (v64hi) { PERM5 (1, 64) }); +} + +/* +** hi_trn2_d: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** trn2 (z[0-9]+)\.d, \2\.d, \2\.d +** st1h \3\.d, \1, \[x8\] +** ret +*/ +v32hi +hi_trn2_d (v32hi x) +{ + return __builtin_shuffle (x, x, (v32hi) { PERM4 (1, 32) }); +} + +/* +** hi_trn2_d_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1h (z[0-9]+)\.d, \1/z, \[x1\] +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** trn2 \3\.d, \3\.d, \2\.d +** st1h \3\.d, \1, \[x8\] +** | +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** ld1h (z[0-9]+)\.d, \1/z, \[x1\] +** trn2 \4\.d, \4\.d, \5\.d +** st1h \4\.d, \1, \[x8\] +** ) +** ret +*/ +v32hi +hi_trn2_d_two_op (v32hi x, v32hi y) +{ + return __builtin_shuffle (x, y, (v32hi) { PERM4 (1, 32) }); +} + +/* +** hf_trn2_d: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** trn2 (z[0-9]+)\.d, \2\.d, \2\.d +** st1h \3\.d, \1, \[x8\] +** ret +*/ +v32hf +hf_trn2_d (v32hf x) +{ + return __builtin_shuffle (x, x, (v32hi) { PERM4 (1, 32) }); +} + +/* +** hf_trn2_d_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1h (z[0-9]+)\.d, \1/z, \[x1\] +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** trn2 \3\.d, \3\.d, \2\.d +** st1h \3\.d, \1, \[x8\] +** | +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** ld1h (z[0-9]+)\.d, \1/z, \[x1\] +** trn2 \4\.d, \4\.d, \5\.d +** st1h \4\.d, \1, \[x8\] +** ) +** ret +*/ +v32hf +hf_trn2_d_two_op (v32hf x, v32hf y) +{ + return __builtin_shuffle (x, y, (v32hi) { PERM4 (1, 32) }); +} + +/* +** bf_trn2_d: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** trn2 (z[0-9]+)\.d, \2\.d, \2\.d +** st1h \3\.d, \1, \[x8\] +** ret +*/ +v32bf +bf_trn2_d (v32bf x) +{ + return __builtin_shuffle (x, x, (v32hi) { PERM4 (1, 32) }); +} + +/* +** bf_trn2_d_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1h (z[0-9]+)\.d, \1/z, \[x1\] +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** trn2 \3\.d, \3\.d, \2\.d +** st1h \3\.d, \1, \[x8\] +** | +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** ld1h (z[0-9]+)\.d, \1/z, \[x1\] +** trn2 \4\.d, \4\.d, \5\.d +** st1h \4\.d, \1, \[x8\] +** ) +** ret +*/ +v32bf +bf_trn2_d_two_op (v32bf x, v32bf y) +{ + return __builtin_shuffle (x, y, (v32hi) { PERM4 (1, 32) }); +} + +/* +** si_trn2_d: +** ptrue (p[0-7])\.b, vl256 +** ld1w (z[0-9]+)\.d, \1/z, \[x0\] +** trn2 (z[0-9]+)\.d, \2\.d, \2\.d +** st1w \3\.d, \1, \[x8\] +** ret +*/ +v32si +si_trn2_d (v32si x) +{ + return __builtin_shuffle (x, x, (v32si) { PERM4 (1, 32) }); +} + +/* +** sf_trn2_d: +** ptrue (p[0-7])\.b, vl256 +** ld1w (z[0-9]+)\.d, \1/z, \[x0\] +** trn2 (z[0-9]+)\.d, \2\.d, \2\.d +** st1w \3\.d, \1, \[x8\] +** ret +*/ +v32sf +sf_trn2_d (v32sf x) +{ + return __builtin_shuffle (x, x, (v32si) { PERM4 (1, 32) }); +} diff --git a/gcc/testsuite/gcc.target/aarch64/sve/uzp1_2.c b/gcc/testsuite/gcc.target/aarch64/sve/uzp1_2.c new file mode 100644 index 0000000..e2f2692 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/uzp1_2.c @@ -0,0 +1,375 @@ +/* { dg-do assemble { target aarch64_asm_sve_ok } } */ +/* { dg-options "-O -msve-vector-bits=2048 -mlittle-endian --save-temps" } */ +/* { dg-final { check-function-bodies "**" "" } } */ + +typedef unsigned char v128qi __attribute__((vector_size(128))); +typedef unsigned char v64qi __attribute__((vector_size(64))); +typedef unsigned char v32qi __attribute__((vector_size(32))); +typedef unsigned short v64hi __attribute__((vector_size(128))); +typedef unsigned short v32hi __attribute__((vector_size(64))); +typedef _Float16 v64hf __attribute__((vector_size(128))); +typedef _Float16 v32hf __attribute__((vector_size(64))); +typedef __bf16 v64bf __attribute__((vector_size(128))); +typedef __bf16 v32bf __attribute__((vector_size(64))); +typedef unsigned int v32si __attribute__((vector_size(128))); +typedef float v32sf __attribute__((vector_size(128))); + +#define PERM0(B) B, B + 2 +#define PERM1(B) PERM0 (B), PERM0 (B + 4) +#define PERM2(B) PERM1 (B), PERM1 (B + 8) +#define PERM3(B) PERM2 (B), PERM2 (B + 16) +#define PERM4(B) PERM3 (B), PERM3 (B + 32) +#define PERM5(B) PERM4 (B), PERM4 (B + 64) +#define PERM6(B) PERM5 (B), PERM5 (B + 128) + +/* +** qi_uzp1_h: +** ptrue (p[0-7])\.b, vl256 +** ld1b (z[0-9]+)\.h, \1/z, \[x0\] +** uzp1 (z[0-9]+)\.h, \2\.h, \2\.h +** st1b \3\.h, \1, \[x8\] +** ret +*/ +v128qi +qi_uzp1_h (v128qi x) +{ + return __builtin_shuffle (x, x, (v128qi) { PERM6 (0) }); +} + +/* +** qi_uzp1_h_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1b (z[0-9]+)\.h, \1/z, \[x1\] +** ld1b (z[0-9]+)\.h, \1/z, \[x0\] +** uzp1 \3\.h, \3\.h, \2\.h +** st1b \3\.h, \1, \[x8\] +** | +** ld1b (z[0-9]+)\.h, \1/z, \[x0\] +** ld1b (z[0-9]+)\.h, \1/z, \[x1\] +** uzp1 \4\.h, \4\.h, \5\.h +** st1b \4\.h, \1, \[x8\] +** ) +** ret +*/ +v128qi +qi_uzp1_h_two_op (v128qi x, v128qi y) +{ + return __builtin_shuffle (x, y, (v128qi) { PERM6 (0) }); +} + +/* +** qi_uzp1_s: +** ptrue (p[0-7])\.b, vl256 +** ld1b (z[0-9]+)\.s, \1/z, \[x0\] +** uzp1 (z[0-9]+)\.s, \2\.s, \2\.s +** st1b \3\.s, \1, \[x8\] +** ret +*/ +v64qi +qi_uzp1_s (v64qi x) +{ + return __builtin_shuffle (x, x, (v64qi) { PERM5 (0) }); +} + +/* +** qi_uzp1_s_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1b (z[0-9]+)\.s, \1/z, \[x1\] +** ld1b (z[0-9]+)\.s, \1/z, \[x0\] +** uzp1 \3\.s, \3\.s, \2\.s +** st1b \3\.s, \1, \[x8\] +** | +** ld1b (z[0-9]+)\.s, \1/z, \[x0\] +** ld1b (z[0-9]+)\.s, \1/z, \[x1\] +** uzp1 \4\.s, \4\.s, \5\.s +** st1b \4\.s, \1, \[x8\] +** ) +** ret +*/ +v64qi +qi_uzp1_s_two_op (v64qi x, v64qi y) +{ + return __builtin_shuffle (x, y, (v64qi) { PERM5 (0) }); +} + +/* +** qi_uzp1_d: +** ptrue (p[0-7])\.b, vl256 +** ld1b (z[0-9]+)\.d, \1/z, \[x0\] +** uzp1 (z[0-9]+)\.d, \2\.d, \2\.d +** st1b \3\.d, \1, \[x8\] +** ret +*/ +v32qi +qi_uzp1_d (v32qi x) +{ + return __builtin_shuffle (x, x, (v32qi) { PERM4 (0) }); +} + +/* +** qi_uzp1_d_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1b (z[0-9]+)\.d, \1/z, \[x1\] +** ld1b (z[0-9]+)\.d, \1/z, \[x0\] +** uzp1 \3\.d, \3\.d, \2\.d +** st1b \3\.d, \1, \[x8\] +** | +** ld1b (z[0-9]+)\.d, \1/z, \[x0\] +** ld1b (z[0-9]+)\.d, \1/z, \[x1\] +** uzp1 \4\.d, \4\.d, \5\.d +** st1b \4\.d, \1, \[x8\] +** ) +** ret +*/ +v32qi +qi_uzp1_d_two_op (v32qi x, v32qi y) +{ + return __builtin_shuffle (x, y, (v32qi) { PERM4 (0) }); +} + +/* +** hi_uzp1_s: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** uzp1 (z[0-9]+)\.s, \2\.s, \2\.s +** st1h \3\.s, \1, \[x8\] +** ret +*/ +v64hi +hi_uzp1_s (v64hi x) +{ + return __builtin_shuffle (x, x, (v64hi) { PERM5 (0) }); +} + +/* +** hi_uzp1_s_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1h (z[0-9]+)\.s, \1/z, \[x1\] +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** uzp1 \3\.s, \3\.s, \2\.s +** st1h \3\.s, \1, \[x8\] +** | +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** ld1h (z[0-9]+)\.s, \1/z, \[x1\] +** uzp1 \4\.s, \4\.s, \5\.s +** st1h \4\.s, \1, \[x8\] +** ) +** ret +*/ +v64hi +hi_uzp1_s_two_op (v64hi x, v64hi y) +{ + return __builtin_shuffle (x, y, (v64hi) { PERM5 (0) }); +} + +/* +** hf_uzp1_s: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** uzp1 (z[0-9]+)\.s, \2\.s, \2\.s +** st1h \3\.s, \1, \[x8\] +** ret +*/ +v64hf +hf_uzp1_s (v64hf x) +{ + return __builtin_shuffle (x, x, (v64hi) { PERM5 (0) }); +} + +/* +** hf_uzp1_s_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1h (z[0-9]+)\.s, \1/z, \[x1\] +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** uzp1 \3\.s, \3\.s, \2\.s +** st1h \3\.s, \1, \[x8\] +** | +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** ld1h (z[0-9]+)\.s, \1/z, \[x1\] +** uzp1 \4\.s, \4\.s, \5\.s +** st1h \4\.s, \1, \[x8\] +** ) +** ret +*/ +v64hf +hf_uzp1_s_two_op (v64hf x, v64hf y) +{ + return __builtin_shuffle (x, y, (v64hi) { PERM5 (0) }); +} + +/* +** bf_uzp1_s: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** uzp1 (z[0-9]+)\.s, \2\.s, \2\.s +** st1h \3\.s, \1, \[x8\] +** ret +*/ +v64bf +bf_uzp1_s (v64bf x) +{ + return __builtin_shuffle (x, x, (v64hi) { PERM5 (0) }); +} + +/* +** bf_uzp1_s_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1h (z[0-9]+)\.s, \1/z, \[x1\] +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** uzp1 \3\.s, \3\.s, \2\.s +** st1h \3\.s, \1, \[x8\] +** | +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** ld1h (z[0-9]+)\.s, \1/z, \[x1\] +** uzp1 \4\.s, \4\.s, \5\.s +** st1h \4\.s, \1, \[x8\] +** ) +** ret +*/ +v64bf +bf_uzp1_s_two_op (v64bf x, v64bf y) +{ + return __builtin_shuffle (x, y, (v64hi) { PERM5 (0) }); +} + +/* +** hi_uzp1_d: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** uzp1 (z[0-9]+)\.d, \2\.d, \2\.d +** st1h \3\.d, \1, \[x8\] +** ret +*/ +v32hi +hi_uzp1_d (v32hi x) +{ + return __builtin_shuffle (x, x, (v32hi) { PERM4 (0) }); +} + +/* +** hi_uzp1_d_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1h (z[0-9]+)\.d, \1/z, \[x1\] +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** uzp1 \3\.d, \3\.d, \2\.d +** st1h \3\.d, \1, \[x8\] +** | +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** ld1h (z[0-9]+)\.d, \1/z, \[x1\] +** uzp1 \4\.d, \4\.d, \5\.d +** st1h \4\.d, \1, \[x8\] +** ) +** ret +*/ +v32hi +hi_uzp1_d_two_op (v32hi x, v32hi y) +{ + return __builtin_shuffle (x, y, (v32hi) { PERM4 (0) }); +} + +/* +** hf_uzp1_d: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** uzp1 (z[0-9]+)\.d, \2\.d, \2\.d +** st1h \3\.d, \1, \[x8\] +** ret +*/ +v32hf +hf_uzp1_d (v32hf x) +{ + return __builtin_shuffle (x, x, (v32hi) { PERM4 (0) }); +} + +/* +** hf_uzp1_d_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1h (z[0-9]+)\.d, \1/z, \[x1\] +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** uzp1 \3\.d, \3\.d, \2\.d +** st1h \3\.d, \1, \[x8\] +** | +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** ld1h (z[0-9]+)\.d, \1/z, \[x1\] +** uzp1 \4\.d, \4\.d, \5\.d +** st1h \4\.d, \1, \[x8\] +** ) +** ret +*/ +v32hf +hf_uzp1_d_two_op (v32hf x, v32hf y) +{ + return __builtin_shuffle (x, y, (v32hi) { PERM4 (0) }); +} + +/* +** bf_uzp1_d: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** uzp1 (z[0-9]+)\.d, \2\.d, \2\.d +** st1h \3\.d, \1, \[x8\] +** ret +*/ +v32bf +bf_uzp1_d (v32bf x) +{ + return __builtin_shuffle (x, x, (v32hi) { PERM4 (0) }); +} + +/* +** bf_uzp1_d_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1h (z[0-9]+)\.d, \1/z, \[x1\] +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** uzp1 \3\.d, \3\.d, \2\.d +** st1h \3\.d, \1, \[x8\] +** | +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** ld1h (z[0-9]+)\.d, \1/z, \[x1\] +** uzp1 \4\.d, \4\.d, \5\.d +** st1h \4\.d, \1, \[x8\] +** ) +** ret +*/ +v32bf +bf_uzp1_d_two_op (v32bf x, v32bf y) +{ + return __builtin_shuffle (x, y, (v32hi) { PERM4 (0) }); +} + +/* +** si_uzp1_d: +** ptrue (p[0-7])\.b, vl256 +** ld1w (z[0-9]+)\.d, \1/z, \[x0\] +** uzp1 (z[0-9]+)\.d, \2\.d, \2\.d +** st1w \3\.d, \1, \[x8\] +** ret +*/ +v32si +si_uzp1_d (v32si x) +{ + return __builtin_shuffle (x, x, (v32si) { PERM4 (0) }); +} + +/* +** sf_uzp1_d: +** ptrue (p[0-7])\.b, vl256 +** ld1w (z[0-9]+)\.d, \1/z, \[x0\] +** uzp1 (z[0-9]+)\.d, \2\.d, \2\.d +** st1w \3\.d, \1, \[x8\] +** ret +*/ +v32sf +sf_uzp1_d (v32sf x) +{ + return __builtin_shuffle (x, x, (v32si) { PERM4 (0) }); +} diff --git a/gcc/testsuite/gcc.target/aarch64/sve/uzp2_2.c b/gcc/testsuite/gcc.target/aarch64/sve/uzp2_2.c new file mode 100644 index 0000000..0d8eda5 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/uzp2_2.c @@ -0,0 +1,375 @@ +/* { dg-do assemble { target aarch64_asm_sve_ok } } */ +/* { dg-options "-O -msve-vector-bits=2048 -mlittle-endian --save-temps" } */ +/* { dg-final { check-function-bodies "**" "" } } */ + +typedef unsigned char v128qi __attribute__((vector_size(128))); +typedef unsigned char v64qi __attribute__((vector_size(64))); +typedef unsigned char v32qi __attribute__((vector_size(32))); +typedef unsigned short v64hi __attribute__((vector_size(128))); +typedef unsigned short v32hi __attribute__((vector_size(64))); +typedef _Float16 v64hf __attribute__((vector_size(128))); +typedef _Float16 v32hf __attribute__((vector_size(64))); +typedef __bf16 v64bf __attribute__((vector_size(128))); +typedef __bf16 v32bf __attribute__((vector_size(64))); +typedef unsigned int v32si __attribute__((vector_size(128))); +typedef float v32sf __attribute__((vector_size(128))); + +#define PERM0(B) B, B + 2 +#define PERM1(B) PERM0 (B), PERM0 (B + 4) +#define PERM2(B) PERM1 (B), PERM1 (B + 8) +#define PERM3(B) PERM2 (B), PERM2 (B + 16) +#define PERM4(B) PERM3 (B), PERM3 (B + 32) +#define PERM5(B) PERM4 (B), PERM4 (B + 64) +#define PERM6(B) PERM5 (B), PERM5 (B + 128) + +/* +** qi_uzp2_h: +** ptrue (p[0-7])\.b, vl256 +** ld1b (z[0-9]+)\.h, \1/z, \[x0\] +** uzp2 (z[0-9]+)\.h, \2\.h, \2\.h +** st1b \3\.h, \1, \[x8\] +** ret +*/ +v128qi +qi_uzp2_h (v128qi x) +{ + return __builtin_shuffle (x, x, (v128qi) { PERM6 (1) }); +} + +/* +** qi_uzp2_h_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1b (z[0-9]+)\.h, \1/z, \[x1\] +** ld1b (z[0-9]+)\.h, \1/z, \[x0\] +** uzp2 \3\.h, \3\.h, \2\.h +** st1b \3\.h, \1, \[x8\] +** | +** ld1b (z[0-9]+)\.h, \1/z, \[x0\] +** ld1b (z[0-9]+)\.h, \1/z, \[x1\] +** uzp2 \4\.h, \4\.h, \5\.h +** st1b \4\.h, \1, \[x8\] +** ) +** ret +*/ +v128qi +qi_uzp2_h_two_op (v128qi x, v128qi y) +{ + return __builtin_shuffle (x, y, (v128qi) { PERM6 (1) }); +} + +/* +** qi_uzp2_s: +** ptrue (p[0-7])\.b, vl256 +** ld1b (z[0-9]+)\.s, \1/z, \[x0\] +** uzp2 (z[0-9]+)\.s, \2\.s, \2\.s +** st1b \3\.s, \1, \[x8\] +** ret +*/ +v64qi +qi_uzp2_s (v64qi x) +{ + return __builtin_shuffle (x, x, (v64qi) { PERM5 (1) }); +} + +/* +** qi_uzp2_s_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1b (z[0-9]+)\.s, \1/z, \[x1\] +** ld1b (z[0-9]+)\.s, \1/z, \[x0\] +** uzp2 \3\.s, \3\.s, \2\.s +** st1b \3\.s, \1, \[x8\] +** | +** ld1b (z[0-9]+)\.s, \1/z, \[x0\] +** ld1b (z[0-9]+)\.s, \1/z, \[x1\] +** uzp2 \4\.s, \4\.s, \5\.s +** st1b \4\.s, \1, \[x8\] +** ) +** ret +*/ +v64qi +qi_uzp2_s_two_op (v64qi x, v64qi y) +{ + return __builtin_shuffle (x, y, (v64qi) { PERM5 (1) }); +} + +/* +** qi_uzp2_d: +** ptrue (p[0-7])\.b, vl256 +** ld1b (z[0-9]+)\.d, \1/z, \[x0\] +** uzp2 (z[0-9]+)\.d, \2\.d, \2\.d +** st1b \3\.d, \1, \[x8\] +** ret +*/ +v32qi +qi_uzp2_d (v32qi x) +{ + return __builtin_shuffle (x, x, (v32qi) { PERM4 (1) }); +} + +/* +** qi_uzp2_d_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1b (z[0-9]+)\.d, \1/z, \[x1\] +** ld1b (z[0-9]+)\.d, \1/z, \[x0\] +** uzp2 \3\.d, \3\.d, \2\.d +** st1b \3\.d, \1, \[x8\] +** | +** ld1b (z[0-9]+)\.d, \1/z, \[x0\] +** ld1b (z[0-9]+)\.d, \1/z, \[x1\] +** uzp2 \4\.d, \4\.d, \5\.d +** st1b \4\.d, \1, \[x8\] +** ) +** ret +*/ +v32qi +qi_uzp2_d_two_op (v32qi x, v32qi y) +{ + return __builtin_shuffle (x, y, (v32qi) { PERM4 (1) }); +} + +/* +** hi_uzp2_s: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** uzp2 (z[0-9]+)\.s, \2\.s, \2\.s +** st1h \3\.s, \1, \[x8\] +** ret +*/ +v64hi +hi_uzp2_s (v64hi x) +{ + return __builtin_shuffle (x, x, (v64hi) { PERM5 (1) }); +} + +/* +** hi_uzp2_s_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1h (z[0-9]+)\.s, \1/z, \[x1\] +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** uzp2 \3\.s, \3\.s, \2\.s +** st1h \3\.s, \1, \[x8\] +** | +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** ld1h (z[0-9]+)\.s, \1/z, \[x1\] +** uzp2 \4\.s, \4\.s, \5\.s +** st1h \4\.s, \1, \[x8\] +** ) +** ret +*/ +v64hi +hi_uzp2_s_two_op (v64hi x, v64hi y) +{ + return __builtin_shuffle (x, y, (v64hi) { PERM5 (1) }); +} + +/* +** hf_uzp2_s: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** uzp2 (z[0-9]+)\.s, \2\.s, \2\.s +** st1h \3\.s, \1, \[x8\] +** ret +*/ +v64hf +hf_uzp2_s (v64hf x) +{ + return __builtin_shuffle (x, x, (v64hi) { PERM5 (1) }); +} + +/* +** hf_uzp2_s_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1h (z[0-9]+)\.s, \1/z, \[x1\] +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** uzp2 \3\.s, \3\.s, \2\.s +** st1h \3\.s, \1, \[x8\] +** | +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** ld1h (z[0-9]+)\.s, \1/z, \[x1\] +** uzp2 \4\.s, \4\.s, \5\.s +** st1h \4\.s, \1, \[x8\] +** ) +** ret +*/ +v64hf +hf_uzp2_s_two_op (v64hf x, v64hf y) +{ + return __builtin_shuffle (x, y, (v64hi) { PERM5 (1) }); +} + +/* +** bf_uzp2_s: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** uzp2 (z[0-9]+)\.s, \2\.s, \2\.s +** st1h \3\.s, \1, \[x8\] +** ret +*/ +v64bf +bf_uzp2_s (v64bf x) +{ + return __builtin_shuffle (x, x, (v64hi) { PERM5 (1) }); +} + +/* +** bf_uzp2_s_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1h (z[0-9]+)\.s, \1/z, \[x1\] +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** uzp2 \3\.s, \3\.s, \2\.s +** st1h \3\.s, \1, \[x8\] +** | +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** ld1h (z[0-9]+)\.s, \1/z, \[x1\] +** uzp2 \4\.s, \4\.s, \5\.s +** st1h \4\.s, \1, \[x8\] +** ) +** ret +*/ +v64bf +bf_uzp2_s_two_op (v64bf x, v64bf y) +{ + return __builtin_shuffle (x, y, (v64hi) { PERM5 (1) }); +} + +/* +** hi_uzp2_d: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** uzp2 (z[0-9]+)\.d, \2\.d, \2\.d +** st1h \3\.d, \1, \[x8\] +** ret +*/ +v32hi +hi_uzp2_d (v32hi x) +{ + return __builtin_shuffle (x, x, (v32hi) { PERM4 (1) }); +} + +/* +** hi_uzp2_d_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1h (z[0-9]+)\.d, \1/z, \[x1\] +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** uzp2 \3\.d, \3\.d, \2\.d +** st1h \3\.d, \1, \[x8\] +** | +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** ld1h (z[0-9]+)\.d, \1/z, \[x1\] +** uzp2 \4\.d, \4\.d, \5\.d +** st1h \4\.d, \1, \[x8\] +** ) +** ret +*/ +v32hi +hi_uzp2_d_two_op (v32hi x, v32hi y) +{ + return __builtin_shuffle (x, y, (v32hi) { PERM4 (1) }); +} + +/* +** hf_uzp2_d: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** uzp2 (z[0-9]+)\.d, \2\.d, \2\.d +** st1h \3\.d, \1, \[x8\] +** ret +*/ +v32hf +hf_uzp2_d (v32hf x) +{ + return __builtin_shuffle (x, x, (v32hi) { PERM4 (1) }); +} + +/* +** hf_uzp2_d_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1h (z[0-9]+)\.d, \1/z, \[x1\] +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** uzp2 \3\.d, \3\.d, \2\.d +** st1h \3\.d, \1, \[x8\] +** | +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** ld1h (z[0-9]+)\.d, \1/z, \[x1\] +** uzp2 \4\.d, \4\.d, \5\.d +** st1h \4\.d, \1, \[x8\] +** ) +** ret +*/ +v32hf +hf_uzp2_d_two_op (v32hf x, v32hf y) +{ + return __builtin_shuffle (x, y, (v32hi) { PERM4 (1) }); +} + +/* +** bf_uzp2_d: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** uzp2 (z[0-9]+)\.d, \2\.d, \2\.d +** st1h \3\.d, \1, \[x8\] +** ret +*/ +v32bf +bf_uzp2_d (v32bf x) +{ + return __builtin_shuffle (x, x, (v32hi) { PERM4 (1) }); +} + +/* +** bf_uzp2_d_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1h (z[0-9]+)\.d, \1/z, \[x1\] +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** uzp2 \3\.d, \3\.d, \2\.d +** st1h \3\.d, \1, \[x8\] +** | +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** ld1h (z[0-9]+)\.d, \1/z, \[x1\] +** uzp2 \4\.d, \4\.d, \5\.d +** st1h \4\.d, \1, \[x8\] +** ) +** ret +*/ +v32bf +bf_uzp2_d_two_op (v32bf x, v32bf y) +{ + return __builtin_shuffle (x, y, (v32hi) { PERM4 (1) }); +} + +/* +** si_uzp2_d: +** ptrue (p[0-7])\.b, vl256 +** ld1w (z[0-9]+)\.d, \1/z, \[x0\] +** uzp2 (z[0-9]+)\.d, \2\.d, \2\.d +** st1w \3\.d, \1, \[x8\] +** ret +*/ +v32si +si_uzp2_d (v32si x) +{ + return __builtin_shuffle (x, x, (v32si) { PERM4 (1) }); +} + +/* +** sf_uzp2_d: +** ptrue (p[0-7])\.b, vl256 +** ld1w (z[0-9]+)\.d, \1/z, \[x0\] +** uzp2 (z[0-9]+)\.d, \2\.d, \2\.d +** st1w \3\.d, \1, \[x8\] +** ret +*/ +v32sf +sf_uzp2_d (v32sf x) +{ + return __builtin_shuffle (x, x, (v32si) { PERM4 (1) }); +} diff --git a/gcc/testsuite/gcc.target/aarch64/sve/zip1_2.c b/gcc/testsuite/gcc.target/aarch64/sve/zip1_2.c new file mode 100644 index 0000000..395b96f --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/zip1_2.c @@ -0,0 +1,403 @@ +/* { dg-do assemble { target aarch64_asm_sve_ok } } */ +/* { dg-options "-O -msve-vector-bits=2048 -mlittle-endian --save-temps" } */ +/* { dg-final { check-function-bodies "**" "" } } */ + +typedef unsigned char v128qi __attribute__((vector_size(128))); +typedef unsigned char v64qi __attribute__((vector_size(64))); +typedef unsigned char v32qi __attribute__((vector_size(32))); +typedef unsigned short v64hi __attribute__((vector_size(128))); +typedef unsigned short v32hi __attribute__((vector_size(64))); +typedef _Float16 v64hf __attribute__((vector_size(128))); +typedef _Float16 v32hf __attribute__((vector_size(64))); +typedef __bf16 v64bf __attribute__((vector_size(128))); +typedef __bf16 v32bf __attribute__((vector_size(64))); +typedef unsigned int v32si __attribute__((vector_size(128))); +typedef float v32sf __attribute__((vector_size(128))); + +#define PERM0(B, C) B, B + C +#define PERM1(B, C) PERM0 (B, C), PERM0 (B + 1, C) +#define PERM2(B, C) PERM1 (B, C), PERM1 (B + 2, C) +#define PERM3(B, C) PERM2 (B, C), PERM2 (B + 4, C) +#define PERM4(B, C) PERM3 (B, C), PERM3 (B + 8, C) +#define PERM5(B, C) PERM4 (B, C), PERM4 (B + 16, C) +#define PERM6(B, C) PERM5 (B, C), PERM5 (B + 32, C) + +/* +** qi_zip1_h_a: +** ptrue (p[0-7])\.b, vl256 +** ld1b (z[0-9]+)\.h, \1/z, \[x0\] +** zip1 (z[0-9]+)\.h, \2\.h, \2\.h +** st1b \3\.h, \1, \[x8\] +** ret +*/ +v128qi +qi_zip1_h_a (v128qi x) +{ + return __builtin_shuffle (x, x, (v128qi) { PERM6 (0, 0) }); +} + +/* +** qi_zip1_h_b: +** ptrue (p[0-7])\.b, vl256 +** ld1b (z[0-9]+)\.h, \1/z, \[x0\] +** zip1 (z[0-9]+)\.h, \2\.h, \2\.h +** st1b \3\.h, \1, \[x8\] +** ret +*/ +v128qi +qi_zip1_h_b (v128qi x) +{ + return __builtin_shuffle (x, x, (v128qi) { PERM6 (0, 128) }); +} + +/* +** qi_zip1_h_c: +** ptrue (p[0-7])\.b, vl256 +** ld1b (z[0-9]+)\.h, \1/z, \[x0\] +** zip1 (z[0-9]+)\.h, \2\.h, \2\.h +** st1b \3\.h, \1, \[x8\] +** ret +*/ +v128qi +qi_zip1_h_c (v128qi x) +{ + return __builtin_shuffle (x, x, (v128qi) { PERM6 (128, 0) }); +} + +/* +** qi_zip1_h_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1b (z[0-9]+)\.h, \1/z, \[x1\] +** ld1b (z[0-9]+)\.h, \1/z, \[x0\] +** zip1 \3\.h, \3\.h, \2\.h +** st1b \3\.h, \1, \[x8\] +** | +** ld1b (z[0-9]+)\.h, \1/z, \[x0\] +** ld1b (z[0-9]+)\.h, \1/z, \[x1\] +** zip1 \4\.h, \4\.h, \5\.h +** st1b \4\.h, \1, \[x8\] +** ) +** ret +*/ +v128qi +qi_zip1_h_two_op (v128qi x, v128qi y) +{ + return __builtin_shuffle (x, y, (v128qi) { PERM6 (0, 128) }); +} + +/* +** qi_zip1_s: +** ptrue (p[0-7])\.b, vl256 +** ld1b (z[0-9]+)\.s, \1/z, \[x0\] +** zip1 (z[0-9]+)\.s, \2\.s, \2\.s +** st1b \3\.s, \1, \[x8\] +** ret +*/ +v64qi +qi_zip1_s (v64qi x) +{ + return __builtin_shuffle (x, x, (v64qi) { PERM5 (0, 64) }); +} + +/* +** qi_zip1_s_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1b (z[0-9]+)\.s, \1/z, \[x1\] +** ld1b (z[0-9]+)\.s, \1/z, \[x0\] +** zip1 \3\.s, \3\.s, \2\.s +** st1b \3\.s, \1, \[x8\] +** | +** ld1b (z[0-9]+)\.s, \1/z, \[x0\] +** ld1b (z[0-9]+)\.s, \1/z, \[x1\] +** zip1 \4\.s, \4\.s, \5\.s +** st1b \4\.s, \1, \[x8\] +** ) +** ret +*/ +v64qi +qi_zip1_s_two_op (v64qi x, v64qi y) +{ + return __builtin_shuffle (x, y, (v64qi) { PERM5 (0, 64) }); +} + +/* +** qi_zip1_d: +** ptrue (p[0-7])\.b, vl256 +** ld1b (z[0-9]+)\.d, \1/z, \[x0\] +** zip1 (z[0-9]+)\.d, \2\.d, \2\.d +** st1b \3\.d, \1, \[x8\] +** ret +*/ +v32qi +qi_zip1_d (v32qi x) +{ + return __builtin_shuffle (x, x, (v32qi) { PERM4 (0, 32) }); +} + +/* +** qi_zip1_d_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1b (z[0-9]+)\.d, \1/z, \[x1\] +** ld1b (z[0-9]+)\.d, \1/z, \[x0\] +** zip1 \3\.d, \3\.d, \2\.d +** st1b \3\.d, \1, \[x8\] +** | +** ld1b (z[0-9]+)\.d, \1/z, \[x0\] +** ld1b (z[0-9]+)\.d, \1/z, \[x1\] +** zip1 \4\.d, \4\.d, \5\.d +** st1b \4\.d, \1, \[x8\] +** ) +** ret +*/ +v32qi +qi_zip1_d_two_op (v32qi x, v32qi y) +{ + return __builtin_shuffle (x, y, (v32qi) { PERM4 (0, 32) }); +} + +/* +** hi_zip1_s: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** zip1 (z[0-9]+)\.s, \2\.s, \2\.s +** st1h \3\.s, \1, \[x8\] +** ret +*/ +v64hi +hi_zip1_s (v64hi x) +{ + return __builtin_shuffle (x, x, (v64hi) { PERM5 (0, 64) }); +} + +/* +** hi_zip1_s_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1h (z[0-9]+)\.s, \1/z, \[x1\] +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** zip1 \3\.s, \3\.s, \2\.s +** st1h \3\.s, \1, \[x8\] +** | +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** ld1h (z[0-9]+)\.s, \1/z, \[x1\] +** zip1 \4\.s, \4\.s, \5\.s +** st1h \4\.s, \1, \[x8\] +** ) +** ret +*/ +v64hi +hi_zip1_s_two_op (v64hi x, v64hi y) +{ + return __builtin_shuffle (x, y, (v64hi) { PERM5 (0, 64) }); +} + +/* +** hf_zip1_s: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** zip1 (z[0-9]+)\.s, \2\.s, \2\.s +** st1h \3\.s, \1, \[x8\] +** ret +*/ +v64hf +hf_zip1_s (v64hf x) +{ + return __builtin_shuffle (x, x, (v64hi) { PERM5 (0, 64) }); +} + +/* +** hf_zip1_s_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1h (z[0-9]+)\.s, \1/z, \[x1\] +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** zip1 \3\.s, \3\.s, \2\.s +** st1h \3\.s, \1, \[x8\] +** | +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** ld1h (z[0-9]+)\.s, \1/z, \[x1\] +** zip1 \4\.s, \4\.s, \5\.s +** st1h \4\.s, \1, \[x8\] +** ) +** ret +*/ +v64hf +hf_zip1_s_two_op (v64hf x, v64hf y) +{ + return __builtin_shuffle (x, y, (v64hi) { PERM5 (0, 64) }); +} + +/* +** bf_zip1_s: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** zip1 (z[0-9]+)\.s, \2\.s, \2\.s +** st1h \3\.s, \1, \[x8\] +** ret +*/ +v64bf +bf_zip1_s (v64bf x) +{ + return __builtin_shuffle (x, x, (v64hi) { PERM5 (0, 64) }); +} + +/* +** bf_zip1_s_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1h (z[0-9]+)\.s, \1/z, \[x1\] +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** zip1 \3\.s, \3\.s, \2\.s +** st1h \3\.s, \1, \[x8\] +** | +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** ld1h (z[0-9]+)\.s, \1/z, \[x1\] +** zip1 \4\.s, \4\.s, \5\.s +** st1h \4\.s, \1, \[x8\] +** ) +** ret +*/ +v64bf +bf_zip1_s_two_op (v64bf x, v64bf y) +{ + return __builtin_shuffle (x, y, (v64hi) { PERM5 (0, 64) }); +} + +/* +** hi_zip1_d: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** zip1 (z[0-9]+)\.d, \2\.d, \2\.d +** st1h \3\.d, \1, \[x8\] +** ret +*/ +v32hi +hi_zip1_d (v32hi x) +{ + return __builtin_shuffle (x, x, (v32hi) { PERM4 (0, 32) }); +} + +/* +** hi_zip1_d_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1h (z[0-9]+)\.d, \1/z, \[x1\] +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** zip1 \3\.d, \3\.d, \2\.d +** st1h \3\.d, \1, \[x8\] +** | +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** ld1h (z[0-9]+)\.d, \1/z, \[x1\] +** zip1 \4\.d, \4\.d, \5\.d +** st1h \4\.d, \1, \[x8\] +** ) +** ret +*/ +v32hi +hi_zip1_d_two_op (v32hi x, v32hi y) +{ + return __builtin_shuffle (x, y, (v32hi) { PERM4 (0, 32) }); +} + +/* +** hf_zip1_d: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** zip1 (z[0-9]+)\.d, \2\.d, \2\.d +** st1h \3\.d, \1, \[x8\] +** ret +*/ +v32hf +hf_zip1_d (v32hf x) +{ + return __builtin_shuffle (x, x, (v32hi) { PERM4 (0, 32) }); +} + +/* +** hf_zip1_d_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1h (z[0-9]+)\.d, \1/z, \[x1\] +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** zip1 \3\.d, \3\.d, \2\.d +** st1h \3\.d, \1, \[x8\] +** | +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** ld1h (z[0-9]+)\.d, \1/z, \[x1\] +** zip1 \4\.d, \4\.d, \5\.d +** st1h \4\.d, \1, \[x8\] +** ) +** ret +*/ +v32hf +hf_zip1_d_two_op (v32hf x, v32hf y) +{ + return __builtin_shuffle (x, y, (v32hi) { PERM4 (0, 32) }); +} + +/* +** bf_zip1_d: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** zip1 (z[0-9]+)\.d, \2\.d, \2\.d +** st1h \3\.d, \1, \[x8\] +** ret +*/ +v32bf +bf_zip1_d (v32bf x) +{ + return __builtin_shuffle (x, x, (v32hi) { PERM4 (0, 32) }); +} + +/* +** bf_zip1_d_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1h (z[0-9]+)\.d, \1/z, \[x1\] +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** zip1 \3\.d, \3\.d, \2\.d +** st1h \3\.d, \1, \[x8\] +** | +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** ld1h (z[0-9]+)\.d, \1/z, \[x1\] +** zip1 \4\.d, \4\.d, \5\.d +** st1h \4\.d, \1, \[x8\] +** ) +** ret +*/ +v32bf +bf_zip1_d_two_op (v32bf x, v32bf y) +{ + return __builtin_shuffle (x, y, (v32hi) { PERM4 (0, 32) }); +} + +/* +** si_zip1_d: +** ptrue (p[0-7])\.b, vl256 +** ld1w (z[0-9]+)\.d, \1/z, \[x0\] +** zip1 (z[0-9]+)\.d, \2\.d, \2\.d +** st1w \3\.d, \1, \[x8\] +** ret +*/ +v32si +si_zip1_d (v32si x) +{ + return __builtin_shuffle (x, x, (v32si) { PERM4 (0, 32) }); +} + +/* +** sf_zip1_d: +** ptrue (p[0-7])\.b, vl256 +** ld1w (z[0-9]+)\.d, \1/z, \[x0\] +** zip1 (z[0-9]+)\.d, \2\.d, \2\.d +** st1w \3\.d, \1, \[x8\] +** ret +*/ +v32sf +sf_zip1_d (v32sf x) +{ + return __builtin_shuffle (x, x, (v32si) { PERM4 (0, 32) }); +} diff --git a/gcc/testsuite/gcc.target/aarch64/sve/zip2_2.c b/gcc/testsuite/gcc.target/aarch64/sve/zip2_2.c new file mode 100644 index 0000000..9158ace --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/zip2_2.c @@ -0,0 +1,403 @@ +/* { dg-do assemble { target aarch64_asm_sve_ok } } */ +/* { dg-options "-O -msve-vector-bits=2048 -mlittle-endian --save-temps" } */ +/* { dg-final { check-function-bodies "**" "" } } */ + +typedef unsigned char v128qi __attribute__((vector_size(128))); +typedef unsigned char v64qi __attribute__((vector_size(64))); +typedef unsigned char v32qi __attribute__((vector_size(32))); +typedef unsigned short v64hi __attribute__((vector_size(128))); +typedef unsigned short v32hi __attribute__((vector_size(64))); +typedef _Float16 v64hf __attribute__((vector_size(128))); +typedef _Float16 v32hf __attribute__((vector_size(64))); +typedef __bf16 v64bf __attribute__((vector_size(128))); +typedef __bf16 v32bf __attribute__((vector_size(64))); +typedef unsigned int v32si __attribute__((vector_size(128))); +typedef float v32sf __attribute__((vector_size(128))); + +#define PERM0(B, C) B, B + C +#define PERM1(B, C) PERM0 (B, C), PERM0 (B + 1, C) +#define PERM2(B, C) PERM1 (B, C), PERM1 (B + 2, C) +#define PERM3(B, C) PERM2 (B, C), PERM2 (B + 4, C) +#define PERM4(B, C) PERM3 (B, C), PERM3 (B + 8, C) +#define PERM5(B, C) PERM4 (B, C), PERM4 (B + 16, C) +#define PERM6(B, C) PERM5 (B, C), PERM5 (B + 32, C) + +/* +** qi_zip2_h_a: +** ptrue (p[0-7])\.b, vl256 +** ld1b (z[0-9]+)\.h, \1/z, \[x0\] +** zip2 (z[0-9]+)\.h, \2\.h, \2\.h +** st1b \3\.h, \1, \[x8\] +** ret +*/ +v128qi +qi_zip2_h_a (v128qi x) +{ + return __builtin_shuffle (x, x, (v128qi) { PERM6 (64, 128) }); +} + +/* +** qi_zip2_h_b: +** ptrue (p[0-7])\.b, vl256 +** ld1b (z[0-9]+)\.h, \1/z, \[x0\] +** zip2 (z[0-9]+)\.h, \2\.h, \2\.h +** st1b \3\.h, \1, \[x8\] +** ret +*/ +v128qi +qi_zip2_h_b (v128qi x) +{ + return __builtin_shuffle (x, x, (v128qi) { PERM6 (64, 128) }); +} + +/* +** qi_zip2_h_c: +** ptrue (p[0-7])\.b, vl256 +** ld1b (z[0-9]+)\.h, \1/z, \[x0\] +** zip2 (z[0-9]+)\.h, \2\.h, \2\.h +** st1b \3\.h, \1, \[x8\] +** ret +*/ +v128qi +qi_zip2_h_c (v128qi x) +{ + return __builtin_shuffle (x, x, (v128qi) { PERM6 (192, 0) }); +} + +/* +** qi_zip2_h_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1b (z[0-9]+)\.h, \1/z, \[x1\] +** ld1b (z[0-9]+)\.h, \1/z, \[x0\] +** zip2 \3\.h, \3\.h, \2\.h +** st1b \3\.h, \1, \[x8\] +** | +** ld1b (z[0-9]+)\.h, \1/z, \[x0\] +** ld1b (z[0-9]+)\.h, \1/z, \[x1\] +** zip2 \4\.h, \4\.h, \5\.h +** st1b \4\.h, \1, \[x8\] +** ) +** ret +*/ +v128qi +qi_zip2_h_two_op (v128qi x, v128qi y) +{ + return __builtin_shuffle (x, y, (v128qi) { PERM6 (64, 128) }); +} + +/* +** qi_zip2_s: +** ptrue (p[0-7])\.b, vl256 +** ld1b (z[0-9]+)\.s, \1/z, \[x0\] +** zip2 (z[0-9]+)\.s, \2\.s, \2\.s +** st1b \3\.s, \1, \[x8\] +** ret +*/ +v64qi +qi_zip2_s (v64qi x) +{ + return __builtin_shuffle (x, x, (v64qi) { PERM5 (32, 64) }); +} + +/* +** qi_zip2_s_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1b (z[0-9]+)\.s, \1/z, \[x1\] +** ld1b (z[0-9]+)\.s, \1/z, \[x0\] +** zip2 \3\.s, \3\.s, \2\.s +** st1b \3\.s, \1, \[x8\] +** | +** ld1b (z[0-9]+)\.s, \1/z, \[x0\] +** ld1b (z[0-9]+)\.s, \1/z, \[x1\] +** zip2 \4\.s, \4\.s, \5\.s +** st1b \4\.s, \1, \[x8\] +** ) +** ret +*/ +v64qi +qi_zip2_s_two_op (v64qi x, v64qi y) +{ + return __builtin_shuffle (x, y, (v64qi) { PERM5 (32, 64) }); +} + +/* +** qi_zip2_d: +** ptrue (p[0-7])\.b, vl256 +** ld1b (z[0-9]+)\.d, \1/z, \[x0\] +** zip2 (z[0-9]+)\.d, \2\.d, \2\.d +** st1b \3\.d, \1, \[x8\] +** ret +*/ +v32qi +qi_zip2_d (v32qi x) +{ + return __builtin_shuffle (x, x, (v32qi) { PERM4 (16, 32) }); +} + +/* +** qi_zip2_d_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1b (z[0-9]+)\.d, \1/z, \[x1\] +** ld1b (z[0-9]+)\.d, \1/z, \[x0\] +** zip2 \3\.d, \3\.d, \2\.d +** st1b \3\.d, \1, \[x8\] +** | +** ld1b (z[0-9]+)\.d, \1/z, \[x0\] +** ld1b (z[0-9]+)\.d, \1/z, \[x1\] +** zip2 \4\.d, \4\.d, \5\.d +** st1b \4\.d, \1, \[x8\] +** ) +** ret +*/ +v32qi +qi_zip2_d_two_op (v32qi x, v32qi y) +{ + return __builtin_shuffle (x, y, (v32qi) { PERM4 (16, 32) }); +} + +/* +** hi_zip2_s: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** zip2 (z[0-9]+)\.s, \2\.s, \2\.s +** st1h \3\.s, \1, \[x8\] +** ret +*/ +v64hi +hi_zip2_s (v64hi x) +{ + return __builtin_shuffle (x, x, (v64hi) { PERM5 (32, 64) }); +} + +/* +** hi_zip2_s_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1h (z[0-9]+)\.s, \1/z, \[x1\] +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** zip2 \3\.s, \3\.s, \2\.s +** st1h \3\.s, \1, \[x8\] +** | +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** ld1h (z[0-9]+)\.s, \1/z, \[x1\] +** zip2 \4\.s, \4\.s, \5\.s +** st1h \4\.s, \1, \[x8\] +** ) +** ret +*/ +v64hi +hi_zip2_s_two_op (v64hi x, v64hi y) +{ + return __builtin_shuffle (x, y, (v64hi) { PERM5 (32, 64) }); +} + +/* +** hf_zip2_s: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** zip2 (z[0-9]+)\.s, \2\.s, \2\.s +** st1h \3\.s, \1, \[x8\] +** ret +*/ +v64hf +hf_zip2_s (v64hf x) +{ + return __builtin_shuffle (x, x, (v64hi) { PERM5 (32, 64) }); +} + +/* +** hf_zip2_s_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1h (z[0-9]+)\.s, \1/z, \[x1\] +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** zip2 \3\.s, \3\.s, \2\.s +** st1h \3\.s, \1, \[x8\] +** | +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** ld1h (z[0-9]+)\.s, \1/z, \[x1\] +** zip2 \4\.s, \4\.s, \5\.s +** st1h \4\.s, \1, \[x8\] +** ) +** ret +*/ +v64hf +hf_zip2_s_two_op (v64hf x, v64hf y) +{ + return __builtin_shuffle (x, y, (v64hi) { PERM5 (32, 64) }); +} + +/* +** bf_zip2_s: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** zip2 (z[0-9]+)\.s, \2\.s, \2\.s +** st1h \3\.s, \1, \[x8\] +** ret +*/ +v64bf +bf_zip2_s (v64bf x) +{ + return __builtin_shuffle (x, x, (v64hi) { PERM5 (32, 64) }); +} + +/* +** bf_zip2_s_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1h (z[0-9]+)\.s, \1/z, \[x1\] +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** zip2 \3\.s, \3\.s, \2\.s +** st1h \3\.s, \1, \[x8\] +** | +** ld1h (z[0-9]+)\.s, \1/z, \[x0\] +** ld1h (z[0-9]+)\.s, \1/z, \[x1\] +** zip2 \4\.s, \4\.s, \5\.s +** st1h \4\.s, \1, \[x8\] +** ) +** ret +*/ +v64bf +bf_zip2_s_two_op (v64bf x, v64bf y) +{ + return __builtin_shuffle (x, y, (v64hi) { PERM5 (32, 64) }); +} + +/* +** hi_zip2_d: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** zip2 (z[0-9]+)\.d, \2\.d, \2\.d +** st1h \3\.d, \1, \[x8\] +** ret +*/ +v32hi +hi_zip2_d (v32hi x) +{ + return __builtin_shuffle (x, x, (v32hi) { PERM4 (16, 32) }); +} + +/* +** hi_zip2_d_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1h (z[0-9]+)\.d, \1/z, \[x1\] +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** zip2 \3\.d, \3\.d, \2\.d +** st1h \3\.d, \1, \[x8\] +** | +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** ld1h (z[0-9]+)\.d, \1/z, \[x1\] +** zip2 \4\.d, \4\.d, \5\.d +** st1h \4\.d, \1, \[x8\] +** ) +** ret +*/ +v32hi +hi_zip2_d_two_op (v32hi x, v32hi y) +{ + return __builtin_shuffle (x, y, (v32hi) { PERM4 (16, 32) }); +} + +/* +** hf_zip2_d: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** zip2 (z[0-9]+)\.d, \2\.d, \2\.d +** st1h \3\.d, \1, \[x8\] +** ret +*/ +v32hf +hf_zip2_d (v32hf x) +{ + return __builtin_shuffle (x, x, (v32hi) { PERM4 (16, 32) }); +} + +/* +** hf_zip2_d_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1h (z[0-9]+)\.d, \1/z, \[x1\] +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** zip2 \3\.d, \3\.d, \2\.d +** st1h \3\.d, \1, \[x8\] +** | +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** ld1h (z[0-9]+)\.d, \1/z, \[x1\] +** zip2 \4\.d, \4\.d, \5\.d +** st1h \4\.d, \1, \[x8\] +** ) +** ret +*/ +v32hf +hf_zip2_d_two_op (v32hf x, v32hf y) +{ + return __builtin_shuffle (x, y, (v32hi) { PERM4 (16, 32) }); +} + +/* +** bf_zip2_d: +** ptrue (p[0-7])\.b, vl256 +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** zip2 (z[0-9]+)\.d, \2\.d, \2\.d +** st1h \3\.d, \1, \[x8\] +** ret +*/ +v32bf +bf_zip2_d (v32bf x) +{ + return __builtin_shuffle (x, x, (v32hi) { PERM4 (16, 32) }); +} + +/* +** bf_zip2_d_two_op: +** ptrue (p[0-7])\.b, vl256 +** ( +** ld1h (z[0-9]+)\.d, \1/z, \[x1\] +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** zip2 \3\.d, \3\.d, \2\.d +** st1h \3\.d, \1, \[x8\] +** | +** ld1h (z[0-9]+)\.d, \1/z, \[x0\] +** ld1h (z[0-9]+)\.d, \1/z, \[x1\] +** zip2 \4\.d, \4\.d, \5\.d +** st1h \4\.d, \1, \[x8\] +** ) +** ret +*/ +v32bf +bf_zip2_d_two_op (v32bf x, v32bf y) +{ + return __builtin_shuffle (x, y, (v32hi) { PERM4 (16, 32) }); +} + +/* +** si_zip2_d: +** ptrue (p[0-7])\.b, vl256 +** ld1w (z[0-9]+)\.d, \1/z, \[x0\] +** zip2 (z[0-9]+)\.d, \2\.d, \2\.d +** st1w \3\.d, \1, \[x8\] +** ret +*/ +v32si +si_zip2_d (v32si x) +{ + return __builtin_shuffle (x, x, (v32si) { PERM4 (16, 32) }); +} + +/* +** sf_zip2_d: +** ptrue (p[0-7])\.b, vl256 +** ld1w (z[0-9]+)\.d, \1/z, \[x0\] +** zip2 (z[0-9]+)\.d, \2\.d, \2\.d +** st1w \3\.d, \1, \[x8\] +** ret +*/ +v32sf +sf_zip2_d (v32sf x) +{ + return __builtin_shuffle (x, x, (v32si) { PERM4 (16, 32) }); +} diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/pr97327.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/pr97327.c new file mode 100644 index 0000000..8f6d360 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/pr97327.c @@ -0,0 +1,8 @@ +/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ +/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=hard" } { "" } } */ +/* { dg-additional-options "-mcpu=cortex-m55 -mfloat-abi=soft -mfpu=auto -Werror" } */ + +int main () +{ + return 0; +} diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_s64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_s64.c index 6570d4a..319188b7 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_s64.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_s64.c @@ -10,12 +10,10 @@ foo (uint64x2_t * addr, const int offset, int64x2_t value, mve_pred16_t p) vstrdq_scatter_base_wb_p_s64 (addr, 8, value, p); } -/* { dg-final { scan-assembler "vstrdt.u64" } } */ - void foo1 (uint64x2_t * addr, const int offset, int64x2_t value, mve_pred16_t p) { vstrdq_scatter_base_wb_p (addr, 8, value, p); } -/* { dg-final { scan-assembler "vstrdt.u64" } } */ +/* { dg-final { scan-assembler-times "vstrdt.u64\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_u64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_u64.c index 8444a3a..940b542 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_u64.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_u64.c @@ -10,12 +10,10 @@ foo (uint64x2_t * addr, const int offset, uint64x2_t value, mve_pred16_t p) vstrdq_scatter_base_wb_p_u64 (addr, 8, value, p); } -/* { dg-final { scan-assembler "vstrdt.u64" } } */ - void foo1 (uint64x2_t * addr, const int offset, uint64x2_t value, mve_pred16_t p) { vstrdq_scatter_base_wb_p (addr, 8, value, p); } -/* { dg-final { scan-assembler "vstrdt.u64" } } */ +/* { dg-final { scan-assembler-times "vstrdt.u64\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_s64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_s64.c index e0ec283..33926d5 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_s64.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_s64.c @@ -10,12 +10,10 @@ foo (uint64x2_t * addr, const int offset, int64x2_t value) vstrdq_scatter_base_wb_s64 (addr, 8, value); } -/* { dg-final { scan-assembler "vstrd.u64" } } */ - void foo1 (uint64x2_t * addr, const int offset, int64x2_t value) { vstrdq_scatter_base_wb (addr, 8, value); } -/* { dg-final { scan-assembler "vstrd.u64" } } */ +/* { dg-final { scan-assembler-times "vstrd.u64\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_u64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_u64.c index fe41d6b..b7ffcf9 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_u64.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_u64.c @@ -10,12 +10,10 @@ foo (uint64x2_t * addr, const int offset, uint64x2_t value) vstrdq_scatter_base_wb_u64 (addr, 8, value); } -/* { dg-final { scan-assembler "vstrd.u64" } } */ - void foo1 (uint64x2_t * addr, const int offset, uint64x2_t value) { vstrdq_scatter_base_wb (addr, 8, value); } -/* { dg-final { scan-assembler "vstrd.u64" } } */ +/* { dg-final { scan-assembler-times "vstrd.u64\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_f32.c index f4ceabb..b2cc6e5 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_f32.c @@ -10,12 +10,10 @@ foo (uint32x4_t * addr, const int offset, float32x4_t value) vstrwq_scatter_base_wb_f32 (addr, 8, value); } -/* { dg-final { scan-assembler "vstrw.u32" } } */ - void foo1 (uint32x4_t * addr, const int offset, float32x4_t value) { vstrwq_scatter_base_wb (addr, 8, value); } -/* { dg-final { scan-assembler "vstrw.u32" } } */ +/* { dg-final { scan-assembler-times "vstrw.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_f32.c index cb2eb68..4befd49 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_f32.c @@ -10,12 +10,10 @@ foo (uint32x4_t * addr, const int offset, float32x4_t value, mve_pred16_t p) vstrwq_scatter_base_wb_p_f32 (addr, 8, value, p); } -/* { dg-final { scan-assembler "vstrwt.u32" } } */ - void foo1 (uint32x4_t * addr, const int offset, float32x4_t value, mve_pred16_t p) { vstrwq_scatter_base_wb_p (addr, 8, value, p); } -/* { dg-final { scan-assembler "vstrwt.u32" } } */ +/* { dg-final { scan-assembler-times "vstrwt.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_s32.c index d973c02..dfb1827 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_s32.c @@ -10,12 +10,10 @@ foo (uint32x4_t * addr, const int offset, int32x4_t value, mve_pred16_t p) vstrwq_scatter_base_wb_p_s32 (addr, 8, value, p); } -/* { dg-final { scan-assembler "vstrwt.u32" } } */ - void foo1 (uint32x4_t * addr, const int offset, int32x4_t value, mve_pred16_t p) { vstrwq_scatter_base_wb_p (addr, 8, value, p); } -/* { dg-final { scan-assembler "vstrwt.u32" } } */ +/* { dg-final { scan-assembler-times "vstrwt.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_u32.c index c0f0964..4eb78c6 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_u32.c @@ -10,12 +10,10 @@ foo (uint32x4_t * addr, const int offset, uint32x4_t value, mve_pred16_t p) vstrwq_scatter_base_wb_p_u32 (addr, 8, value, p); } -/* { dg-final { scan-assembler "vstrwt.u32" } } */ - void foo1 (uint32x4_t * addr, const int offset, uint32x4_t value, mve_pred16_t p) { vstrwq_scatter_base_wb_p (addr, 8, value, p); } -/* { dg-final { scan-assembler "vstrwt.u32" } } */ +/* { dg-final { scan-assembler-times "vstrwt.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_s32.c index 6ef0955..618dbaf 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_s32.c @@ -10,12 +10,10 @@ foo (uint32x4_t * addr, const int offset, int32x4_t value) vstrwq_scatter_base_wb_s32 (addr, 8, value); } -/* { dg-final { scan-assembler "vstrw.u32" } } */ - void foo1 (uint32x4_t * addr, const int offset, int32x4_t value) { vstrwq_scatter_base_wb (addr, 8, value); } -/* { dg-final { scan-assembler "vstrw.u32" } } */ +/* { dg-final { scan-assembler-times "vstrw.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_u32.c index 620dffa8..912a459 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_u32.c @@ -10,12 +10,10 @@ foo (uint32x4_t * addr, uint32x4_t value) vstrwq_scatter_base_wb_u32 (addr, 8, value); } -/* { dg-final { scan-assembler "vstrw.u32" } } */ - void foo1 (uint32x4_t * addr, uint32x4_t value) { vstrwq_scatter_base_wb (addr, 8, value); } -/* { dg-final { scan-assembler "vstrw.u32" } } */ +/* { dg-final { scan-assembler-times "vstrw.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */ diff --git a/gcc/testsuite/gcc.target/arm/pure-code/no-literal-pool-m0.c b/gcc/testsuite/gcc.target/arm/pure-code/no-literal-pool-m0.c new file mode 100644 index 0000000..bd6f4af --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/pure-code/no-literal-pool-m0.c @@ -0,0 +1,176 @@ +/* { dg-do compile } */ +/* { dg-skip-if "skip override" { *-*-* } { "-mfloat-abi=hard" } { "" } } */ +/* { dg-options "-mpure-code -mcpu=cortex-m0 -march=armv6s-m -mthumb -mfloat-abi=soft" } */ +/* { dg-final { check-function-bodies "**" "" } } */ + +/* Does not use thumb1_gen_const_int. +** test_0: +** ... +** movs r[0-3], #0 +** ... +*/ +int +test_0 () +{ + return 0; +} + +/* Does not use thumb1_gen_const_int. +** test_128: +** ... +** movs r[0-3], #128 +** ... +*/ +int +test_128 () +{ + return 128; +} + +/* Does not use thumb1_gen_const_int. +** test_264: +** ... +** movs r[0-3], #132 +** lsls r[0-3], r[0-3], #1 +** ... +*/ +int +test_264 () +{ + return 264; +} + +/* Does not use thumb1_gen_const_int. +** test_510: +** ... +** movs r[0-3], #255 +** lsls r[0-3], r[0-3], #1 +** ... +*/ +int +test_510 () +{ + return 510; +} + +/* Does not use thumb1_gen_const_int. +** test_512: +** ... +** movs r[0-3], #128 +** lsls r[0-3], r[0-3], #2 +** ... +*/ +int +test_512 () +{ + return 512; +} + +/* Does not use thumb1_gen_const_int. +** test_764: +** ... +** movs r[0-3], #191 +** lsls r[0-3], r[0-3], #2 +** ... +*/ +int +test_764 () +{ + return 764; +} + +/* Does not use thumb1_gen_const_int. +** test_65536: +** ... +** movs r[0-3], #128 +** lsls r[0-3], r[0-3], #9 +** ... +*/ +int +test_65536 () +{ + return 65536; +} + +/* +** test_0x123456: +** ... +** movs r[0-3], #18 +** lsls r[0-3], r[0-3], #8 +** adds r[0-3], r[0-3], #52 +** lsls r[0-3], r[0-3], #8 +** adds r[0-3], r[0-3], #86 +** ... +*/ +int +test_0x123456 () +{ + return 0x123456; +} + +/* +** test_0x1123456: +** ... +** movs r[0-3], #137 +** lsls r[0-3], r[0-3], #8 +** adds r[0-3], r[0-3], #26 +** lsls r[0-3], r[0-3], #8 +** adds r[0-3], r[0-3], #43 +** lsls r[0-3], r[0-3], #1 +** ... +*/ +int +test_0x1123456 () +{ + return 0x1123456; +} + +/* With -Os, we generate: + movs r0, #16 + lsls r0, r0, r0 + With the other optimization levels, we generate: + movs r0, #16 + lsls r0, r0, #16 + hence the two alternatives. */ +/* +** test_0x1000010: +** ... +** movs r[0-3], #16 +** lsls r[0-3], r[0-3], (#16|r[0-3]) +** adds r[0-3], r[0-3], #1 +** lsls r[0-3], r[0-3], #4 +** ... +*/ +int +test_0x1000010 () +{ + return 0x1000010; +} + +/* +** test_0x1000011: +** ... +** movs r[0-3], #1 +** lsls r[0-3], r[0-3], #24 +** adds r[0-3], r[0-3], #17 +** ... +*/ +int +test_0x1000011 () +{ + return 0x1000011; +} + +/* +** test_m8192: +** ... +** movs r[0-3], #1 +** lsls r[0-3], r[0-3], #13 +** rsbs r[0-3], r[0-3], #0 +** ... +*/ +int +test_m8192 () +{ + return -8192; +} diff --git a/gcc/testsuite/gcc.target/arm/pure-code/no-literal-pool-m23.c b/gcc/testsuite/gcc.target/arm/pure-code/no-literal-pool-m23.c new file mode 100644 index 0000000..9537012 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/pure-code/no-literal-pool-m23.c @@ -0,0 +1,172 @@ +/* { dg-do compile } */ +/* { dg-skip-if "skip override" { *-*-* } { "-mfloat-abi=hard" } { "" } } */ +/* { dg-options "-mpure-code -mcpu=cortex-m23 -march=armv8-m.base -mthumb -mfloat-abi=soft" } */ +/* { dg-final { check-function-bodies "**" "" } } */ + +/* +** testi: +** ... +** movs r[0-3], #1 +** lsls r[0-3], #13 +** rsbs r[0-3], #0 +** ... +*/ +int +testi (int *p) +{ + if (*p > 0x12345678) + return *p-8192; + else + return *p+8192; +} + +/* Does not use thumb1_gen_const_int. +** test_0: +** ... +** movs r[0-3], #0 +** ... +*/ +int +test_0 () +{ + return 0; +} + +/* Does not use thumb1_gen_const_int. +** test_128: +** ... +** movs r[0-3], #128 +** ... +*/ +int +test_128 () +{ + return 128; +} + +/* Does not use thumb1_gen_const_int. +** test_264: +** ... +** movw r[0-3], #264 +** ... +*/ +int +test_264 () +{ + return 264; +} + +/* Does not use thumb1_gen_const_int. +** test_510: +** ... +** movw r[0-3], #510 +** ... +*/ +int +test_510 () +{ + return 510; +} + +/* Does not use thumb1_gen_const_int. +** test_512: +** ... +** movw r[0-3], #512 +** ... +*/ +int +test_512 () +{ + return 512; +} + +/* Does not use thumb1_gen_const_int. +** test_764: +** ... +** movw r[0-3], #764 +** ... +*/ +int +test_764 () +{ + return 764; +} + +/* Does not use thumb1_gen_const_int. +** test_65536: +** ... +** movs r[0-3], #128 +** lsls r[0-3], r[0-3], #9 +** ... +*/ +int +test_65536 () +{ + return 65536; +} + +/* Does not use thumb1_gen_const_int. +** test_0x123456: +** ... +** movw r[0-3], #13398 +** movt r[0-3], 18 +** ... +*/ +int +test_0x123456 () +{ + return 0x123456; +} + +/* Does not use thumb1_gen_const_int. +** test_0x1123456: +** ... +** movw r[0-3], #13398 +** movt r[0-3], 274 +** ... +*/ +int +test_0x1123456 () +{ + return 0x1123456; +} + +/* Does not use thumb1_gen_const_int. +** test_0x1000010: +** ... +** movs r[0-3], #16 +** movt r[0-3], 256 +** ... +*/ +int +test_0x1000010 () +{ + return 0x1000010; +} + +/* Does not use thumb1_gen_const_int. +** test_0x1000011: +** ... +** movs r[0-3], #17 +** movt r[0-3], 256 +** ... +*/ +int +test_0x1000011 () +{ + return 0x1000011; +} + +/* +** test_m8192: +** ... +** movs r[0-3], #1 +** lsls r[0-3], #13 +** rsbs r[0-3], #0 +** ... +*/ +int +test_m8192 () +{ + return -8192; +} diff --git a/gcc/testsuite/gcc.target/arm/pure-code/pr96767.c b/gcc/testsuite/gcc.target/arm/pure-code/pr96767.c new file mode 100644 index 0000000..cb3ee68 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/pure-code/pr96767.c @@ -0,0 +1,10 @@ +/* { dg-do compile } */ +/* { dg-options "-mpure-code" } */ + +int x; +int f1 (void) { return x; } + +/* We expect only one indirect load like ldr r3, [r3]. In some + configurations there is an additional ldr rX, [sp], #4 which is not + related to what we check here, so make sure not to match it. */ +/* { dg-final { scan-assembler-times "ldr\tr\[0-9\]+, \\\[r\[0-9\]+\\\]" 1 } } */ diff --git a/gcc/testsuite/gcc.target/arm/pure-code/pr96770.c b/gcc/testsuite/gcc.target/arm/pure-code/pr96770.c new file mode 100644 index 0000000..a43d71f --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/pure-code/pr96770.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mpure-code" } */ + +int arr[1000]; +int *f4 (void) { return &arr[1]; } + +/* For cortex-m0 (thumb-1/v6m), we generate 4 movs with upper/lower:#arr+4. */ +/* { dg-final { scan-assembler-times "\\+4" 4 { target { { ! arm_thumb1_movt_ok } && { ! arm_thumb2_ok } } } } } */ + +/* For cortex-m with movt/movw (thumb-1/v8m.base or thumb-2), we + generate a movt/movw pair with upper/lower:#arr+4. */ +/* { dg-final { scan-assembler-times "\\+4" 2 { target { arm_thumb1_movt_ok || arm_thumb2_ok } } } } */ + +int *f5 (void) { return &arr[80]; } + +/* For cortex-m0 (thumb-1/v6m), we generate 1 ldr from rodata pointer to arr+320. */ +/* { dg-final { scan-assembler-times "\\+320" 1 { target { { ! arm_thumb1_movt_ok } && { ! arm_thumb2_ok } } } } } */ + +/* For cortex-m with movt/movw (thumb-1/v8m.base or thumb-2), we + generate a movt/movw pair with upper/lower:arr+320. */ +/* { dg-final { scan-assembler-times "\\+320" 2 { target { arm_thumb1_movt_ok || arm_thumb2_ok } } } } */ diff --git a/gcc/testsuite/gcc.target/arm/simd/mve-vminmax_1.c b/gcc/testsuite/gcc.target/arm/simd/mve-vminmax_1.c new file mode 100644 index 0000000..6c8e7d4 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/simd/mve-vminmax_1.c @@ -0,0 +1,61 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +/* { dg-options "-O3" } */ +/* { dg-add-options arm_v8_1m_mve } */ + +#include <stdint.h> + +#define MAX(a, b) ((a) > (b)) ? (a) : (b) +#define MIN(a, b) ((a) < (b)) ? (a) : (b) + + +#define TEST_BINOP(OP, TY, N) \ + TY test_##OP##_##TY (TY * dest, TY * a, TY * b) \ + { \ + int i; \ + for (i=0; i<N; i++) \ + { \ + dest[i] = OP (a[i], b[i]); \ + } \ + } + +/* Test vmax. */ + +TEST_BINOP (MAX, int32_t, 4) +/* { dg-final { scan-assembler-times {vmax\.s32\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } } */ + +TEST_BINOP (MAX, uint32_t, 4) +/* { dg-final { scan-assembler-times {vmax\.u32\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } } */ + +TEST_BINOP (MAX, int16_t, 8) +/* { dg-final { scan-assembler-times {vmax\.s16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } } */ + +TEST_BINOP (MAX, uint16_t, 8) +/* { dg-final { scan-assembler-times {vmax\.u16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } } */ + +TEST_BINOP (MAX, int8_t, 16) +/* { dg-final { scan-assembler-times {vmax\.s8\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } } */ + +TEST_BINOP (MAX, uint8_t, 16) +/* { dg-final { scan-assembler-times {vmax\.u8\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } } */ + +/* Test vmin. */ + +TEST_BINOP (MIN, int32_t, 4) +/* { dg-final { scan-assembler-times {vmin\.s32\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } } */ + +TEST_BINOP (MIN, uint32_t, 4) +/* { dg-final { scan-assembler-times {vmin\.u32\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } } */ + +TEST_BINOP (MIN, int16_t, 8) +/* { dg-final { scan-assembler-times {vmin\.s16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } } */ + +TEST_BINOP (MIN, uint16_t, 8) +/* { dg-final { scan-assembler-times {vmin\.u16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } } */ + +TEST_BINOP (MIN, int8_t, 16) +/* { dg-final { scan-assembler-times {vmin\.s8\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } } */ + +TEST_BINOP (MIN, uint8_t, 16) +/* { dg-final { scan-assembler-times {vmin\.u8\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } } */ + diff --git a/gcc/testsuite/gcc.target/arm/simd/mve-vmul_1.c b/gcc/testsuite/gcc.target/arm/simd/mve-vmul_1.c new file mode 100644 index 0000000..514f292 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/simd/mve-vmul_1.c @@ -0,0 +1,64 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ +/* { dg-add-options arm_v8_1m_mve_fp } */ +/* { dg-additional-options "-O3" } */ + +#include <stdint.h> + +void test_vmul_i32 (int32_t * dest, int32_t * a, int32_t * b) { + int i; + for (i=0; i<4; i++) { + dest[i] = a[i] * b[i]; + } +} + +void test_vmul_i32_u (uint32_t * dest, uint32_t * a, uint32_t * b) { + int i; + for (i=0; i<4; i++) { + dest[i] = a[i] * b[i]; + } +} + +/* { dg-final { scan-assembler-times {vmul\.i32\tq[0-9]+, q[0-9]+, q[0-9]+} 2 } } */ + +void test_vmul_i16 (int16_t * dest, int16_t * a, int16_t * b) { + int i; + for (i=0; i<8; i++) { + dest[i] = a[i] * b[i]; + } +} + +void test_vmul_i16_u (uint16_t * dest, uint16_t * a, uint16_t * b) { + int i; + for (i=0; i<8; i++) { + dest[i] = a[i] * b[i]; + } +} + +/* { dg-final { scan-assembler-times {vmul\.i16\tq[0-9]+, q[0-9]+, q[0-9]+} 2 } } */ + +void test_vmul_i8 (int8_t * dest, int8_t * a, int8_t * b) { + int i; + for (i=0; i<16; i++) { + dest[i] = a[i] * b[i]; + } +} + +void test_vmul_i8_u (uint8_t * dest, uint8_t * a, uint8_t * b) { + int i; + for (i=0; i<16; i++) { + dest[i] = a[i] * b[i]; + } +} + +/* { dg-final { scan-assembler-times {vmul\.i8\tq[0-9]+, q[0-9]+, q[0-9]+} 2 } } */ + +void test_vmul_f32 (float * dest, float * a, float * b) { + int i; + for (i=0; i<4; i++) { + dest[i] = a[i] * b[i]; + } +} + +/* { dg-final { scan-assembler-times {vmul\.f32\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } } */ + diff --git a/gcc/testsuite/gcc.target/arm/simd/mve-vsub_1.c b/gcc/testsuite/gcc.target/arm/simd/mve-vsub_1.c new file mode 100644 index 0000000..cb3ef3a --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/simd/mve-vsub_1.c @@ -0,0 +1,65 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ +/* { dg-add-options arm_v8_1m_mve_fp } */ +/* { dg -additional-options "-O3 -funsafe-math-optimizations" } */ +/* { dg-additional-options "-O3" } */ + +#include <stdint.h> + +void test_vsub_i32 (int32_t * dest, int32_t * a, int32_t * b) { + int i; + for (i=0; i<4; i++) { + dest[i] = a[i] - b[i]; + } +} + +void test_vsub_i32_u (uint32_t * dest, uint32_t * a, uint32_t * b) { + int i; + for (i=0; i<4; i++) { + dest[i] = a[i] - b[i]; + } +} + +/* { dg-final { scan-assembler-times {vsub\.i32\tq[0-9]+, q[0-9]+, q[0-9]+} 2 } } */ + +void test_vsub_i16 (int16_t * dest, int16_t * a, int16_t * b) { + int i; + for (i=0; i<8; i++) { + dest[i] = a[i] - b[i]; + } +} + +void test_vsub_i16_u (uint16_t * dest, uint16_t * a, uint16_t * b) { + int i; + for (i=0; i<8; i++) { + dest[i] = a[i] - b[i]; + } +} + +/* { dg-final { scan-assembler-times {vsub\.i16\tq[0-9]+, q[0-9]+, q[0-9]+} 2 } } */ + +void test_vsub_i8 (int8_t * dest, int8_t * a, int8_t * b) { + int i; + for (i=0; i<16; i++) { + dest[i] = a[i] - b[i]; + } +} + +void test_vsub_i8_u (uint8_t * dest, uint8_t * a, uint8_t * b) { + int i; + for (i=0; i<16; i++) { + dest[i] = a[i] - b[i]; + } +} + +/* { dg-final { scan-assembler-times {vsub\.i8\tq[0-9]+, q[0-9]+, q[0-9]+} 2 } } */ + +void test_vsub_f32 (float * dest, float * a, float * b) { + int i; + for (i=0; i<4; i++) { + dest[i] = a[i] - b[i]; + } +} + +/* { dg-final { scan-assembler-times {vsub\.f32\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } } */ + diff --git a/gcc/testsuite/gcc.target/arm/simd/vld1_bf16_1.c b/gcc/testsuite/gcc.target/arm/simd/vld1_bf16_1.c new file mode 100644 index 0000000..b6b00dc --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/simd/vld1_bf16_1.c @@ -0,0 +1,29 @@ +/* { dg-do assemble } */ +/* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ +/* { dg-add-options arm_v8_2a_bf16_neon } */ +/* { dg-additional-options "-save-temps -O2 -mfloat-abi=hard" } */ +/* { dg-final { check-function-bodies "**" "" } } */ + +#include "arm_neon.h" + +/* +**test_vld1_bf16: +** vld1.16 {d0}, \[r0\] +** bx lr +*/ +bfloat16x4_t +test_vld1_bf16 (bfloat16_t const *p) +{ + return vld1_bf16 (p); +} + +/* +**test_vld1q_bf16: +** vld1.16 {d0-d1}, \[r0\] +** bx lr +*/ +bfloat16x8_t +test_vld1q_bf16 (bfloat16_t const *p) +{ + return vld1q_bf16 (p); +} diff --git a/gcc/testsuite/gcc.target/arm/simd/vld1_lane_bf16_1.c b/gcc/testsuite/gcc.target/arm/simd/vld1_lane_bf16_1.c new file mode 100644 index 0000000..94fb38f --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/simd/vld1_lane_bf16_1.c @@ -0,0 +1,22 @@ +/* { dg-do assemble } */ +/* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ +/* { dg-require-effective-target arm_hard_ok } */ +/* { dg-add-options arm_v8_2a_bf16_neon } */ +/* { dg-additional-options "-O3 --save-temps -mfloat-abi=hard" } */ + +#include "arm_neon.h" + +bfloat16x4_t +test_vld1_lane_bf16 (bfloat16_t *a, bfloat16x4_t b) +{ + return vld1_lane_bf16 (a, b, 1); +} + +bfloat16x8_t +test_vld1q_lane_bf16 (bfloat16_t *a, bfloat16x8_t b) +{ + return vld1q_lane_bf16 (a, b, 2); +} + +/* { dg-final { scan-assembler "vld1.16\t{d0\\\[1\\\]}, \\\[r0\\\]" } } */ +/* { dg-final { scan-assembler "vld1.16\t{d0\\\[2\\\]}, \\\[r0\\\]" } } */ diff --git a/gcc/testsuite/gcc.target/arm/simd/vld1_lane_bf16_indices_1.c b/gcc/testsuite/gcc.target/arm/simd/vld1_lane_bf16_indices_1.c new file mode 100644 index 0000000..d9af512 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/simd/vld1_lane_bf16_indices_1.c @@ -0,0 +1,19 @@ +/* { dg-do assemble } */ +/* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ +/* { dg-require-effective-target arm_hard_ok } */ +/* { dg-add-options arm_v8_2a_bf16_neon } */ +/* { dg-additional-options "-mfloat-abi=hard" } */ + +#include "arm_neon.h" + +bfloat16x4_t +test_vld1_lane_bf16 (bfloat16_t *a, bfloat16x4_t b) +{ + bfloat16x4_t res; + res = vld1_lane_bf16 (a, b, -1); + res = vld1_lane_bf16 (a, b, 4); + return res; +} + +/* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */ +/* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */ diff --git a/gcc/testsuite/gcc.target/arm/simd/vld1q_lane_bf16_indices_1.c b/gcc/testsuite/gcc.target/arm/simd/vld1q_lane_bf16_indices_1.c new file mode 100644 index 0000000..a73184c --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/simd/vld1q_lane_bf16_indices_1.c @@ -0,0 +1,19 @@ +/* { dg-do assemble } */ +/* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ +/* { dg-require-effective-target arm_hard_ok } */ +/* { dg-add-options arm_v8_2a_bf16_neon } */ +/* { dg-additional-options "-mfloat-abi=hard" } */ + +#include "arm_neon.h" + +bfloat16x8_t +test_vld1q_lane_bf16 (bfloat16_t *a, bfloat16x8_t b) +{ + bfloat16x8_t res; + res = vld1q_lane_bf16 (a, b, -1); + res = vld1q_lane_bf16 (a, b, 8); + return res; +} + +/* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */ +/* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */ diff --git a/gcc/testsuite/gcc.target/arm/simd/vldn_lane_bf16_1.c b/gcc/testsuite/gcc.target/arm/simd/vldn_lane_bf16_1.c new file mode 100644 index 0000000..58153ed --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/simd/vldn_lane_bf16_1.c @@ -0,0 +1,73 @@ +/* { dg-do assemble } */ +/* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ +/* { dg-add-options arm_v8_2a_bf16_neon } */ +/* { dg-additional-options "-save-temps -O2 -mfloat-abi=hard" } */ +/* { dg-final { check-function-bodies "**" "" } } */ + +#include "arm_neon.h" + +/* +**test_vld2_lane_bf16: +** vld2.16 {d0\[2\], d1\[2\]}, \[r0\] +** bx lr +*/ +bfloat16x4x2_t +test_vld2_lane_bf16 (const bfloat16_t *a, bfloat16x4x2_t b) +{ + return vld2_lane_bf16 (a, b, 2); +} + +/* +**test_vld2q_lane_bf16: +** vld2.16 {d0\[2\], d2\[2\]}, \[r0\] +** bx lr +*/ +bfloat16x8x2_t +test_vld2q_lane_bf16 (const bfloat16_t *a, bfloat16x8x2_t b) +{ + return vld2q_lane_bf16 (a, b, 2); +} + +/* +**test_vld3_lane_bf16: +** vld3.16 {d0\[2\], d1\[2\], d2\[2\]}, \[r0\] +** bx lr +*/ +bfloat16x4x3_t +test_vld3_lane_bf16 (const bfloat16_t *a, bfloat16x4x3_t b) +{ + return vld3_lane_bf16 (a, b, 2); +} + +/* +**test_vld3q_lane_bf16: +** vld3.16 {d0\[2\], d2\[2\], d4\[2\]}, \[r0\] +** bx lr +*/ +bfloat16x8x3_t +test_vld3q_lane_bf16 (const bfloat16_t *a, bfloat16x8x3_t b) +{ + return vld3q_lane_bf16 (a, b, 2); +} + +/* +**test_vld4_lane_bf16: +** vld4.16 {d0\[2\], d1\[2\], d2\[2\], d3\[2\]}, \[r0\] +** bx lr +*/ +bfloat16x4x4_t +test_vld4_lane_bf16 (const bfloat16_t *a, bfloat16x4x4_t b) +{ + return vld4_lane_bf16 (a, b, 2); +} + +/* +**test_vld4q_lane_bf16: +** vld4.16 {d0\[2\], d2\[2\], d4\[2\], d6\[2\]}, \[r0\] +** bx lr +*/ +bfloat16x8x4_t +test_vld4q_lane_bf16 (const bfloat16_t *a, bfloat16x8x4_t b) +{ + return vld4q_lane_bf16 (a, b, 2); +} diff --git a/gcc/testsuite/gcc.target/arm/simd/vst1_bf16_1.c b/gcc/testsuite/gcc.target/arm/simd/vst1_bf16_1.c new file mode 100644 index 0000000..06fb58e --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/simd/vst1_bf16_1.c @@ -0,0 +1,29 @@ +/* { dg-do assemble } */ +/* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ +/* { dg-add-options arm_v8_2a_bf16_neon } */ +/* { dg-additional-options "-save-temps -O2 -mfloat-abi=hard" } */ +/* { dg-final { check-function-bodies "**" "" } } */ + +#include "arm_neon.h" + +/* +**test_vst1_bf16: +** vst1.16 {d0}, \[r0\] +** bx lr +*/ +void +test_vst1_bf16 (bfloat16_t *a, bfloat16x4_t b) +{ + vst1_bf16 (a, b); +} + +/* +**test_vst1q_bf16: +** vst1.16 {d0-d1}, \[r0\] +** bx lr +*/ +void +test_vst1q_bf16 (bfloat16_t *a, bfloat16x8_t b) +{ + vst1q_bf16 (a, b); +} diff --git a/gcc/testsuite/gcc.target/arm/simd/vst1_lane_bf16_1.c b/gcc/testsuite/gcc.target/arm/simd/vst1_lane_bf16_1.c new file mode 100644 index 0000000..8564b8f --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/simd/vst1_lane_bf16_1.c @@ -0,0 +1,22 @@ +/* { dg-do assemble } */ +/* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ +/* { dg-require-effective-target arm_hard_ok } */ +/* { dg-add-options arm_v8_2a_bf16_neon } */ +/* { dg-additional-options "-O3 --save-temps -mfloat-abi=hard" } */ + +#include "arm_neon.h" + +void +test_vst1_lane_bf16 (bfloat16_t *a, bfloat16x4_t b) +{ + vst1_lane_bf16 (a, b, 1); +} + +void +test_vst1q_lane_bf16 (bfloat16_t *a, bfloat16x8_t b) +{ + vst1q_lane_bf16 (a, b, 2); +} + +/* { dg-final { scan-assembler "vst1.16\t{d0\\\[1\\\]}, \\\[r0\\\]" } } */ +/* { dg-final { scan-assembler "vst1.16\t{d0\\\[2\\\]}, \\\[r0\\\]" } } */ diff --git a/gcc/testsuite/gcc.target/arm/simd/vst1_lane_bf16_indices_1.c b/gcc/testsuite/gcc.target/arm/simd/vst1_lane_bf16_indices_1.c new file mode 100644 index 0000000..1bd6871 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/simd/vst1_lane_bf16_indices_1.c @@ -0,0 +1,17 @@ +/* { dg-do assemble } */ +/* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ +/* { dg-require-effective-target arm_hard_ok } */ +/* { dg-add-options arm_v8_2a_bf16_neon } */ +/* { dg-additional-options "-mfloat-abi=hard" } */ + +#include "arm_neon.h" + +void +test_vst1_lane_bf16 (bfloat16_t *a, bfloat16x4_t b) +{ + vst1_lane_bf16 (a, b, -1); + vst1_lane_bf16 (a, b, 4); +} + +/* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */ +/* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */ diff --git a/gcc/testsuite/gcc.target/arm/simd/vstn_lane_bf16_1.c b/gcc/testsuite/gcc.target/arm/simd/vstn_lane_bf16_1.c new file mode 100644 index 0000000..416ae77 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/simd/vstn_lane_bf16_1.c @@ -0,0 +1,73 @@ +/* { dg-do assemble } */ +/* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ +/* { dg-add-options arm_v8_2a_bf16_neon } */ +/* { dg-additional-options "-save-temps -O2 -mfloat-abi=hard" } */ +/* { dg-final { check-function-bodies "**" "" } } */ + +#include "arm_neon.h" + +/* +**test_vst2_lane_bf16: +** vst2.16 {d0\[2\], d1\[2\]}, \[r0\] +** bx lr +*/ +void +test_vst2_lane_bf16 (bfloat16_t *a, bfloat16x4x2_t b) +{ + return vst2_lane_bf16 (a, b, 2); +} + +/* +**test_vst2q_lane_bf16: +** vst2.16 {d0\[2\], d2\[2\]}, \[r0\] +** bx lr +*/ +void +test_vst2q_lane_bf16 (bfloat16_t *a, bfloat16x8x2_t b) +{ + return vst2q_lane_bf16 (a, b, 2); +} + +/* +**test_vst3_lane_bf16: +** vst3.16 {d0\[2\], d1\[2\], d2\[2\]}, \[r0\] +** bx lr +*/ +void +test_vst3_lane_bf16 (bfloat16_t *a, bfloat16x4x3_t b) +{ + return vst3_lane_bf16 (a, b, 2); +} + +/* +**test_vst3q_lane_bf16: +** vst3.16 {d0\[2\], d2\[2\], d4\[2\]}, \[r0\] +** bx lr +*/ +void +test_vst3q_lane_bf16 (bfloat16_t *a, bfloat16x8x3_t b) +{ + return vst3q_lane_bf16 (a, b, 2); +} + +/* +**test_vst4_lane_bf16: +** vst4.16 {d0\[2\], d1\[2\], d2\[2\], d3\[2\]}, \[r0\] +** bx lr +*/ +void +test_vst4_lane_bf16 (bfloat16_t *a, bfloat16x4x4_t b) +{ + return vst4_lane_bf16 (a, b, 2); +} + +/* +**test_vst4q_lane_bf16: +** vst4.16 {d0\[2\], d2\[2\], d4\[2\], d6\[2\]}, \[r0\] +** bx lr +*/ +void +test_vst4q_lane_bf16 (bfloat16_t *a, bfloat16x8x4_t b) +{ + return vst4q_lane_bf16 (a, b, 2); +} diff --git a/gcc/testsuite/gcc.target/arm/simd/vstq1_lane_bf16_indices_1.c b/gcc/testsuite/gcc.target/arm/simd/vstq1_lane_bf16_indices_1.c new file mode 100644 index 0000000..f18a479 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/simd/vstq1_lane_bf16_indices_1.c @@ -0,0 +1,17 @@ +/* { dg-do assemble } */ +/* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ +/* { dg-require-effective-target arm_hard_ok } */ +/* { dg-add-options arm_v8_2a_bf16_neon } */ +/* { dg-additional-options "-mfloat-abi=hard" } */ + +#include "arm_neon.h" + +void +test_vstq1_lane_bf16 (bfloat16_t *a, bfloat16x8_t b) +{ + vst1q_lane_bf16 (a, b, -1); + vst1q_lane_bf16 (a, b, 8); +} + +/* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */ +/* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */ diff --git a/gcc/testsuite/gcc.target/arm/stack-protector-5.c b/gcc/testsuite/gcc.target/arm/stack-protector-5.c index b808b11..ae70b99 100644 --- a/gcc/testsuite/gcc.target/arm/stack-protector-5.c +++ b/gcc/testsuite/gcc.target/arm/stack-protector-5.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-fstack-protector-all -O2" } */ +/* { dg-options "-fstack-protector-all -Os" } */ void __attribute__ ((noipa)) f (void) diff --git a/gcc/testsuite/gcc.target/arm/stack-protector-6.c b/gcc/testsuite/gcc.target/arm/stack-protector-6.c index f8eec87..2b7e6f7 100644 --- a/gcc/testsuite/gcc.target/arm/stack-protector-6.c +++ b/gcc/testsuite/gcc.target/arm/stack-protector-6.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target fpic } */ -/* { dg-options "-fstack-protector-all -O2 -fpic" } */ +/* { dg-options "-fstack-protector-all -Os -fpic" } */ #include "stack-protector-5.c" diff --git a/gcc/testsuite/gcc.target/i386/amxbf16-asmintel-1.c b/gcc/testsuite/gcc.target/i386/amxbf16-asmintel-1.c index c2d6074..54194e1 100644 --- a/gcc/testsuite/gcc.target/i386/amxbf16-asmintel-1.c +++ b/gcc/testsuite/gcc.target/i386/amxbf16-asmintel-1.c @@ -1,4 +1,5 @@ /* { dg-do compile { target { ! ia32 } } } */ +/* { dg-require-effective-target masm_intel } */ /* { dg-options "-O2 -mamx-bf16 -masm=intel" } */ /* { dg-final { scan-assembler "tdpbf16ps\[ \\t]+\[^\n\]*%tmm1+\[^\n\]*%tmm2+\[^\n\]*%tmm3" } } */ #include <immintrin.h> diff --git a/gcc/testsuite/gcc.target/i386/amxint8-asmintel-1.c b/gcc/testsuite/gcc.target/i386/amxint8-asmintel-1.c index bcfbb3f..f8c376a 100644 --- a/gcc/testsuite/gcc.target/i386/amxint8-asmintel-1.c +++ b/gcc/testsuite/gcc.target/i386/amxint8-asmintel-1.c @@ -1,4 +1,5 @@ /* { dg-do compile { target { ! ia32 } } } */ +/* { dg-require-effective-target masm_intel } */ /* { dg-options "-O2 -mamx-int8 -masm=intel" } */ /* { dg-final { scan-assembler "tdpbssd\[ \\t]+\[^\n\]*%tmm1+\[^\n\]*%tmm2+\[^\n\]*%tmm3" } } */ /* { dg-final { scan-assembler "tdpbsud\[ \\t]+\[^\n\]*%tmm1+\[^\n\]*%tmm2+\[^\n\]*%tmm3" } } * diff --git a/gcc/testsuite/gcc.target/i386/amxtile-asmintel-1.c b/gcc/testsuite/gcc.target/i386/amxtile-asmintel-1.c index 88ef612..6c08fec 100644 --- a/gcc/testsuite/gcc.target/i386/amxtile-asmintel-1.c +++ b/gcc/testsuite/gcc.target/i386/amxtile-asmintel-1.c @@ -1,4 +1,5 @@ /* { dg-do compile { target { ! ia32 } } } */ +/* { dg-require-effective-target masm_intel } */ /* { dg-options "-O2 -mamx-tile -masm=intel " } */ /* { dg-final { scan-assembler "ldtilecfg\[ \\t]" } } */ /* { dg-final { scan-assembler "sttilecfg\[ \\t]" } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx-1.c b/gcc/testsuite/gcc.target/i386/avx-1.c index 2dbed1c..6178e38 100644 --- a/gcc/testsuite/gcc.target/i386/avx-1.c +++ b/gcc/testsuite/gcc.target/i386/avx-1.c @@ -381,6 +381,8 @@ #define __builtin_ia32_vfmaddss3_mask3(A, B, C, D, E) __builtin_ia32_vfmaddss3_mask3(A, B, C, D, 8) #define __builtin_ia32_vfmaddss3_maskz(A, B, C, D, E) __builtin_ia32_vfmaddss3_maskz(A, B, C, D, 8) #define __builtin_ia32_vfmsubss3_mask3(A, B, C, D, E) __builtin_ia32_vfmsubss3_mask3(A, B, C, D, 8) +#define __builtin_ia32_cvtsd2ss_mask_round(A, B, C, D, E) __builtin_ia32_cvtsd2ss_mask_round(A, B, C, D, 8) +#define __builtin_ia32_cvtss2sd_mask_round(A, B, C, D, E) __builtin_ia32_cvtss2sd_mask_round(A, B, C, D, 8) /* avx512erintrin.h */ #define __builtin_ia32_exp2ps_mask(A, B, C, D) __builtin_ia32_exp2ps_mask(A, B, C, 8) @@ -393,6 +395,10 @@ #define __builtin_ia32_rcp28sd_round(A, B, C) __builtin_ia32_rcp28sd_round(A, B, 8) #define __builtin_ia32_rsqrt28ss_round(A, B, C) __builtin_ia32_rsqrt28ss_round(A, B, 8) #define __builtin_ia32_rsqrt28sd_round(A, B, C) __builtin_ia32_rsqrt28sd_round(A, B, 8) +#define __builtin_ia32_rcp28sd_mask_round(A, B, C, D, E) __builtin_ia32_rcp28sd_mask_round(A, B, C, D, 8) +#define __builtin_ia32_rcp28ss_mask_round(A, B, C, D, E) __builtin_ia32_rcp28ss_mask_round(A, B, C, D, 8) +#define __builtin_ia32_rsqrt28sd_mask_round(A, B, C, D, E) __builtin_ia32_rsqrt28sd_mask_round(A, B, C, D, 8) +#define __builtin_ia32_rsqrt28ss_mask_round(A, B, C, D, E) __builtin_ia32_rsqrt28ss_mask_round(A, B, C, D, 8) /* avx512pfintrin.h */ #define __builtin_ia32_gatherpfdps(A, B, C, D, E) __builtin_ia32_gatherpfdps(A, B, C, 1, _MM_HINT_T0) @@ -464,6 +470,10 @@ #define __builtin_ia32_cvtps2qq512_mask(A, B, C, D) __builtin_ia32_cvtps2qq512_mask(A, B, C, 8) #define __builtin_ia32_cvtpd2uqq512_mask(A, B, C, D) __builtin_ia32_cvtpd2uqq512_mask(A, B, C, 8) #define __builtin_ia32_cvtpd2qq512_mask(A, B, C, D) __builtin_ia32_cvtpd2qq512_mask(A, B, C, 8) +#define __builtin_ia32_reducesd_mask_round(A, B, C, D, E, F) __builtin_ia32_reducesd_mask_round(A, B, 8, D, E, 8) +#define __builtin_ia32_reducess_mask_round(A, B, C, D, E, F) __builtin_ia32_reducess_mask_round(A, B, 8, D, E, 8) +#define __builtin_ia32_reducepd512_mask_round(A, B, C, D, E) __builtin_ia32_reducepd512_mask_round(A, 8, C, D, 8) +#define __builtin_ia32_reduceps512_mask_round(A, B, C, D, E) __builtin_ia32_reduceps512_mask_round(A, 8, C, D, 8) /* avx512vlintrin.h */ #define __builtin_ia32_vpermilps_mask(A, E, C, D) __builtin_ia32_vpermilps_mask(A, 1, C, D) diff --git a/gcc/testsuite/gcc.target/i386/avx2-vbroadcastsi128-1.c b/gcc/testsuite/gcc.target/i386/avx2-vbroadcastsi128-1.c index 7805e3d..24dadbe 100644 --- a/gcc/testsuite/gcc.target/i386/avx2-vbroadcastsi128-1.c +++ b/gcc/testsuite/gcc.target/i386/avx2-vbroadcastsi128-1.c @@ -1,14 +1,15 @@ /* { dg-do compile } */ /* { dg-options "-mavx2 -O2" } */ -/* { dg-final { scan-assembler "vbroadcasti128\[ \\t\]+\[^\n\]*%ymm\[0-9\]" } } */ +/* { dg-final { scan-assembler-times "vbroadcasti128\[ \\t\]+\[^\n\]*%ymm\[0-9\]+" 2 } } */ #include <immintrin.h> -volatile __m256i x; -__m128i y; +volatile __m256i x,xx; +__m128i y,yy; void extern avx2_test (void) { x = _mm256_broadcastsi128_si256 (y); + xx = _mm_broadcastsi128_si256 (yy); } diff --git a/gcc/testsuite/gcc.target/i386/avx2-vbroadcastsi128-2.c b/gcc/testsuite/gcc.target/i386/avx2-vbroadcastsi128-2.c index ef1d370..a19464e 100644 --- a/gcc/testsuite/gcc.target/i386/avx2-vbroadcastsi128-2.c +++ b/gcc/testsuite/gcc.target/i386/avx2-vbroadcastsi128-2.c @@ -9,7 +9,7 @@ void static avx2_test (void) { union128i_q s1; - union256i_q res; + union256i_q res, res1; long long int res_ref[4]; int i, j; int fail = 0; @@ -20,11 +20,13 @@ avx2_test (void) s1.a[j] = j * i; res.x = _mm256_broadcastsi128_si256 (s1.x); + res1.x = _mm_broadcastsi128_si256 (s1.x); memcpy (res_ref, s1.a, 16); memcpy (res_ref + 2, s1.a, 16); fail += check_union256i_q (res, res_ref); + fail += check_union256i_q (res1, res_ref); } if (fail != 0) diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vmovdqu16-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vmovdqu16-1.c index a0d0e36..dcb8caa 100644 --- a/gcc/testsuite/gcc.target/i386/avx512bw-vmovdqu16-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vmovdqu16-1.c @@ -15,13 +15,19 @@ /* { dg-final { scan-assembler-times "vmovdqu16\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vmovdqu16\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vmovdqu16\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu16\[ \\t\]+\[^\{\n\]*\\)\[^\n\]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "(?:vmovdqu16|vinserti128)\[ \\t\]+\[^\{\n\]*\\)\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu16\[ \\t\]+\[^\{\n\]*\\)\[^\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu16\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "(?:vmovdqu16|vextracti128)\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\]*\\)(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu16\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\]*\\)(?:\n|\[ \\t\]+#)" 1 } } */ #include <immintrin.h> -short *p; -volatile __m512i x1, yy; -volatile __m256i x2, y2; -volatile __m128i x3, y3; +short *p, *p1, *p2, *p3, *p4, *p5, *p6; +volatile __m512i x1, yy, zzz; +volatile __m256i x2, y2, yyy; +volatile __m128i x3, y3, xxx; volatile __mmask32 m32; volatile __mmask16 m16; volatile __mmask8 m8; @@ -45,7 +51,15 @@ avx512bw_test (void) x2 = _mm256_maskz_loadu_epi16 (m16, p); x3 = _mm_maskz_loadu_epi16 (m8, p); + zzz = _mm512_loadu_epi16 (p5); + yyy = _mm256_loadu_epi16 (p3); + xxx = _mm_loadu_epi16 (p1); + _mm512_mask_storeu_epi16 (p, m32, x1); _mm256_mask_storeu_epi16 (p, m16, x2); _mm_mask_storeu_epi16 (p, m8, x3); + + _mm512_storeu_epi16 (p6, zzz); + _mm256_storeu_epi16 (p4, yyy); + _mm_storeu_epi16 (p2, xxx); } diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vmovdqu8-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vmovdqu8-1.c index 6d24e79..a335bca 100644 --- a/gcc/testsuite/gcc.target/i386/avx512bw-vmovdqu8-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vmovdqu8-1.c @@ -15,13 +15,17 @@ /* { dg-final { scan-assembler-times "vmovdqu8\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vmovdqu8\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vmovdqu8\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu8\[ \\t\]+\[^\{\n\]*\\)\[^\n\]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu8\[ \\t\]+\[^\{\n\]*\\)\[^\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu8\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqu8\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\]*\\)(?:\n|\[ \\t\]+#)" 1 } } */ #include <immintrin.h> -char *p; -volatile __m512i x1, yy; +char *p, *p1, *p2, *p3, *p4; +volatile __m512i x1, yy, zzz; volatile __m256i x2, y2; -volatile __m128i x3, y3; +volatile __m128i x3, y3, xxx; volatile __mmask64 m64; volatile __mmask32 m32; volatile __mmask16 m16; @@ -45,7 +49,13 @@ avx512bw_test (void) x2 = _mm256_maskz_loadu_epi8 (m32, p); x3 = _mm_maskz_loadu_epi8 (m16, p); + zzz = _mm512_loadu_epi8 (p3); + xxx = _mm_loadu_epi8 (p1); + _mm512_mask_storeu_epi8 (p, m64, x1); _mm256_mask_storeu_epi8 (p, m32, x2); _mm_mask_storeu_epi8 (p, m16, x3); + + _mm512_storeu_epi8 (p4, zzz); + _mm_storeu_epi8 (p2, xxx); } diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vreducepd-3.c b/gcc/testsuite/gcc.target/i386/avx512dq-vreducepd-3.c new file mode 100644 index 0000000..4dc1585 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vreducepd-3.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -O2" } */ +/* { dg-final { scan-assembler-times "vreducepd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vreducepd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vreducepd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ + +#include <immintrin.h> + +#define IMM 123 + +volatile __m512d xx1; +volatile __mmask8 m; + +void extern +avx512dq_test (void) +{ + xx1 = _mm512_reduce_round_pd(xx1, IMM, _MM_FROUND_NO_EXC); + + xx1 = _mm512_mask_reduce_round_pd (xx1, m, xx1, IMM, _MM_FROUND_NO_EXC); + + xx1 = _mm512_maskz_reduce_round_pd (m, xx1, IMM, _MM_FROUND_NO_EXC); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vreducepd-4.c b/gcc/testsuite/gcc.target/i386/avx512dq-vreducepd-4.c new file mode 100644 index 0000000..2b39670 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vreducepd-4.c @@ -0,0 +1,61 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq" } */ +/* { dg-require-effective-target avx512dq } */ + +#define AVX512DQ +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 64) +#include "avx512f-mask-type.h" + +#define IMM 0x23 + +void +CALC (double *s, double *r) +{ + int i; + + for (i = 0; i < SIZE; i++) + { + double tmp = (int) (4 * s[i]) / 4.0; + r[i] = s[i] - tmp; + } +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN, d) s, res1, res2, res3; + MASK_TYPE mask = MASK_VALUE; + double res_ref[SIZE]; + int i, sign = 1; + + for (i = 0; i < SIZE; i++) + { + s.a[i] = 123.456 * (i + 2000) * sign; + res2.a[i] = DEFAULT_VALUE; + sign = -sign; + } + + res1.x = INTRINSIC (_reduce_round_pd) (s.x, IMM, _MM_FROUND_TO_NEAREST_INT + | _MM_FROUND_NO_EXC); + res2.x = INTRINSIC (_mask_reduce_round_pd) (res2.x, mask, s.x, + IMM, _MM_FROUND_TO_NEAREST_INT + | _MM_FROUND_NO_EXC); + res3.x = INTRINSIC (_maskz_reduce_round_pd) (mask, s.x, IMM, + _MM_FROUND_TO_NEAREST_INT + | _MM_FROUND_NO_EXC); + + CALC (s.a, res_ref); + + if (UNION_FP_CHECK (AVX512F_LEN, d) (res1, res_ref)) + abort (); + + MASK_MERGE (d) (res_ref, mask, SIZE); + if (UNION_FP_CHECK (AVX512F_LEN, d) (res2, res_ref)) + abort (); + + MASK_ZERO (d) (res_ref, mask, SIZE); + if (UNION_FP_CHECK (AVX512F_LEN, d) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vreduceps-3.c b/gcc/testsuite/gcc.target/i386/avx512dq-vreduceps-3.c new file mode 100644 index 0000000..959d51f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vreduceps-3.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512dq -O2" } */ +/* { dg-final { scan-assembler-times "vreduceps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vreduceps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vreduceps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ + +#include <immintrin.h> + +#define IMM 123 + +volatile __m512 xx1; +volatile __mmask16 m16; + +void extern +avx512dq_test (void) +{ + xx1 = _mm512_reduce_round_ps (xx1, IMM, _MM_FROUND_NO_EXC); + + xx1 = _mm512_mask_reduce_round_ps (xx1, m16, xx1, IMM, _MM_FROUND_NO_EXC); + + xx1 = _mm512_maskz_reduce_round_ps (m16, xx1, IMM, _MM_FROUND_NO_EXC); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vreduceps-4.c b/gcc/testsuite/gcc.target/i386/avx512dq-vreduceps-4.c new file mode 100644 index 0000000..6b687b2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vreduceps-4.c @@ -0,0 +1,61 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512dq" } */ +/* { dg-require-effective-target avx512dq } */ + +#define AVX512DQ +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 32) +#include "avx512f-mask-type.h" + +#define IMM 0x23 + +void +CALC (float *s, float *r) +{ + int i; + + for (i = 0; i < SIZE; i++) + { + float tmp = (int) (4 * s[i]) / 4.0; + r[i] = s[i] - tmp; + } +} + +void +TEST (void) +{ + UNION_TYPE (AVX512F_LEN,) s, res1, res2, res3; + MASK_TYPE mask = MASK_VALUE; + float res_ref[SIZE]; + int i, sign = 1; + + for (i = 0; i < SIZE; i++) + { + s.a[i] = 123.456 * (i + 2000) * sign; + res2.a[i] = DEFAULT_VALUE; + sign = -sign; + } + + res1.x = INTRINSIC (_reduce_round_ps) (s.x, IMM, _MM_FROUND_TO_NEAREST_INT + | _MM_FROUND_NO_EXC); + res2.x = INTRINSIC (_mask_reduce_round_ps) (res2.x, mask, s.x, + IMM, _MM_FROUND_TO_NEAREST_INT + | _MM_FROUND_NO_EXC); + res3.x = INTRINSIC (_maskz_reduce_round_ps) (mask, s.x, IMM, + _MM_FROUND_TO_NEAREST_INT + | _MM_FROUND_NO_EXC); + + CALC (s.a, res_ref); + + if (UNION_FP_CHECK (AVX512F_LEN,) (res1, res_ref)) + abort (); + + MASK_MERGE () (res_ref, mask, SIZE); + if (UNION_FP_CHECK (AVX512F_LEN,) (res2, res_ref)) + abort (); + + MASK_ZERO () (res_ref, mask, SIZE); + if (UNION_FP_CHECK (AVX512F_LEN,) (res3, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vreducesd-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vreducesd-1.c index b8f24a0c..63d9537 100644 --- a/gcc/testsuite/gcc.target/i386/avx512dq-vreducesd-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vreducesd-1.c @@ -2,8 +2,11 @@ /* { dg-options "-mavx512dq -O2" } */ /* { dg-final { scan-assembler-times "vreducesd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vreducesd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vreducesd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vreducesd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vreducesd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vreducesd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vreducesd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ @@ -11,15 +14,18 @@ #define IMM 123 -volatile __m128d x1, x2; +volatile __m128d x1, x2, xx1, xx2; volatile __mmask8 m; void extern avx512dq_test (void) { + xx1 = _mm_reduce_round_sd (xx1, xx2, IMM, _MM_FROUND_NO_EXC); x1 = _mm_reduce_sd (x1, x2, IMM); + xx1 = _mm_mask_reduce_round_sd(xx1, m, xx1, xx2, IMM, _MM_FROUND_NO_EXC); x1 = _mm_mask_reduce_sd(x1, m, x1, x2, IMM); + xx1 = _mm_maskz_reduce_round_sd(m, xx1, xx2, IMM, _MM_FROUND_NO_EXC); x1 = _mm_maskz_reduce_sd(m, x1, x2, IMM); } diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vreducesd-2.c b/gcc/testsuite/gcc.target/i386/avx512dq-vreducesd-2.c index 93e1827..17448c0 100644 --- a/gcc/testsuite/gcc.target/i386/avx512dq-vreducesd-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vreducesd-2.c @@ -28,7 +28,7 @@ CALC (double *r, double *s) void TEST (void) { - union128d res1, res2, res3; + union128d res1, res2, res3, res4, res5, res6; union128d s1, s2, src; double res_ref[2]; MASK_TYPE mask = MASK_VALUE; @@ -42,25 +42,45 @@ TEST (void) res1.a[j] = DEFAULT_VALUE; res2.a[j] = DEFAULT_VALUE; res3.a[j] = DEFAULT_VALUE; + res4.a[j] = DEFAULT_VALUE; + res5.a[j] = DEFAULT_VALUE; + res6.a[j] = DEFAULT_VALUE; } res1.x = _mm_reduce_sd (s1.x, s2.x, IMM); res2.x = _mm_mask_reduce_sd (s1.x, mask, s1.x, s2.x, IMM); res3.x = _mm_maskz_reduce_sd (mask, s1.x, s2.x, IMM); + res4.x = _mm_reduce_round_sd (s1.x, s2.x, IMM,_MM_FROUND_TO_NEAREST_INT + | _MM_FROUND_NO_EXC); + res5.x = _mm_mask_reduce_round_sd (s1.x, mask, s1.x, s2.x, IMM, + _MM_FROUND_TO_NEAREST_INT + | _MM_FROUND_NO_EXC); + res6.x = _mm_maskz_reduce_round_sd (mask, s1.x, s2.x, IMM, + _MM_FROUND_TO_NEAREST_INT + | _MM_FROUND_NO_EXC); CALC (res_ref, s2.a); if (check_union128d (res1, res_ref)) abort (); + if (check_union128d (res4, res_ref)) + abort (); + MASK_MERGE (d) (res_ref, mask, 1); if (check_union128d (res2, res_ref)) abort (); + if (check_union128d (res5, res_ref)) + abort (); + MASK_ZERO (d) (res_ref, mask, 1); if (check_union128d (res3, res_ref)) abort (); + if (check_union128d (res6, res_ref)) + abort (); + } diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vreducess-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-vreducess-1.c index 804074e..341bd46 100644 --- a/gcc/testsuite/gcc.target/i386/avx512dq-vreducess-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vreducess-1.c @@ -2,23 +2,29 @@ /* { dg-options "-mavx512dq -O2" } */ /* { dg-final { scan-assembler-times "vreducess\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vreducess\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vreducess\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vreducess\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vreducess\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vreducess\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vreducess\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ #include <immintrin.h> #define IMM 123 -volatile __m128 x1, x2; +volatile __m128 x1, x2, xx1, xx2; volatile __mmask8 m; void extern avx512dq_test (void) { + xx1 = _mm_reduce_round_ss (xx1, xx2, IMM, _MM_FROUND_NO_EXC); x1 = _mm_reduce_ss (x1, x2, IMM); + xx1 = _mm_mask_reduce_round_ss (xx1, m, xx1, xx2, IMM, _MM_FROUND_NO_EXC); x1 = _mm_mask_reduce_ss (x1, m, x1, x2, IMM); + xx1 = _mm_maskz_reduce_round_ss (m, xx1, xx2, IMM, _MM_FROUND_NO_EXC); x1 = _mm_maskz_reduce_ss (m, x1, x2, IMM); } diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-vreducess-2.c b/gcc/testsuite/gcc.target/i386/avx512dq-vreducess-2.c index 8558c3b..6d8938d 100644 --- a/gcc/testsuite/gcc.target/i386/avx512dq-vreducess-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512dq-vreducess-2.c @@ -30,7 +30,7 @@ TEST (void) { printf("\nsize = %d\n\n", SIZE); - union128 res1, res2, res3; + union128 res1, res2, res3, res4, res5, res6; union128 s1, s2, src; float res_ref[4]; MASK_TYPE mask = MASK_VALUE; @@ -44,25 +44,45 @@ TEST (void) res1.a[j] = DEFAULT_VALUE; res2.a[j] = DEFAULT_VALUE; res3.a[j] = DEFAULT_VALUE; + res4.a[j] = DEFAULT_VALUE; + res5.a[j] = DEFAULT_VALUE; + res6.a[j] = DEFAULT_VALUE; } res1.x = _mm_reduce_ss (s1.x, s2.x, IMM); res2.x = _mm_mask_reduce_ss (s1.x, mask, s1.x, s2.x, IMM); res3.x = _mm_maskz_reduce_ss (mask, s1.x, s2.x, IMM); + res4.x = _mm_reduce_round_ss (s1.x, s2.x, IMM, _MM_FROUND_TO_NEAREST_INT + | _MM_FROUND_NO_EXC); + res5.x = _mm_mask_reduce_round_ss (s1.x, mask, s1.x, s2.x, + IMM, _MM_FROUND_TO_NEAREST_INT + | _MM_FROUND_NO_EXC); + res6.x = _mm_maskz_reduce_round_ss (mask, s1.x, s2.x, IMM, + _MM_FROUND_TO_NEAREST_INT + | _MM_FROUND_NO_EXC); CALC (res_ref, s2.a); if (check_union128 (res1, res_ref)) abort (); + if (check_union128 (res4, res_ref)) + abort (); + MASK_MERGE () (res_ref, mask, 1); if (check_union128 (res2, res_ref)) abort (); + if (check_union128 (res5, res_ref)) + abort (); + MASK_ZERO () (res_ref, mask, 1); if (check_union128 (res3, res_ref)) abort (); + if (check_union128 (res6, res_ref)) + abort (); + } diff --git a/gcc/testsuite/gcc.target/i386/avx512er-vrcp28sd-1.c b/gcc/testsuite/gcc.target/i386/avx512er-vrcp28sd-1.c index 9c76085..03e75cc 100644 --- a/gcc/testsuite/gcc.target/i386/avx512er-vrcp28sd-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512er-vrcp28sd-1.c @@ -2,14 +2,23 @@ /* { dg-options "-mavx512er -O2" } */ /* { dg-final { scan-assembler-times "vrcp28sd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vrcp28sd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]+\[^\{\]*(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vrcp28sd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vrcp28sd\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vrcp28sd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vrcp28sd\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ #include <immintrin.h> -volatile __m128d x, y; +volatile __m128d x, y, z; +volatile __mmask8 m; void extern avx512er_test (void) { x = _mm_rcp28_sd (x, y); x = _mm_rcp28_round_sd (x, y, _MM_FROUND_NO_EXC); + x = _mm_mask_rcp28_sd (z, m, x, y); + x = _mm_mask_rcp28_round_sd (z, m, x, y, _MM_FROUND_NO_EXC); + x = _mm_maskz_rcp28_sd (m, x, y); + x = _mm_maskz_rcp28_round_sd (m, x, y, _MM_FROUND_NO_EXC); } diff --git a/gcc/testsuite/gcc.target/i386/avx512er-vrcp28sd-2.c b/gcc/testsuite/gcc.target/i386/avx512er-vrcp28sd-2.c index 889f990..93d370d 100644 --- a/gcc/testsuite/gcc.target/i386/avx512er-vrcp28sd-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512er-vrcp28sd-2.c @@ -7,11 +7,14 @@ #include "avx512f-helper.h" #include <math.h> +#define IMM 0x23 + void static avx512er_test (void) { - union128d src1, src2, res; + union128d src1, src2, res, res1, res2, res3, res4; double res_ref[2]; + MASK_TYPE mask = MASK_VALUE; int i; for (i = 0; i < 2; i++) @@ -24,7 +27,32 @@ avx512er_test (void) res_ref[0] = 1.0 / src2.a[0]; res.x = _mm_rcp28_round_sd (src1.x, src2.x, _MM_FROUND_NO_EXC); + res1.x = _mm_mask_rcp28_sd (src1.x, IMM, src1.x, src2.x); + res2.x = _mm_mask_rcp28_round_sd (src1.x, IMM, src1.x, src2.x, + _MM_FROUND_TO_NEAREST_INT + | _MM_FROUND_NO_EXC); + res3.x = _mm_maskz_rcp28_sd (IMM, src1.x, src2.x); + res4.x = _mm_maskz_rcp28_round_sd (IMM, src1.x, src2.x, + _MM_FROUND_TO_NEAREST_INT + | _MM_FROUND_NO_EXC); + if (checkVd (res.a, res_ref, 2)) abort (); + + MASK_MERGE (d) (res_ref, mask, 1); + + if (checkVd (res1.a, res_ref, 2)) + abort (); + + if (checkVd (res2.a, res_ref, 2)) + abort (); + + MASK_ZERO (d) (res_ref, mask, 1); + + if (checkVd (res3.a, res_ref, 2)) + abort (); + + if (checkVd (res4.a, res_ref, 2)) + abort (); } diff --git a/gcc/testsuite/gcc.target/i386/avx512er-vrcp28ss-1.c b/gcc/testsuite/gcc.target/i386/avx512er-vrcp28ss-1.c index 335c44f..87a8ac3 100644 --- a/gcc/testsuite/gcc.target/i386/avx512er-vrcp28ss-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512er-vrcp28ss-1.c @@ -2,14 +2,23 @@ /* { dg-options "-mavx512er -O2" } */ /* { dg-final { scan-assembler-times "vrcp28ss\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vrcp28ss\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]+\[^\{\]*(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vrcp28ss\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vrcp28ss\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vrcp28ss\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vrcp28ss\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ #include <immintrin.h> -volatile __m128 x, y; +volatile __m128 x, y, z; +volatile __mmask8 m; void extern avx512er_test (void) { x = _mm_rcp28_ss (x, y); x = _mm_rcp28_round_ss (x, y, _MM_FROUND_NO_EXC); + x = _mm_mask_rcp28_ss (z, m, x, y); + x = _mm_mask_rcp28_round_ss (z, m, x, y, _MM_FROUND_NO_EXC); + x = _mm_maskz_rcp28_ss (m, x, y); + x = _mm_maskz_rcp28_round_ss (m, x, y, _MM_FROUND_NO_EXC); } diff --git a/gcc/testsuite/gcc.target/i386/avx512er-vrcp28ss-2.c b/gcc/testsuite/gcc.target/i386/avx512er-vrcp28ss-2.c index 3280879..4ffa92c 100644 --- a/gcc/testsuite/gcc.target/i386/avx512er-vrcp28ss-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512er-vrcp28ss-2.c @@ -7,11 +7,14 @@ #include "avx512f-helper.h" #include <math.h> +#define IMM 0x23 + void static avx512er_test (void) { - union128 src1, src2, res; + union128 src1, src2, res, res1, res2, res3, res4; float res_ref[4]; + MASK_TYPE mask = MASK_VALUE; int i; for (i = 0; i < 4; i++) @@ -24,7 +27,31 @@ avx512er_test (void) res_ref[0] = 1.0 / src2.a[0]; res.x = _mm_rcp28_round_ss (src1.x, src2.x, _MM_FROUND_NO_EXC); + res1.x = _mm_mask_rcp28_ss (src1.x, IMM, src1.x, src2.x); + res2.x = _mm_mask_rcp28_round_ss (src1.x, IMM, src1.x, src2.x, + _MM_FROUND_TO_NEAREST_INT + | _MM_FROUND_NO_EXC); + res3.x = _mm_maskz_rcp28_ss (IMM, src1.x, src2.x); + res4.x = _mm_maskz_rcp28_round_ss (IMM, src1.x, src2.x, + _MM_FROUND_TO_NEAREST_INT + | _MM_FROUND_NO_EXC); if (checkVf (res.a, res_ref, 4)) abort (); + + MASK_MERGE () (res_ref, mask, 1); + + if (checkVf (res1.a, res_ref, 2)) + abort (); + + if (checkVf (res2.a, res_ref, 2)) + abort (); + + MASK_ZERO () (res_ref, mask, 1); + + if (checkVf (res3.a, res_ref, 2)) + abort (); + + if (checkVf (res4.a, res_ref, 2)) + abort (); } diff --git a/gcc/testsuite/gcc.target/i386/avx512er-vrsqrt28sd-1.c b/gcc/testsuite/gcc.target/i386/avx512er-vrsqrt28sd-1.c index de3341f..ca54906 100644 --- a/gcc/testsuite/gcc.target/i386/avx512er-vrsqrt28sd-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512er-vrsqrt28sd-1.c @@ -2,14 +2,23 @@ /* { dg-options "-mavx512er -O2" } */ /* { dg-final { scan-assembler-times "vrsqrt28sd\[ \\t\]+\[^\{^\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vrsqrt28sd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vrsqrt28sd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vrsqrt28sd\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vrsqrt28sd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vrsqrt28sd\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ #include <immintrin.h> -volatile __m128d x, y; +volatile __m128d x, y, z; +volatile __mmask8 m; void extern avx512er_test (void) { x = _mm_rsqrt28_sd (x, y); x = _mm_rsqrt28_round_sd (x, y, _MM_FROUND_NO_EXC); + x = _mm_mask_rsqrt28_sd (z, m, x, y); + x = _mm_mask_rsqrt28_round_sd (z, m, x, y, _MM_FROUND_NO_EXC); + x = _mm_maskz_rsqrt28_sd (m, x, y); + x = _mm_maskz_rsqrt28_round_sd (m, x, y, _MM_FROUND_NO_EXC); } diff --git a/gcc/testsuite/gcc.target/i386/avx512er-vrsqrt28sd-2.c b/gcc/testsuite/gcc.target/i386/avx512er-vrsqrt28sd-2.c index bd217e8..2606191 100644 --- a/gcc/testsuite/gcc.target/i386/avx512er-vrsqrt28sd-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512er-vrsqrt28sd-2.c @@ -7,11 +7,14 @@ #include "avx512f-helper.h" #include <math.h> +#define IMM 0x23 + void static avx512er_test (void) { - union128d src1, src2, res; + union128d src1, src2, res, res1, res2, res3, res4; double res_ref[2]; + MASK_TYPE mask = MASK_VALUE; int i; for (i = 0; i < 2; i++) @@ -24,7 +27,31 @@ avx512er_test (void) res_ref[0] = 1.0 / sqrt (src2.a[0]); res.x = _mm_rsqrt28_round_sd (src1.x, src2.x, _MM_FROUND_NO_EXC); + res1.x = _mm_mask_rsqrt28_sd (src1.x, IMM, src1.x, src2.x); + res2.x = _mm_mask_rsqrt28_round_sd (src1.x, IMM, src1.x, src2.x, + _MM_FROUND_TO_NEAREST_INT + | _MM_FROUND_NO_EXC); + res3.x = _mm_maskz_rsqrt28_sd (IMM, src1.x, src2.x); + res4.x = _mm_maskz_rsqrt28_round_sd (IMM, src1.x, src2.x, + _MM_FROUND_TO_NEAREST_INT + | _MM_FROUND_NO_EXC); if (checkVd (res.a, res_ref, 2)) abort (); + + MASK_MERGE (d) (res_ref, mask, 1); + + if (checkVd (res1.a, res_ref, 2)) + abort (); + + if (checkVd (res2.a, res_ref, 2)) + abort (); + + MASK_ZERO (d) (res_ref, mask, 1); + + if (checkVd (res3.a, res_ref, 2)) + abort (); + + if (checkVd (res4.a, res_ref, 2)) + abort (); } diff --git a/gcc/testsuite/gcc.target/i386/avx512er-vrsqrt28ss-1.c b/gcc/testsuite/gcc.target/i386/avx512er-vrsqrt28ss-1.c index 701cb55..c97376e 100644 --- a/gcc/testsuite/gcc.target/i386/avx512er-vrsqrt28ss-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512er-vrsqrt28ss-1.c @@ -2,14 +2,23 @@ /* { dg-options "-mavx512er -O2" } */ /* { dg-final { scan-assembler-times "vrsqrt28ss\[ \\t\]+\[^\{^\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vrsqrt28ss\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vrsqrt28ss\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vrsqrt28ss\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vrsqrt28ss\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vrsqrt28ss\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ #include <immintrin.h> -volatile __m128 x, y; +volatile __m128 x, y, z; +volatile __mmask8 m; void extern avx512er_test (void) { x = _mm_rsqrt28_ss (x, y); x = _mm_rsqrt28_round_ss (x, y, _MM_FROUND_NO_EXC); + x = _mm_mask_rsqrt28_ss (z, m, x, y); + x = _mm_mask_rsqrt28_round_ss (z, m, x, y, _MM_FROUND_NO_EXC); + x = _mm_maskz_rsqrt28_ss (m, x, y); + x = _mm_maskz_rsqrt28_round_ss (m, x, y, _MM_FROUND_NO_EXC); } diff --git a/gcc/testsuite/gcc.target/i386/avx512er-vrsqrt28ss-2.c b/gcc/testsuite/gcc.target/i386/avx512er-vrsqrt28ss-2.c index f7bfff5..fa1c19b 100644 --- a/gcc/testsuite/gcc.target/i386/avx512er-vrsqrt28ss-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512er-vrsqrt28ss-2.c @@ -7,11 +7,14 @@ #include "avx512f-helper.h" #include <math.h> +#define IMM 0x23 + void static avx512er_test (void) { - union128 src1, src2, res; + union128 src1, src2, res, res1, res2, res3, res4; float res_ref[4]; + MASK_TYPE mask = MASK_VALUE; int i; for (i = 0; i < 4; i++) @@ -24,7 +27,31 @@ avx512er_test (void) res_ref[0] = 1.0 / sqrt (src2.a[0]); res.x = _mm_rsqrt28_round_ss (src1.x, src2.x, _MM_FROUND_NO_EXC); + res1.x = _mm_mask_rsqrt28_ss (src1.x, IMM, src1.x, src2.x); + res2.x = _mm_mask_rsqrt28_round_ss (src1.x, IMM, src1.x, src2.x, + _MM_FROUND_TO_NEAREST_INT + | _MM_FROUND_NO_EXC); + res3.x = _mm_maskz_rsqrt28_ss (IMM, src1.x, src2.x); + res4.x = _mm_maskz_rsqrt28_round_ss (IMM, src1.x, src2.x, + _MM_FROUND_TO_NEAREST_INT + | _MM_FROUND_NO_EXC); if (checkVf (res.a, res_ref, 4)) abort (); + + MASK_MERGE () (res_ref, mask, 1); + + if (checkVf (res1.a, res_ref, 2)) + abort (); + + if (checkVf (res2.a, res_ref, 2)) + abort (); + + MASK_ZERO () (res_ref, mask, 1); + + if (checkVf (res3.a, res_ref, 2)) + abort (); + + if (checkVf (res4.a, res_ref, 2)) + abort (); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtsd2si-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtsd2si-1.c index 845e206..402af50 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vcvtsd2si-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtsd2si-1.c @@ -1,13 +1,15 @@ /* { dg-do compile } */ /* { dg-options "-O2 -mavx512f" } */ /* { dg-final { scan-assembler-times "vcvtsd2sil?\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%xmm\[0-9\]+.{6}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtsd2sil?\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+.{6}(?:\n|\[ \\t\]+#)" 1 } } */ #include <immintrin.h> volatile __m128d x; -volatile unsigned y; +volatile unsigned y, z; void extern avx512f_test (void) { y = _mm_cvt_roundsd_i32 (x, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); + z = _mm_cvtsd_i32 (x); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtsd2si64-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtsd2si64-1.c index ad11e8b..dad26e4 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vcvtsd2si64-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtsd2si64-1.c @@ -1,14 +1,16 @@ /* { dg-do compile { target { ! ia32 } } } */ /* { dg-options "-O2 -mavx512f" } */ /* { dg-final { scan-assembler-times "vcvtsd2siq\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+.{6}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtsd2siq\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+.{6}(?:\n|\[ \\t\]+#)" 1 } } */ #include <immintrin.h> volatile __m128d x; -volatile unsigned long long y; +volatile unsigned long long y, z; void extern avx512f_test (void) { y = _mm_cvt_roundsd_i64 (x, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); + z = _mm_cvtsd_i64 (x); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtsd2ss-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtsd2ss-1.c index 84d8e05..d61e76c 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vcvtsd2ss-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtsd2ss-1.c @@ -1,14 +1,23 @@ /* { dg-do compile } */ /* { dg-options "-mavx512f -O2" } */ /* { dg-final { scan-assembler-times "vcvtsd2ss\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%xmm\[0-9\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtsd2ss\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtsd2ss\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtsd2ss\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%xmm\[0-9\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtsd2ss\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%xmm\[0-9\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ #include <immintrin.h> -volatile __m128 s1, r; +volatile __m128 s1, r, s3; volatile __m128d s2; +volatile __mmask8 m; void extern avx512f_test (void) { r = _mm_cvt_roundsd_ss (s1, s2, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); + r = _mm_mask_cvtsd_ss (s3, m, s1, s2); + r = _mm_maskz_cvtsd_ss (m, s1, s2); + r = _mm_mask_cvt_roundsd_ss (s3, m, s1, s2, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); + r = _mm_maskz_cvt_roundsd_ss (m, s1, s2, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtsi2sd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtsi2sd-1.c new file mode 100644 index 0000000..2035eea --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtsi2sd-1.c @@ -0,0 +1,13 @@ +/* { dg-options "-mavx512f -O2" } */ +/* { dg-final { scan-assembler-times "vcvtsi2sdl\[ \\t\]+\[^%\n\]*%e\[^\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ + +#include <immintrin.h> + +volatile __m128d x; +volatile int n; + +void extern +avx512f_test (void) +{ + x = _mm_cvti32_sd (x, n); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtsi2sd64-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtsi2sd64-1.c index 440ddbc..4843ace 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vcvtsi2sd64-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtsi2sd64-1.c @@ -1,14 +1,16 @@ /* { dg-do compile { target { ! ia32 } } } */ /* { dg-options "-mavx512f -O2" } */ /* { dg-final { scan-assembler-times "vcvtsi2sdq\[ \\t\]+\[^%\n\]*%r\[^\{\n\]*\{ru-sae\}\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtsi2sdq\[ \\t\]+\[^%\n\]*%r\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ #include <immintrin.h> -volatile __m128d x; +volatile __m128d x, y; volatile long long n; void extern avx512f_test (void) { x = _mm_cvt_roundi64_sd (x, n, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); + y = _mm_cvti64_sd (x, n); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtsi2ss-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtsi2ss-1.c index 8e26576..0b3f518 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vcvtsi2ss-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtsi2ss-1.c @@ -1,14 +1,16 @@ /* { dg-do compile } */ /* { dg-options "-mavx512f -O2" } */ /* { dg-final { scan-assembler-times "vcvtsi2ssl\[ \\t\]+\[^%\n\]*%e\[^\{\n\]*\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtsi2ssl\[ \\t\]+\[^%\n\]*%e\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ #include <immintrin.h> -volatile __m128 x; +volatile __m128 x, y; volatile int n; void extern avx512f_test (void) { x = _mm_cvt_roundi32_ss (x, n, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); + y = _mm_cvti32_ss (x, n); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtsi2ss64-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtsi2ss64-1.c index ceef7cd..9b2bce1 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vcvtsi2ss64-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtsi2ss64-1.c @@ -1,14 +1,16 @@ /* { dg-do compile { target { ! ia32 } } } */ /* { dg-options "-mavx512f -O2" } */ /* { dg-final { scan-assembler-times "vcvtsi2ssq\[ \\t\]+\[^%\n\]*%r\[^\{\n\]*\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtsi2ssq\[ \\t\]+\[^%\n\]*%r\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ #include <immintrin.h> -volatile __m128 x; +volatile __m128 x, y; volatile long long n; void extern avx512f_test (void) { x = _mm_cvt_roundi64_ss (x, n, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); + y = _mm_cvti64_ss (x, n); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtss2sd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtss2sd-1.c index ee98d36..48cbac5 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vcvtss2sd-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtss2sd-1.c @@ -1,14 +1,23 @@ /* { dg-do compile } */ /* { dg-options "-mavx512f -O2" } */ /* { dg-final { scan-assembler-times "vcvtss2sd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtss2sd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtss2sd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtss2sd\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtss2sd\[ \\t\]+\[^\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ #include <immintrin.h> -volatile __m128d s1, r; +volatile __m128d s1, r, s3; volatile __m128 s2; +volatile __mmask8 m; void extern avx512f_test (void) { r = _mm_cvt_roundss_sd (s1, s2, _MM_FROUND_NO_EXC); + r = _mm_mask_cvtss_sd (s3, m, s1, s2); + r = _mm_maskz_cvtss_sd (m, s1, s2); + r = _mm_mask_cvt_roundss_sd (s3, m, s1, s2, _MM_FROUND_NO_EXC); + r = _mm_maskz_cvt_roundss_sd (m, s1, s2, _MM_FROUND_NO_EXC); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtss2si-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtss2si-1.c index 96289ef..e3f4223 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vcvtss2si-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtss2si-1.c @@ -1,13 +1,15 @@ /* { dg-do compile } */ /* { dg-options "-O2 -mavx512f" } */ /* { dg-final { scan-assembler-times "vcvtss2sil?\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+.{6}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtss2sil?\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+.{6}(?:\n|\[ \\t\]+#)" 1 } } */ #include <immintrin.h> volatile __m128 x; -volatile unsigned y; +volatile unsigned y, z; void extern avx512f_test (void) { y = _mm_cvt_roundss_i32 (x, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); + z = _mm_cvtss_i32 (x); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtss2si64-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtss2si64-1.c index 7ada1f4..86ef95a 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vcvtss2si64-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtss2si64-1.c @@ -1,14 +1,16 @@ /* { dg-do compile { target { ! ia32 } } } */ /* { dg-options "-O2 -mavx512f" } */ /* { dg-final { scan-assembler-times "vcvtss2siq\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+.{6}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtss2siq\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+.{6}(?:\n|\[ \\t\]+#)" 1 } } */ #include <immintrin.h> volatile __m128 x; -volatile unsigned long long y; +volatile unsigned long long y, z; void extern avx512f_test (void) { y = _mm_cvt_roundss_i64 (x, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); + z = _mm_cvtss_i64 (x); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vscalefsd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vscalefsd-1.c index 09bc5c6..d0ba9cf 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vscalefsd-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vscalefsd-1.c @@ -4,6 +4,8 @@ /* { dg-final { scan-assembler-times "vscalefsd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vscalefsd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vscalefsd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vscalefsd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vscalefsd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ #include <immintrin.h> @@ -18,4 +20,6 @@ avx512f_test (void) x = _mm_scalef_round_sd (x, x, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); x = _mm_mask_scalef_round_sd (x, m, x, x, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); x = _mm_maskz_scalef_round_sd (m, x, x, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); + x = _mm_mask_scalef_sd (x, m, x, x); + x = _mm_maskz_scalef_sd (m, x, x); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vscalefsd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vscalefsd-2.c index afe73dc..986e978 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vscalefsd-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vscalefsd-2.c @@ -18,7 +18,7 @@ compute_scalefsd (double *s1, double *s2, double *r) void static avx512f_test (void) { - union128d res1, res2, res3, res4; + union128d res1, res2, res3, res4, res5, res6; union128d s1, s2; double res_ref[SIZE]; MASK_TYPE mask = MASK_VALUE; @@ -33,6 +33,8 @@ avx512f_test (void) res2.a[i] = DEFAULT_VALUE; res3.a[i] = DEFAULT_VALUE; res4.a[i] = DEFAULT_VALUE; + res5.a[i] = DEFAULT_VALUE; + res6.a[i] = DEFAULT_VALUE; } res1.x = _mm_scalef_sd (s1.x, s2.x); @@ -42,6 +44,8 @@ avx512f_test (void) _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); res4.x = _mm_maskz_scalef_round_sd (mask, s1.x, s2.x, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); + res5.x = _mm_mask_scalef_sd (s1.x, mask, s1.x, s2.x); + res6.x = _mm_maskz_scalef_sd (mask, s1.x, s2.x); compute_scalefsd (s1.a, s2.a, res_ref); @@ -55,8 +59,14 @@ avx512f_test (void) if (check_union128d (res3, res_ref)) abort (); + if (check_union128d (res5, res_ref)) + abort (); + MASK_ZERO (d) (res_ref, mask, 1); if (check_union128d (res4, res_ref)) abort (); + + if (check_union128d (res6, res_ref)) + abort (); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vscalefss-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vscalefss-1.c index d1af336..381d39e 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vscalefss-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vscalefss-1.c @@ -4,6 +4,8 @@ /* { dg-final { scan-assembler-times "vscalefss\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vscalefss\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vscalefss\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vscalefss\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vscalefss\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ #include <immintrin.h> @@ -17,4 +19,6 @@ avx512f_test (void) x = _mm_scalef_round_ss (x, x, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); x = _mm_mask_scalef_round_ss (x, m, x, x, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); x = _mm_maskz_scalef_round_ss (m, x, x, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); + x = _mm_mask_scalef_ss (x, m, x, x); + x = _mm_maskz_scalef_ss (m, x, x); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vscalefss-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vscalefss-2.c index 811ff15..d83feec 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vscalefss-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vscalefss-2.c @@ -20,7 +20,7 @@ compute_scalefss (float *s1, float *s2, float *r) static void avx512f_test (void) { - union128 res1, res2, res3, res4; + union128 res1, res2, res3, res4, res5, res6; union128 s1, s2; float res_ref[SIZE]; MASK_TYPE mask = MASK_VALUE; @@ -35,6 +35,8 @@ avx512f_test (void) res2.a[i] = DEFAULT_VALUE; res3.a[i] = DEFAULT_VALUE; res4.a[i] = DEFAULT_VALUE; + res5.a[i] = DEFAULT_VALUE; + res6.a[i] = DEFAULT_VALUE; } res1.x = _mm_scalef_ss (s1.x, s2.x); @@ -44,6 +46,8 @@ avx512f_test (void) _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); res4.x = _mm_maskz_scalef_round_ss (mask, s1.x, s2.x, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); + res5.x = _mm_mask_scalef_ss (s1.x, mask, s1.x, s2.x); + res6.x = _mm_maskz_scalef_ss (mask, s1.x, s2.x); compute_scalefss (s1.a, s2.a, res_ref); @@ -57,8 +61,14 @@ avx512f_test (void) if (check_union128 (res3, res_ref)) abort (); + if (check_union128 (res5, res_ref)) + abort (); + MASK_ZERO () (res_ref, mask, 1); if (check_union128 (res4, res_ref)) abort (); + + if (check_union128 (res6, res_ref)) + abort (); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vsqrtsd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vsqrtsd-1.c index a7d7af9..22601e9 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vsqrtsd-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vsqrtsd-1.c @@ -3,10 +3,12 @@ /* { dg-final { scan-assembler-times "vsqrtsd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vsqrtsd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vsqrtsd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vsqrtsd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vsqrtsd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ #include <immintrin.h> -volatile __m128d x1, x2; +volatile __m128d x1, x2, x3; volatile __mmask8 m; void extern @@ -15,4 +17,6 @@ avx512f_test (void) x1 = _mm_sqrt_round_sd (x1, x2, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); x1 = _mm_mask_sqrt_round_sd (x1, m, x1, x2, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); x1 = _mm_maskz_sqrt_round_sd (m, x1, x2, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); + x1 = _mm_mask_sqrt_sd (x3, m, x1, x2); + x1 = _mm_maskz_sqrt_sd (m, x1, x2); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vsqrtsd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vsqrtsd-2.c index 49ca7ee..ec908fd 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vsqrtsd-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vsqrtsd-2.c @@ -18,7 +18,7 @@ compute_sqrtsd (double *s1, double *s2, double *r) void static avx512f_test (void) { - union128d res1, res2, res3; + union128d res1, res2, res3, res4, res5; union128d s1, s2; double res_ref[SIZE]; MASK_TYPE mask = MASK_VALUE; @@ -32,6 +32,8 @@ avx512f_test (void) res1.a[i] = DEFAULT_VALUE; res2.a[i] = DEFAULT_VALUE; res3.a[i] = DEFAULT_VALUE; + res4.a[i] = DEFAULT_VALUE; + res5.a[i] = DEFAULT_VALUE; } res1.x = _mm_sqrt_round_sd (s1.x, s2.x, @@ -40,6 +42,8 @@ avx512f_test (void) _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); res3.x = _mm_maskz_sqrt_round_sd (mask, s1.x, s2.x, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); + res4.x = _mm_mask_sqrt_sd (s1.x, mask, s1.x, s2.x); + res5.x = _mm_maskz_sqrt_sd (mask, s1.x, s2.x); compute_sqrtsd (s1.a, s2.a, res_ref); @@ -51,10 +55,16 @@ avx512f_test (void) if (check_union128d (res2, res_ref)) abort (); + if (check_union128d (res4, res_ref)) + abort (); + MASK_ZERO (d) (res_ref, mask, 1); if (check_union128d (res3, res_ref)) abort (); + + if (check_union128d (res5, res_ref)) + abort (); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vsqrtss-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vsqrtss-1.c index 103ff30..c32903b 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vsqrtss-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vsqrtss-1.c @@ -3,11 +3,13 @@ /* { dg-final { scan-assembler-times "vsqrtss\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vsqrtss\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vsqrtss\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vsqrtss\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vsqrtss\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ #include <immintrin.h> -volatile __m128 x1, x2; +volatile __m128 x1, x2, x3; volatile __mmask8 m; void extern @@ -16,4 +18,6 @@ avx512f_test (void) x1 = _mm_sqrt_round_ss (x1, x2, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); x1 = _mm_mask_sqrt_round_ss (x1, m, x1, x2, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); x1 = _mm_maskz_sqrt_round_ss (m, x1, x2, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); + x1 = _mm_mask_sqrt_ss (x3, m, x1, x2); + x1 = _mm_maskz_sqrt_ss (m, x1, x2); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vsqrtss-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vsqrtss-2.c index 90f88be..33222bb 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vsqrtss-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vsqrtss-2.c @@ -22,7 +22,7 @@ compute_sqrtss (float *s1, float *s2, float *r) static void avx512f_test (void) { - union128 res1, res2, res3; + union128 res1, res2, res3, res4, res5; union128 s1, s2; float res_ref[SIZE]; MASK_TYPE mask = MASK_VALUE; @@ -36,6 +36,8 @@ avx512f_test (void) res1.a[i] = DEFAULT_VALUE; res2.a[i] = DEFAULT_VALUE; res3.a[i] = DEFAULT_VALUE; + res4.a[i] = DEFAULT_VALUE; + res5.a[i] = DEFAULT_VALUE; } res1.x = _mm_sqrt_round_ss (s1.x, s2.x, @@ -44,6 +46,8 @@ avx512f_test (void) _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); res3.x = _mm_maskz_sqrt_round_ss (mask, s1.x, s2.x, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); + res4.x = _mm_mask_sqrt_ss (s1.x, mask, s1.x, s2.x); + res5.x = _mm_maskz_sqrt_ss (mask, s1.x, s2.x); compute_sqrtss (s1.a, s2.a, res_ref); @@ -55,9 +59,15 @@ avx512f_test (void) if (check_union128 (res2, res_ref)) abort (); + if (check_union128 (res4, res_ref)) + abort (); + MASK_ZERO () (res_ref, mask, 1); if (check_union128 (res3, res_ref)) abort (); + + if (check_union128 (res5, res_ref)) + abort (); } diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vmovdqa32-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vmovdqa32-1.c index 217afbc..5c6a3d0 100644 --- a/gcc/testsuite/gcc.target/i386/avx512vl-vmovdqa32-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vmovdqa32-1.c @@ -10,12 +10,16 @@ /* { dg-final { scan-assembler-times "vmovdqa32\[ \\t\]+\[^\{\n\]*\\)\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vmovdqa32\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vmovdqa32\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqa\[ \\t\]+\\(\[^\{\n\]*\\)\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqa\[ \\t\]+\\(\[^\{\n\]*\\)\[^\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqa\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\]*\[ \\t\]+\\(\[^\n\]*\\)(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vmovdqa\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\]*\[ \\t\]+\\(\[^\n\]*\\)(?:\n|\[ \\t\]+#)" 1 } } */ #include <immintrin.h> -int *p; -volatile __m256i yy, y2; -volatile __m128i xx, x2; +int *p, *p1, *p2; +volatile __m256i yy, y2, yyy; +volatile __m128i xx, x2, xxx; volatile __mmask8 m; void extern @@ -30,9 +34,15 @@ avx512vl_test (void) yy = _mm256_mask_load_epi32 (yy, m, p); xx = _mm_mask_load_epi32 (xx, m, p); + yyy = _mm256_load_epi32 (p2); + xxx = _mm_load_epi32 (p1); + yy = _mm256_maskz_load_epi32 (m, p); xx = _mm_maskz_load_epi32 (m, p); _mm256_mask_store_epi32 (p, m, yy); _mm_mask_store_epi32 (p, m, xx); + + _mm256_store_epi32 (p2, yyy); + _mm_store_epi32 (p2, xxx); } diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vmovdqa64-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vmovdqa64-1.c index 9dc794d..592541a 100644 --- a/gcc/testsuite/gcc.target/i386/avx512vl-vmovdqa64-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vmovdqa64-1.c @@ -4,8 +4,8 @@ /* { dg-final { scan-assembler-times "(?:vmovdqa64|vpblendmq)\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vmovdqa64\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vmovdqa64\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vmovdqa\[ \\t\]+\\(\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 { target nonpic } } } */ -/* { dg-final { scan-assembler-times "vmovdqa\[ \\t\]+\\(\[^\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 { target nonpic } } } */ +/* { dg-final { scan-assembler-times "vmovdqa\[ \\t\]+\\(\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 { target nonpic } } } */ +/* { dg-final { scan-assembler-times "vmovdqa\[ \\t\]+\\(\[^\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 { target nonpic } } } */ /* { dg-final { scan-assembler-times "vmovdqa64\[ \\t\]+\[^\{\n\]*\\)\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vmovdqa64\[ \\t\]+\[^\{\n\]*\\)\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vmovdqa64\[ \\t\]+\[^\{\n\]*\\)\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ @@ -35,6 +35,9 @@ avx512vl_test (void) yy = _mm256_load_si256 (p1); xx = _mm_load_si128 (p2); + yy = _mm256_load_epi64 (p); + xx = _mm_load_epi64 (p); + yy = _mm256_mask_load_epi64 (yy, m, p); xx = _mm_mask_load_epi64 (xx, m, p); diff --git a/gcc/testsuite/gcc.target/i386/builtin_thread_pointer.c b/gcc/testsuite/gcc.target/i386/builtin_thread_pointer.c index 16a7ca4..09b704b 100644 --- a/gcc/testsuite/gcc.target/i386/builtin_thread_pointer.c +++ b/gcc/testsuite/gcc.target/i386/builtin_thread_pointer.c @@ -1,4 +1,5 @@ /* { dg-do compile } */ +/* { dg-require-effective-target tls_native } */ /* { dg-options "-mtls-direct-seg-refs -O2 -masm=att" } */ int* diff --git a/gcc/testsuite/gcc.target/i386/fentryname1.c b/gcc/testsuite/gcc.target/i386/fentryname1.c index 1265342..a9d1c72 100644 --- a/gcc/testsuite/gcc.target/i386/fentryname1.c +++ b/gcc/testsuite/gcc.target/i386/fentryname1.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target mfentry } */ +/* { dg-require-profiling "-pg" } */ /* { dg-options "-pg -mfentry -mfentry-name=foo" } */ /* { dg-final { scan-assembler "call.*foo" } } */ /* { dg-final { scan-assembler "call.*bar" } } */ diff --git a/gcc/testsuite/gcc.target/i386/fentryname2.c b/gcc/testsuite/gcc.target/i386/fentryname2.c index c51c5d1..13a43ec 100644 --- a/gcc/testsuite/gcc.target/i386/fentryname2.c +++ b/gcc/testsuite/gcc.target/i386/fentryname2.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target mfentry } */ +/* { dg-require-profiling "-pg" } */ /* { dg-options "-pg -mfentry -mrecord-mcount -mfentry-section=foo" } */ /* { dg-final { scan-assembler "section.*foo" } } */ /* { dg-final { scan-assembler "section.*bar" } } */ diff --git a/gcc/testsuite/gcc.target/i386/fentryname3.c b/gcc/testsuite/gcc.target/i386/fentryname3.c index 5688109..bd7c997 100644 --- a/gcc/testsuite/gcc.target/i386/fentryname3.c +++ b/gcc/testsuite/gcc.target/i386/fentryname3.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target mfentry } */ +/* { dg-require-profiling "-pg" } */ /* { dg-options "-pg -mfentry" } */ /* { dg-final { scan-assembler "section.*__entry_loc" } } */ /* { dg-final { scan-assembler "0x0f, 0x1f, 0x44, 0x00, 0x00" } } */ diff --git a/gcc/testsuite/gcc.target/i386/funcspec-56.inc b/gcc/testsuite/gcc.target/i386/funcspec-56.inc index 8e669f1..b8e3b1f 100644 --- a/gcc/testsuite/gcc.target/i386/funcspec-56.inc +++ b/gcc/testsuite/gcc.target/i386/funcspec-56.inc @@ -74,6 +74,10 @@ extern void test_avx512vp2intersect (void) __attribute__((__target__("avx512vp2i extern void test_amx_tile (void) __attribute__((__target__("amx-tile"))); extern void test_amx_int8 (void) __attribute__((__target__("amx-int8"))); extern void test_amx_bf16 (void) __attribute__((__target__("amx-bf16"))); +extern void test_uintr (void) __attribute__((__target__("uintr"))); +extern void test_hreset (void) __attribute__((__target__("hreset"))); +extern void test_keylocker (void) __attribute__((__target__("kl"))); +extern void test_widekl (void) __attribute__((__target__("widekl"))); extern void test_no_sgx (void) __attribute__((__target__("no-sgx"))); extern void test_no_avx5124fmaps(void) __attribute__((__target__("no-avx5124fmaps"))); @@ -149,6 +153,10 @@ extern void test_no_avx512vp2intersect (void) __attribute__((__target__("no-avx5 extern void test_no_amx_tile (void) __attribute__((__target__("no-amx-tile"))); extern void test_no_amx_int8 (void) __attribute__((__target__("no-amx-int8"))); extern void test_no_amx_bf16 (void) __attribute__((__target__("no-amx-bf16"))); +extern void test_no_uintr (void) __attribute__((__target__("no-uintr"))); +extern void test_no_hreset (void) __attribute__((__target__("no-hreset"))); +extern void test_no_keylocker (void) __attribute__((__target__("no-kl"))); +extern void test_no_widekl (void) __attribute__((__target__("no-widekl"))); extern void test_arch_nocona (void) __attribute__((__target__("arch=nocona"))); extern void test_arch_core2 (void) __attribute__((__target__("arch=core2"))); diff --git a/gcc/testsuite/gcc.target/i386/hreset-1.c b/gcc/testsuite/gcc.target/i386/hreset-1.c new file mode 100644 index 0000000..573513f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/hreset-1.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mhreset" } */ +/* { dg-final { scan-assembler-times "eax" 1 } } */ +/* { dg-final { scan-assembler-times "hreset\[ \\t\]+\[\$\]\?0" 1 } } */ + +#include <immintrin.h> + +void foo(unsigned int eax) +{ + _hreset (eax); +} diff --git a/gcc/testsuite/gcc.target/i386/keylocker-aesdec128kl.c b/gcc/testsuite/gcc.target/i386/keylocker-aesdec128kl.c new file mode 100644 index 0000000..d134612 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/keylocker-aesdec128kl.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-mkl -O2" } */ +/* { dg-final { scan-assembler "movdqa\[ \\t\]+\[^\\n\\r\]*, %xmm0" } } */ +/* { dg-final { scan-assembler "aesdec128kl\[ \\t\]+\[^\\n\\r\]*, %xmm0" } } */ +/* { dg-final { scan-assembler "sete" } } */ +/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm0,\[^\\n\\r\]*" } } */ + +#include <immintrin.h> + +__m128i k1, k2; +const char h1[48]; + +unsigned char +test_keylocker_1 (void) +{ + return _mm_aesdec128kl_u8 (&k1, k2, h1); +} diff --git a/gcc/testsuite/gcc.target/i386/keylocker-aesdec256kl.c b/gcc/testsuite/gcc.target/i386/keylocker-aesdec256kl.c new file mode 100644 index 0000000..34736d2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/keylocker-aesdec256kl.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-mkl -O2" } */ +/* { dg-final { scan-assembler "movdqa\[ \\t\]+\[^\\n\\r\]*, %xmm0" } } */ +/* { dg-final { scan-assembler "aesdec256kl\[ \\t\]+\[^\\n\\r\]*, %xmm0" } } */ +/* { dg-final { scan-assembler "sete" } } */ +/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm0,\[^\\n\\r\]*" } } */ + +#include <immintrin.h> + +__m128i k1, k2; +const char h1[48]; + +unsigned char +test_keylocker_3 (void) +{ + return _mm_aesdec256kl_u8 (&k1, k2, h1); +} diff --git a/gcc/testsuite/gcc.target/i386/keylocker-aesdecwide128kl.c b/gcc/testsuite/gcc.target/i386/keylocker-aesdecwide128kl.c new file mode 100644 index 0000000..d23cf4b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/keylocker-aesdecwide128kl.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-mwidekl -O2" } */ +/* { dg-final { scan-assembler "movdqu\[ \\t\]+\[^\\n\\r\]*, %xmm0" } } */ +/* { dg-final { scan-assembler "movdqu\[ \\t\]+\[^\\n\\r\]*16\[^\\n\\r\]*, %xmm1" } } */ +/* { dg-final { scan-assembler "movdqu\[ \\t\]+\[^\\n\\r\]*32\[^\\n\\r\]*, %xmm2" } } */ +/* { dg-final { scan-assembler "movdqu\[ \\t\]+\[^\\n\\r\]*48\[^\\n\\r\]*, %xmm3" } } */ +/* { dg-final { scan-assembler "movdqu\[ \\t\]+\[^\\n\\r\]*64\[^\\n\\r\]*, %xmm4" } } */ +/* { dg-final { scan-assembler "movdqu\[ \\t\]+\[^\\n\\r\]*80\[^\\n\\r\]*, %xmm5" } } */ +/* { dg-final { scan-assembler "movdqu\[ \\t\]+\[^\\n\\r\]*96\[^\\n\\r\]*, %xmm6" } } */ +/* { dg-final { scan-assembler "movdqu\[ \\t\]+\[^\\n\\r\]*112\[^\\n\\r\]*, %xmm7" } } */ +/* { dg-final { scan-assembler "aesdecwide128kl\[ \\t\]+\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "sete" } } */ +/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm0,\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm1,\[^\\n\\r\]*16\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm2,\[^\\n\\r\]*32\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm3,\[^\\n\\r\]*48\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm4,\[^\\n\\r\]*64\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm5,\[^\\n\\r\]*80\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm6,\[^\\n\\r\]*96\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm7,\[^\\n\\r\]*112\[^\\n\\r\]*" } } */ + +#include <immintrin.h> + +const char h1[48]; +const __m128i idata[8]; +__m128i odata[8]; + +unsigned char +test_keylocker_5 (void) +{ + return _mm_aesdecwide128kl_u8 (odata, idata, h1); +} diff --git a/gcc/testsuite/gcc.target/i386/keylocker-aesdecwide256kl.c b/gcc/testsuite/gcc.target/i386/keylocker-aesdecwide256kl.c new file mode 100644 index 0000000..44c3252 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/keylocker-aesdecwide256kl.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-mwidekl -O2" } */ +/* { dg-final { scan-assembler "movdqu\[ \\t\]+\[^\\n\\r\]*, %xmm0" } } */ +/* { dg-final { scan-assembler "movdqu\[ \\t\]+\[^\\n\\r\]*16\[^\\n\\r\]*, %xmm1" } } */ +/* { dg-final { scan-assembler "movdqu\[ \\t\]+\[^\\n\\r\]*32\[^\\n\\r\]*, %xmm2" } } */ +/* { dg-final { scan-assembler "movdqu\[ \\t\]+\[^\\n\\r\]*48\[^\\n\\r\]*, %xmm3" } } */ +/* { dg-final { scan-assembler "movdqu\[ \\t\]+\[^\\n\\r\]*64\[^\\n\\r\]*, %xmm4" } } */ +/* { dg-final { scan-assembler "movdqu\[ \\t\]+\[^\\n\\r\]*80\[^\\n\\r\]*, %xmm5" } } */ +/* { dg-final { scan-assembler "movdqu\[ \\t\]+\[^\\n\\r\]*96\[^\\n\\r\]*, %xmm6" } } */ +/* { dg-final { scan-assembler "movdqu\[ \\t\]+\[^\\n\\r\]*112\[^\\n\\r\]*, %xmm7" } } */ +/* { dg-final { scan-assembler "aesdecwide256kl\[ \\t\]+\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "sete" } } */ +/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm0,\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm1,\[^\\n\\r\]*16\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm2,\[^\\n\\r\]*32\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm3,\[^\\n\\r\]*48\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm4,\[^\\n\\r\]*64\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm5,\[^\\n\\r\]*80\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm6,\[^\\n\\r\]*96\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm7,\[^\\n\\r\]*112\[^\\n\\r\]*" } } */ + +#include <immintrin.h> + +const char h1[48]; +const __m128i idata[8]; +__m128i odata[8]; + +unsigned char +test_keylocker_6 (void) +{ + return _mm_aesdecwide256kl_u8 (odata, idata, h1); +} diff --git a/gcc/testsuite/gcc.target/i386/keylocker-aesenc128kl.c b/gcc/testsuite/gcc.target/i386/keylocker-aesenc128kl.c new file mode 100644 index 0000000..9ff4836 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/keylocker-aesenc128kl.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-mkl -O2" } */ +/* { dg-final { scan-assembler "movdqa\[ \\t\]+\[^\\n\\r\]*, %xmm0" } } */ +/* { dg-final { scan-assembler "aesenc128kl\[ \\t\]+\[^\\n\\r\]*, %xmm0" } } */ +/* { dg-final { scan-assembler "sete" } } */ +/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm0,\[^\\n\\r\]*" } } */ + +#include <immintrin.h> + +__m128i k1, k2; +const char h1[48]; + +unsigned char +test_keylocker_2 (void) +{ + return _mm_aesenc128kl_u8 (&k1, k2, h1); +} diff --git a/gcc/testsuite/gcc.target/i386/keylocker-aesenc256kl.c b/gcc/testsuite/gcc.target/i386/keylocker-aesenc256kl.c new file mode 100644 index 0000000..1c5e076 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/keylocker-aesenc256kl.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-mkl -O2" } */ +/* { dg-final { scan-assembler "movdqa\[ \\t\]+\[^\\n\\r\]*, %xmm0" } } */ +/* { dg-final { scan-assembler "aesenc256kl\[ \\t\]+\[^\\n\\r\]*, %xmm0" } } */ +/* { dg-final { scan-assembler "sete" } } */ +/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm0,\[^\\n\\r\]*" } } */ + +#include <immintrin.h> + +__m128i k1, k2; +const char h1[48]; + +unsigned char +test_keylocker_4 (void) +{ + return _mm_aesenc256kl_u8 (&k1, k2, h1); +} diff --git a/gcc/testsuite/gcc.target/i386/keylocker-aesencwide128kl.c b/gcc/testsuite/gcc.target/i386/keylocker-aesencwide128kl.c new file mode 100644 index 0000000..9fb9c49 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/keylocker-aesencwide128kl.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-mwidekl -O2" } */ +/* { dg-final { scan-assembler "movdqu\[ \\t\]+\[^\\n\\r\]*, %xmm0" } } */ +/* { dg-final { scan-assembler "movdqu\[ \\t\]+\[^\\n\\r\]*16\[^\\n\\r\]*, %xmm1" } } */ +/* { dg-final { scan-assembler "movdqu\[ \\t\]+\[^\\n\\r\]*32\[^\\n\\r\]*, %xmm2" } } */ +/* { dg-final { scan-assembler "movdqu\[ \\t\]+\[^\\n\\r\]*48\[^\\n\\r\]*, %xmm3" } } */ +/* { dg-final { scan-assembler "movdqu\[ \\t\]+\[^\\n\\r\]*64\[^\\n\\r\]*, %xmm4" } } */ +/* { dg-final { scan-assembler "movdqu\[ \\t\]+\[^\\n\\r\]*80\[^\\n\\r\]*, %xmm5" } } */ +/* { dg-final { scan-assembler "movdqu\[ \\t\]+\[^\\n\\r\]*96\[^\\n\\r\]*, %xmm6" } } */ +/* { dg-final { scan-assembler "movdqu\[ \\t\]+\[^\\n\\r\]*112\[^\\n\\r\]*, %xmm7" } } */ +/* { dg-final { scan-assembler "aesencwide128kl\[ \\t\]+\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "sete" } } */ +/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm0,\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm1,\[^\\n\\r\]*16\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm2,\[^\\n\\r\]*32\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm3,\[^\\n\\r\]*48\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm4,\[^\\n\\r\]*64\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm5,\[^\\n\\r\]*80\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm6,\[^\\n\\r\]*96\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm7,\[^\\n\\r\]*112\[^\\n\\r\]*" } } */ + +#include <immintrin.h> + +const char h1[48]; +const __m128i idata[8]; +__m128i odata[8]; + +unsigned char +test_keylocker_7 (void) +{ + return _mm_aesencwide128kl_u8 (odata, idata, h1); +} diff --git a/gcc/testsuite/gcc.target/i386/keylocker-aesencwide256kl.c b/gcc/testsuite/gcc.target/i386/keylocker-aesencwide256kl.c new file mode 100644 index 0000000..125a787 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/keylocker-aesencwide256kl.c @@ -0,0 +1,33 @@ +/* { dg-do compile } */ +/* { dg-options "-mwidekl -O2" } */ +/* { dg-final { scan-assembler "movdqu\[ \\t\]+\[^\\n\\r\]*, %xmm0" } } */ +/* { dg-final { scan-assembler "movdqu\[ \\t\]+\[^\\n\\r\]*16\[^\\n\\r\]*, %xmm1" } } */ +/* { dg-final { scan-assembler "movdqu\[ \\t\]+\[^\\n\\r\]*32\[^\\n\\r\]*, %xmm2" } } */ +/* { dg-final { scan-assembler "movdqu\[ \\t\]+\[^\\n\\r\]*48\[^\\n\\r\]*, %xmm3" } } */ +/* { dg-final { scan-assembler "movdqu\[ \\t\]+\[^\\n\\r\]*64\[^\\n\\r\]*, %xmm4" } } */ +/* { dg-final { scan-assembler "movdqu\[ \\t\]+\[^\\n\\r\]*80\[^\\n\\r\]*, %xmm5" } } */ +/* { dg-final { scan-assembler "movdqu\[ \\t\]+\[^\\n\\r\]*96\[^\\n\\r\]*, %xmm6" } } */ +/* { dg-final { scan-assembler "movdqu\[ \\t\]+\[^\\n\\r\]*112\[^\\n\\r\]*, %xmm7" } } */ +/* { dg-final { scan-assembler "aesencwide256kl\[ \\t\]+\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "sete" } } */ +/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm0,\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm1,\[^\\n\\r\]*16\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm2,\[^\\n\\r\]*32\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm3,\[^\\n\\r\]*48\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm4,\[^\\n\\r\]*64\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm5,\[^\\n\\r\]*80\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm6,\[^\\n\\r\]*96\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm7,\[^\\n\\r\]*112\[^\\n\\r\]*" } } */ + +#include <immintrin.h> + +const char h1[48]; +const __m128i idata[8]; +__m128i odata[8]; + +unsigned char +test_keylocker_8 (void) +{ + return _mm_aesencwide256kl_u8 (odata, idata, h1); +} + diff --git a/gcc/testsuite/gcc.target/i386/keylocker-encodekey128.c b/gcc/testsuite/gcc.target/i386/keylocker-encodekey128.c new file mode 100644 index 0000000..805e062 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/keylocker-encodekey128.c @@ -0,0 +1,29 @@ +/* { dg-do compile } */ +/* { dg-options "-mkl -O2" } */ +/* { dg-final { scan-assembler "movdqa\[ \\t\]+\[^\\n\\r\]*, %xmm0" } } */ +/* { dg-final { scan-assembler "movl\[ \\t\]+\[^\\n\\r\]*, %eax" } } */ +/* { dg-final { scan-assembler "encodekey128\[ \\t\]+\[^\\n\]*%eax\[^\\n\\r\]*%eax" } } */ +/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\]*%xmm0,\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\]*%xmm1,\[^\\n\\r\]*16\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\]*%xmm2,\[^\\n\\r\]*32\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "(?:movdqa|movaps)\[ \\t\]+\[^\\n\]*%xmm\[4-6\],\[^\\n\\r\]*" } } */ + +#include <immintrin.h> + +unsigned int ctrl; +char h2[48]; +__m128i k1, k2; + +unsigned int +test_keylocker_9 (void) +{ + unsigned int ret; + + ret = _mm_encodekey128_u32 (ctrl, k1, h2); + + if (ret) + k2 = (__m128i){0}; + + return ret; +} + diff --git a/gcc/testsuite/gcc.target/i386/keylocker-encodekey256.c b/gcc/testsuite/gcc.target/i386/keylocker-encodekey256.c new file mode 100644 index 0000000..26f04dc --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/keylocker-encodekey256.c @@ -0,0 +1,30 @@ +/* { dg-do compile } */ +/* { dg-options "-mkl -O2" } */ +/* { dg-final { scan-assembler "movdqa\[ \\t\]+\[^\\n\\r\]*, %xmm0" } } */ +/* { dg-final { scan-assembler "movdqa\[ \\t\]+\[^\\n\\r\]*, %xmm1" } } */ +/* { dg-final { scan-assembler "movl\[ \\t\]+\[^\\n\\r\]*, %eax" } } */ +/* { dg-final { scan-assembler "encodekey256\[ \\t\]+\[^\\n\]*%eax\[^\\n\\r\]*%eax" } } */ +/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\]*%xmm0,\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\]*%xmm1,\[^\\n\\r\]*16\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\]*%xmm2,\[^\\n\\r\]*32\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\]*%xmm3,\[^\\n\\r\]*48\[^\\n\\r\]*" } } */ +/* { dg-final { scan-assembler "(?:movdqa|movaps)\[ \\t\]+\[^\\n\]*%xmm\[4-6\],\[^\\n\\r\]*" } } */ + +#include <immintrin.h> + +unsigned int ctrl; +char h2[48]; +__m128i k1, k2, k3; + +unsigned int +test_keylocker_10 (void) +{ + unsigned int ret; + ret = _mm_encodekey256_u32 (ctrl, k1, k2, h2); + + if (ret) + k3 = (__m128i){0}; + + return ret; +} + diff --git a/gcc/testsuite/gcc.target/i386/keylocker-loadiwkey.c b/gcc/testsuite/gcc.target/i386/keylocker-loadiwkey.c new file mode 100644 index 0000000..cc0f2e0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/keylocker-loadiwkey.c @@ -0,0 +1,19 @@ +/* { dg-do compile } */ +/* { dg-options "-mkl -O2" } */ +/* { dg-final { scan-assembler "movl\[ \\t\]+\[^\n\]*ctrl(\\(%rip\\))?\[^\n\r]*%eax" } } */ +/* { dg-final { scan-assembler "movdqa\[ \\t\]+\[^\n\]*k2(\\(%rip\\))?\[^\n\r]*%xmm1" } } */ +/* { dg-final { scan-assembler "movdqa\[ \\t\]+\[^\n\]*k3(\\(%rip\\))?\[^\n\r]*%xmm2" } } */ +/* { dg-final { scan-assembler "movdqa\[ \\t\]+\[^\n\]*k1(\\(%rip\\))?\[^\n\r]*%xmm0" } } */ +/* { dg-final { scan-assembler "loadiwkey\[ \\t\]+\[^\n\]*%xmm1\[^\n\r]*%xmm2" } } */ + +#include <immintrin.h> + +unsigned int ctrl; +__m128i k1, k2, k3; + +void +test_keylocker_11 (void) +{ + _mm_loadiwkey (ctrl, k1, k2, k3); +} + diff --git a/gcc/testsuite/gcc.target/i386/ms_hook_prologue.c b/gcc/testsuite/gcc.target/i386/ms_hook_prologue.c index e11bcc0..12e54c0 100644 --- a/gcc/testsuite/gcc.target/i386/ms_hook_prologue.c +++ b/gcc/testsuite/gcc.target/i386/ms_hook_prologue.c @@ -4,6 +4,8 @@ /* { dg-require-effective-target ms_hook_prologue } */ /* { dg-options "-O2 -fomit-frame-pointer" } */ +#include <stdio.h> + int __attribute__ ((__ms_hook_prologue__)) foo () { unsigned char *ptr = (unsigned char *) foo; @@ -32,7 +34,16 @@ int __attribute__ ((__ms_hook_prologue__)) foo () return 0; } +unsigned int __attribute__ ((noinline, __ms_hook_prologue__)) test_func() +{ + static int value; + + if (value++) puts(""); + + return 0; +} + int main () { - return foo(); + return foo() || test_func(); } diff --git a/gcc/testsuite/gcc.target/i386/pr45352-1.c b/gcc/testsuite/gcc.target/i386/pr45352-1.c index 5cd1bd8..f5e96b2 100644 --- a/gcc/testsuite/gcc.target/i386/pr45352-1.c +++ b/gcc/testsuite/gcc.target/i386/pr45352-1.c @@ -1,4 +1,5 @@ /* { dg-do compile } */ +/* { dg-require-effective-target fpic } */ /* { dg-options "-mtune=amdfam10 -O3 -fpeel-loops -fselective-scheduling2 -fsel-sched-pipelining -fPIC" } */ static int FIR_Tab_16[16][16]; diff --git a/gcc/testsuite/gcc.target/i386/pr47602.c b/gcc/testsuite/gcc.target/i386/pr47602.c index fa5f5bd..5ed1e1f 100644 --- a/gcc/testsuite/gcc.target/i386/pr47602.c +++ b/gcc/testsuite/gcc.target/i386/pr47602.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target ia32 } */ +/* { dg-require-effective-target fpic } */ /* { dg-options "-fPIC" } */ /* Test verifies that %ebx is no longer fixed when generating PIC code on i686. */ diff --git a/gcc/testsuite/gcc.target/i386/pr55151.c b/gcc/testsuite/gcc.target/i386/pr55151.c index 62da8cb..d6255a8 100644 --- a/gcc/testsuite/gcc.target/i386/pr55151.c +++ b/gcc/testsuite/gcc.target/i386/pr55151.c @@ -1,5 +1,6 @@ /* PR rtl-optimization/55151 */ /* { dg-do compile { target { ! ia32 } } } */ +/* { dg-require-effective-target fpic } */ /* { dg-options "-fPIC" } */ int a, b, c, d, e, f, g, h, i, j, k, l; diff --git a/gcc/testsuite/gcc.target/i386/pr55458.c b/gcc/testsuite/gcc.target/i386/pr55458.c index 7164ca9..1dea55c 100644 --- a/gcc/testsuite/gcc.target/i386/pr55458.c +++ b/gcc/testsuite/gcc.target/i386/pr55458.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target ia32 } */ +/* { dg-require-effective-target fpic } */ /* { dg-options "-fPIC" } */ /* Test verifies that %ebx is no longer fixed when generating PIC code on i686. */ diff --git a/gcc/testsuite/gcc.target/i386/pr56348.c b/gcc/testsuite/gcc.target/i386/pr56348.c index c31814f..93423d9 100644 --- a/gcc/testsuite/gcc.target/i386/pr56348.c +++ b/gcc/testsuite/gcc.target/i386/pr56348.c @@ -1,5 +1,6 @@ /* PR target/56348 */ /* { dg-do compile { target ia32 } } */ +/* { dg-require-effective-target fpic } */ /* { dg-options "-O2 -fPIC -mfpmath=sse -msse2" } */ typedef unsigned int size_t; diff --git a/gcc/testsuite/gcc.target/i386/pr57097.c b/gcc/testsuite/gcc.target/i386/pr57097.c index 2f00938..debacbf 100644 --- a/gcc/testsuite/gcc.target/i386/pr57097.c +++ b/gcc/testsuite/gcc.target/i386/pr57097.c @@ -1,4 +1,5 @@ /* { dg-do compile } */ +/* { dg-require-effective-target fpic } */ /* { dg-options "-O2 -fPIC" } */ extern double ad[], bd[], cd[], dd[]; extern long long all[], bll[], cll[], dll[]; diff --git a/gcc/testsuite/gcc.target/i386/pr65753.c b/gcc/testsuite/gcc.target/i386/pr65753.c index 562f54b..117d6ed 100644 --- a/gcc/testsuite/gcc.target/i386/pr65753.c +++ b/gcc/testsuite/gcc.target/i386/pr65753.c @@ -1,4 +1,5 @@ /* { dg-do compile } */ +/* { dg-require-effective-target fpic } */ /* { dg-options "-fPIC -O2" } */ /* { dg-final { scan-assembler-not "call" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr65915.c b/gcc/testsuite/gcc.target/i386/pr65915.c index 990c5aa..6588de4 100644 --- a/gcc/testsuite/gcc.target/i386/pr65915.c +++ b/gcc/testsuite/gcc.target/i386/pr65915.c @@ -1,4 +1,5 @@ /* { dg-do run } */ +/* { dg-require-effective-target fpic } */ /* { dg-options "-O2 -mavx512f -fpic -mcmodel=medium" } */ /* { dg-require-effective-target avx512f } */ /* { dg-require-effective-target lp64 } */ diff --git a/gcc/testsuite/gcc.target/i386/pr66232-5.c b/gcc/testsuite/gcc.target/i386/pr66232-5.c index 87f9380..76705a5 100644 --- a/gcc/testsuite/gcc.target/i386/pr66232-5.c +++ b/gcc/testsuite/gcc.target/i386/pr66232-5.c @@ -1,5 +1,6 @@ /* { dg-do compile { target { ! ia32 } } } */ /* { dg-require-effective-target maybe_x32 } */ +/* { dg-require-effective-target fpic } */ /* { dg-options "-O2 -fpic -mx32" } */ extern void (*bar) (void); diff --git a/gcc/testsuite/gcc.target/i386/pr66334.c b/gcc/testsuite/gcc.target/i386/pr66334.c index 97dfecc..19c2396 100644 --- a/gcc/testsuite/gcc.target/i386/pr66334.c +++ b/gcc/testsuite/gcc.target/i386/pr66334.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target ia32 } */ +/* { dg-require-effective-target fpic } */ /* { dg-options "-O2 -fpic -fexceptions -fasynchronous-unwind-tables" } */ /* { dg-final { scan-assembler "movl\[ \\t\].+, %ebx" } } */ extern int foo (int); diff --git a/gcc/testsuite/gcc.target/i386/pr66819-2.c b/gcc/testsuite/gcc.target/i386/pr66819-2.c index 9de4f97..ad2a33e 100644 --- a/gcc/testsuite/gcc.target/i386/pr66819-2.c +++ b/gcc/testsuite/gcc.target/i386/pr66819-2.c @@ -1,4 +1,5 @@ /* { dg-do compile { target ia32 } } */ +/* { dg-require-effective-target fpic } */ /* { dg-options "-fPIC -O2 -mregparm=3" } */ /* { dg-final { scan-assembler-not "call" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr67265.c b/gcc/testsuite/gcc.target/i386/pr67265.c index 2671acc..1708d53 100644 --- a/gcc/testsuite/gcc.target/i386/pr67265.c +++ b/gcc/testsuite/gcc.target/i386/pr67265.c @@ -3,6 +3,7 @@ /* { dg-do compile } */ /* { dg-require-stack-check "" } */ +/* { dg-require-effective-target fpic } */ /* { dg-options "-O -fstack-check -fPIC" } */ int a, b, c, d, e; diff --git a/gcc/testsuite/gcc.target/i386/pr81481.c b/gcc/testsuite/gcc.target/i386/pr81481.c index a5b936f..49f7821 100644 --- a/gcc/testsuite/gcc.target/i386/pr81481.c +++ b/gcc/testsuite/gcc.target/i386/pr81481.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target ssse3 } */ +/* { dg-require-effective-target fpic } */ /* { dg-options "-O2 -fpic -mssse3" } */ /* { dg-final { scan-assembler-not "pshufb\[ \t\]\\(%esp\\)" } } */ #include <immintrin.h> diff --git a/gcc/testsuite/gcc.target/i386/pr83994.c b/gcc/testsuite/gcc.target/i386/pr83994.c index dc0b7cb..1eb47e3 100644 --- a/gcc/testsuite/gcc.target/i386/pr83994.c +++ b/gcc/testsuite/gcc.target/i386/pr83994.c @@ -1,4 +1,5 @@ /* { dg-do compile } */ +/* { dg-require-effective-target fpic } */ /* { dg-options "-O2 -march=i686 -fpic -fstack-clash-protection" } */ /* { dg-require-effective-target ia32 } */ diff --git a/gcc/testsuite/gcc.target/i386/pr95151-1.c b/gcc/testsuite/gcc.target/i386/pr95151-1.c new file mode 100644 index 0000000..54a7510 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr95151-1.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -minline-all-stringops" } */ + +struct foo +{ + char array[257]; +}; + +extern struct foo x; + +int +func (struct foo i) +{ + return __builtin_memcmp (&x, &i, sizeof (x)) ? 1 : 2; +} + +/* { dg-final { scan-assembler-not "call\[\\t \]*_?memcmp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr95151-2.c b/gcc/testsuite/gcc.target/i386/pr95151-2.c new file mode 100644 index 0000000..8f9d8ee --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr95151-2.c @@ -0,0 +1,10 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -minline-all-stringops" } */ + +int +func (void *d, void *s, unsigned int l) +{ + return __builtin_memcmp (d, s, l) ? 1 : 2; +} + +/* { dg-final { scan-assembler-not "call\[\\t \]*_?memcmp" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr95151-3.c b/gcc/testsuite/gcc.target/i386/pr95151-3.c new file mode 100644 index 0000000..14cbdec --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr95151-3.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -msse2 -mno-inline-all-stringops" } */ + +struct foo +{ + char array[257]; +}; + +extern struct foo x; + +int +func (struct foo i) +{ + return __builtin_memcmp (&x, &i, sizeof (x)) ? 1 : 2; +} + +/* { dg-final { scan-assembler "call\[\\t \]*_?memcmp" } } */ +/* { dg-final { scan-assembler-not "cmpsb" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr95151-4.c b/gcc/testsuite/gcc.target/i386/pr95151-4.c new file mode 100644 index 0000000..c93b2b6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr95151-4.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -msse2 -mno-inline-all-stringops" } */ + +int +func (void *d, void *s, unsigned int l) +{ + return __builtin_memcmp (d, s, l) ? 1 : 2; +} + +/* { dg-final { scan-assembler "call\[\\t \]*_?memcmp" } } */ +/* { dg-final { scan-assembler-not "cmpsb" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr95458-1.c b/gcc/testsuite/gcc.target/i386/pr95458-1.c new file mode 100644 index 0000000..231a478 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr95458-1.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -minline-all-stringops" } */ + +int +func (char *d, unsigned int l) +{ + return __builtin_strncmp (d, "foo", l) ? 1 : 2; +} + +/* { dg-final { scan-assembler-not "call\[\\t \]*_?strncmp" } } */ +/* { dg-final { scan-assembler "cmpsb" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr95458-2.c b/gcc/testsuite/gcc.target/i386/pr95458-2.c new file mode 100644 index 0000000..1a62044 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr95458-2.c @@ -0,0 +1,7 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mno-inline-all-stringops" } */ + +#include "pr95458-1.c" + +/* { dg-final { scan-assembler "call\[\\t \]*_?strncmp" } } */ +/* { dg-final { scan-assembler-not "cmpsb" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr95483-1.c b/gcc/testsuite/gcc.target/i386/pr95483-1.c new file mode 100644 index 0000000..6b00826 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr95483-1.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -msse" } */ +/* { dg-final { scan-assembler-times "pxor\[ \\t\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "pinsrw\[ \\t\]+\[^\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "pextrw\[ \\t\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*(?:\n|\[ \\t\]+#)" 1 } } */ + + +#include <emmintrin.h> +unsigned short *p1,*p2; +volatile __m128i x1,x2; + +void foo (void) +{ + x1=_mm_loadu_si16 (p1); + _mm_storeu_si16 (p2, x2); +} diff --git a/gcc/testsuite/gcc.target/i386/pr95483-2.c b/gcc/testsuite/gcc.target/i386/pr95483-2.c new file mode 100644 index 0000000..a12aea8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr95483-2.c @@ -0,0 +1,14 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -msse2" } */ +/* { dg-final { scan-assembler-times "(?:vpinsrd|movd)\[ \\t\]+\[^\n\]*\\)\[^\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "movd\[ \\t\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*\\)(?:\n|\[ \\t\]+#)" 1 } } */ + +#include <emmintrin.h> +unsigned int *p1,*p2; +volatile __m128i x1,x2; + +void foo (void) +{ + x1=_mm_loadu_si32 (p1); + _mm_storeu_si32 (p2, x2); +} diff --git a/gcc/testsuite/gcc.target/i386/pr95483-3.c b/gcc/testsuite/gcc.target/i386/pr95483-3.c new file mode 100644 index 0000000..ec90189 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr95483-3.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx" } */ +/* { dg-final { scan-assembler-times "vmovd\[ \\t\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*(?:\n|\[ \\t\]+#)" 1 } } */ + +#include <immintrin.h> +volatile __m256i x1; + +int foo (void) +{ + return _mm256_cvtsi256_si32 (x1); +} diff --git a/gcc/testsuite/gcc.target/i386/pr95483-4.c b/gcc/testsuite/gcc.target/i386/pr95483-4.c new file mode 100644 index 0000000..1d4cdb4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr95483-4.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512f" } */ +/* { dg-final { scan-assembler-times "vmovd\[ \\t\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*(?:\n|\[ \\t\]+#)" 1 } } */ + +#include <immintrin.h> +volatile __m512i x1; + +int foo (void) +{ + return _mm512_cvtsi512_si32 (x1); +} diff --git a/gcc/testsuite/gcc.target/i386/pr95483-5.c b/gcc/testsuite/gcc.target/i386/pr95483-5.c new file mode 100644 index 0000000..b52e39d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr95483-5.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "(?:vmovdqu8|vinserti128)\[ \\t\]+\[^\{\n\]*\\)\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "(?:vmovdqu8|vextracti128)\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\]*\\)(?:\n|\[ \\t\]+#)" 1 } } */ + +#include <immintrin.h> + +char *p, *p1; +volatile __m256i yyy; + +void extern +avx512bw_test (void) +{ + yyy = _mm256_loadu_epi8 (p); + _mm256_storeu_epi8 (p1, yyy); +} diff --git a/gcc/testsuite/gcc.target/i386/pr95483-6.c b/gcc/testsuite/gcc.target/i386/pr95483-6.c new file mode 100644 index 0000000..3540bf8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr95483-6.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "(?:vinserti128|vmovdqu)\[ \\t\]+\[^\{\n\]*\\)\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ + +#include <immintrin.h> + +int *p; +long long *p1; +volatile __m256i x1, x2; + +void extern +avx512vl_test (void) +{ + x1 = _mm256_loadu_epi32 (p); + x2 = _mm256_loadu_epi64 (p1); +} diff --git a/gcc/testsuite/gcc.target/i386/pr95483-7.c b/gcc/testsuite/gcc.target/i386/pr95483-7.c new file mode 100644 index 0000000..f72aa93 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr95483-7.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vmovdqu\[ \\t\]+\[^\{\n\]*\\)\[^\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ + +#include <immintrin.h> + +int *p; +long long *p1; +volatile __m128i x1, x2; + +void extern +avx512vl_test (void) +{ + x1 = _mm_loadu_epi32 (p); + x2 = _mm_loadu_epi64 (p1); +} diff --git a/gcc/testsuite/gcc.target/i386/pr95866-1.c b/gcc/testsuite/gcc.target/i386/pr95866-1.c index 991370c..553d415 100644 --- a/gcc/testsuite/gcc.target/i386/pr95866-1.c +++ b/gcc/testsuite/gcc.target/i386/pr95866-1.c @@ -13,6 +13,6 @@ void foo(int i) /* We should not use vector operations for i + 1 and (i + 1) & 31 but instead use { j, j, j, j }. */ -/* { dg-final { scan-tree-dump-times "Building parent vector operands from scalars" 2 "slp2" } } */ +/* { dg-final { scan-tree-dump-times "Using a splat of the uniform operand" 2 "slp2" } } */ /* { dg-final { scan-tree-dump-not " = \{i_" "slp2" } } */ /* { dg-final { scan-tree-dump-times " = \{j_" 1 "slp2" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr97140.c b/gcc/testsuite/gcc.target/i386/pr97140.c new file mode 100644 index 0000000..edb39d9 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr97140.c @@ -0,0 +1,10 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -msse2 -mno-mmx -Wno-psabi" } */ + +typedef int __m64 __attribute__ ((__vector_size__ (8), __may_alias__)); +typedef char __v8qi __attribute__ ((__vector_size__ (8))); +void +_mm_maskmove_si64 (__m64 __A, __m64 __N, char *__P) +{ + __builtin_ia32_maskmovq ((__v8qi)__A, (__v8qi)__N, __P); /* { dg-error "needs isa option -msse -m3dnowa -mmmx" } */ +} diff --git a/gcc/testsuite/gcc.target/i386/pr97249-1.c b/gcc/testsuite/gcc.target/i386/pr97249-1.c new file mode 100644 index 0000000..4478a34 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr97249-1.c @@ -0,0 +1,30 @@ +/* PR target/97249 */ +/* { dg-do compile } */ +/* { dg-options "-mavx2 -O3 -masm=att" } */ +/* { dg-final { scan-assembler-times {(?n)vpmovzxbw[ \t]+\(.*%xmm[0-9]} 2 } } */ +/* { dg-final { scan-assembler-times {(?n)vpmovzxwd[ \t]+\(.*%xmm[0-9]} 2 } } */ +/* { dg-final { scan-assembler-times {(?n)vpmovzxdq[ \t]+\(.*%xmm[0-9]} 2 } } */ + +void +foo (unsigned char* p1, unsigned char* p2, short* __restrict p3) +{ + for (int i = 0 ; i != 8; i++) + p3[i] = p1[i] + p2[i]; + return; +} + +void +foo1 (unsigned short* p1, unsigned short* p2, int* __restrict p3) +{ + for (int i = 0 ; i != 4; i++) + p3[i] = p1[i] + p2[i]; + return; +} + +void +foo2 (unsigned int* p1, unsigned int* p2, long long* __restrict p3) +{ + for (int i = 0 ; i != 2; i++) + p3[i] = (long long)p1[i] + (long long)p2[i]; + return; +} diff --git a/gcc/testsuite/gcc.target/i386/pr97387-1.c b/gcc/testsuite/gcc.target/i386/pr97387-1.c new file mode 100644 index 0000000..352092a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr97387-1.c @@ -0,0 +1,31 @@ +/* PR target/97387 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -fomit-frame-pointer" } */ +/* { dg-final { scan-assembler-times "\taddl\t" 1 } } */ +/* { dg-final { scan-assembler-times "\tadcl\t" 3 } } */ +/* { dg-final { scan-assembler-times "\tsubl\t" 1 } } */ +/* { dg-final { scan-assembler-times "\tsbbl\t" 3 } } */ +/* { dg-final { scan-assembler-not "\tset\[bc]\t" } } */ +/* { dg-final { scan-assembler-not "\taddb\t" } } */ + +#include <x86intrin.h> + +void +foo (unsigned int a[4], unsigned int b[4]) +{ + unsigned char carry = 0; + carry = _addcarry_u32 (carry, a[0], b[0], &a[0]); + carry = _addcarry_u32 (carry, a[1], b[1], &a[1]); + carry = _addcarry_u32 (carry, a[2], b[2], &a[2]); + _addcarry_u32 (carry, a[3], b[3], &a[3]); +} + +void +bar (unsigned int a[4], unsigned int b[4]) +{ + unsigned char carry = 0; + carry = _subborrow_u32 (carry, a[0], b[0], &a[0]); + carry = _subborrow_u32 (carry, a[1], b[1], &a[1]); + carry = _subborrow_u32 (carry, a[2], b[2], &a[2]); + _subborrow_u32 (carry, a[3], b[3], &a[3]); +} diff --git a/gcc/testsuite/gcc.target/i386/pr97387-2.c b/gcc/testsuite/gcc.target/i386/pr97387-2.c new file mode 100644 index 0000000..21d8cce --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr97387-2.c @@ -0,0 +1,31 @@ +/* PR target/97387 */ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-O2 -fomit-frame-pointer" } */ +/* { dg-final { scan-assembler-times "\taddq\t" 1 } } */ +/* { dg-final { scan-assembler-times "\tadcq\t" 3 } } */ +/* { dg-final { scan-assembler-times "\tsubq\t" 1 } } */ +/* { dg-final { scan-assembler-times "\tsbbq\t" 3 } } */ +/* { dg-final { scan-assembler-not "\tset\[bc]\t" } } */ +/* { dg-final { scan-assembler-not "\taddb\t" } } */ + +#include <x86intrin.h> + +void +foo (unsigned long long a[4], unsigned long long b[4]) +{ + unsigned char carry = 0; + carry = _addcarry_u64 (carry, a[0], b[0], &a[0]); + carry = _addcarry_u64 (carry, a[1], b[1], &a[1]); + carry = _addcarry_u64 (carry, a[2], b[2], &a[2]); + _addcarry_u64 (carry, a[3], b[3], &a[3]); +} + +void +bar (unsigned long long a[4], unsigned long long b[4]) +{ + unsigned char carry = 0; + carry = _subborrow_u64 (carry, a[0], b[0], &a[0]); + carry = _subborrow_u64 (carry, a[1], b[1], &a[1]); + carry = _subborrow_u64 (carry, a[2], b[2], &a[2]); + _subborrow_u64 (carry, a[3], b[3], &a[3]); +} diff --git a/gcc/testsuite/gcc.target/i386/pr97506.c b/gcc/testsuite/gcc.target/i386/pr97506.c new file mode 100644 index 0000000..74714cf --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr97506.c @@ -0,0 +1,19 @@ +/* PR target/97506 */ +/* { dg-do compile } */ +/* { dg-options "-Og -finline-functions-called-once -fno-tree-ccp -mavx512vbmi -mavx512vl" } */ + +typedef unsigned char __attribute__ ((__vector_size__ (16))) U; +typedef int __attribute__ ((__vector_size__ (4))) V; +U u; + +void +bar (int i, V v) +{ + u += (char) i & (char) i > (U){}; +} + +void +foo (void) +{ + bar (0, (V){}); +} diff --git a/gcc/testsuite/gcc.target/i386/pr97521.c b/gcc/testsuite/gcc.target/i386/pr97521.c new file mode 100644 index 0000000..804ffd6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr97521.c @@ -0,0 +1,27 @@ +/* { dg-do run } */ +/* { dg-options "-O -mno-sse2" } */ + +typedef unsigned char __attribute__ ((__vector_size__ (8))) V; +typedef unsigned long long __attribute__ ((__vector_size__ (16))) W; + +V c; +W d, e; + +V +foo (W f) +{ + W g = (W) { 0, 209 } <7 <= (0 < f); + W h = e + g + d; + V j = (V) (h[0]) + (V) c; + return j; +} + +int +main (void) +{ + V x = foo ((W) { 3 }); + for (unsigned i = 0; i < sizeof (x); i++) + if (x[i] != 0xff) + __builtin_abort (); + return 0; +} diff --git a/gcc/testsuite/gcc.target/i386/pr97540.c b/gcc/testsuite/gcc.target/i386/pr97540.c new file mode 100644 index 0000000..20f8717 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr97540.c @@ -0,0 +1,6 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +int mt7615_add_interface_dev_0; +int ffs(int x) { asm("" : : "rm"(x)); } +int mt7615_add_interface() { ffs(~mt7615_add_interface_dev_0); } diff --git a/gcc/testsuite/gcc.target/i386/returninst1.c b/gcc/testsuite/gcc.target/i386/returninst1.c index 133fdee..74d10c9 100644 --- a/gcc/testsuite/gcc.target/i386/returninst1.c +++ b/gcc/testsuite/gcc.target/i386/returninst1.c @@ -1,5 +1,6 @@ /* { dg-do compile { target { ! ia32 } } } */ /* { dg-require-effective-target mfentry } */ +/* { dg-require-profiling "-pg" } */ /* { dg-options "-pg -mfentry -minstrument-return=call -mrecord-return" } */ /* { dg-final { scan-assembler "call.*__return__" } } */ /* { dg-final { scan-assembler "section.*return_loc" } } */ diff --git a/gcc/testsuite/gcc.target/i386/returninst2.c b/gcc/testsuite/gcc.target/i386/returninst2.c index 3629310..e19f0d0 100644 --- a/gcc/testsuite/gcc.target/i386/returninst2.c +++ b/gcc/testsuite/gcc.target/i386/returninst2.c @@ -1,5 +1,6 @@ /* { dg-do compile { target { ! ia32 } } } */ /* { dg-require-effective-target mfentry } */ +/* { dg-require-profiling "-pg" } */ /* { dg-options "-pg -mfentry -minstrument-return=nop5 -mrecord-return" } */ /* { dg-final { scan-assembler-times "0x0f, 0x1f, 0x44, 0x00, 0x00" 3 } } */ /* { dg-final { scan-assembler "section.*return_loc" } } */ diff --git a/gcc/testsuite/gcc.target/i386/returninst3.c b/gcc/testsuite/gcc.target/i386/returninst3.c index b84cc77..acb8984 100644 --- a/gcc/testsuite/gcc.target/i386/returninst3.c +++ b/gcc/testsuite/gcc.target/i386/returninst3.c @@ -1,5 +1,6 @@ /* { dg-do compile { target { ! ia32 } } } */ /* { dg-require-effective-target mfentry } */ +/* { dg-require-profiling "-pg" } */ /* { dg-options "-pg -mfentry -minstrument-return=call" } */ /* { dg-final { scan-assembler-not "call.*__return__" } } */ diff --git a/gcc/testsuite/gcc.target/i386/sse-12.c b/gcc/testsuite/gcc.target/i386/sse-12.c index 61146b2b..f1e05e6 100644 --- a/gcc/testsuite/gcc.target/i386/sse-12.c +++ b/gcc/testsuite/gcc.target/i386/sse-12.c @@ -3,7 +3,7 @@ popcntintrin.h gfniintrin.h and mm_malloc.h are usable with -O -std=c89 -pedantic-errors. */ /* { dg-do compile } */ -/* { dg-options "-O -std=c89 -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512bw -mavx512dq -mavx512vl -mavx512vbmi -mavx512vbmi2 -mavx512ifma -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mavx512bitalg -mpconfig -mwbnoinvd -mavx512bf16 -menqcmd -mavx512vp2intersect -mserialize -mtsxldtrk -mamx-tile -mamx-int8 -mamx-bf16" } */ +/* { dg-options "-O -std=c89 -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512bw -mavx512dq -mavx512vl -mavx512vbmi -mavx512vbmi2 -mavx512ifma -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mavx512bitalg -mpconfig -mwbnoinvd -mavx512bf16 -menqcmd -mavx512vp2intersect -mserialize -mtsxldtrk -mamx-tile -mamx-int8 -mamx-bf16 -mkl -mwidekl" } */ #include <x86intrin.h> diff --git a/gcc/testsuite/gcc.target/i386/sse-13.c b/gcc/testsuite/gcc.target/i386/sse-13.c index 4d6c9b3..7f96331 100644 --- a/gcc/testsuite/gcc.target/i386/sse-13.c +++ b/gcc/testsuite/gcc.target/i386/sse-13.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512vl -mavx512dq -mavx512bw -mavx512vbmi -mavx512vbmi2 -mavx512ifma -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mavx512vp2intersect -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mavx512bitalg -mpconfig -mwbnoinvd -mavx512bf16 -menqcmd -mserialize -mtsxldtrk -mamx-tile -mamx-int8 -mamx-bf16" } */ +/* { dg-options "-O2 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512vl -mavx512dq -mavx512bw -mavx512vbmi -mavx512vbmi2 -mavx512ifma -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mavx512vp2intersect -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mavx512bitalg -mpconfig -mwbnoinvd -mavx512bf16 -menqcmd -mserialize -mtsxldtrk -mamx-tile -mamx-int8 -mamx-bf16 -mkl -mwidekl" } */ /* { dg-add-options bind_pic_locally } */ #include <mm_malloc.h> @@ -398,6 +398,8 @@ #define __builtin_ia32_vfmaddss3_mask3(A, B, C, D, E) __builtin_ia32_vfmaddss3_mask3(A, B, C, D, 8) #define __builtin_ia32_vfmaddss3_maskz(A, B, C, D, E) __builtin_ia32_vfmaddss3_maskz(A, B, C, D, 8) #define __builtin_ia32_vfmsubss3_mask3(A, B, C, D, E) __builtin_ia32_vfmsubss3_mask3(A, B, C, D, 8) +#define __builtin_ia32_cvtsd2ss_mask_round(A, B, C, D, E) __builtin_ia32_cvtsd2ss_mask_round(A, B, C, D, 8) +#define __builtin_ia32_cvtss2sd_mask_round(A, B, C, D, E) __builtin_ia32_cvtss2sd_mask_round(A, B, C, D, 8) /* avx512erintrin.h */ #define __builtin_ia32_exp2ps_mask(A, B, C, D) __builtin_ia32_exp2ps_mask(A, B, C, 8) @@ -410,6 +412,10 @@ #define __builtin_ia32_rcp28sd_round(A, B, C) __builtin_ia32_rcp28sd_round(A, B, 8) #define __builtin_ia32_rsqrt28ss_round(A, B, C) __builtin_ia32_rsqrt28ss_round(A, B, 8) #define __builtin_ia32_rsqrt28sd_round(A, B, C) __builtin_ia32_rsqrt28sd_round(A, B, 8) +#define __builtin_ia32_rcp28sd_mask_round(A, B, C, D, E) __builtin_ia32_rcp28sd_mask_round(A, B, C, D, 8) +#define __builtin_ia32_rcp28ss_mask_round(A, B, C, D, E) __builtin_ia32_rcp28ss_mask_round(A, B, C, D, 8) +#define __builtin_ia32_rsqrt28sd_mask_round(A, B, C, D, E) __builtin_ia32_rsqrt28sd_mask_round(A, B, C, D, 8) +#define __builtin_ia32_rsqrt28ss_mask_round(A, B, C, D, E) __builtin_ia32_rsqrt28ss_mask_round(A, B, C, D, 8) /* avx512pfintrin.h */ #define __builtin_ia32_gatherpfdps(A, B, C, D, E) __builtin_ia32_gatherpfdps(A, B, C, 1, _MM_HINT_T0) @@ -621,6 +627,10 @@ #define __builtin_ia32_cmpw128_mask(A, B, E, D) __builtin_ia32_cmpw128_mask(A, B, 1, D) #define __builtin_ia32_cmpb256_mask(A, B, E, D) __builtin_ia32_cmpb256_mask(A, B, 1, D) #define __builtin_ia32_cmpb128_mask(A, B, E, D) __builtin_ia32_cmpb128_mask(A, B, 1, D) +#define __builtin_ia32_reducepd512_mask_round(A,B,C,D,E) __builtin_ia32_reducepd512_mask_round(A,1,C,D,8) +#define __builtin_ia32_reduceps512_mask_round(A,B,C,D,E) __builtin_ia32_reduceps512_mask_round(A,1,C,D,8) +#define __builtin_ia32_reducesd_mask_round(A, B, F, W, U, E) __builtin_ia32_reducesd_mask_round(A, B, 1, W, U, 8) +#define __builtin_ia32_reducess_mask_round(A, B, F, W, U, E) __builtin_ia32_reducess_mask_round(A, B, 1, W, U, 8) /* avx512vldqintrin.h */ #define __builtin_ia32_reduceps256_mask(A, E, C, D) __builtin_ia32_reduceps256_mask(A, 1, C, D) diff --git a/gcc/testsuite/gcc.target/i386/sse-14.c b/gcc/testsuite/gcc.target/i386/sse-14.c index 837b51c..27704c3 100644 --- a/gcc/testsuite/gcc.target/i386/sse-14.c +++ b/gcc/testsuite/gcc.target/i386/sse-14.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O0 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mavx512vbmi2 -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mpconfig -mwbnoinvd -mavx512vl -mavx512bf16 -menqcmd -mavx512vp2intersect -mserialize -mtsxldtrk -mamx-tile -mamx-int8 -mamx-bf16" } */ +/* { dg-options "-O0 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mavx512vbmi2 -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mpconfig -mwbnoinvd -mavx512vl -mavx512bf16 -menqcmd -mavx512vp2intersect -mserialize -mtsxldtrk -mamx-tile -mamx-int8 -mamx-bf16 -mkl -mwidekl" } */ /* { dg-add-options bind_pic_locally } */ #include <mm_malloc.h> diff --git a/gcc/testsuite/gcc.target/i386/sse-22.c b/gcc/testsuite/gcc.target/i386/sse-22.c index fc75669f..789c8be 100644 --- a/gcc/testsuite/gcc.target/i386/sse-22.c +++ b/gcc/testsuite/gcc.target/i386/sse-22.c @@ -103,7 +103,7 @@ #ifndef DIFFERENT_PRAGMAS -#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,avx512f,avx512er,avx512cd,avx512pf,sha,prefetchwt1,avx512vl,avx512bw,avx512dq,avx512vbmi,avx512vbmi2,avx512ifma,avx5124fmaps,avx5124vnniw,avx512vpopcntdq,gfni,avx512bitalg,avx512bf16,avx512vp2intersect,serialize,tsxldtrk,amx-tile,amx-int8,amx-bf16") +#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,avx512f,avx512er,avx512cd,avx512pf,sha,prefetchwt1,avx512vl,avx512bw,avx512dq,avx512vbmi,avx512vbmi2,avx512ifma,avx5124fmaps,avx5124vnniw,avx512vpopcntdq,gfni,avx512bitalg,avx512bf16,avx512vp2intersect,serialize,tsxldtrk,amx-tile,amx-int8,amx-bf16,kl,widekl") #endif /* Following intrinsics require immediate arguments. They @@ -220,7 +220,7 @@ test_4 (_mm_cmpestrz, int, __m128i, int, __m128i, int, 1) /* immintrin.h (AVX/AVX2/RDRND/FSGSBASE/F16C/RTM/AVX512F/SHA) */ #ifdef DIFFERENT_PRAGMAS -#pragma GCC target ("avx,avx2,rdrnd,fsgsbase,f16c,rtm,avx512f,avx512er,avx512cd,avx512pf,sha,avx512vl,avx512bw,avx512dq,avx512ifma,avx512vbmi,avx512vbmi2,avx5124fmaps,avx5124vnniw,avx512vpopcntdq,gfni,avx512bitalg,avx512bf16,avx512vp2intersect,serialize,tsxldtrk,amx-tile,amx-int8,amx-bf16") +#pragma GCC target ("avx,avx2,rdrnd,fsgsbase,f16c,rtm,avx512f,avx512er,avx512cd,avx512pf,sha,avx512vl,avx512bw,avx512dq,avx512ifma,avx512vbmi,avx512vbmi2,avx5124fmaps,avx5124vnniw,avx512vpopcntdq,gfni,avx512bitalg,avx512bf16,avx512vp2intersect,serialize,tsxldtrk,amx-tile,amx-int8,amx-bf16,kl,widekl") #endif #include <immintrin.h> test_1 (_cvtss_sh, unsigned short, float, 1) diff --git a/gcc/testsuite/gcc.target/i386/sse-23.c b/gcc/testsuite/gcc.target/i386/sse-23.c index 9ca7c5d..3e5e3e9 100644 --- a/gcc/testsuite/gcc.target/i386/sse-23.c +++ b/gcc/testsuite/gcc.target/i386/sse-23.c @@ -399,6 +399,8 @@ #define __builtin_ia32_vfmaddss3_mask3(A, B, C, D, E) __builtin_ia32_vfmaddss3_mask3(A, B, C, D, 8) #define __builtin_ia32_vfmaddss3_maskz(A, B, C, D, E) __builtin_ia32_vfmaddss3_maskz(A, B, C, D, 8) #define __builtin_ia32_vfmsubss3_mask3(A, B, C, D, E) __builtin_ia32_vfmsubss3_mask3(A, B, C, D, 8) +#define __builtin_ia32_cvtsd2ss_mask_round(A, B, C, D, E) __builtin_ia32_cvtsd2ss_mask_round(A, B, C, D, 8) +#define __builtin_ia32_cvtss2sd_mask_round(A, B, C, D, E) __builtin_ia32_cvtss2sd_mask_round(A, B, C, D, 8) /* avx512pfintrin.h */ #define __builtin_ia32_gatherpfdps(A, B, C, D, E) __builtin_ia32_gatherpfdps(A, B, C, 1, _MM_HINT_T0) @@ -421,6 +423,10 @@ #define __builtin_ia32_rcp28ss_round(A, B, C) __builtin_ia32_rcp28ss_round(A, B, 8) #define __builtin_ia32_rsqrt28sd_round(A, B, C) __builtin_ia32_rsqrt28sd_round(A, B, 8) #define __builtin_ia32_rsqrt28ss_round(A, B, C) __builtin_ia32_rsqrt28ss_round(A, B, 8) +#define __builtin_ia32_rcp28sd_mask_round(A, B, C, D, E) __builtin_ia32_rcp28sd_mask_round(A, B, C, D, 8) +#define __builtin_ia32_rcp28ss_mask_round(A, B, C, D, E) __builtin_ia32_rcp28ss_mask_round(A, B, C, D, 8) +#define __builtin_ia32_rsqrt28sd_mask_round(A, B, C, D, E) __builtin_ia32_rsqrt28sd_mask_round(A, B, C, D, 8) +#define __builtin_ia32_rsqrt28ss_mask_round(A, B, C, D, E) __builtin_ia32_rsqrt28ss_mask_round(A, B, C, D, 8) /* shaintrin.h */ #define __builtin_ia32_sha1rnds4(A, B, C) __builtin_ia32_sha1rnds4(A, B, 1) @@ -482,6 +488,10 @@ #define __builtin_ia32_cvtps2qq512_mask(A, B, C, D) __builtin_ia32_cvtps2qq512_mask(A, B, C, 8) #define __builtin_ia32_cvtpd2uqq512_mask(A, B, C, D) __builtin_ia32_cvtpd2uqq512_mask(A, B, C, 8) #define __builtin_ia32_cvtpd2qq512_mask(A, B, C, D) __builtin_ia32_cvtpd2qq512_mask(A, B, C, 8) +#define __builtin_ia32_reducesd_mask_round(A, B, C, D, E, F) __builtin_ia32_reducesd_mask_round(A, B, 8, D, E, 8) +#define __builtin_ia32_reducess_mask_round(A, B, C, D, E, F) __builtin_ia32_reducess_mask_round(A, B, 8, D, E, 8) +#define __builtin_ia32_reducepd512_mask_round(A, B, C, D, E) __builtin_ia32_reducepd512_mask_round(A, 8, C, D, 8) +#define __builtin_ia32_reduceps512_mask_round(A, B, C, D, E) __builtin_ia32_reduceps512_mask_round(A, 8, C, D, 8) /* avx512vlintrin.h */ #define __builtin_ia32_vpermilps_mask(A, E, C, D) __builtin_ia32_vpermilps_mask(A, 1, C, D) @@ -698,6 +708,6 @@ #define __builtin_ia32_vpclmulqdq_v2di(A, B, C) __builtin_ia32_vpclmulqdq_v2di(A, B, 1) #define __builtin_ia32_vpclmulqdq_v8di(A, B, C) __builtin_ia32_vpclmulqdq_v8di(A, B, 1) -#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,fma,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,avx512f,avx512er,avx512cd,avx512pf,sha,prefetchwt1,xsavec,xsaves,clflushopt,avx512bw,avx512dq,avx512vl,avx512vbmi,avx512ifma,avx5124fmaps,avx5124vnniw,avx512vpopcntdq,clwb,mwaitx,clzero,pku,sgx,rdpid,gfni,avx512vbmi2,vpclmulqdq,avx512bitalg,pconfig,wbnoinvd,avx512bf16,enqcmd,avx512vp2intersect,serialize,tsxldtrk,amx-tile,amx-int8,amx-bf16") +#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,fma,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,avx512f,avx512er,avx512cd,avx512pf,sha,prefetchwt1,xsavec,xsaves,clflushopt,avx512bw,avx512dq,avx512vl,avx512vbmi,avx512ifma,avx5124fmaps,avx5124vnniw,avx512vpopcntdq,clwb,mwaitx,clzero,pku,sgx,rdpid,gfni,avx512vbmi2,vpclmulqdq,avx512bitalg,pconfig,wbnoinvd,avx512bf16,enqcmd,avx512vp2intersect,serialize,tsxldtrk,amx-tile,amx-int8,amx-bf16,kl,widekl") #include <x86intrin.h> diff --git a/gcc/testsuite/gcc.target/i386/uintr-1.c b/gcc/testsuite/gcc.target/i386/uintr-1.c new file mode 100644 index 0000000..f30f755 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/uintr-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-O2 -muintr" } */ +/* { dg-final { scan-assembler-times "clui" "1" } } */ +/* { dg-final { scan-assembler-times "stui" "2" } } */ +/* { dg-final { scan-assembler-times "senduipi" "1" } } */ +/* { dg-final { scan-assembler-times "setc" "1" } } */ +/* { dg-final { scan-assembler-times "testui" "1" } } */ + +#include <x86gprintrin.h> + +extern volatile unsigned char c; +extern volatile unsigned long long l; + +void +foo (void) +{ + _clui (); + _stui (); + _senduipi (l); + c = _testui (); +} diff --git a/gcc/testsuite/gcc.target/i386/uintr-2.c b/gcc/testsuite/gcc.target/i386/uintr-2.c new file mode 100644 index 0000000..e705732 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/uintr-2.c @@ -0,0 +1,17 @@ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-O2 -muintr -mgeneral-regs-only" } */ +/* { dg-final { scan-assembler-times "uiret" "2" } } */ + +#include <x86gprintrin.h> + +void +__attribute__((interrupt)) +foo (void *frame) +{ +} + +void +__attribute__((interrupt)) +UINTR_hanlder (struct __uintr_frame *frame) +{ +} diff --git a/gcc/testsuite/gcc.target/i386/uintr-3.c b/gcc/testsuite/gcc.target/i386/uintr-3.c new file mode 100644 index 0000000..d284349 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/uintr-3.c @@ -0,0 +1,9 @@ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-O2 -muintr" } */ +/* { dg-final { scan-assembler "uiret" } } */ +#include <x86gprintrin.h> + +void __attribute__ ((target("general-regs-only"), interrupt)) +UINTR_handler (struct __uintr_frame *p) +{ +} diff --git a/gcc/testsuite/gcc.target/i386/uintr-4.c b/gcc/testsuite/gcc.target/i386/uintr-4.c new file mode 100644 index 0000000..f3b371b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/uintr-4.c @@ -0,0 +1,9 @@ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-O2 -muintr" } */ + +#include <x86gprintrin.h> + +void __attribute__ ((interrupt)) +UINTR_handler (struct __uintr_frame *p) +{ /* { dg-message "SSE instructions aren't allowed in an interrupt service routine" } */ +} diff --git a/gcc/testsuite/gcc.target/i386/uintr-5.c b/gcc/testsuite/gcc.target/i386/uintr-5.c new file mode 100644 index 0000000..ac44be0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/uintr-5.c @@ -0,0 +1,10 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -muintr" } */ +/* { dg-error "'-muintr' not supported for 32-bit code" "" { target ia32 } 0 } */ + +#include <x86gprintrin.h> + +void +UINTR_hanlder (struct __uintr_frame *frame) +{ +} diff --git a/gcc/testsuite/gcc.target/i386/x86gprintrin-1.c b/gcc/testsuite/gcc.target/i386/x86gprintrin-1.c index d9c759b..293be09 100644 --- a/gcc/testsuite/gcc.target/i386/x86gprintrin-1.c +++ b/gcc/testsuite/gcc.target/i386/x86gprintrin-1.c @@ -1,6 +1,7 @@ /* Test that <x86gprintrin.h> is usable with -O -std=c89 -pedantic-errors. */ /* { dg-do compile } */ -/* { dg-options "-O -std=c89 -pedantic-errors -march=x86-64 -madx -mbmi -mbmi2 -mcldemote -mclflushopt -mclwb -mclzero -menqcmd -mfsgsbase -mfxsr -mlzcnt -mlwp -mmovdiri -mmwaitx -mpconfig -mpopcnt -mpku -mptwrite -mrdpid -mrdrnd -mrdseed -mrtm -mserialize -msgx -mshstk -mtbm -mtsxldtrk -mwaitpkg -mwbnoinvd -mxsave -mxsavec -mxsaveopt -mxsaves -mno-sse -mno-mmx" } */ +/* { dg-options "-O -std=c89 -pedantic-errors -march=x86-64 -madx -mbmi -mbmi2 -mcldemote -mclflushopt -mclwb -mclzero -menqcmd -mfsgsbase -mfxsr -mhreset -mlzcnt -mlwp -mmovdiri -mmwaitx -mpconfig -mpopcnt -mpku -mptwrite -mrdpid -mrdrnd -mrdseed -mrtm -mserialize -msgx -mshstk -mtbm -mtsxldtrk -mwaitpkg -mwbnoinvd -mxsave -mxsavec -mxsaveopt -mxsaves -mno-sse -mno-mmx" } */ +/* { dg-additional-options "-muintr" { target { ! ia32 } } } */ #include <x86gprintrin.h> diff --git a/gcc/testsuite/gcc.target/i386/x86gprintrin-2.c b/gcc/testsuite/gcc.target/i386/x86gprintrin-2.c index 5ea4772..c633027 100644 --- a/gcc/testsuite/gcc.target/i386/x86gprintrin-2.c +++ b/gcc/testsuite/gcc.target/i386/x86gprintrin-2.c @@ -1,6 +1,7 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -Werror-implicit-function-declaration -march=x86-64 -madx -mbmi -mbmi2 -mcldemote -mclflushopt -mclwb -mclzero -menqcmd -mfsgsbase -mfxsr -mlzcnt -mlwp -mmovdiri -mmwaitx -mpconfig -mpopcnt -mpku -mptwrite -mrdpid -mrdrnd -mrdseed -mrtm -mserialize -msgx -mshstk -mtbm -mtsxldtrk -mwaitpkg -mwbnoinvd -mxsave -mxsavec -mxsaveopt -mxsaves -mno-sse -mno-mmx" } */ +/* { dg-options "-O2 -Werror-implicit-function-declaration -march=x86-64 -madx -mbmi -mbmi2 -mcldemote -mclflushopt -mclwb -mclzero -menqcmd -mfsgsbase -mfxsr -mhreset -mlzcnt -mlwp -mmovdiri -mmwaitx -mpconfig -mpopcnt -mpku -mptwrite -mrdpid -mrdrnd -mrdseed -mrtm -mserialize -msgx -mshstk -mtbm -mtsxldtrk -mwaitpkg -mwbnoinvd -mxsave -mxsavec -mxsaveopt -mxsaves -mno-sse -mno-mmx" } */ /* { dg-add-options bind_pic_locally } */ +/* { dg-additional-options "-muintr" { target { ! ia32 } } } */ /* Test that the intrinsics in <x86gprintrin.h> compile with optimization. All of them are defined as inline functions that reference the proper diff --git a/gcc/testsuite/gcc.target/i386/x86gprintrin-3.c b/gcc/testsuite/gcc.target/i386/x86gprintrin-3.c index 01d3f78..3a7e1f4 100644 --- a/gcc/testsuite/gcc.target/i386/x86gprintrin-3.c +++ b/gcc/testsuite/gcc.target/i386/x86gprintrin-3.c @@ -1,6 +1,7 @@ /* { dg-do compile } */ -/* { dg-options "-O0 -Werror-implicit-function-declaration -march=x86-64 -madx -mbmi -mbmi2 -mcldemote -mclflushopt -mclwb -mclzero -menqcmd -mfsgsbase -mfxsr -mlzcnt -mlwp -mmovdiri -mmwaitx -mpconfig -mpopcnt -mpku -mptwrite -mrdpid -mrdrnd -mrdseed -mrtm -mserialize -msgx -mshstk -mtbm -mtsxldtrk -mwaitpkg -mwbnoinvd -mxsave -mxsavec -mxsaveopt -mxsaves -mno-sse -mno-mmx" } */ +/* { dg-options "-O0 -Werror-implicit-function-declaration -march=x86-64 -madx -mbmi -mbmi2 -mcldemote -mclflushopt -mclwb -mclzero -menqcmd -mfsgsbase -mfxsr -mhreset -mlzcnt -mlwp -mmovdiri -mmwaitx -mpconfig -mpopcnt -mpku -mptwrite -mrdpid -mrdrnd -mrdseed -mrtm -mserialize -msgx -mshstk -mtbm -mtsxldtrk -mwaitpkg -mwbnoinvd -mxsave -mxsavec -mxsaveopt -mxsaves -mno-sse -mno-mmx" } */ /* { dg-add-options bind_pic_locally } */ +/* { dg-additional-options "-muintr" { target { ! ia32 } } } */ /* Test that the intrinsics in <x86gprintrin.h> compile without optimization. All of them are defined as inline functions that reference the proper diff --git a/gcc/testsuite/gcc.target/i386/x86gprintrin-4.c b/gcc/testsuite/gcc.target/i386/x86gprintrin-4.c index 053f07b..d8a6126 100644 --- a/gcc/testsuite/gcc.target/i386/x86gprintrin-4.c +++ b/gcc/testsuite/gcc.target/i386/x86gprintrin-4.c @@ -14,7 +14,11 @@ #define __inline #ifndef DIFFERENT_PRAGMAS -#pragma GCC target ("adx,bmi,bmi2,fsgsbase,fxsr,lwp,lzcnt,popcnt,rdrnd,rdseed,tbm,rtm,serialize,tsxldtrk,xsaveopt") +#ifdef __x86_64__ +#pragma GCC target ("adx,bmi,bmi2,fsgsbase,fxsr,hreset,lwp,lzcnt,popcnt,rdrnd,rdseed,tbm,rtm,serialize,tsxldtrk,uintr,xsaveopt") +#else +#pragma GCC target ("adx,bmi,bmi2,fsgsbase,fxsr,hreset,lwp,lzcnt,popcnt,rdrnd,rdseed,tbm,rtm,serialize,tsxldtrk,xsaveopt") +#endif #endif /* popcnintrin.h (POPCNT). */ diff --git a/gcc/testsuite/gcc.target/i386/x86gprintrin-5.c b/gcc/testsuite/gcc.target/i386/x86gprintrin-5.c index fe9c5c7..9ef66fd 100644 --- a/gcc/testsuite/gcc.target/i386/x86gprintrin-5.c +++ b/gcc/testsuite/gcc.target/i386/x86gprintrin-5.c @@ -27,6 +27,10 @@ /* rtmintrin.h */ #define __builtin_ia32_xabort(M) __builtin_ia32_xabort(1) -#pragma GCC target ("adx,bmi,bmi2,clflushopt,clwb,clzero,enqcmd,fsgsbase,fxsr,lwp,lzcnt,mwaitx,pconfig,pku,popcnt,rdpid,rdrnd,rdseed,tbm,rtm,serialize,sgx,tsxldtrk,xsavec,xsaveopt,xsaves,wbnoinvd") +#ifdef __x86_64__ +#pragma GCC target ("adx,bmi,bmi2,clflushopt,clwb,clzero,enqcmd,fsgsbase,fxsr,hreset,lwp,lzcnt,mwaitx,pconfig,pku,popcnt,rdpid,rdrnd,rdseed,tbm,rtm,serialize,sgx,tsxldtrk,uintr,xsavec,xsaveopt,xsaves,wbnoinvd") +#else +#pragma GCC target ("adx,bmi,bmi2,clflushopt,clwb,clzero,enqcmd,fsgsbase,fxsr,hreset,lwp,lzcnt,mwaitx,pconfig,pku,popcnt,rdpid,rdrnd,rdseed,tbm,rtm,serialize,sgx,tsxldtrk,xsavec,xsaveopt,xsaves,wbnoinvd") +#endif #include <x86gprintrin.h> diff --git a/gcc/testsuite/gcc.target/i386/zero-scratch-regs-1.c b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-1.c new file mode 100644 index 0000000..1ea6de8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-1.c @@ -0,0 +1,12 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fzero-call-used-regs=used" } */ + +void +foo (void) +{ +} + +/* { dg-final { scan-assembler-not "vzeroall" } } */ +/* { dg-final { scan-assembler-not "%xmm" } } */ +/* { dg-final { scan-assembler-not "xorl\[ \t\]+%" } } */ +/* { dg-final { scan-assembler-not "movl\[ \t\]+%" } } */ diff --git a/gcc/testsuite/gcc.target/i386/zero-scratch-regs-10.c b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-10.c new file mode 100644 index 0000000..389b114 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-10.c @@ -0,0 +1,21 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fzero-call-used-regs=skip" } */ + +extern int foo (int) __attribute__ ((zero_call_used_regs("all-gpr"))); + +int +foo (int x) +{ + return x; +} + +/* { dg-final { scan-assembler-not "vzeroall" } } */ +/* { dg-final { scan-assembler-not "%xmm" } } */ +/* { dg-final { scan-assembler "xorl\[ \t\]+%edx, %edx" } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%edx, %ecx" } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%edx, %esi" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%edx, %edi" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%edx, %r8d" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%edx, %r9d" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%edx, %r10d" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%edx, %r11d" { target { ! ia32 } } } } */ diff --git a/gcc/testsuite/gcc.target/i386/zero-scratch-regs-11.c b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-11.c new file mode 100644 index 0000000..4862688 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-11.c @@ -0,0 +1,39 @@ +/* { dg-do run { target *-*-linux* } } */ +/* { dg-options "-O2 -fzero-call-used-regs=used-gpr" } */ + +struct S { int i; }; +__attribute__((const, noinline, noclone)) +struct S foo (int x) +{ + struct S s; + s.i = x; + return s; +} + +int a[2048], b[2048], c[2048], d[2048]; +struct S e[2048]; + +__attribute__((noinline, noclone)) void +bar (void) +{ + int i; + for (i = 0; i < 1024; i++) + { + e[i] = foo (i); + a[i+2] = a[i] + a[i+1]; + b[10] = b[10] + i; + c[i] = c[2047 - i]; + d[i] = d[i + 1]; + } +} + +int +main () +{ + int i; + bar (); + for (i = 0; i < 1024; i++) + if (e[i].i != i) + __builtin_abort (); + return 0; +} diff --git a/gcc/testsuite/gcc.target/i386/zero-scratch-regs-12.c b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-12.c new file mode 100644 index 0000000..500251b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-12.c @@ -0,0 +1,39 @@ +/* { dg-do run { target *-*-linux* } } */ +/* { dg-options "-O2 -fzero-call-used-regs=all-gpr" } */ + +struct S { int i; }; +__attribute__((const, noinline, noclone)) +struct S foo (int x) +{ + struct S s; + s.i = x; + return s; +} + +int a[2048], b[2048], c[2048], d[2048]; +struct S e[2048]; + +__attribute__((noinline, noclone)) void +bar (void) +{ + int i; + for (i = 0; i < 1024; i++) + { + e[i] = foo (i); + a[i+2] = a[i] + a[i+1]; + b[10] = b[10] + i; + c[i] = c[2047 - i]; + d[i] = d[i + 1]; + } +} + +int +main () +{ + int i; + bar (); + for (i = 0; i < 1024; i++) + if (e[i].i != i) + __builtin_abort (); + return 0; +} diff --git a/gcc/testsuite/gcc.target/i386/zero-scratch-regs-13.c b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-13.c new file mode 100644 index 0000000..07d8de7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-13.c @@ -0,0 +1,21 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fzero-call-used-regs=all -march=corei7" } */ + +void +foo (void) +{ +} + +/* { dg-final { scan-assembler-not "vzeroall" } } */ +/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm0, %xmm0" } } */ +/* { dg-final { scan-assembler-times "movaps\[ \t\]+%xmm0, %xmm\[0-9\]+" 7 { target { ia32 } } } } */ +/* { dg-final { scan-assembler-times "movaps\[ \t\]+%xmm0, %xmm\[0-9\]+" 15 { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "xorl\[ \t\]+%eax, %eax" } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %edx" } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %ecx" } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %esi" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %edi" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %r8d" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %r9d" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %r10d" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %r11d" { target { ! ia32 } } } } */ diff --git a/gcc/testsuite/gcc.target/i386/zero-scratch-regs-14.c b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-14.c new file mode 100644 index 0000000..55a272c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-14.c @@ -0,0 +1,19 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fzero-call-used-regs=all -march=corei7 -mavx" } */ + +void +foo (void) +{ +} + +/* { dg-final { scan-assembler-times "vzeroall" 1 } } */ +/* { dg-final { scan-assembler-not "%xmm" } } */ +/* { dg-final { scan-assembler "xorl\[ \t\]+%eax, %eax" } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %edx" } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %ecx" } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %esi" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %edi" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %r8d" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %r9d" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %r10d" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %r11d" { target { ! ia32 } } } } */ diff --git a/gcc/testsuite/gcc.target/i386/zero-scratch-regs-15.c b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-15.c new file mode 100644 index 0000000..d0e975c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-15.c @@ -0,0 +1,14 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fzero-call-used-regs=skip" } */ + +extern void foo (void) __attribute__ ((zero_call_used_regs("used"))); + +void +foo (void) +{ +} + +/* { dg-final { scan-assembler-not "vzeroall" } } */ +/* { dg-final { scan-assembler-not "%xmm" } } */ +/* { dg-final { scan-assembler-not "xorl\[ \t\]+%" } } */ +/* { dg-final { scan-assembler-not "movl\[ \t\]+%" } } */ diff --git a/gcc/testsuite/gcc.target/i386/zero-scratch-regs-16.c b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-16.c new file mode 100644 index 0000000..d41a255 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-16.c @@ -0,0 +1,14 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fzero-call-used-regs=all" } */ + +extern void foo (void) __attribute__ ((zero_call_used_regs("skip"))); + +void +foo (void) +{ +} + +/* { dg-final { scan-assembler-not "vzeroall" } } */ +/* { dg-final { scan-assembler-not "%xmm" } } */ +/* { dg-final { scan-assembler-not "xorl\[ \t\]+%" } } */ +/* { dg-final { scan-assembler-not "movl\[ \t\]+%" } } */ diff --git a/gcc/testsuite/gcc.target/i386/zero-scratch-regs-17.c b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-17.c new file mode 100644 index 0000000..c79fcd3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-17.c @@ -0,0 +1,13 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fzero-call-used-regs=used" } */ + +int +foo (int x) +{ + return x; +} + +/* { dg-final { scan-assembler-not "vzeroall" } } */ +/* { dg-final { scan-assembler-not "%xmm" } } */ +/* { dg-final { scan-assembler-not "xorl\[ \t\]+%" { target ia32 } } } */ +/* { dg-final { scan-assembler "xorl\[ \t\]+%edi, %edi" { target { ! ia32 } } } } */ diff --git a/gcc/testsuite/gcc.target/i386/zero-scratch-regs-18.c b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-18.c new file mode 100644 index 0000000..6f90723 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-18.c @@ -0,0 +1,13 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fzero-call-used-regs=used -march=corei7" } */ + +float +foo (float z, float y, float x) +{ + return x + y; +} + +/* { dg-final { scan-assembler-not "vzeroall" } } */ +/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm1, %xmm1" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movaps\[ \t\]+%xmm1, %xmm2" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler-not "xorl\[ \t\]+%" } } */ diff --git a/gcc/testsuite/gcc.target/i386/zero-scratch-regs-19.c b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-19.c new file mode 100644 index 0000000..491d2d5 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-19.c @@ -0,0 +1,12 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fzero-call-used-regs=used -march=corei7" } */ + +float +foo (float z, float y, float x) +{ + return x; +} + +/* { dg-final { scan-assembler-not "vzeroall" } } */ +/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm2, %xmm2" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler-not "xorl\[ \t\]+%" } } */ diff --git a/gcc/testsuite/gcc.target/i386/zero-scratch-regs-2.c b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-2.c new file mode 100644 index 0000000..52406fc --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-2.c @@ -0,0 +1,19 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fzero-call-used-regs=all-gpr" } */ + +void +foo (void) +{ +} + +/* { dg-final { scan-assembler-not "vzeroall" } } */ +/* { dg-final { scan-assembler-not "%xmm" } } */ +/* { dg-final { scan-assembler "xorl\[ \t\]+%eax, %eax" } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %edx" } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %ecx" } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %esi" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %edi" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %r8d" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %r9d" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %r10d" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %r11d" { target { ! ia32 } } } } */ diff --git a/gcc/testsuite/gcc.target/i386/zero-scratch-regs-20.c b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-20.c new file mode 100644 index 0000000..ccd4917 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-20.c @@ -0,0 +1,23 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fzero-call-used-regs=all -march=corei7" } */ + +float +foo (float z, float y, float x) +{ + return x + y; +} + +/* { dg-final { scan-assembler-not "vzeroall" } } */ +/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm0, %xmm0" { target { ia32 } } } } */ +/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm1, %xmm1" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler-times "movaps\[ \t\]+%xmm0, %xmm\[0-9\]+" 7 { target { ia32 } } } } */ +/* { dg-final { scan-assembler-times "movaps\[ \t\]+%xmm1, %xmm\[0-9\]+" 14 { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "xorl\[ \t\]+%eax, %eax" } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %edx" } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %ecx" } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %esi" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %edi" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %r8d" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %r9d" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %r10d" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %r11d" { target { ! ia32 } } } } */ diff --git a/gcc/testsuite/gcc.target/i386/zero-scratch-regs-21.c b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-21.c new file mode 100644 index 0000000..b3570f3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-21.c @@ -0,0 +1,14 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fzero-call-used-regs=skip -march=corei7" } */ + +__attribute__ ((zero_call_used_regs("used"))) +float +foo (float z, float y, float x) +{ + return x + y; +} + +/* { dg-final { scan-assembler-not "vzeroall" } } */ +/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm1, %xmm1" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movaps\[ \t\]+%xmm1, %xmm2" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler-not "xorl\[ \t\]+%" } } */ diff --git a/gcc/testsuite/gcc.target/i386/zero-scratch-regs-22.c b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-22.c new file mode 100644 index 0000000..b253420 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-22.c @@ -0,0 +1,21 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fzero-call-used-regs=all -march=corei7 -mavx" } */ + +void +foo (void) +{ +} + +/* { dg-final { scan-assembler "vzeroall" } } */ +/* { dg-final { scan-assembler-times "fldz" 8 } } */ +/* { dg-final { scan-assembler-times "fstp\[ \t\]+%st\\(0\\)" 8 } } */ +/* { dg-final { scan-assembler-not "%xmm" } } */ +/* { dg-final { scan-assembler "xorl\[ \t\]+%eax, %eax" } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %edx" } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %ecx" } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %esi" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %edi" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %r8d" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %r9d" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %r10d" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %r11d" { target { ! ia32 } } } } */ diff --git a/gcc/testsuite/gcc.target/i386/zero-scratch-regs-23.c b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-23.c new file mode 100644 index 0000000..69d42d7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-23.c @@ -0,0 +1,29 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fzero-call-used-regs=all -march=corei7 -mavx512f" } */ + +void +foo (void) +{ +} + +/* { dg-final { scan-assembler "vzeroall" } } */ +/* { dg-final { scan-assembler-times "fldz" 8 } } */ +/* { dg-final { scan-assembler-times "fstp\[ \t\]+%st\\(0\\)" 8 } } */ +/* { dg-final { scan-assembler-not "%xmm" } } */ +/* { dg-final { scan-assembler "xorl\[ \t\]+%eax, %eax" } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %edx" } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %ecx" } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %esi" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %edi" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %r8d" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %r9d" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %r10d" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %r11d" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "kxorw\[ \t\]+%k0, %k0, %k0" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "kmovw\[ \t\]+%k0, %k1" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "kmovw\[ \t\]+%k0, %k2" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "kmovw\[ \t\]+%k0, %k3" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "kmovw\[ \t\]+%k0, %k4" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "kmovw\[ \t\]+%k0, %k5" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "kmovw\[ \t\]+%k0, %k6" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "kmovw\[ \t\]+%k0, %k7" { target { ! ia32 } } } } */ diff --git a/gcc/testsuite/gcc.target/i386/zero-scratch-regs-24.c b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-24.c new file mode 100644 index 0000000..5c68287 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-24.c @@ -0,0 +1,10 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fzero-call-used-regs=used-gpr-arg" } */ + +int +foo (int x) +{ + return x; +} + +/* { dg-final { scan-assembler "xorl\[ \t\]+%edi, %edi" { target { ! ia32 } } } } */ diff --git a/gcc/testsuite/gcc.target/i386/zero-scratch-regs-25.c b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-25.c new file mode 100644 index 0000000..902d3ac --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-25.c @@ -0,0 +1,10 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fzero-call-used-regs=used-arg" } */ + +int +foo (int x) +{ + return x; +} + +/* { dg-final { scan-assembler "xorl\[ \t\]+%edi, %edi" { target { ! ia32 } } } } */ diff --git a/gcc/testsuite/gcc.target/i386/zero-scratch-regs-26.c b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-26.c new file mode 100644 index 0000000..8fb5299 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-26.c @@ -0,0 +1,23 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -msse2 -fzero-call-used-regs=all-arg" } */ + +int +foo (int x) +{ + return x; +} + +/* { dg-final { scan-assembler "xorl\[ \t\]+%edx, %edx" } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%edx, %ecx" } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%edx, %esi" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%edx, %edi" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%edx, %r8d" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%edx, %r9d" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm0, %xmm0" } } */ +/* { dg-final { scan-assembler "movaps\[ \t\]+%xmm0, %xmm1" } } */ +/* { dg-final { scan-assembler "movaps\[ \t\]+%xmm0, %xmm2" } } */ +/* { dg-final { scan-assembler "movaps\[ \t\]+%xmm0, %xmm3" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movaps\[ \t\]+%xmm0, %xmm4" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movaps\[ \t\]+%xmm0, %xmm5" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movaps\[ \t\]+%xmm0, %xmm6" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movaps\[ \t\]+%xmm0, %xmm7" { target { ! ia32 } } } } */ diff --git a/gcc/testsuite/gcc.target/i386/zero-scratch-regs-27.c b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-27.c new file mode 100644 index 0000000..26ceacf --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-27.c @@ -0,0 +1,15 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fzero-call-used-regs=all-gpr-arg" } */ + +int +foo (int x) +{ + return x; +} + +/* { dg-final { scan-assembler "xorl\[ \t\]+%edx, %edx" } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%edx, %ecx" } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%edx, %esi" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%edx, %edi" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%edx, %r8d" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%edx, %r9d" { target { ! ia32 } } } } */ diff --git a/gcc/testsuite/gcc.target/i386/zero-scratch-regs-28.c b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-28.c new file mode 100644 index 0000000..044e4af --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-28.c @@ -0,0 +1,18 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -mmmx -fzero-call-used-regs=all" } */ +/* { dg-require-effective-target ia32 } */ + +typedef int __v2si __attribute__ ((vector_size (8))); + +__v2si ret_mmx (void) +{ + return (__v2si) { 123, 345 }; +} + +/* { dg-final { scan-assembler "pxor\[ \t\]+%mm1, %mm1" } } */ +/* { dg-final { scan-assembler "movq\[ \t\]+%mm1, %mm2" } } */ +/* { dg-final { scan-assembler "movq\[ \t\]+%mm1, %mm3" } } */ +/* { dg-final { scan-assembler "movq\[ \t\]+%mm1, %mm4" } } */ +/* { dg-final { scan-assembler "movq\[ \t\]+%mm1, %mm5" } } */ +/* { dg-final { scan-assembler "movq\[ \t\]+%mm1, %mm6" } } */ +/* { dg-final { scan-assembler "movq\[ \t\]+%mm1, %mm7" } } */ diff --git a/gcc/testsuite/gcc.target/i386/zero-scratch-regs-29.c b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-29.c new file mode 100644 index 0000000..6270645 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-29.c @@ -0,0 +1,10 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fzero-call-used-regs=all" } */ + +long double ret_x87 (void) +{ + return 1.1L; +} + +/* { dg-final { scan-assembler-times "fldz" 7 } } */ +/* { dg-final { scan-assembler-times "fstp\[ \t\]+%st\\(0\\)" 7 } } */ diff --git a/gcc/testsuite/gcc.target/i386/zero-scratch-regs-3.c b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-3.c new file mode 100644 index 0000000..89e69b8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-3.c @@ -0,0 +1,12 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fzero-call-used-regs=skip" } */ + +void +foo (void) +{ +} + +/* { dg-final { scan-assembler-not "vzeroall" } } */ +/* { dg-final { scan-assembler-not "%xmm" } } */ +/* { dg-final { scan-assembler-not "xorl\[ \t\]+%" } } */ +/* { dg-final { scan-assembler-not "movl\[ \t\]+%" } } */ diff --git a/gcc/testsuite/gcc.target/i386/zero-scratch-regs-30.c b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-30.c new file mode 100644 index 0000000..c4e9930 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-30.c @@ -0,0 +1,12 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fzero-call-used-regs=all" } */ + +_Complex long double ret_x87_cplx (void) +{ + return 1.1L + 1.2iL; +} + +/* { dg-final { scan-assembler-times "fldz" 8 { target ia32 } } } */ +/* { dg-final { scan-assembler-times "fstp\[ \t\]+%st\\(0\\)" 8 { target ia32 } } } */ +/* { dg-final { scan-assembler-times "fldz" 6 { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler-times "fstp\[ \t\]+%st\\(0\\)" 6 { target { ! ia32 } } } } */ diff --git a/gcc/testsuite/gcc.target/i386/zero-scratch-regs-31.c b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-31.c new file mode 100644 index 0000000..afa8b33 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-31.c @@ -0,0 +1,14 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -mmmx -fzero-call-used-regs=all-arg" } */ +/* { dg-require-effective-target ia32 } */ + +typedef int __v2si __attribute__ ((vector_size (8))); + +__v2si ret_mmx (void) +{ + return (__v2si) { 123, 345 }; +} + +/* { dg-final { scan-assembler "pxor\[ \t\]+%mm1, %mm1" } } */ +/* { dg-final { scan-assembler "movq\[ \t\]+%mm1, %mm2" } } */ +/* { dg-final { scan-assembler-not "movq\[ \t\]+%mm1, %mm\[34567\]" } } */ diff --git a/gcc/testsuite/gcc.target/i386/zero-scratch-regs-32.c b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-32.c new file mode 100644 index 0000000..ca3261f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-32.c @@ -0,0 +1,11 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fzero-call-used-regs=all -mno-80387" } */ + +int +foo (int x) +{ + return (x + 1); +} + +/* { dg-final { scan-assembler-not "fldz" } } */ + diff --git a/gcc/testsuite/gcc.target/i386/zero-scratch-regs-4.c b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-4.c new file mode 100644 index 0000000..1e98d17 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-4.c @@ -0,0 +1,14 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fzero-call-used-regs=skip" } */ + +extern void foo (void) __attribute__ ((zero_call_used_regs("used-gpr"))); + +void +foo (void) +{ +} + +/* { dg-final { scan-assembler-not "vzeroall" } } */ +/* { dg-final { scan-assembler-not "%xmm" } } */ +/* { dg-final { scan-assembler-not "xorl\[ \t\]+%" } } */ +/* { dg-final { scan-assembler-not "movl\[ \t\]+%" } } */ diff --git a/gcc/testsuite/gcc.target/i386/zero-scratch-regs-5.c b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-5.c new file mode 100644 index 0000000..56aecda --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-5.c @@ -0,0 +1,20 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fzero-call-used-regs=skip" } */ + +__attribute__ ((zero_call_used_regs("all-gpr"))) +void +foo (void) +{ +} + +/* { dg-final { scan-assembler-not "vzeroall" } } */ +/* { dg-final { scan-assembler-not "%xmm" } } */ +/* { dg-final { scan-assembler "xorl\[ \t\]+%eax, %eax" } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %edx" } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %ecx" } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %esi" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %edi" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %r8d" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %r9d" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %r10d" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%eax, %r11d" { target { ! ia32 } } } } */ diff --git a/gcc/testsuite/gcc.target/i386/zero-scratch-regs-6.c b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-6.c new file mode 100644 index 0000000..fa83185 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-6.c @@ -0,0 +1,14 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fzero-call-used-regs=all-gpr" } */ + +extern void foo (void) __attribute__ ((zero_call_used_regs("skip"))); + +void +foo (void) +{ +} + +/* { dg-final { scan-assembler-not "vzeroall" } } */ +/* { dg-final { scan-assembler-not "%xmm" } } */ +/* { dg-final { scan-assembler-not "xorl\[ \t\]+%" } } */ +/* { dg-final { scan-assembler-not "movl\[ \t\]+%" } } */ diff --git a/gcc/testsuite/gcc.target/i386/zero-scratch-regs-7.c b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-7.c new file mode 100644 index 0000000..0444a21 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-7.c @@ -0,0 +1,13 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fzero-call-used-regs=used-gpr" } */ + +int +foo (int x) +{ + return x; +} + +/* { dg-final { scan-assembler-not "vzeroall" } } */ +/* { dg-final { scan-assembler-not "%xmm" } } */ +/* { dg-final { scan-assembler-not "xorl\[ \t\]+%" { target ia32 } } } */ +/* { dg-final { scan-assembler "xorl\[ \t\]+%edi, %edi" { target { ! ia32 } } } } */ diff --git a/gcc/testsuite/gcc.target/i386/zero-scratch-regs-8.c b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-8.c new file mode 100644 index 0000000..75356db --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-8.c @@ -0,0 +1,19 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fzero-call-used-regs=all-gpr" } */ + +int +foo (int x) +{ + return x; +} + +/* { dg-final { scan-assembler-not "vzeroall" } } */ +/* { dg-final { scan-assembler-not "%xmm" } } */ +/* { dg-final { scan-assembler "xorl\[ \t\]+%edx, %edx" } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%edx, %ecx" } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%edx, %esi" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%edx, %edi" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%edx, %r8d" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%edx, %r9d" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%edx, %r10d" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]+%edx, %r11d" { target { ! ia32 } } } } */ diff --git a/gcc/testsuite/gcc.target/i386/zero-scratch-regs-9.c b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-9.c new file mode 100644 index 0000000..64755b00 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-9.c @@ -0,0 +1,15 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fzero-call-used-regs=skip" } */ + +extern int foo (int) __attribute__ ((zero_call_used_regs("used-gpr"))); + +int +foo (int x) +{ + return x; +} + +/* { dg-final { scan-assembler-not "vzeroall" } } */ +/* { dg-final { scan-assembler-not "%xmm" } } */ +/* { dg-final { scan-assembler-not "xorl\[ \t\]+%" { target ia32 } } } */ +/* { dg-final { scan-assembler "xorl\[ \t\]+%edi, %edi" { target { ! ia32 } } } } */ diff --git a/gcc/testsuite/gcc.target/nvptx/atomic_fetch-3.c b/gcc/testsuite/gcc.target/nvptx/atomic_fetch-3.c deleted file mode 100644 index 36a83eb..0000000 --- a/gcc/testsuite/gcc.target/nvptx/atomic_fetch-3.c +++ /dev/null @@ -1,24 +0,0 @@ -/* Test the nvptx atomic instructions for __atomic_fetch_OP for - SImode arguments. */ - -/* { dg-do compile } */ -/* { dg-options "-O2 -m32" } */ - -int -main() -{ - unsigned long a = ~0; - unsigned b = 0xa; - - __atomic_fetch_add (&a, b, 0); - __atomic_fetch_and (&a, b, 0); - __atomic_fetch_or (&a, b, 0); - __atomic_fetch_xor (&a, b, 0); - - return a; -} - -/* { dg-final { scan-assembler "atom.add.u32" } } */ -/* { dg-final { scan-assembler "atom.b32.and" } } */ -/* { dg-final { scan-assembler "atom.b32.or" } } */ -/* { dg-final { scan-assembler "atom.b32.xor" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/altivec-consts.c b/gcc/testsuite/gcc.target/powerpc/altivec-consts.c index d59f9b4..c68c681 100644 --- a/gcc/testsuite/gcc.target/powerpc/altivec-consts.c +++ b/gcc/testsuite/gcc.target/powerpc/altivec-consts.c @@ -1,7 +1,7 @@ /* { dg-do run { target vmx_hw } } */ -/* { dg-do compile } */ +/* { dg-do compile { target { ! vmx_hw } } } */ /* { dg-require-effective-target powerpc_altivec_ok } */ -/* { dg-options "-maltivec -mabi=altivec -O2" } */ +/* { dg-options "-maltivec -mabi=altivec -O2 -save-temps" } */ /* Check that "easy" AltiVec constants are correctly synthesized. */ diff --git a/gcc/testsuite/gcc.target/powerpc/bcd-2.c b/gcc/testsuite/gcc.target/powerpc/bcd-2.c index 2f51dee..95c3699 100644 --- a/gcc/testsuite/gcc.target/powerpc/bcd-2.c +++ b/gcc/testsuite/gcc.target/powerpc/bcd-2.c @@ -14,6 +14,8 @@ /* { dg-final { scan-assembler-not "stxvw4x" } } */ /* { dg-final { scan-assembler-not "stxvd2x" } } */ +#include <altivec.h> + typedef __int128_t __attribute__((__vector_size__(16))) vector_128_t; typedef __int128_t scalar_128_t; typedef unsigned long long scalar_64_t; diff --git a/gcc/testsuite/gcc.target/powerpc/bcd-3.c b/gcc/testsuite/gcc.target/powerpc/bcd-3.c index 1b20841..7948a0c 100644 --- a/gcc/testsuite/gcc.target/powerpc/bcd-3.c +++ b/gcc/testsuite/gcc.target/powerpc/bcd-3.c @@ -18,6 +18,8 @@ typedef __int128_t __attribute__((__vector_size__(16))) vector_128_t; typedef __int128_t scalar_128_t; typedef unsigned long long scalar_64_t; +#include <altivec.h> + /* Test whether the peephole works to allow folding a bcdadd, with a bcdadd_<test> into a single instruction. */ diff --git a/gcc/testsuite/gcc.target/powerpc/bcd-4.c b/gcc/testsuite/gcc.target/powerpc/bcd-4.c new file mode 100644 index 0000000..2c8554d --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/bcd-4.c @@ -0,0 +1,521 @@ +/* { dg-do run } */ +/* { dg-require-effective-target int128 } */ +/* { dg-require-effective-target power10_hw } */ +/* { dg-options "-mdejagnu-cpu=power10 -O2 -save-temps" } */ +/* { dg-final { scan-assembler-times {\mbcdadd\M} 7 } } */ +/* { dg-final { scan-assembler-times {\mbcdsub\M} 18 } } */ +/* { dg-final { scan-assembler-times {\mbcds\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mdenbcdq\M} 1 } } */ + +#include <altivec.h> + +#define DEBUG 0 + +#if DEBUG +#include <stdio.h> +#endif + + +#define BCD_POS0 12 // 0xC +#define BCD_POS1 15 // 0xF +#define BCD_NEG 13 // 0xD + +void abort (void); + + union conv_t + { + _Decimal128 d128; + vector unsigned char ch; + vector long long unsigned int vllui; + } conv; + +_Decimal128 convert_vec_char (vector unsigned char a) +{ + union conv_t conv; + _Decimal128 result; + + conv.ch = a; + result = conv.d128; + return result; +} + +vector unsigned char maxbcd(unsigned int sign) +{ + vector unsigned char result; + int i; + + for (i = 15; i > 0; i--) + result[i] = 0x99; + + result[0] = sign << 4 | 0x9; +} + +vector unsigned char num2bcd(long int a, int encoding) +{ + int i; + unsigned int hi, low, sign; + + vector unsigned char result; + + if (a > 0) { + if (encoding == 0) + sign = BCD_POS0; + else + sign = BCD_POS1; + + } else { + sign = BCD_NEG; + a = -a; + } + + hi = a % 10; // 1st digit + a = a / 10; + result[0] = hi << 4| sign; + + for (i = 1; i < 16; i++) + { + low = a % 10; + a = a / 10; + hi = a % 10; + a = a / 10; + result[i] = hi << 4 | low; + } + + + return result; +} + +int main () +{ + int i; + long int value_a, value_b, value_result; + vector unsigned char a, b, result, exp_result; + _Decimal128 result_d128, exp_result_d128; + + /* Make a and b positive BCD numbers */ + value_a = 1020304; + a = num2bcd(value_a, 0); + + value_b = 101010; + b = num2bcd(value_b, 0); + + value_result = value_a + value_b; + exp_result = num2bcd(value_result, 0); + + result = __builtin_bcdadd (a, b, 0); + + for (i = 0; i < 16; i++) + if (exp_result[i] != result[i]) { + +#if DEBUG + printf("ERROR: __builtin_bcdadd result[%d] = %d does not match " + "expected_result[%d] = %d\n", + i, result[i], i, exp_result[i]); +#else + abort(); +#endif + } + + /* result should be positive */ + if ((result[0] & 0xF) != BCD_POS0) +#if DEBUG + printf("ERROR: __builtin_bcdadd sign of result is %d. Does not match " + "expected_result = %d\n", + result[0] & 0xF, BCD_POS0); +#else + abort(); +#endif + + /* Make a and b positive BCD numbers using alternate positive encoding. */ + value_a = 1030507; + a = num2bcd(value_a, 1); + + value_b = 204060; + b = num2bcd(value_b, 1); + + value_result = value_a + value_b; + exp_result = num2bcd(value_result, 1); + + result = __builtin_bcdadd (a, b, 1); + + for (i = 0; i < 16; i++) + if (exp_result[i] != result[i]) { +#if DEBUG + printf("ERROR: __builtin_bcdadd result[%d] = %d does not match " + "expected_result[%d] = %d\n", + i, result[i], i, exp_result[i]); +#else + abort(); +#endif + } + + /* Result should be positive, alternate encoding. */ + if ((result[0] & 0xF) != BCD_POS1) +#if DEBUG + printf("ERROR: __builtin_bcdadd sign of result is %d. Does not " + "match expected_result = %d\n", + result[0] & 0xF, BCD_POS1); +#else + abort(); +#endif + + /* Make a and b negative BCD numbers */ + value_a = -1030507; + a = num2bcd(value_a, 0); + + value_b = -1010101; + b = num2bcd(value_b, 0); + + value_result = value_a + value_b; + exp_result = num2bcd(value_result, 0); + + result = __builtin_bcdadd (a, b, 0); + + for (i = 0; i < 16; i++) + if (exp_result[i] != result[i]) { +#if DEBUG + printf("ERROR: __builtin_bcdadd, neg result[%d] = %d does not match " + "expected_result[%d] = %d\n", + i, result[i], i, exp_result[i]); +#else + abort(); +#endif + } + + /* result should be negative */ + if ((result[0] & 0xF) != BCD_NEG) +#if DEBUG + printf("ERROR: __builtin_bcdadd sign, neg of result is %d. Does not " + "match expected_result = %d\n", + result[0] & 0xF, BCD_NEG); +#else + abort(); +#endif + + + /* Make a negative, b positive BCD numbers */ + value_a = -1030507; + a = num2bcd(value_a, 0); + + value_b = 1010101; + b = num2bcd(value_b, 0); + + value_result = value_a - value_b; + exp_result = num2bcd(value_result, 0); + + result = __builtin_bcdsub (a, b, 0); + + for (i = 0; i < 16; i++) + if (exp_result[i] != result[i]) { +#if DEBUG + printf("ERROR: __builtin_bcdsub, neg result[%d] = %d does not match " + "expected_result[%d] = %d\n", + i, result[i], i, exp_result[i]); +#else + abort(); +#endif + } + + /* result should be positive, alt encoding */ + if ((result[0] & 0xF) != BCD_NEG) +#if DEBUG + printf("ERROR: __builtin_bcdadd sign, of result is %d. Does not match " + "expected_result = %d\n", + result[0] & 0xF, BCD_NEG); +#else + abort(); +#endif + + /* Make a and b positive BCD numbers */ + value_a = 1030507; + a = num2bcd(value_a, 1); + + value_b = 1010101; + b = num2bcd(value_b, 1); + + value_result = value_a - value_b; + exp_result = num2bcd(value_result, 1); + + result = __builtin_bcdsub (a, b, 1); + + for (i = 0; i < 16; i++) + if (exp_result[i] != result[i]) { +#if DEBUG + printf("ERROR:carll __builtin_bcdsub, pos result[%d] = %d does not " + "match expected_result[%d] = %d\n", + i, result[i], i, exp_result[i]); +#else + abort(); +#endif + } + + /* result should be positive */ + if ((result[0] & 0xF) != BCD_POS1) +#if DEBUG + printf("ERROR: __builtin_bcdsub sign, result is %d. Does not match " + "expected_result = %d\n", + result[0] & 0xF, BCD_POS1); +#else + abort(); +#endif + + /* Test overflow add and subtract. */ + a = maxbcd(BCD_POS0); + b = maxbcd(BCD_POS0); + + if(__builtin_bcdadd_ofl (a, b, 0) == 0) +#if DEBUG + printf("ERROR: __builtin_bcdadd did not overflow as expected\n"); +#else + abort(); +#endif + + value_a = 99999999; + a = num2bcd(value_a, 0); + + value_b = 999999999; + b = num2bcd(value_b, 0); + + if(__builtin_bcdadd_ofl (a, b, 0)) +#if DEBUG + printf("ERROR: __builtin_bcdadd unexpectedly overflowed\n"); +#else + abort(); +#endif + + a = maxbcd(BCD_NEG); + b = maxbcd(BCD_NEG); + + if (__builtin_bcdsub_ofl (a, b, 0) == 0) +#if DEBUG + printf("ERROR: __builtin_bcdsub did not overflow as expected\n"); +#else + abort(); +#endif + + value_a = -99999999; + a = num2bcd(value_a, 0); + + value_b = -999999999; + b = num2bcd(value_b, 0); + + if (__builtin_bcdsub_ofl (a, b, 0)) +#if DEBUG + printf("ERROR: __builtin_bcdsub unexpectedly overflowed\n"); +#else + abort(); +#endif + + /* Test arguments for valid/invalid */ + if (__builtin_bcdinvalid (a)) +#if DEBUG + printf("ERROR: __builtin_invalid input is unexpectedly invalid.\n"); +#else + abort(); +#endif + + a[3] = 0xBB; /* an invalid BCD digit */ + if (!__builtin_bcdinvalid (a)) +#if DEBUG + printf("ERROR: __builtin_invalid input is unexpectedly valid.\n"); +#else + abort(); +#endif + + value_a = 1020304; + a = num2bcd(value_a, 0); + + value_b = 101010; + b = num2bcd(value_b, 0); + + /* Test equality */ + if (__builtin_bcdcmpeq (a, b)) +#if DEBUG + printf("ERROR: __builtin__bcdcmpeq result is unexpectedly 1.\n"); +#else + abort(); +#endif + + if (!__builtin_bcdcmpeq (a, a)) +#if DEBUG + printf("ERROR: __builtin__bcdcmpeq result is unexpectedly 0.\n"); +#else + abort(); +#endif + + + /* Test a greater then b, inputs already setup this way. */ + if (!__builtin_bcdcmpgt (a, b)) +#if DEBUG + printf("ERROR: __builtin__bcdcmpgt result is unexpectedly 0.\n"); +#else + abort(); +#endif + + if (__builtin_bcdcmpgt (b, a)) +#if DEBUG + printf("ERROR: __builtin__bcdcmpgt result is unexpectedly 1.\n"); +#else + abort(); +#endif + + if (__builtin_bcdcmpgt (a, a)) +#if DEBUG + printf("ERROR: __builtin__bcdcmpgt input equal, result is unexpectedly " + "1.\n"); +#else + abort(); +#endif + + + if (!__builtin_bcdcmpge (a, b)) +#if DEBUG + printf("ERROR: __builtin__bcdcmpge result is unexpectedly 0.\n"); +#else + abort(); +#endif + + if (__builtin_bcdcmpge (b, a)) +#if DEBUG + printf("ERROR: __builtin__bcdcmpge result is unexpectedly 1.\n"); +#else + abort(); +#endif + + if (!__builtin_bcdcmpge (b, b)) +#if DEBUG + printf("ERROR: __builtin__bcdcmpge inputs equal result is unexpectedly " + "0.\n"); +#else + abort(); +#endif + + /* Test a less then b. */ + value_a = 101010; + a = num2bcd(value_a, 0); + value_b = 1020304; + b = num2bcd(value_b, 0); + + if (!__builtin_bcdcmplt (a, b)) +#if DEBUG + printf("ERROR: __builtin__bcdcmplt result is unexpectedly 0.\n"); +#else + abort(); +#endif + + if (__builtin_bcdcmplt (b, a)) +#if DEBUG + printf("ERROR: __builtin__bcdcmplt result is unexpectedly 1.\n"); +#else + abort(); +#endif + + if (__builtin_bcdcmplt (b, b)) +#if DEBUG + printf("ERROR: __builtin__bcdcmplt inputs equal result is unexpectedly " + "1.\n"); +#else + abort(); +#endif + + + if (!__builtin_bcdcmple (a, b)) +#if DEBUG + printf("ERROR: __builtin__bcdcmple result is unexpectedly 0.\n"); +#else + abort(); +#endif + + if (__builtin_bcdcmple (b, a)) +#if DEBUG + printf("ERROR: __builtin__bcdcmple result is unexpectedly 1.\n"); +#else + abort(); +#endif + + if (!__builtin_bcdcmple (a, a)) +#if DEBUG + printf("ERROR: __builtin__bcdcmple inputs equal result is unexpectedly " + "0.\n"); +#else + abort(); +#endif + + /* Test multipy 10 */ + value_a = 1020304; + a = num2bcd(value_a, 0); + + value_result = value_a * 10; + exp_result = num2bcd(value_result, 0); + + result = __builtin_bcdmul10 (a); + + for (i = 0; i < 16; i++) + if (exp_result[i] != result[i]) { +#if DEBUG + printf("ERROR:carll __builtin_bcdmul10, pos result[%d] = %d does not " + "match expected_result[%d] = %d\n", + i, result[i], i, exp_result[i]); +#else + abort(); +#endif + } + + /* result should be positive */ + if ((result[0] & 0xF) != BCD_POS0) +#if 0 + printf("ERROR: __builtin_bcdmul10 sign, result is %d. Does not match " + "expected_result = %d\n", + result[0] & 0xF, BCD_POS1); +#else + abort(); +#endif + + /* Test divide 10 */ + value_a = 1020304; + a = num2bcd(value_a, 0); + + value_result = value_a / 10; + exp_result = num2bcd(value_result, 0); + + result = __builtin_bcddiv10 (a); + + for (i = 0; i < 16; i++) + if (exp_result[i] != result[i]) { +#if DEBUG + printf("ERROR:carll __builtin_bcddiv10, pos result[%d] = %d does not " + "match expected_result[%d] = %d\n", + i, result[i], i, exp_result[i]); +#else + abort(); +#endif + } + + /* result should be positive */ + if ((result[0] & 0xF) != BCD_POS0) +#if DEBUG + printf("ERROR: __builtin_bcddiv10 sign, result is %d. Does not match " + "expected_result = %d\n", + result[0] & 0xF, BCD_POS1); +#else + abort(); +#endif + + value_a = 1020304; + exp_result_d128 = 1020304; + a = num2bcd(value_a, 0); + + conv.ch = a; + conv.d128 = __builtin_bcd2dfp (a); + result_d128 = conv.d128; + + if (result_d128 != exp_result_d128) +#if DEBUG + printf("ERROR: __builtin_bcd2dfp, result does not match expected_result." + "\n"); +#else + abort(); +#endif + return 0; +} + diff --git a/gcc/testsuite/gcc.target/powerpc/bswap64-4.c b/gcc/testsuite/gcc.target/powerpc/bswap64-4.c index a3c0553..5acbb91 100644 --- a/gcc/testsuite/gcc.target/powerpc/bswap64-4.c +++ b/gcc/testsuite/gcc.target/powerpc/bswap64-4.c @@ -7,6 +7,12 @@ /* { dg-final { scan-assembler-times "ldbrx" 1 { target has_arch_pwr7 } } } */ /* { dg-final { scan-assembler-times "stdbrx" 1 { target has_arch_pwr7 } } } */ +/* On some versions of dejagnu this test will fail when biarch testing + with RUNTESTFLAGS="--target_board=unix'{-m64,-m32}'" due to -m32 + being added on the command line after the dg-options -mpowerpc64. + common/config/rs6000/rs6000-common.c:rs6000_handle_option disables + -mpowerpc64 for -m32. */ + long long swap_load (long long *a) { return __builtin_bswap64 (*a); } long long swap_reg (long long a) { return __builtin_bswap64 (a); } void swap_store (long long *a, long long b) { *a = __builtin_bswap64 (b); } diff --git a/gcc/testsuite/gcc.target/powerpc/builtins-1-p9-runnable.c b/gcc/testsuite/gcc.target/powerpc/builtins-1-p9-runnable.c index 711e3d0..9766541 100644 --- a/gcc/testsuite/gcc.target/powerpc/builtins-1-p9-runnable.c +++ b/gcc/testsuite/gcc.target/powerpc/builtins-1-p9-runnable.c @@ -16,8 +16,13 @@ int main() { vfb = (vector float){10.0, -2.0, 70.0, 999.0 }; /* Expected results. */ +#ifdef __BIG_ENDIAN__ + vexpected = (vector unsigned short) { 0x4900, 0xc000, 0x5460, 0x63ce, + 0x3666, 0x3e66, 0x4d00, 0x563e }; +#else vexpected = (vector unsigned short) { 0x3666, 0x3e66, 0x4d00, 0x563e, - 0x4900, 0xc000, 0x5460, 0x63ce}; + 0x4900, 0xc000, 0x5460, 0x63ce }; +#endif /* vresult = vec_pack_to_short_fp32 (vfa, vfb); @@ -44,7 +49,7 @@ int main() { for(i = 0; i< 8; i++) { if (vresult[i] != vexpected[i]) { printf("i=[%d] 0x%x != 0x%x \n",i,vresult[i],vexpected[i]); - abort(); + abort(); } } } diff --git a/gcc/testsuite/gcc.target/powerpc/builtins-3-p9.c b/gcc/testsuite/gcc.target/powerpc/builtins-3-p9.c index 5818361..96bdc48 100644 --- a/gcc/testsuite/gcc.target/powerpc/builtins-3-p9.c +++ b/gcc/testsuite/gcc.target/powerpc/builtins-3-p9.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target { le } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-options "-mdejagnu-cpu=power9 -O1" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/builtins-5-p9-runnable.c b/gcc/testsuite/gcc.target/powerpc/builtins-5-p9-runnable.c index 0fe6206..14e9355 100644 --- a/gcc/testsuite/gcc.target/powerpc/builtins-5-p9-runnable.c +++ b/gcc/testsuite/gcc.target/powerpc/builtins-5-p9-runnable.c @@ -1,4 +1,4 @@ -/* { dg-do run } */ +/* { dg-do run { target lp64 } } */ /* { dg-require-effective-target p9vector_hw } */ /* { dg-options "-mdejagnu-cpu=power9 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/builtins-7-p9-runnable.c b/gcc/testsuite/gcc.target/powerpc/builtins-7-p9-runnable.c index 1333d01..fa4eb2d 100644 --- a/gcc/testsuite/gcc.target/powerpc/builtins-7-p9-runnable.c +++ b/gcc/testsuite/gcc.target/powerpc/builtins-7-p9-runnable.c @@ -93,10 +93,17 @@ int main() vsi_arg = (vector signed int){0xA, 0xB, 0xC, 0xD}; +#ifdef __BIG_ENDIAN__ + vec_uc_expected = (vector unsigned char){0, 0, 0, 0xB, + 5, 6, 7, 8, + 9, 10, 11, 12, + 13, 14, 15, 16}; +#else vec_uc_expected = (vector unsigned char){0xC, 0, 0, 0, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}; +#endif /* Test vec_insert4b() */ /* Insert into char 0 location */ vec_uc_result = vec_insert4b (vsi_arg, vec_uc_arg, 0); @@ -112,10 +119,17 @@ int main() } /* insert into char 4 location */ +#ifdef __BIG_ENDIAN__ + vec_uc_expected = (vector unsigned char){1, 2, 3, 4, + 0, 0, 0, 3, + 9, 10, 11, 12, + 13, 14, 15, 16}; +#else vec_uc_expected = (vector unsigned char){1, 2, 3, 4, 2, 0, 0, 0, 9, 10, 11, 12, 13, 14, 15, 16}; +#endif vui_arg = (vector unsigned int){0x4, 0x3, 0x2, 0x1}; vec_uc_result = vec_insert4b (vui_arg, vec_uc_arg, 4); @@ -132,12 +146,20 @@ int main() /* Test vec_extract4b() */ /* Extract 4b, from char 0 location */ +#ifdef __BIG_ENDIAN__ + vec_uc_arg = (vector unsigned char){0, 0, 0, 10, + 0, 0, 0, 20, + 0, 0, 0, 30, + 0, 0, 0, 40}; + vec_ull_expected = (vector unsigned long long){10, 0}; +#else vec_uc_arg = (vector unsigned char){10, 0, 0, 0, 20, 0, 0, 0, 30, 0, 0, 0, 40, 0, 0, 0}; - vec_ull_expected = (vector unsigned long long){0, 10}; +#endif + vec_ull_result = vec_extract4b(vec_uc_arg, 0); if (result_wrong_ull(vec_ull_expected, vec_ull_result)) @@ -151,12 +173,20 @@ int main() } /* Extract 4b, from char 12 location */ +#ifdef __BIG_ENDIAN__ + vec_uc_arg = (vector unsigned char){0, 0, 0, 10, + 0, 0, 0, 20, + 0, 0, 0, 30, + 0, 0, 0, 40}; + vec_ull_expected = (vector unsigned long long){40, 0}; +#else vec_uc_arg = (vector unsigned char){10, 0, 0, 0, 20, 0, 0, 0, 30, 0, 0, 0, 40, 0, 0, 0}; - vec_ull_expected = (vector unsigned long long){0, 40}; +#endif + vec_ull_result = vec_extract4b(vec_uc_arg, 12); if (result_wrong_ull(vec_ull_expected, vec_ull_result)) diff --git a/gcc/testsuite/gcc.target/powerpc/builtins-msum-runnable.c b/gcc/testsuite/gcc.target/powerpc/builtins-msum-runnable.c index 0fa5c31..abc0a0d 100644 --- a/gcc/testsuite/gcc.target/powerpc/builtins-msum-runnable.c +++ b/gcc/testsuite/gcc.target/powerpc/builtins-msum-runnable.c @@ -1,4 +1,6 @@ -/* { dg-do run { target { p9vector_hw } } } */ +/* { dg-do run } */ +/* { dg-require-effective-target p9vector_hw } */ +/* { dg-require-effective-target int128 } */ /* { dg-options "-mdejagnu-cpu=power9 -O2" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/byte-in-either-range-0.c b/gcc/testsuite/gcc.target/powerpc/byte-in-either-range-0.c index a5300b4..647186d 100644 --- a/gcc/testsuite/gcc.target/powerpc/byte-in-either-range-0.c +++ b/gcc/testsuite/gcc.target/powerpc/byte-in-either-range-0.c @@ -1,6 +1,5 @@ -/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ -/* { dg-skip-if "" { powerpc*-*-aix* } } */ /* { dg-options "-mdejagnu-cpu=power9" } */ /* This test should succeed on both 32- and 64-bit configurations. */ diff --git a/gcc/testsuite/gcc.target/powerpc/byte-in-either-range-1.c b/gcc/testsuite/gcc.target/powerpc/byte-in-either-range-1.c index e67fb66..3a07f7f 100644 --- a/gcc/testsuite/gcc.target/powerpc/byte-in-either-range-1.c +++ b/gcc/testsuite/gcc.target/powerpc/byte-in-either-range-1.c @@ -1,6 +1,5 @@ -/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ -/* { dg-skip-if "" { powerpc*-*-aix* } } */ /* { dg-options "-mdejagnu-cpu=power8" } */ /* This test should succeed on both 32- and 64-bit configurations. */ diff --git a/gcc/testsuite/gcc.target/powerpc/byte-in-range-0.c b/gcc/testsuite/gcc.target/powerpc/byte-in-range-0.c index ca58afe..9603177 100644 --- a/gcc/testsuite/gcc.target/powerpc/byte-in-range-0.c +++ b/gcc/testsuite/gcc.target/powerpc/byte-in-range-0.c @@ -1,6 +1,5 @@ -/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ -/* { dg-skip-if "" { powerpc*-*-aix* } } */ /* { dg-options "-mdejagnu-cpu=power9" } */ /* This test should succeed on both 32- and 64-bit configurations. */ diff --git a/gcc/testsuite/gcc.target/powerpc/byte-in-range-1.c b/gcc/testsuite/gcc.target/powerpc/byte-in-range-1.c index 4f4ad8f..ec1740d 100644 --- a/gcc/testsuite/gcc.target/powerpc/byte-in-range-1.c +++ b/gcc/testsuite/gcc.target/powerpc/byte-in-range-1.c @@ -1,6 +1,5 @@ -/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ -/* { dg-skip-if "" { powerpc*-*-aix* } } */ /* { dg-options "-mdejagnu-cpu=power8" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/byte-in-set-0.c b/gcc/testsuite/gcc.target/powerpc/byte-in-set-0.c index 777d00d..16126bf 100644 --- a/gcc/testsuite/gcc.target/powerpc/byte-in-set-0.c +++ b/gcc/testsuite/gcc.target/powerpc/byte-in-set-0.c @@ -1,7 +1,6 @@ -/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target lp64 } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ -/* { dg-skip-if "" { powerpc*-*-aix* } } */ /* { dg-options "-mdejagnu-cpu=power9" } */ /* This test should succeed only on 64-bit configurations. */ diff --git a/gcc/testsuite/gcc.target/powerpc/byte-in-set-1.c b/gcc/testsuite/gcc.target/powerpc/byte-in-set-1.c index a369dc1..53fa5d8 100644 --- a/gcc/testsuite/gcc.target/powerpc/byte-in-set-1.c +++ b/gcc/testsuite/gcc.target/powerpc/byte-in-set-1.c @@ -1,7 +1,6 @@ -/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target lp64 } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ -/* { dg-skip-if "" { powerpc*-*-aix* } } */ /* { dg-options "-mdejagnu-cpu=power8" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/byte-in-set-2.c b/gcc/testsuite/gcc.target/powerpc/byte-in-set-2.c index 9a80c27..44cc778 100644 --- a/gcc/testsuite/gcc.target/powerpc/byte-in-set-2.c +++ b/gcc/testsuite/gcc.target/powerpc/byte-in-set-2.c @@ -1,7 +1,6 @@ -/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target ilp32 } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ -/* { dg-skip-if "" { powerpc*-*-aix* } } */ /* { dg-options "-mdejagnu-cpu=power9" } */ #include <altivec.h> @@ -11,5 +10,5 @@ int test_byte_in_set (unsigned char b, unsigned long long set_members) { - return __builtin_byte_in_set (b, set_members); /* { dg-error "'__builtin_byte_in_set' is not supported in this compiler configuration" } */ + return __builtin_byte_in_set (b, set_members); /* { dg-warning "implicit declaration of function" } */ } diff --git a/gcc/testsuite/gcc.target/powerpc/cfuged-1.c b/gcc/testsuite/gcc.target/powerpc/cfuged-1.c index 198d541..0088309 100644 --- a/gcc/testsuite/gcc.target/powerpc/cfuged-1.c +++ b/gcc/testsuite/gcc.target/powerpc/cfuged-1.c @@ -1,6 +1,7 @@ -/* { dg-do run } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ /* { dg-require-effective-target lp64 } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-mdejagnu-cpu=power10" } */ extern void abort (void); diff --git a/gcc/testsuite/gcc.target/powerpc/cntlzdm-1.c b/gcc/testsuite/gcc.target/powerpc/cntlzdm-1.c index e9ee835..a6bc2d6 100644 --- a/gcc/testsuite/gcc.target/powerpc/cntlzdm-1.c +++ b/gcc/testsuite/gcc.target/powerpc/cntlzdm-1.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-require-effective-target lp64 } */ /* { dg-options "-mdejagnu-cpu=power10" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/cnttzdm-1.c b/gcc/testsuite/gcc.target/powerpc/cnttzdm-1.c index 4c05c1b..ba94871 100644 --- a/gcc/testsuite/gcc.target/powerpc/cnttzdm-1.c +++ b/gcc/testsuite/gcc.target/powerpc/cnttzdm-1.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-require-effective-target lp64 } */ /* { dg-options "-mdejagnu-cpu=power10" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/cprophard.c b/gcc/testsuite/gcc.target/powerpc/cprophard.c index f93081f..0aac9a5 100644 --- a/gcc/testsuite/gcc.target/powerpc/cprophard.c +++ b/gcc/testsuite/gcc.target/powerpc/cprophard.c @@ -1,6 +1,6 @@ -/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ +/* { dg-do compile { target lp64 } } */ /* { dg-skip-if "" { powerpc*-*-darwin* } } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -mno-pcrel" } */ /* { dg-final { scan-assembler {ld 2,(24|40)\(1\)} } } */ /* From a linux kernel mis-compile of net/core/skbuff.c. */ diff --git a/gcc/testsuite/gcc.target/powerpc/dg-future-1.c b/gcc/testsuite/gcc.target/powerpc/dg-future-1.c index 0dbfb06..bc2b3b7 100644 --- a/gcc/testsuite/gcc.target/powerpc/dg-future-1.c +++ b/gcc/testsuite/gcc.target/powerpc/dg-future-1.c @@ -1,5 +1,6 @@ -/* { dg-do run { target { powerpc*-*-* } } } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-mdejagnu-cpu=power10" } */ /* This tests that power10_hw works. */ diff --git a/gcc/testsuite/gcc.target/powerpc/dimode_off.c b/gcc/testsuite/gcc.target/powerpc/dimode_off.c index 19ca40c..12718ea 100644 --- a/gcc/testsuite/gcc.target/powerpc/dimode_off.c +++ b/gcc/testsuite/gcc.target/powerpc/dimode_off.c @@ -1,5 +1,5 @@ /* { dg-do assemble } */ -/* { dg-options "-O2 -fno-align-functions -fno-asynchronous-unwind-tables -mtraceback=no -save-temps" } */ +/* { dg-options "-O2 -fno-align-functions -fno-asynchronous-unwind-tables -mtraceback=no -mno-prefixed -save-temps" } */ void w1 (void *x, long long y) { *(long long *) (x + 32767) = y; } void w2 (void *x, long long y) { *(long long *) (x + 32766) = y; } diff --git a/gcc/testsuite/gcc.target/powerpc/float128-cmp2-runnable.c b/gcc/testsuite/gcc.target/powerpc/float128-cmp2-runnable.c index 93dd112..d376a3c 100644 --- a/gcc/testsuite/gcc.target/powerpc/float128-cmp2-runnable.c +++ b/gcc/testsuite/gcc.target/powerpc/float128-cmp2-runnable.c @@ -1,4 +1,6 @@ -/* { dg-do run { target { powerpc*-*-* && p9vector_hw } } } */ +/* { dg-do run } */ +/* { dg-require-effective-target ppc_float128_sw } */ +/* { dg-require-effective-target p9vector_hw } */ /* { dg-options "-O2 -mdejagnu-cpu=power9 " } */ #define NAN_Q __builtin_nanq ("") diff --git a/gcc/testsuite/gcc.target/powerpc/float128-hw3.c b/gcc/testsuite/gcc.target/powerpc/float128-hw3.c index b3bbeb2..630c93d 100644 --- a/gcc/testsuite/gcc.target/powerpc/float128-hw3.c +++ b/gcc/testsuite/gcc.target/powerpc/float128-hw3.c @@ -1,7 +1,7 @@ /* { dg-do compile { target lp64 } } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-require-effective-target float128 } */ -/* { dg-options "-mpower9-vector -O2 -ffast-math -std=c11" } */ +/* { dg-options "-mpower9-vector -O2 -ffast-math -std=c11 -mno-pcrel" } */ /* Test to make sure the compiler calls the external function instead of doing the built-in processing for _Float128 functions that have hardware support diff --git a/gcc/testsuite/gcc.target/powerpc/float128-mix-2.c b/gcc/testsuite/gcc.target/powerpc/float128-mix-2.c new file mode 100644 index 0000000..6122713 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/float128-mix-2.c @@ -0,0 +1,16 @@ +/* { dg-require-effective-target ppc_float128_sw } */ +/* { dg-options "-O2 -mvsx -Wno-psabi -mabi=ieeelongdouble -mlong-double-128" } */ + +/* Test to make sure that __float128 and long double do not generate errors if + long double uses the IEEE 128-bit format. */ +__float128 +add (__float128 a, long double b) +{ + return a+b; +} + +long double +sub (long double a, __float128 b) +{ + return a-b; +} diff --git a/gcc/testsuite/gcc.target/powerpc/float128-mix-3.c b/gcc/testsuite/gcc.target/powerpc/float128-mix-3.c new file mode 100644 index 0000000..a2582bb --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/float128-mix-3.c @@ -0,0 +1,16 @@ +/* { dg-require-effective-target ppc_float128_sw } */ +/* { dg-options "-O2 -mvsx -Wno-psabi -mabi=ibmlongdouble -mlong-double-128" } */ + +/* Test to make sure that __float128 and __ibm128 cannot be combined + together. */ +__float128 +add (__float128 a, __ibm128 b) +{ + return a+b; /* { dg-error "IEEE 128-bit and IBM 128-bit floating point" } */ +} + +__ibm128 +sub (__ibm128 a, __float128 b) +{ + return a-b; /* { dg-error "IEEE 128-bit and IBM 128-bit floating point" } */ +} diff --git a/gcc/testsuite/gcc.target/powerpc/float128-mix.c b/gcc/testsuite/gcc.target/powerpc/float128-mix.c index 71f840c..48e651c 100644 --- a/gcc/testsuite/gcc.target/powerpc/float128-mix.c +++ b/gcc/testsuite/gcc.target/powerpc/float128-mix.c @@ -1,15 +1,17 @@ -/* { dg-do compile { target { powerpc*-*-linux* } } } */ -/* { dg-require-effective-target powerpc_vsx_ok } */ -/* { dg-options "-O2 -mvsx" } */ +/* { dg-require-effective-target ppc_float128_sw } */ +/* { dg-options "-O2 -mvsx -Wno-psabi -mabi=ibmlongdouble -mlong-double-128" } */ - -/* Test to make sure that __float128 and long double cannot be combined together. */ -__float128 add (__float128 a, long double b) +/* Test to make sure that __float128 and long double cannot be combined + together, when long double uses the IBM extended double format, and + __float128 uses the IEEE 128-bit format. */ +__float128 +add (__float128 a, long double b) { - return a+b; /* { dg-error "__float128 and long double cannot be used in the same expression" } */ + return a+b; /* { dg-error "IEEE 128-bit and IBM 128-bit floating point" } */ } -__ibm128 sub (long double a, __float128 b) +long double +sub (long double a, __float128 b) { - return a-b; /* { dg-error "__float128 and long double cannot be used in the same expression" } */ + return a-b; /* { dg-error "IEEE 128-bit and IBM 128-bit floating point" } */ } diff --git a/gcc/testsuite/gcc.target/powerpc/float128-type-1.c b/gcc/testsuite/gcc.target/powerpc/float128-type-1.c index 13152ac..53f9e35 100644 --- a/gcc/testsuite/gcc.target/powerpc/float128-type-1.c +++ b/gcc/testsuite/gcc.target/powerpc/float128-type-1.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target { powerpc64*-*-linux* && lp64 } } } */ +/* { dg-do compile { target { *-*-linux* && lp64 } } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-options "-mdejagnu-cpu=power8 -O2 -mno-float128" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/float128-type-2.c b/gcc/testsuite/gcc.target/powerpc/float128-type-2.c index 5644281..02dbad1 100644 --- a/gcc/testsuite/gcc.target/powerpc/float128-type-2.c +++ b/gcc/testsuite/gcc.target/powerpc/float128-type-2.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target { powerpc64-*-linux* && lp64 } } } */ +/* { dg-do compile { target { *-*-linux* && lp64 } } } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-options "-mdejagnu-cpu=power9 -O2 -mno-float128" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p7.c index 8f6d369..42599c2 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p7.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p7.c @@ -1,7 +1,7 @@ /* Verify that overloaded built-ins for vec_extract() with char inputs produce the right code with a power7 (BE) target. */ -/* { dg-do compile { target { powerpc*-*-linux* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-options "-mdejagnu-cpu=power7 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p8.c index f3fea46..f3b9556 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p8.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p8.c @@ -1,7 +1,7 @@ /* Verify that overloaded built-ins for vec_extract() with char inputs produce the right code with a P8 (LE or BE) target. */ -/* { dg-do compile { target { powerpc*-*-linux* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-options "-mdejagnu-cpu=power8 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p9.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p9.c index ff07c88..8a4c380 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p9.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p9.c @@ -1,7 +1,7 @@ /* Verify that overloaded built-ins for vec_extract() with char inputs produce the right code with a P9 (LE) target. */ -/* { dg-do compile { target { powerpc*-*-linux* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-options "-mdejagnu-cpu=power9 -O2 " } */ @@ -12,7 +12,6 @@ /* { dg-final { scan-assembler-times "stxv" 6 { target ilp32 } } } */ /* { dg-final { scan-assembler-times "lbz" 6 { target ilp32 } } } */ -/* { dg-final { scan-assembler-times "addi" 6 { target ilp32 } } } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c index 26fe343..cbf6cff 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c @@ -1,9 +1,10 @@ /* Verify that overloaded built-ins for vec_extract() with double inputs produce the right code. */ -/* { dg-do compile { target { powerpc*-*-linux* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_altivec_ok } */ -/* { dg-options "-mdejagnu-cpu=power7 -O2 -mbig-endian" } */ +/* { dg-options "-mdejagnu-cpu=power7 -O2" } */ +/* { dg-additional-options "-mbig-endian" { target powerpc*-*-linux* } } */ // targeting P7 (BE), 2 tests. // P7 constants: xxpermdi diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p8.c index 188a1d2..2b8dbb0 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p8.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p8.c @@ -1,7 +1,7 @@ /* Verify that overloaded built-ins for vec_extract() with double inputs produce the right code with a P8 (LE or BE) target. */ -/* { dg-do compile { target { powerpc*-*-linux* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-options "-mdejagnu-cpu=power8 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p9.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p9.c index 2a3bfc1..6c51503 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p9.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p9.c @@ -5,10 +5,10 @@ /* { dg-require-effective-target p9vector_hw } */ /* { dg-options "-mdejagnu-cpu=power9 -O2 " } */ -/* { dg-final { scan-assembler-times {\mxxlor\M} 2 } } */ -/* { dg-final { scan-assembler-times {\mrldic\M} 1 } } */ -/* { dg-final { scan-assembler-times {\mmtvsrdd\M} 1 } } */ -/* { dg-final { scan-assembler-times {\mvslo\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mxxlor\M} 2 { target lp64} } } */ +/* { dg-final { scan-assembler-times {\mrldic\M} 1 { target lp64} } } */ +/* { dg-final { scan-assembler-times {\mmtvsrdd\M} 1 { target lp64} } } */ +/* { dg-final { scan-assembler-times {\mvslo\M} 1 { target lp64} } } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c index fa2dbb3..c9abb6c 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c @@ -1,7 +1,7 @@ /* Verify that overloaded built-ins for vec_extract() with float inputs produce the right code with a P7 (BE) target. */ -/* { dg-do compile { target { powerpc*-*-linux* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-options "-mdejagnu-cpu=power7 -O2 " } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c index 815f9b5..68eeeed 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c @@ -1,7 +1,7 @@ /* Verify that overloaded built-ins for vec_extract() with float inputs produce the right code with a P8 (LE or BE) target. */ -/* { dg-do compile { target { powerpc*-*-linux* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-options "-mdejagnu-cpu=power8 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p9.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p9.c index d078e8a..aaa8a92 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p9.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p9.c @@ -1,13 +1,13 @@ /* Verify that overloaded built-ins for vec_extract() with float inputs produce the right code. */ -/* { dg-do compile { target { powerpc*-*-linux* && le } } } */ +/* { dg-do compile { target lp64 } } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-options "-mdejagnu-cpu=power9 -O2 " } */ /* { dg-final { scan-assembler-times {\mxscvspdp\M} 2 } } */ -/* { dg-final { scan-assembler-times {\mrldicl\M} 1 } } */ -/* { dg-final { scan-assembler-times {\msubfic\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mrldicl\M} 1 { target le } } } */ +/* { dg-final { scan-assembler-times {\msubfic\M} 1 { target le } } } */ /* { dg-final { scan-assembler-times {\msldi\M} 1 } } */ /* { dg-final { scan-assembler-times {\mmtvsrdd\M} 1 } } */ /* { dg-final { scan-assembler-times {\mvslo\M} 1 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c index 2285881..418762e 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c @@ -1,7 +1,7 @@ /* Verify that overloaded built-ins for vec_extract() with int inputs produce the right code with a P7 (BE) target. */ -/* { dg-do compile { target { powerpc*-*-linux* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-options "-mdejagnu-cpu=power7 -O2 " } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p8.c index 83ce4ee..d1e3b62 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p8.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p8.c @@ -1,7 +1,7 @@ /* Verify that overloaded built-ins for vec_extract() with int inputs produce the right code with a P8 (LE or BE) target. */ -/* { dg-do compile { target { powerpc*-*-linux* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-options "-mdejagnu-cpu=power8 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p9.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p9.c index 0187803..1abf19d 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p9.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p9.c @@ -1,7 +1,7 @@ /* Verify that overloaded built-ins for vec_extract() with int inputs produce the right code with a P9 (LE) target. */ -/* { dg-do compile { target { powerpc*-*-linux* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-options "-mdejagnu-cpu=power9 -O2 " } */ @@ -18,7 +18,6 @@ /* { dg-final { scan-assembler-times {\madd\M} 3 { target ilp32 } } } */ /* { dg-final { scan-assembler-times {\mstxv\M} 6 { target ilp32 } } } */ /* { dg-final { scan-assembler-times {\mlwz\M} 6 { target ilp32 } } } */ -/* { dg-final { scan-assembler-times {\maddi\M} 6 { target ilp32 } } } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-longlong.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-longlong.p7.c index 3fa9cab..b97fcb4 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-longlong.p7.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-longlong.p7.c @@ -1,7 +1,7 @@ /* Verify that overloaded built-ins for vec_extract() with long long inputs produce the right code with a P8 (LE or BE) target. */ -/* { dg-do compile { target { powerpc*-*-linux* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-options "-mdejagnu-cpu=power7 -O2" } */ @@ -21,7 +21,7 @@ /* { dg-final { scan-assembler-times {\mli\M} 3 { target lp64 } } } */ /* -m32 target with constant test uses (+2)li where the -m64 has an ld */ /* { dg-final { scan-assembler-times {\mli\M} 5 { target ilp32 } } } */ -/* { dg-final { scan-assembler-times {\maddi\M} 6 } } */ +/* { dg-final { scan-assembler-times {\maddi\M} 6 { target lp64 } } } */ /* { dg-final { scan-assembler-times {\mstxvd2x\M|\mstvx\M} 3 } } */ /* { dg-final { scan-assembler-times {\mrldic\M|\mrlwinm\M} 3 } } */ /* { dg-final { scan-assembler-times {\mldx\M} 3 { target lp64 } } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-longlong.p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-longlong.p8.c index 5674698..8ddce3fd 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-longlong.p8.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-longlong.p8.c @@ -1,7 +1,7 @@ /* Verify that overloaded built-ins for vec_extract() with long long inputs produce the right code with a P8 (LE or BE) target. */ -/* { dg-do compile { target { powerpc*-*-linux* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-options "-mdejagnu-cpu=power8 -O2" } */ @@ -17,7 +17,6 @@ /* { dg-final { scan-assembler-times {\mstxvd2x\M|\mstxvw4x\M} 4 { target ilp32 } } } */ /* { dg-final { scan-assembler-times {\madd\M} 3 { target ilp32 } } } */ /* { dg-final { scan-assembler-times {\mlwz\M} 11 { target ilp32 } } } */ -/* { dg-final { scan-assembler-times {\maddi\M} 6 { target ilp32 } } } */ /* { dg-final { scan-assembler-times {\mmfvsrd\M} 6 { target lp64 } } } */ /* { dg-final { scan-assembler-times {\mmtvsrd\M} 3 { target lp64 } } } */ /* { dg-final { scan-assembler-times {\mxxpermdi\M} 3 { target le } } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-longlong.p9.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-longlong.p9.c index c98c0da..29814ed 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-longlong.p9.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-longlong.p9.c @@ -1,7 +1,7 @@ /* Verify that overloaded built-ins for vec_extract() with long long - inputs produce the right code for a P9 (LE) target. */ + inputs produce the right code for a P9 target. */ -/* { dg-do compile { target { powerpc*-*-linux* && le } } } */ +/* { dg-do compile { target lp64 } } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-options "-mdejagnu-cpu=power9 -O2" } */ @@ -10,11 +10,13 @@ // p9 vars: xori, rldic, mtvsrdd, vslo, mfvsrd /* results. */ -/* { dg-final { scan-assembler-times {\mxori\M} 3 } } */ +/* { dg-final { scan-assembler-times {\mxori\M} 3 { target le } } } */ /* { dg-final { scan-assembler-times {\mrldic\M} 3 } } */ /* { dg-final { scan-assembler-times {\mmtvsrdd\M} 3 } } */ /* { dg-final { scan-assembler-times {\mvslo\M} 3 } } */ -/* { dg-final { scan-assembler-times {\mmfvsrd\M} 6 } } */ +/* { dg-final { scan-assembler-times {\mmfvsrd\M} 6 { target le } } } */ +/* { dg-final { scan-assembler-times {\mmfvsrd\M} 3 { target be } } } */ +/* { dg-final { scan-assembler-times {\mmfvsrld\M} 3 { target be } } } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p7.c index 8616e7b..46e943f 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p7.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p7.c @@ -1,7 +1,7 @@ /* Verify that overloaded built-ins for vec_extract() with short inputs produce the right code for a P7 (BE) target. */ -/* { dg-do compile { target { powerpc*-*-linux* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-options "-mdejagnu-cpu=power7 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p8.c index e749a22..00685ac 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p8.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p8.c @@ -1,7 +1,7 @@ /* Verify that overloaded built-ins for vec_extract() with short inputs produce the right results with a P8 (LE or BE) target. */ -/* { dg-do compile { target { powerpc*-*-linux* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-options "-mdejagnu-cpu=power8 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p9.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p9.c index 0978334..fac35cb 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p9.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p9.c @@ -1,17 +1,18 @@ /* Verify that overloaded built-ins for vec_extract() with short - inputs produce the right code for a P9 (LE) target. */ + inputs produce the right code for a P9 target. */ -/* { dg-do compile { target { powerpc*-*-linux* && le } } } */ +/* { dg-do compile { target lp64 } } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-options "-mdejagnu-cpu=power9 -O2" } */ -// six tests total. Targeting P9 LE. +// six tests total. Targeting P9. // p9 (le) variable offset: slwi, vextuhlx, extsh // p9 (le) const offset: li, vextuhlx, extsh /* { dg-final { scan-assembler-times {\mslwi\M} 3 } } */ /* { dg-final { scan-assembler-times {\mli\M} 3 } } */ -/* { dg-final { scan-assembler-times "vextuhrx" 6 } } */ +/* { dg-final { scan-assembler-times "vextuhrx" 6 { target le } } } */ +/* { dg-final { scan-assembler-times "vextuhlx" 6 { target be } } } */ /* { dg-final { scan-assembler-times {\mextsh\M} 2 } } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-char-p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-char-p8.c index b13c8ca..39fd4df 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-char-p8.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-char-p8.c @@ -1,7 +1,7 @@ /* Verify that overloaded built-ins for vec_insert () with char inputs produce the right codegen. */ -/* { dg-do compile { target { powerpc*-*-linux* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-options "-O2 -mdejagnu-cpu=power8" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-char-p9.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-char-p9.c index 1643228..ae1daad 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-char-p9.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-char-p9.c @@ -1,7 +1,7 @@ /* Verify that overloaded built-ins for vec_insert () with char inputs produce the right codegen. */ -/* { dg-do compile { target { powerpc*-*-linux* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-options "-O2 -mdejagnu-cpu=power9" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-double.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-double.c index 435d28d..120579c 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-double.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-double.c @@ -1,7 +1,7 @@ /* Verify that overloaded built-ins for vec_insert with double inputs produce the right codegen. */ -/* { dg-do compile { target { powerpc*-*-linux* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-options "-mvsx -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-float-p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-float-p8.c index 7682aea..76039bc 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-float-p8.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-float-p8.c @@ -1,7 +1,7 @@ /* Verify that overloaded built-ins for vec_insert with float inputs produce the right codegen. Power8 variant. */ -/* { dg-do compile { target { powerpc*-*-linux* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-options "-O2 -mdejagnu-cpu=power8" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-float-p9.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-float-p9.c index 93c263e..3819fe6 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-float-p9.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-float-p9.c @@ -1,7 +1,7 @@ /* Verify that overloaded built-ins for vec_insert with float inputs produce the right codegen. Power9 variant. */ -/* { dg-do compile { target { powerpc*-*-linux* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-options "-O2 -mdejagnu-cpu=power9" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-int-p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-int-p8.c index 4a3b1ae..0f2bdd7 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-int-p8.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-int-p8.c @@ -1,7 +1,7 @@ /* Verify that overloaded built-ins for vec_insert() with int inputs produce the right codegen. Power8 variant. */ -/* { dg-do compile { target { powerpc*-*-linux* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-options "-O2 -mdejagnu-cpu=power8" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-int-p9.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-int-p9.c index 5ba5d53..a851fd6 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-int-p9.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-int-p9.c @@ -1,7 +1,7 @@ /* Verify that overloaded built-ins for vec_insert() with int inputs produce the right codegen. Power9 variant. */ -/* { dg-do compile { target { powerpc*-*-linux* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-options "-O2 -mdejagnu-cpu=power9" } */ @@ -58,8 +58,6 @@ testui2_cst(unsigned int x, vector unsigned int v) /* { dg-final { scan-assembler-times {\mmtvsrwz\M} 4 { target lp64 } } } */ /* { dg-final { scan-assembler-times {\mxxinsertw\M} 4 { target lp64 } } } */ - -/* { dg-final { scan-assembler-times {\maddi\M} 12 { target ilp32 } } } */ /* { dg-final { scan-assembler-times {\mstw\M} 8 { target ilp32 } } } */ /* { dg-final { scan-assembler-times {\mlxv\M} 8 { target ilp32 } } } */ /* { dg-final { scan-assembler-times {\mlvewx\M} 4 { target ilp32 } } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-longlong.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-longlong.c index 337b38f..e969898 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-longlong.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-longlong.c @@ -1,7 +1,7 @@ /* Verify that overloaded built-ins for vec_insert() with long long inputs produce the right codegen. */ -/* { dg-do compile { target { powerpc*-*-linux* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-options "-O2 -mdejagnu-cpu=power8" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-short-p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-short-p8.c index 3ed4004..0a73db7 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-short-p8.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-short-p8.c @@ -1,7 +1,7 @@ /* Verify that overloaded built-ins for vec_insert() with short inputs produce the right codegen. Power8 variant. */ -/* { dg-do compile { target { powerpc*-*-linux* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-options "-O2 -mdejagnu-cpu=power8" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-short-p9.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-short-p9.c index f09fd21..0f35042 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-short-p9.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-short-p9.c @@ -1,7 +1,7 @@ /* Verify that overloaded built-ins for vec_insert() with short inputs produce the right codegen. Power9 variant. */ -/* { dg-do compile { target { powerpc*-*-linux* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-options "-O2 -mdejagnu-cpu=power9" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-select-double.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-select-double.c index 7de7abc..bb7dce1 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-select-double.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-select-double.c @@ -1,7 +1,7 @@ /* Verify that overloaded built-ins for vec_sel with double inputs for VSX produce the right code. */ -/* { dg-do compile { target { powerpc*-*-linux* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-options "-mdejagnu-cpu=power8 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-select-float.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-select-float.c index cc37eb5..1656fbf 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-select-float.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-select-float.c @@ -1,7 +1,7 @@ /* Verify that overloaded built-ins for vec_sel with float inputs for VSX produce the right code. */ -/* { dg-do compile { target { powerpc*-*-linux* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-options "-maltivec -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-splats-int.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-splats-int.c index 01b95c5..dff0f55 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-splats-int.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-splats-int.c @@ -1,7 +1,7 @@ /* Verify that overloaded built-ins for vec_splat with int inputs produce the right code. */ -/* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */ +/* { dg-do compile { target lp64 } } */ /* { dg-require-effective-target powerpc_altivec_ok } */ /* { dg-options "-maltivec -O2 " } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-splats-longlong.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-splats-longlong.c index 2dbf48e..2425650 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-splats-longlong.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-splats-longlong.c @@ -1,7 +1,7 @@ /* Verify that overloaded built-ins for vec_splat with long long inputs produce the right code. */ -/* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */ +/* { dg-do compile { target lp64 } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-options "-mvsx -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/le-altivec-consts.c b/gcc/testsuite/gcc.target/powerpc/le-altivec-consts.c index f48ef44..a1db5e9 100644 --- a/gcc/testsuite/gcc.target/powerpc/le-altivec-consts.c +++ b/gcc/testsuite/gcc.target/powerpc/le-altivec-consts.c @@ -1,7 +1,7 @@ /* { dg-do run { target vmx_hw } } */ -/* { dg-do compile } */ +/* { dg-do compile { target { ! vmx_hw } } } */ /* { dg-require-effective-target powerpc_altivec_ok } */ -/* { dg-options "-maltivec -mabi=altivec -O2" } */ +/* { dg-options "-maltivec -mabi=altivec -O2 -save-temps" } */ /* Check that "easy" AltiVec constants are correctly synthesized. */ diff --git a/gcc/testsuite/gcc.target/powerpc/localentry-1.c b/gcc/testsuite/gcc.target/powerpc/localentry-1.c index c3c5168..1343df2 100644 --- a/gcc/testsuite/gcc.target/powerpc/localentry-1.c +++ b/gcc/testsuite/gcc.target/powerpc/localentry-1.c @@ -1,11 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-mdejagnu-cpu=power10 -O2 -mpcrel" } */ +/* { dg-options "-mdejagnu-cpu=power10 -O2" } */ /* { dg-require-effective-target powerpc_elfv2 } */ /* { dg-require-effective-target power10_ok } */ -/* Ensure we generate ".localentry fn,1" for both leaf and non-leaf functions. - At present, -mcpu=power10 does not enable pc-relative mode, so make sure we - enable it to be able to check for .localentry. */ +/* Ensure we generate ".localentry fn,1" for both leaf and non-leaf + functions. */ extern int y (int); diff --git a/gcc/testsuite/gcc.target/powerpc/lsbb-runnable.c b/gcc/testsuite/gcc.target/powerpc/lsbb-runnable.c index 7da530c..2e97cc1 100644 --- a/gcc/testsuite/gcc.target/powerpc/lsbb-runnable.c +++ b/gcc/testsuite/gcc.target/powerpc/lsbb-runnable.c @@ -6,8 +6,9 @@ int vec_test_lsbb_all_ones (vector unsigned char); */ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-fno-inline -mdejagnu-cpu=power10 -O2" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/mma-alignment.c b/gcc/testsuite/gcc.target/powerpc/mma-alignment.c new file mode 100644 index 0000000..0981893 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/mma-alignment.c @@ -0,0 +1,41 @@ +/* { dg-do run } */ +/* { dg-require-effective-target hard_float } */ +/* { dg-options "-O2 -mhard-float" } */ + +#include <stdlib.h> + +/* The MMA types below are enabled for pre-power10 compiles, because the + built-ins that use them must always be initialized in case the user has + a target attribute or pragma on a function that uses the MMA built-ins. + Since the test below doesn't need any other MMA support, we can enable + this test case on basically any cpu that has hard floating point + registers. */ + +struct +{ + int __attribute__ ((__aligned__)) ivar; + __vector_pair pair; + __vector_quad quad; +} s; + +int +main (void) +{ + /* Verify default alignment is 16-byte aligned (BIGGEST_ALIGNMENT). + This may change in the future, but that is an ABI break, so this + hardcoded test case is here to be a noisy FAIL as a warning, in + case the ABI change was unintended and unwanted. An example of where + this can break an ABI is in glibc's struct _Unwind_Exception. */ + if (__alignof__ (s.ivar) != 16) + abort (); + + /* Verify __vector_pair types are 32-byte aligned. */ + if (__alignof__ (s.pair) != 32) + abort (); + + /* Verify __vector_quad types are 64-byte aligned. */ + if (__alignof__ (s.quad) != 64) + abort (); + + return 0; +} diff --git a/gcc/testsuite/gcc.target/powerpc/mma-double-test.c b/gcc/testsuite/gcc.target/powerpc/mma-double-test.c index 044a288..5384379 100755 --- a/gcc/testsuite/gcc.target/powerpc/mma-double-test.c +++ b/gcc/testsuite/gcc.target/powerpc/mma-double-test.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-require-effective-target ppc_mma_hw } */ /* { dg-options "-mdejagnu-cpu=power10 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/mma-single-test.c b/gcc/testsuite/gcc.target/powerpc/mma-single-test.c index 7e628df..ac4125b 100755 --- a/gcc/testsuite/gcc.target/powerpc/mma-single-test.c +++ b/gcc/testsuite/gcc.target/powerpc/mma-single-test.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-require-effective-target ppc_mma_hw } */ /* { dg-options "-mdejagnu-cpu=power10 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/notoc-direct-1.c b/gcc/testsuite/gcc.target/powerpc/notoc-direct-1.c index 74187e1..8fa09b0 100644 --- a/gcc/testsuite/gcc.target/powerpc/notoc-direct-1.c +++ b/gcc/testsuite/gcc.target/powerpc/notoc-direct-1.c @@ -1,11 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-mdejagnu-cpu=power10 -O2 -mpcrel" } */ +/* { dg-options "-mdejagnu-cpu=power10 -O2" } */ /* { dg-require-effective-target powerpc_elfv2 } */ /* { dg-require-effective-target power10_ok } */ -/* Test that calls generated from PC-relative code are annotated with @notoc. - At present, -mcpu=power10 does not enable pc-relative mode. Enable it here - explicitly until it is turned on by default. */ +/* Test that calls generated from PC-relative code are annotated with + @notoc. */ extern int yy0 (int); extern void yy1 (int); @@ -40,4 +39,3 @@ int ww (void) /* { dg-final { scan-assembler {yy0@notoc} } } */ /* { dg-final { scan-assembler {zz1@notoc} } } */ /* { dg-final { scan-assembler {zz0@notoc} } } */ - diff --git a/gcc/testsuite/gcc.target/powerpc/p10-arch31.c b/gcc/testsuite/gcc.target/powerpc/p10-arch31.c index a9a75ec..d4ec18c 100644 --- a/gcc/testsuite/gcc.target/powerpc/p10-arch31.c +++ b/gcc/testsuite/gcc.target/powerpc/p10-arch31.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-mdejagnu-cpu=power10 -O2" } */ /* This test will only run when the power10_hw_available test passes. diff --git a/gcc/testsuite/gcc.target/powerpc/p10-identify.c b/gcc/testsuite/gcc.target/powerpc/p10-identify.c index 8532697..6b00abf 100644 --- a/gcc/testsuite/gcc.target/powerpc/p10-identify.c +++ b/gcc/testsuite/gcc.target/powerpc/p10-identify.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-mdejagnu-cpu=power10 -O2" } */ /* This test will only run when the power10_hw_available test passes. diff --git a/gcc/testsuite/gcc.target/powerpc/p9-dimode1.c b/gcc/testsuite/gcc.target/powerpc/p9-dimode1.c index b2cd3d6..9914f94 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-dimode1.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-dimode1.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-options "-mdejagnu-cpu=power9 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-dimode2.c b/gcc/testsuite/gcc.target/powerpc/p9-dimode2.c index c2196a2..6d74728 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-dimode2.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-dimode2.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-options "-mdejagnu-cpu=power9 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-extract-1.c b/gcc/testsuite/gcc.target/powerpc/p9-extract-1.c index c47ca5a..2b79145 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-extract-1.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-extract-1.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */ +/* { dg-do compile { target lp64 } } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-options "-mdejagnu-cpu=power9 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-extract-2.c b/gcc/testsuite/gcc.target/powerpc/p9-extract-2.c index 9ffb050..ffbc6b9 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-extract-2.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-extract-2.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */ +/* { dg-do compile { target lp64 } } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-options "-mdejagnu-cpu=power9 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-extract-3.c b/gcc/testsuite/gcc.target/powerpc/p9-extract-3.c index 15ce107..3c1361d 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-extract-3.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-extract-3.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */ +/* { dg-do compile { target lp64 } } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-options "-mdejagnu-cpu=power9 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-fpcvt-1.c b/gcc/testsuite/gcc.target/powerpc/p9-fpcvt-1.c index e7e9d9a..3ad8198 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-fpcvt-1.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-fpcvt-1.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-options "-mdejagnu-cpu=power9 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-fpcvt-2.c b/gcc/testsuite/gcc.target/powerpc/p9-fpcvt-2.c index 11999e4..c7ea1c2 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-fpcvt-2.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-fpcvt-2.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */ +/* { dg-do compile { target lp64 } } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-options "-mdejagnu-cpu=power9 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-1.c b/gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-1.c index e302f71..5539429 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-1.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-1.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-options "-mdejagnu-cpu=power9 -O3" } */ /* { dg-final { scan-assembler "lxvx" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-2.c b/gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-2.c index 0da44eb..edab616 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-2.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-2.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-options "-mdejagnu-cpu=power9 -O1" } */ /* { dg-final { scan-assembler "lxvx" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-3.c b/gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-3.c index 6d64a1b..3cb28ee 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-3.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-3.c @@ -1,4 +1,5 @@ -/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-do compile } */ +/* { dg-require-effective-target ppc_float128_sw } */ /* { dg-options "-mdejagnu-cpu=power9 -O3 -mfloat128" } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-final { scan-assembler "lxvx" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-minmax-1.c b/gcc/testsuite/gcc.target/powerpc/p9-minmax-1.c index 5a54bcb..686fdcc 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-minmax-1.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-minmax-1.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-options "-mdejagnu-cpu=power9 -O2 -mpower9-minmax -ffast-math" } */ /* { dg-final { scan-assembler-not "fsel" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-minmax-2.c b/gcc/testsuite/gcc.target/powerpc/p9-minmax-2.c index 94747b8..78a3d9a 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-minmax-2.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-minmax-2.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-options "-mdejagnu-cpu=power9 -O2 -mpower9-minmax" } */ /* { dg-final { scan-assembler-not "fsel" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-minmax-3.c b/gcc/testsuite/gcc.target/powerpc/p9-minmax-3.c index 141603e..3248b9a 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-minmax-3.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-minmax-3.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-options "-mdejagnu-cpu=power9 -O2 -mpower9-minmax" } */ /* { dg-final { scan-assembler-not "xsmaxcdp" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-permute.c b/gcc/testsuite/gcc.target/powerpc/p9-permute.c index cf2655a..b9bf05a 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-permute.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-permute.c @@ -1,6 +1,6 @@ -/* { dg-do compile { target { powerpc64*-*-* } } } */ -/* { dg-options "-mdejagnu-cpu=power9 -O2" } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-options "-mdejagnu-cpu=power9 -O2" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/p9-splat-1.c b/gcc/testsuite/gcc.target/powerpc/p9-splat-1.c index d0cb1cc..ecb8d26 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-splat-1.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-splat-1.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-do compile { target lp64 } } */ /* { dg-options "-mdejagnu-cpu=power9 -O2" } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-splat-2.c b/gcc/testsuite/gcc.target/powerpc/p9-splat-2.c index 4ad8a36..efbe7e1 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-splat-2.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-splat-2.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-do compile } */ /* { dg-options "-mdejagnu-cpu=power9 -O2" } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-splat-3.c b/gcc/testsuite/gcc.target/powerpc/p9-splat-3.c index 4384a23..3cfacb29 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-splat-3.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-splat-3.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-do compile } */ /* { dg-options "-mdejagnu-cpu=power9 -O2" } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-splat-4.c b/gcc/testsuite/gcc.target/powerpc/p9-splat-4.c index 7d08460..b317445 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-splat-4.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-splat-4.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */ +/* { dg-do compile { target lp64 } } */ /* { dg-options "-mdejagnu-cpu=power9 -O2" } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-vbpermd.c b/gcc/testsuite/gcc.target/powerpc/p9-vbpermd.c index 1252c54..b26a8f9 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-vbpermd.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-vbpermd.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target { powerpc64*-*-* } } } */ +/* { dg-do compile { target lp64 } } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-options "-mdejagnu-cpu=power9 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-vneg.c b/gcc/testsuite/gcc.target/powerpc/p9-vneg.c index 9e1c9bd3..7d6e9bc 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-vneg.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-vneg.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target { powerpc64*-*-* } } } */ +/* { dg-do compile { target lp64 } } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-options "-mdejagnu-cpu=power9 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-vparity.c b/gcc/testsuite/gcc.target/powerpc/p9-vparity.c index bd6c83d..f4aba15 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-vparity.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-vparity.c @@ -1,5 +1,6 @@ -/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */ +/* { dg-do compile { target lp64 } } */ /* { dg-skip-if "" { powerpc*-*-darwin* } } */ +/* { dg-require-effective-target int128 } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-options "-mdejagnu-cpu=power9 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-vpermr.c b/gcc/testsuite/gcc.target/powerpc/p9-vpermr.c index 9c77e33..6f87640 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-vpermr.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-vpermr.c @@ -1,4 +1,5 @@ -/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-do compile { target le } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-options "-mdejagnu-cpu=power9 -O2" } */ /* Test generation of VPERMR/XXPERMR on ISA 3.0 in little endian. */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-xxbr-1.c b/gcc/testsuite/gcc.target/powerpc/p9-xxbr-1.c index 8ef7880..a449dda 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-xxbr-1.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-xxbr-1.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target { powerpc*-*-* && { lp64 && p9vector_hw } } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-options "-mdejagnu-cpu=power9 -O3" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-xxbr-2.c b/gcc/testsuite/gcc.target/powerpc/p9-xxbr-2.c index de6d5ba..a14ac68 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-xxbr-2.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-xxbr-2.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */ +/* { dg-do compile { target lp64 } } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-options "-mdejagnu-cpu=power9 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-xxbr-3.c b/gcc/testsuite/gcc.target/powerpc/p9-xxbr-3.c index 98ad7eb..62a946f 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-xxbr-3.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-xxbr-3.c @@ -1,6 +1,6 @@ -/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ +/* { dg-do compile { target lp64 } } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ -/* { dg-options "-mpower9-vector -O2" } */ +/* { dg-options "-mdejagnu-cpu=power9 -O2" } */ /* Verify that the XXBR{H,W} instructions are generated if the value is forced to be in a vector register, and XXBRD is generated all of the diff --git a/gcc/testsuite/gcc.target/powerpc/pdep-1.c b/gcc/testsuite/gcc.target/powerpc/pdep-1.c index ab0efd2..458bcea 100644 --- a/gcc/testsuite/gcc.target/powerpc/pdep-1.c +++ b/gcc/testsuite/gcc.target/powerpc/pdep-1.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-require-effective-target lp64 } */ /* { dg-options "-mdejagnu-cpu=power10" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pextd-1.c b/gcc/testsuite/gcc.target/powerpc/pextd-1.c index ab08142..4f00cc9 100644 --- a/gcc/testsuite/gcc.target/powerpc/pextd-1.c +++ b/gcc/testsuite/gcc.target/powerpc/pextd-1.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-require-effective-target lp64 } */ /* { dg-options "-mdejagnu-cpu=power10" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr63335.c b/gcc/testsuite/gcc.target/powerpc/pr63335.c index 3398a56..27dbc0a 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr63335.c +++ b/gcc/testsuite/gcc.target/powerpc/pr63335.c @@ -1,4 +1,4 @@ -/* { dg-do run { target { powerpc64*-*-* } } } */ +/* { dg-do run } */ /* { dg-require-effective-target vsx_hw } */ /* { dg-options "-mvsx" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr64505.c b/gcc/testsuite/gcc.target/powerpc/pr64505.c index 8601f2d..42b961f 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr64505.c +++ b/gcc/testsuite/gcc.target/powerpc/pr64505.c @@ -1,231 +1,52 @@ -/* { dg-do compile { target { powerpc*-*-* && ilp32 } } } */ +/* { dg-do compile } */ /* { dg-skip-if "" { powerpc*-*-aix* } } */ -/* { dg-options "-O2 -mpowerpc64" } */ +/* { dg-options "-w -O2 -mpowerpc64" } */ /* - * (below is inlined and simplified from previously included headers) + * (below is minimized test case) */ -struct fltcom_st { - short fltbuf[950]; -} fltcom_ __attribute__((common)) ; -#define CM_PLIBOR (*(((double *)&fltcom_ + 1))) -#define CM_QMRG (*(((double *)&fltcom_ + 2))) +extern double pow(double x, double y); +extern long func (); +short global0, global1; +static int i0, i1, i2, i3, i4, i5; +double dbl, *array0, *array1; -struct fltcom2_st { - short fltbuf2[56]; -} fltcom2_ __attribute__((common)) ; -#define CM_FLPRV ((short *)&fltcom2_ + 17) -#define CM_FLNXT ((short *)&fltcom2_ + 20) -#define CM_FLCPN (*(((double *)&fltcom2_))) -#define CM_FLCNT (*(((short *)&fltcom2_ + 12))) - -struct aidatcm_st { - double cm_aid, cm_ext, cm_basis; - short cm_aiday, cm_exday, cm_dperd, cm_aiexf, cm_aidex, cm_aiok, - cm_aigdo, cm_aildo, cm_prev[3], cm_next[3], cm_aid_pad[2]; - double cm_rvgfact, cm_ai1st, cm_ai2nd; - int cm_aieurok; -} aidatcm_ __attribute__((common)) ; -#define CM_EXDAY aidatcm_.cm_exday -#define CM_BASIS aidatcm_.cm_basis -#define CM_PREV aidatcm_.cm_prev - -struct cshfcm_st { - short bufff[10862]; -} cshfcm_ __attribute__((common)) ; -#define CM_FNUM (*(((short *)&cshfcm_ + 9038))) -#define CM_FIFLX ((double *)&cshfcm_ + 1) -#define CM_FEXTX ((double *)&cshfcm_ + 1201) -#define CM_FSHDT ((short *)&cshfcm_ + 7230) - -struct calctsdb_st { - short calctsdbbuff[115]; -} calctsdb_ __attribute__((common)) ; -#define CM_CTUP_GOOD_TO_GO (*(((short *)&calctsdb_ + 16))) -#define CM_PAYMENT_FREQUENCY (*(((short *)&calctsdb_ + 61))) -#define CM_DISCOUNTING_DAYTYP (*(((short *)&calctsdb_ + 59))) - -struct cf600cm_st { - short bufcf[14404]; -} cf600cm_ __attribute__((common)) ; -#define CM_FLT_RFIXRATES ((double *)&cf600cm_ + 600) - -typedef struct { int id; int type; const char *name; } bregdb_bitinfo_t; - -int -bregdb_eval_bbitcxt_bool_rv(const bregdb_bitinfo_t * const bbit, - const int bbit_default, - const void * const bregucxt); - -static const bregdb_bitinfo_t bbit_calc_dr_d33 = - { 160667, 5, "bbit_calc_dr_d33" }; -#define bbit_calc_dr_d33__value() \ - bregdb_eval_bbitcxt_bool_rv(&bbit_calc_dr_d33, 0, 0) -static const bregdb_bitinfo_t bbit_calc_sx_b24 = - { 158854, 5, "bbit_calc_sx_b24" }; -#define bbit_calc_sx_b24__value() \ - bregdb_eval_bbitcxt_bool_rv(&bbit_calc_sx_b24, 0, 0) -static const bregdb_bitinfo_t bbit_calc_dr_d36 = - { 161244, 5, "bbit_calc_dr_d36" }; -#define bbit_calc_dr_d36__value() \ - bregdb_eval_bbitcxt_bool_rv(&bbit_calc_dr_d36, 0, 0) -static const bregdb_bitinfo_t bbit_calc_dr_d37 = - { 161315, 5, "bbit_calc_dr_d37" }; -#define bbit_calc_dr_d37__value() \ - bregdb_eval_bbitcxt_bool_rv(&bbit_calc_dr_d37, 0, 0) -static const bregdb_bitinfo_t bbit_calc_dr_d47 = - { 163259, 5, "bbit_calc_dr_d47" }; -#define bbit_calc_dr_d47__value() \ - bregdb_eval_bbitcxt_bool_rv(&bbit_calc_dr_d47, 0, 0) -static const bregdb_bitinfo_t bbit_calc_dr_d46 = - { 163239, 5, "bbit_calc_dr_d46" }; -#define bbit_calc_dr_d46__value() \ - bregdb_eval_bbitcxt_bool_rv(&bbit_calc_dr_d46, 0, 0) -static const bregdb_bitinfo_t bbit_calc_dr_d62 = - { 166603, 5, "bbit_calc_dr_d62" }; -#define bbit_calc_dr_d62__value() \ - bregdb_eval_bbitcxt_bool_rv(&bbit_calc_dr_d62, 0, 0) - - - -int dtyp_is_actact_(short *daytyp); -double rnd_trunc_numb(double in, short num_digits, short rnd_or_trunc); -void datetrn_(const short* dt, short* dt2); -short difday_(short* daytyp_in, short* srtdti, short* enddti, short* ercode); - - -double pow(double x, double y); - - -/* - * (above is inlined and simplified from previously included headers) - */ - - -void calc_1566( - short sCalcType, - short sDayType, - short sFreq, - short asSettleDt[3], - short asMtyDt[3], - short asIssueDt[3], - short asFCpnDt[3], - double dCpn, - short *psNoPer, - double *pdExt, - double *pdAI, - double *pdAI2, - double *pdFCpn, - short *psRcode) +void +pr64505 (short *arg0, double *arg1) { - - short ercode = 0; - int isactact; - short days_to_next_cpn = 0; - const short discDaytype = CM_DISCOUNTING_DAYTYP; - - if(bbit_calc_sx_b24__value()) - isactact = (dtyp_is_actact_(&sDayType) != 0); - else - isactact = (sDayType == 1 || sDayType == 10); - - short days_in_current_period = difday_(&sDayType,CM_FLPRV,CM_FLNXT,&ercode); - const short sfreq1 = (CM_CTUP_GOOD_TO_GO == 1 && CM_PAYMENT_FREQUENCY == 1); - - for (int j = 0; j < CM_FNUM; j++) { - - if(j == 0) { - days_to_next_cpn = difday_(&sDayType,asSettleDt,CM_FLNXT,&ercode); - - if(isactact) { - CM_FIFLX[j] = CM_FLCPN / sFreq; - CM_FEXTX[j] = (double)days_to_next_cpn / (double)days_in_current_period; - } - else { - CM_FIFLX[j] = CM_FLCPN * days_in_current_period; - CM_FEXTX[j] = (double)days_to_next_cpn / (double)(1/sfreq1); - } - - if(CM_FNUM == 1) { - CM_FEXTX[j] = (double)days_to_next_cpn / ((double)1/sfreq1); - } - } - else { - - short days_from_settle, days_in_period; - - if(bbit_calc_dr_d46__value()){ - days_from_settle = difday_(&sDayType,asSettleDt, - &CM_FSHDT[j*3],&ercode); - days_in_period = difday_(&sDayType,&CM_FSHDT[(j-1)*3], - &CM_FSHDT[j*3],&ercode); - } - - double cpn_rate = CM_PLIBOR; - - if(bbit_calc_dr_d62__value()) { - if(j < CM_FLCNT && CM_FLT_RFIXRATES[j] != 0) cpn_rate = CM_FLT_RFIXRATES[j]; - } - else { - if(j < CM_FLCNT ) cpn_rate = CM_FLT_RFIXRATES[j]; - } - - if(bbit_calc_dr_d37__value()&& j >= CM_FLCNT && sCalcType == 1570) { - cpn_rate = CM_PLIBOR + CM_QMRG; - - if(bbit_calc_dr_d36__value()){ - double projected_rate = pow((1 + CM_PLIBOR/100.0), - (days_in_period)) - 1; - - projected_rate = projected_rate + CM_QMRG/100.0 * days_in_period; - cpn_rate = 100 * projected_rate * (1/days_in_period); - } - } - - - if(isactact) { - CM_FIFLX[j] = cpn_rate / sFreq; - CM_FEXTX[j] = CM_FEXTX[j-1] + 1; - - if(bbit_calc_dr_d46__value() && discDaytype != 0) { - CM_FEXTX[j] = (double)days_from_settle / (double)(1/sfreq1); - } - } - else { - if(!bbit_calc_dr_d46__value()){ - days_from_settle = difday_(&sDayType,asSettleDt, - &CM_FSHDT[j*3],&ercode); - days_in_period = difday_(&sDayType,&CM_FSHDT[(j-1)*3], - &CM_FSHDT[j*3],&ercode); - - } - - CM_FIFLX[j] = cpn_rate * days_in_period; - CM_FEXTX[j] = (double)days_from_settle / (double)(1/sfreq1); - } - - } - - if(bbit_calc_dr_d33__value() && CM_CTUP_GOOD_TO_GO != 0) { - CM_FIFLX[j] = rnd_trunc_numb (CM_FIFLX[j], 0, 0); - } - + int error = 0; + short num = func (&global1 + 15, &error); + for (int j = 0; j < array0[0]; j++) + { + if (j == 0) + { + func (arg0, &global1 + 20, &error); + array0[0] = num; + } + else + { + double cr = (&dbl)[1]; + if (func (&i4)) + func (0, &(&array0)[j]); + if (func (&i5)) + { + if ((&global1)[12]) + cr = array1[j]; + } + if (func (&i2) + && (&global1)[12]) + { + if (func (&i1)) + pow ((&dbl)[1], 2); + } + array0[j] = cr; + } + if (func (&i0) && global0) + func (((short *) array0 + 1)[j]); } - - - short accrued_days = difday_(&sDayType,CM_FLPRV,asSettleDt,&ercode); - - if(!bbit_calc_dr_d47__value()) { - if(isactact) { - *pdAI = (CM_FLCPN / sFreq)* accrued_days / ((double)days_in_current_period); - } - else{ - *pdAI = (CM_FLCPN / sFreq)* accrued_days / ((double)1/sFreq); - } - } - - CM_EXDAY = days_to_next_cpn; - CM_BASIS = days_in_current_period; - datetrn_(CM_FLPRV,CM_PREV); + short ad = func (&global1 + 15, 0); + if (func (&i3) && func ()) + *arg1 = *((double *) &global1) * ad; + func (&global1 + 15); } diff --git a/gcc/testsuite/gcc.target/powerpc/pr67789.c b/gcc/testsuite/gcc.target/powerpc/pr67789.c index 371d7a3..05d01ef 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr67789.c +++ b/gcc/testsuite/gcc.target/powerpc/pr67789.c @@ -1,4 +1,5 @@ /* { dg-do assemble } */ +/* { dg-require-effective-target fpic } */ /* { dg-options "-O2 -msecure-plt -fPIC" } */ /* { dg-skip-if "" { powerpc*-*-darwin* powerpc-ibm-aix* } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr79439-1.c b/gcc/testsuite/gcc.target/powerpc/pr79439-1.c index 539c96f..8eb08a4 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr79439-1.c +++ b/gcc/testsuite/gcc.target/powerpc/pr79439-1.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */ -/* { dg-options "-O2 -fpic -fno-reorder-blocks -fno-inline-functions" } */ +/* { dg-options "-O2 -fpic -fno-reorder-blocks -fno-inline-functions -mno-pcrel" } */ /* On the Linux 64-bit ABIs, we eliminate NOP in the 'rec' call even if -fpic is used. The recursive call should call the local alias. The diff --git a/gcc/testsuite/gcc.target/powerpc/pr79439-2.c b/gcc/testsuite/gcc.target/powerpc/pr79439-2.c index b53af44..9ebcf25 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr79439-2.c +++ b/gcc/testsuite/gcc.target/powerpc/pr79439-2.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */ -/* { dg-options "-O2 -fpic -fno-reorder-blocks" } */ +/* { dg-options "-O2 -fpic -fno-reorder-blocks -mno-pcrel" } */ /* On the Linux 64-bit ABIs, we should not eliminate NOP in the 'rec' call if -fpic is used because rec can be interposed at link time (since it has an diff --git a/gcc/testsuite/gcc.target/powerpc/pr83629.c b/gcc/testsuite/gcc.target/powerpc/pr83629.c index 250378e..976b564 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr83629.c +++ b/gcc/testsuite/gcc.target/powerpc/pr83629.c @@ -1,4 +1,5 @@ /* { dg-require-effective-target ilp32 } */ +/* { dg-require-effective-target fpic } */ /* { dg-options "-O2 -fPIC -frename-registers --param=sched-autopref-queue-depth=0 -mdejagnu-cpu=603" } */ extern void bar (void *); diff --git a/gcc/testsuite/gcc.target/powerpc/pr84112.c b/gcc/testsuite/gcc.target/powerpc/pr84112.c index cd429df..8fbafa1 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr84112.c +++ b/gcc/testsuite/gcc.target/powerpc/pr84112.c @@ -1,4 +1,5 @@ -/* { dg-do compile { target powerpc*-*-* } }*/ +/* { dg-do compile } */ +/* { dg-require-effective-target fpic } */ /* { dg-options "-mdejagnu-cpu=power8 -O3 -fstack-protector-strong -fpic" } */ char *b; diff --git a/gcc/testsuite/gcc.target/powerpc/pr87507.c b/gcc/testsuite/gcc.target/powerpc/pr87507.c index a1d3d1b..ae7c1d8 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr87507.c +++ b/gcc/testsuite/gcc.target/powerpc/pr87507.c @@ -1,4 +1,5 @@ -/* { dg-do compile { target powerpc64le-*-* } } */ +/* { dg-do compile } */ +/* { dg-require-effective-target int128 } */ /* { dg-options "-O2 -mdejagnu-cpu=power8" } */ typedef struct diff --git a/gcc/testsuite/gcc.target/powerpc/pr93122.c b/gcc/testsuite/gcc.target/powerpc/pr93122.c index 8ea4eb6..97bcb0c 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr93122.c +++ b/gcc/testsuite/gcc.target/powerpc/pr93122.c @@ -1,7 +1,7 @@ /* PR target/93122 */ /* { dg-require-effective-target power10_ok } */ /* { dg-do compile { target lp64 } } */ -/* { dg-options "-fstack-clash-protection -mprefixed -mcpu=power10" } */ +/* { dg-options "-fstack-clash-protection -mprefixed -mdejagnu-cpu=power10" } */ void bar (char *); diff --git a/gcc/testsuite/gcc.target/powerpc/pr94740.c b/gcc/testsuite/gcc.target/powerpc/pr94740.c index 9c2b464..09decc3 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr94740.c +++ b/gcc/testsuite/gcc.target/powerpc/pr94740.c @@ -1,7 +1,7 @@ /* PR rtl-optimization/94740 */ /* { dg-do compile } */ /* { dg-require-effective-target power10_ok } */ -/* { dg-options "-O2 -mdejagnu-cpu=power10 -mpcrel" } */ +/* { dg-options "-O2 -mdejagnu-cpu=power10" } */ int array[8]; int diff --git a/gcc/testsuite/gcc.target/powerpc/pr96139-a.c b/gcc/testsuite/gcc.target/powerpc/pr96139-a.c index 12a3383..70f477f 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr96139-a.c +++ b/gcc/testsuite/gcc.target/powerpc/pr96139-a.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -Wall -m32 -mvsx" } */ +/* { dg-options "-O2 -Wall -mvsx" } */ /* { dg-require-effective-target ilp32 } */ /* { dg-require-effective-target powerpc_vsx_ok } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr96139-b.c b/gcc/testsuite/gcc.target/powerpc/pr96139-b.c index 379849a..3264a8e 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr96139-b.c +++ b/gcc/testsuite/gcc.target/powerpc/pr96139-b.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -Wall -m64 -mvsx" } */ +/* { dg-options "-O2 -Wall -mvsx" } */ /* { dg-require-effective-target lp64 } */ /* { dg-require-effective-target powerpc_vsx_ok } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr96787-2.c b/gcc/testsuite/gcc.target/powerpc/pr96787-2.c index b10ab7a8..8c4469d 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr96787-2.c +++ b/gcc/testsuite/gcc.target/powerpc/pr96787-2.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-O2 -mdejagnu-cpu=power10" } */ /* Verify that we generate an indirect sibcall for ELFv2 on P10 and diff --git a/gcc/testsuite/gcc.target/powerpc/pr96933-1.c b/gcc/testsuite/gcc.target/powerpc/pr96933-1.c new file mode 100644 index 0000000..3b63865 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr96933-1.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target lp64 } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-options "-O2 -mdejagnu-cpu=power9" } */ + +/* Test vector constructions with char/short type values whether use 128bit + direct move instructions mtvsrdd on Power9 or later, rather than transfering + with memory store/load with stb/sth and vector load. */ + +#include "pr96933.h" + +/* { dg-final { scan-assembler-times {\mmtvsrdd\M} 24 } } */ +/* { dg-final { scan-assembler-times {\mvpkudum\M} 12 } } */ +/* { dg-final { scan-assembler-not {\mstb\M} } } */ +/* { dg-final { scan-assembler-not {\msth\M} } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr96933-2.c b/gcc/testsuite/gcc.target/powerpc/pr96933-2.c new file mode 100644 index 0000000..cef8fbd --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr96933-2.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-O2 -mdejagnu-cpu=power8" } */ + +/* Test vector constructions with char/short type values whether use direct + move instructions like mtvsrd/mtvsrwz on Power8, rather than transfering + with memory store/load with stb/sth and vector load. */ + +#include "pr96933.h" + +/* { dg-final { scan-assembler-times {\mmtvsrd\M} 48 {target lp64 } } } */ +/* { dg-final { scan-assembler-times {\mmtvsrwz\M} 48 {target {! lp64 } } } } */ +/* { dg-final { scan-assembler-times {\mxxpermdi\M} 4 } } */ +/* { dg-final { scan-assembler-not {\mstb\M} } } */ +/* { dg-final { scan-assembler-not {\msth\M} } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr96933-3.c b/gcc/testsuite/gcc.target/powerpc/pr96933-3.c new file mode 100644 index 0000000..3e5709a --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr96933-3.c @@ -0,0 +1,10 @@ +/* { dg-do run } */ +/* { dg-require-effective-target p8vector_hw } */ +/* { dg-options "-O2 -mdejagnu-cpu=power8" } */ + +/* Test vector constructions with char/short run successfully on Power8. */ + +#include <stdlib.h> +#include "pr96933.h" +#include "pr96933-run.h" + diff --git a/gcc/testsuite/gcc.target/powerpc/pr96933-4.c b/gcc/testsuite/gcc.target/powerpc/pr96933-4.c new file mode 100644 index 0000000..5a1c3d0 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr96933-4.c @@ -0,0 +1,10 @@ +/* { dg-do run } */ +/* { dg-require-effective-target p9vector_hw } */ +/* { dg-options "-O2 -mdejagnu-cpu=power9" } */ + +/* Test vector constructions with char/short run successfully on Power9. */ + +#include <stdlib.h> +#include "pr96933.h" +#include "pr96933-run.h" + diff --git a/gcc/testsuite/gcc.target/powerpc/pr96933-run.h b/gcc/testsuite/gcc.target/powerpc/pr96933-run.h new file mode 100644 index 0000000..7fa8dac --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr96933-run.h @@ -0,0 +1,56 @@ +/* Test function for pr96933-{3,4}.c run result verification. */ + +int +main () +{ + unsigned char uc[16]; + signed char sc[16]; + + for (int i = 0; i < 16; i++) + { + uc[i] = (unsigned char) (i * 2 + 1); + sc[i] = (signed char) ((i % 2 == 0) ? (i + 1) : -i); + } + + vector unsigned char ucv + = test_uchar (uc[0], uc[1], uc[2], uc[3], uc[4], uc[5], uc[6], uc[7], uc[8], + uc[9], uc[10], uc[11], uc[12], uc[13], uc[14], uc[15]); + vector signed char scv + = test_schar (sc[0], sc[1], sc[2], sc[3], sc[4], sc[5], sc[6], sc[7], sc[8], + sc[9], sc[10], sc[11], sc[12], sc[13], sc[14], sc[15]); + + for (int i = 0; i < 16; i++) + { + unsigned char uexp = (unsigned char) (i * 2 + 1); + signed char sexp = (signed char) ((i % 2 == 0) ? (i + 1) : -i); + if (ucv[i] != uexp) + abort (); + if (scv[i] != sexp) + abort (); + } + + unsigned short us[8]; + signed short ss[8]; + for (int i = 0; i < 8; i++) + { + us[i] = (unsigned short) (i * 2 + 1); + ss[i] = (signed short) ((i % 2 == 0) ? (i + 1) : -i); + } + + vector unsigned short usv + = test_ushort (us[0], us[1], us[2], us[3], us[4], us[5], us[6], us[7]); + vector signed short ssv + = test_sshort (ss[0], ss[1], ss[2], ss[3], ss[4], ss[5], ss[6], ss[7]); + + for (int i = 0; i < 8; i++) + { + unsigned short uexp = (unsigned short) (i * 2 + 1); + signed short sexp = (signed short) ((i % 2 == 0) ? (i + 1) : -i); + if (usv[i] != uexp) + abort (); + if (ssv[i] != sexp) + abort (); + } + + return 0; +} diff --git a/gcc/testsuite/gcc.target/powerpc/pr96933.h b/gcc/testsuite/gcc.target/powerpc/pr96933.h new file mode 100644 index 0000000..4bc2b94 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr96933.h @@ -0,0 +1,50 @@ +/* Source file for pr96933-*.c testing, this mainly contains 4 + functions as below: + + - test_uchar // vector unsigned char + - test_schar // vector signed char + - test_ushort // vector unsigned short + - test_sshort // vector signed short +*/ + +__attribute__ ((noipa)) vector unsigned char +test_uchar (unsigned char c1, unsigned char c2, unsigned char c3, + unsigned char c4, unsigned char c5, unsigned char c6, + unsigned char c7, unsigned char c8, unsigned char c9, + unsigned char c10, unsigned char c11, unsigned char c12, + unsigned char c13, unsigned char c14, unsigned char c15, + unsigned char c16) +{ + vector unsigned char v + = {c1, c2, c3, c4, c5, c6, c7, c8, c9, c10, c11, c12, c13, c14, c15, c16}; + return v; +} + +__attribute__ ((noipa)) vector signed char +test_schar (signed char c1, signed char c2, signed char c3, signed char c4, + signed char c5, signed char c6, signed char c7, signed char c8, + signed char c9, signed char c10, signed char c11, signed char c12, + signed char c13, signed char c14, signed char c15, signed char c16) +{ + vector signed char v + = {c1, c2, c3, c4, c5, c6, c7, c8, c9, c10, c11, c12, c13, c14, c15, c16}; + return v; +} + +__attribute__ ((noipa)) vector unsigned short +test_ushort (unsigned short c1, unsigned short c2, unsigned short c3, + unsigned short c4, unsigned short c5, unsigned short c6, + unsigned short c7, unsigned short c8) +{ + vector unsigned short v = {c1, c2, c3, c4, c5, c6, c7, c8}; + return v; +} + +__attribute__ ((noipa)) vector signed short +test_sshort (signed short c1, signed short c2, signed short c3, + signed short c4, signed short c5, signed short c6, + signed short c7, signed short c8) +{ + vector signed short v = {c1, c2, c3, c4, c5, c6, c7, c8}; + return v; +} diff --git a/gcc/testsuite/gcc.target/powerpc/pr97267.c b/gcc/testsuite/gcc.target/powerpc/pr97267.c new file mode 100644 index 0000000..cab4624 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr97267.c @@ -0,0 +1,19 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +static int __attribute__ ((__noclone__, __noinline__)) +reg_args (int j1, int j2, int j3, int j4, int j5, int j6, int j7, int j8) +{ + return j1 + j2 + j3 + j4 + j5 + j6 + j7 + j8; +} + +int __attribute__ ((__noclone__, __noinline__)) +stack_args (int j1, int j2, int j3, int j4, int j5, int j6, int j7, int j8, + int j9) +{ + if (j9 == 0) + return 0; + return reg_args (j1, j2, j3, j4, j5, j6, j7, j8); +} + +/* { dg-final { scan-assembler-not {(?n)^\s+bl\s} } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr97360.c b/gcc/testsuite/gcc.target/powerpc/pr97360.c new file mode 100644 index 0000000..2328d28 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr97360.c @@ -0,0 +1,18 @@ +/* PR target/97360 */ +/* { dg-do compile } */ +/* { dg-require-effective-target power10_ok } */ +/* { dg-options "-O2 -mdejagnu-cpu=power10" } */ + +/* Verify we do not ICE on the test below. */ + +typedef unsigned char vec_t __attribute__((vector_size(16))); + +void +foo (__vector_quad *dst, __vector_pair *vpair, vec_t *vec) +{ + __vector_quad acc = *dst; + for (;;) + { + __builtin_mma_xvf64gerpp(&acc, *vpair, vec[7]); + } +} diff --git a/gcc/testsuite/gcc.target/powerpc/r2_shrink-wrap.c b/gcc/testsuite/gcc.target/powerpc/r2_shrink-wrap.c index b81b9b1..a74da38 100644 --- a/gcc/testsuite/gcc.target/powerpc/r2_shrink-wrap.c +++ b/gcc/testsuite/gcc.target/powerpc/r2_shrink-wrap.c @@ -1,5 +1,5 @@ /* { dg-do compile { target lp64 } } */ -/* { dg-options "-O2 -fdump-rtl-pro_and_epilogue" } */ +/* { dg-options "-O2 -fdump-rtl-pro_and_epilogue -mno-pcrel" } */ /* Verify we move the prologue past the TOC reference of 'j' and shrink-wrap the function. */ diff --git a/gcc/testsuite/gcc.target/powerpc/rlwimi-2.c b/gcc/testsuite/gcc.target/powerpc/rlwimi-2.c index 62344a9..bafa371 100644 --- a/gcc/testsuite/gcc.target/powerpc/rlwimi-2.c +++ b/gcc/testsuite/gcc.target/powerpc/rlwimi-2.c @@ -6,9 +6,10 @@ /* { dg-final { scan-assembler-times {(?n)^\s+blr} 6750 } } */ /* { dg-final { scan-assembler-times {(?n)^\s+mr} 643 { target ilp32 } } } */ /* { dg-final { scan-assembler-times {(?n)^\s+mr} 11 { target lp64 } } } */ -/* { dg-final { scan-assembler-times {(?n)^\s+rldicl} 6728 { target lp64 } } } */ +/* { dg-final { scan-assembler-times {(?n)^\s+rldicl} 7790 { target lp64 } } } */ -/* { dg-final { scan-assembler-times {(?n)^\s+rlwimi} 1692 } } */ +/* { dg-final { scan-assembler-times {(?n)^\s+rlwimi} 1692 { target ilp32 } } } */ +/* { dg-final { scan-assembler-times {(?n)^\s+rlwimi} 1666 { target lp64 } } } */ /* { dg-final { scan-assembler-times {(?n)^\s+mulli} 5036 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/sad-vectorize-1.c b/gcc/testsuite/gcc.target/powerpc/sad-vectorize-1.c index 1e4acf2..326a821 100644 --- a/gcc/testsuite/gcc.target/powerpc/sad-vectorize-1.c +++ b/gcc/testsuite/gcc.target/powerpc/sad-vectorize-1.c @@ -1,6 +1,5 @@ -/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ -/* { dg-skip-if "" { powerpc*-*-aix* } } */ /* { dg-options "-O3 -mdejagnu-cpu=power9" } */ /* Verify that we vectorize this SAD loop using vabsdub. */ diff --git a/gcc/testsuite/gcc.target/powerpc/sad-vectorize-2.c b/gcc/testsuite/gcc.target/powerpc/sad-vectorize-2.c index 8149870..3ae5c48 100644 --- a/gcc/testsuite/gcc.target/powerpc/sad-vectorize-2.c +++ b/gcc/testsuite/gcc.target/powerpc/sad-vectorize-2.c @@ -1,6 +1,5 @@ -/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ -/* { dg-skip-if "" { powerpc*-*-aix* } } */ /* { dg-options "-O3 -mdejagnu-cpu=power9" } */ /* Verify that we vectorize this SAD loop using vabsduh. */ diff --git a/gcc/testsuite/gcc.target/powerpc/sad-vectorize-3.c b/gcc/testsuite/gcc.target/powerpc/sad-vectorize-3.c index bb10fe6..2986abb 100644 --- a/gcc/testsuite/gcc.target/powerpc/sad-vectorize-3.c +++ b/gcc/testsuite/gcc.target/powerpc/sad-vectorize-3.c @@ -1,5 +1,5 @@ -/* { dg-do run { target { powerpc*-*-linux* && { lp64 && p9vector_hw } } } } */ -/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-do run } */ +/* { dg-require-effective-target p9vector_hw } */ /* { dg-options "-O3 -mdejagnu-cpu=power9" } */ /* Verify that we get correct code when we vectorize this SAD loop using diff --git a/gcc/testsuite/gcc.target/powerpc/sad-vectorize-4.c b/gcc/testsuite/gcc.target/powerpc/sad-vectorize-4.c index 15f5d14..d24e2a8 100644 --- a/gcc/testsuite/gcc.target/powerpc/sad-vectorize-4.c +++ b/gcc/testsuite/gcc.target/powerpc/sad-vectorize-4.c @@ -1,5 +1,5 @@ -/* { dg-do run { target { powerpc*-*-linux* && { lp64 && p9vector_hw } } } } */ -/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-do run } */ +/* { dg-require-effective-target p9vector_hw } */ /* { dg-options "-O3 -mdejagnu-cpu=power9" } */ /* Verify that we get correct code when we vectorize this SAD loop using diff --git a/gcc/testsuite/gcc.target/powerpc/signbit-1.c b/gcc/testsuite/gcc.target/powerpc/signbit-1.c index 552dd1b..eb4f53e 100644 --- a/gcc/testsuite/gcc.target/powerpc/signbit-1.c +++ b/gcc/testsuite/gcc.target/powerpc/signbit-1.c @@ -1,5 +1,5 @@ -/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } } */ +/* { dg-do compile } */ +/* { dg-require-effective-target ppc_float128_sw } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-options "-mdejagnu-cpu=power8 -O2 -mfloat128" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/signbit-2.c b/gcc/testsuite/gcc.target/powerpc/signbit-2.c index d17fc81..ff6af96 100644 --- a/gcc/testsuite/gcc.target/powerpc/signbit-2.c +++ b/gcc/testsuite/gcc.target/powerpc/signbit-2.c @@ -1,6 +1,6 @@ -/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-require-effective-target ppc_float128_sw } */ /* { dg-options "-mdejagnu-cpu=power9 -O2 -mfloat128" } */ int do_signbit_kf (__float128 *a) { return __builtin_signbit (*a); } diff --git a/gcc/testsuite/gcc.target/powerpc/signbit-3.c b/gcc/testsuite/gcc.target/powerpc/signbit-3.c index 68d641e..2d1ecb9 100644 --- a/gcc/testsuite/gcc.target/powerpc/signbit-3.c +++ b/gcc/testsuite/gcc.target/powerpc/signbit-3.c @@ -1,4 +1,4 @@ -/* { dg-do run { target { powerpc*-*-linux* } } } */ +/* { dg-do run } */ /* { dg-require-effective-target ppc_float128_sw } */ /* { dg-options "-mdejagnu-cpu=power7 -O2 -mfloat128 -lm" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-1.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-1.c index 7c98719..ff7b67d 100644 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-1.c +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-1.c @@ -1,4 +1,5 @@ -/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-do compile { target le } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-options "-mdejagnu-cpu=power8 -O3" } */ /* { dg-final { scan-assembler "lxvd2x" } } */ /* { dg-final { scan-assembler "stxvd2x" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-10.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-10.c index 501d8c2..4e5d70c 100644 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-10.c +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-10.c @@ -1,4 +1,5 @@ -/* { dg-do run { target { powerpc64le-*-* } } } */ +/* { dg-do run } */ +/* { dg-require-effective-target p8vector_hw } */ /* { dg-options "-mdejagnu-cpu=power8 -O3" } */ void abort (); diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-11.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-11.c index b90a5e9..b3d0e5a 100644 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-11.c +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-11.c @@ -1,4 +1,5 @@ -/* { dg-do run { target { powerpc64le-*-* } } } */ +/* { dg-do run } */ +/* { dg-require-effective-target p8vector_hw } */ /* { dg-options "-mdejagnu-cpu=power8 -O3" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-12.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-12.c index 8f9763c..c71918c 100644 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-12.c +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-12.c @@ -1,4 +1,5 @@ -/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-do compile { target le } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-options "-mdejagnu-cpu=power8 -O3" } */ /* { dg-final { scan-assembler "lxvd2x" } } */ /* { dg-final { scan-assembler "stxvd2x" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-13.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-13.c index a87735a..1fcaf53 100644 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-13.c +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-13.c @@ -1,4 +1,5 @@ -/* { dg-do run { target { powerpc64le-*-* } } } */ +/* { dg-do run } */ +/* { dg-require-effective-target p8vector_hw } */ /* { dg-options "-mdejagnu-cpu=power8 -O3" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-14.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-14.c index 15f834a..01c4d73 100644 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-14.c +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-14.c @@ -1,4 +1,5 @@ -/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-options "-mdejagnu-cpu=power8 -O3" } */ /* { dg-final { scan-assembler "lxvd2x" } } */ /* { dg-final { scan-assembler "stxvd2x" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-15.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-15.c index b7dd946..6b3534a 100644 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-15.c +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-15.c @@ -1,4 +1,5 @@ -/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-options "-mdejagnu-cpu=power8 -O3" } */ /* { dg-final { scan-assembler "lxvd2x" } } */ /* { dg-final { scan-assembler "stxvd2x" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-16.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-16.c index 46d2e85..e8205e1 100644 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-16.c +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-16.c @@ -1,4 +1,5 @@ -/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-options "-mdejagnu-cpu=power8 -O3" } */ /* { dg-final { scan-assembler "lxvd2x" } } */ /* { dg-final { scan-assembler "stxvd2x" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-17.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-17.c index e81d1f5..5edbca4 100644 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-17.c +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-17.c @@ -1,4 +1,5 @@ /* { dg-do compile { target { le } } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-options "-mdejagnu-cpu=power8 -O1 -mno-fold-gimple" } */ /* { dg-prune-output "gimple folding of rs6000 builtins has been disabled." } */ /* { dg-final { scan-assembler "lxvd2x" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-18.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-18.c index a6f3f1a..dadc420 100644 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-18.c +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-18.c @@ -1,4 +1,5 @@ -/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-options "-mdejagnu-cpu=power8 -O3" } */ /* { dg-final { scan-assembler-not "xxpermdi" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-19.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-19.c index f15cff0..d09db20 100644 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-19.c +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-19.c @@ -1,4 +1,5 @@ -/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-options "-O2 -ftree-vectorize -mdejagnu-cpu=power8 -ffast-math -fvect-cost-model=unlimited" } */ /* This tests special handling for various uses of xxpermdi, other than diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-2.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-2.c index 4c2c908..9b3c367 100644 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-2.c +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-2.c @@ -1,4 +1,5 @@ -/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-do compile { target le } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-options "-mdejagnu-cpu=power8 -O3" } */ /* { dg-final { scan-assembler "lxvd2x" } } */ /* { dg-final { scan-assembler "stxvd2x" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-20.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-20.c index 9b63bb4..564e8ac 100644 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-20.c +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-20.c @@ -1,4 +1,4 @@ -/* { dg-do run { target { powerpc64le-*-* } } } */ +/* { dg-do run } */ /* { dg-require-effective-target powerpc_altivec_ok } */ /* { dg-options "-O2 -mdejagnu-cpu=power8 -maltivec" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-21.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-21.c index 204a219..f50e265 100644 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-21.c +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-21.c @@ -1,4 +1,5 @@ -/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_altivec_ok } */ /* { dg-options "-O2 -mdejagnu-cpu=power8 -maltivec" } */ /* The expansion for vector character multiply introduces a vperm operation. diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-22.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-22.c index 6d262e3..847aebc 100644 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-22.c +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-22.c @@ -1,4 +1,5 @@ -/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-do compile { target { *-*-aix* || { *-*-linux* && lp64 } } } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-options "-O2 -mdejagnu-cpu=power8 -maltivec -mcmodel=large" } */ /* The expansion for vector character multiply introduces a vperm operation. diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-23.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-23.c index 84e3431..bcbc889 100644 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-23.c +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-23.c @@ -1,7 +1,8 @@ -/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-do compile { target le } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-options "-mdejagnu-cpu=power8 -O3 -ffast-math" } */ /* { dg-final { scan-assembler "lxvd2x" } } */ -/* { dg-final { scan-assembler-not "xxpermdi" } } */ +/* { dg-final { scan-assembler-not "xxpermdi" { target le } } } */ /* Verify that swap optimization works correctly in the presence of a V2DFmode reduction. */ diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-24.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-24.c index 29444c4..fdc9e96 100644 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-24.c +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-24.c @@ -1,4 +1,5 @@ -/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-options "-mdejagnu-cpu=power8 -O3 -ffast-math" } */ /* { dg-final { scan-assembler "lxvd2x" } } */ /* { dg-final { scan-assembler-not "xxpermdi" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-25.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-25.c index c782796..51fab6a 100644 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-25.c +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-25.c @@ -1,4 +1,5 @@ -/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-do compile { target le } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-options "-mdejagnu-cpu=power8 -O3 " } */ /* { dg-final { scan-assembler "lxvd2x" } } */ /* { dg-final { scan-assembler "stxvd2x" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-26.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-26.c index 8aef1cc..88f1dc6 100644 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-26.c +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-26.c @@ -1,4 +1,5 @@ -/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-options "-mdejagnu-cpu=power8 -O3 " } */ /* { dg-final { scan-assembler-times "lxvd2x" 2 } } */ /* { dg-final { scan-assembler "stxvd2x" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-27.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-27.c index af15c2c..758542a 100644 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-27.c +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-27.c @@ -1,4 +1,5 @@ -/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-options "-mdejagnu-cpu=power8 -O3 " } */ /* { dg-final { scan-assembler-times "lxvd2x" 2 } } */ /* { dg-final { scan-assembler-times "stxvd2x" 1 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-28.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-28.c index 5f9a867..f77fe51 100644 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-28.c +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-28.c @@ -1,4 +1,4 @@ -/* { dg-do run { target { powerpc*-*-* } } } */ +/* { dg-do run } */ /* { dg-require-effective-target p8vector_hw } */ /* { dg-options "-mdejagnu-cpu=power8 -O3 " } */ diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-29.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-29.c index 711e08e..ad3939f 100644 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-29.c +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-29.c @@ -1,4 +1,4 @@ -/* { dg-do run { target { powerpc*-*-* } } } */ +/* { dg-do run } */ /* { dg-require-effective-target p8vector_hw } */ /* { dg-options "-mdejagnu-cpu=power8 -O3 " } */ diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-3.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-3.c index f249965..a05d4cc 100644 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-3.c +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-3.c @@ -1,4 +1,5 @@ -/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-do compile { target le } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-options "-mdejagnu-cpu=power8 -O3" } */ /* { dg-final { scan-assembler "lxvd2x" } } */ /* { dg-final { scan-assembler "stxvd2x" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-30.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-30.c index 4745d72..03d63fd 100644 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-30.c +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-30.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-options "-mdejagnu-cpu=power8 -O3 " } */ diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-31.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-31.c index f4b7cf3..e31c880 100644 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-31.c +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-31.c @@ -1,4 +1,4 @@ -/* { dg-do run { target { powerpc*-*-* } } } */ +/* { dg-do run } */ /* { dg-require-effective-target p8vector_hw } */ /* { dg-options "-mdejagnu-cpu=power8 -O3 " } */ diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-32.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-32.c index 182d1b2..cafb5d4 100644 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-32.c +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-32.c @@ -1,4 +1,4 @@ -/* { dg-do run { target { powerpc*-*-* } } } */ +/* { dg-do run } */ /* { dg-require-effective-target p8vector_hw } */ /* { dg-options "-mdejagnu-cpu=power8 -O3 " } */ diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-33.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-33.c index 0216d62..6b53991 100644 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-33.c +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-33.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-options "-mdejagnu-cpu=power8 -O3 " } */ diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-34.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-34.c index 1037818..449e219 100644 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-34.c +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-34.c @@ -1,4 +1,4 @@ -/* { dg-do run { target { powerpc*-*-* } } } */ +/* { dg-do run } */ /* { dg-require-effective-target p8vector_hw } */ /* { dg-options "-mdejagnu-cpu=power8 -O3 " } */ diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-35.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-35.c index bef610f..2377ec25 100644 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-35.c +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-35.c @@ -1,4 +1,4 @@ -/* { dg-do run { target { powerpc*-*-* } } } */ +/* { dg-do run } */ /* { dg-require-effective-target p8vector_hw } */ /* { dg-options "-mdejagnu-cpu=power8 -O3 " } */ diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-36.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-36.c index 14c1e83..f05aee0 100644 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-36.c +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-36.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-options "-mdejagnu-cpu=power8 -O3 " } */ diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-37.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-37.c index a04ae52..e52d804 100644 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-37.c +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-37.c @@ -1,4 +1,4 @@ -/* { dg-do run { target { powerpc*-*-* } } } */ +/* { dg-do run } */ /* { dg-require-effective-target p8vector_hw } */ /* { dg-options "-mdejagnu-cpu=power8 -O3 " } */ diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-38.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-38.c index 4300416..b07fe8c 100644 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-38.c +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-38.c @@ -1,4 +1,4 @@ -/* { dg-do run { target { powerpc*-*-* } } } */ +/* { dg-do run } */ /* { dg-require-effective-target p8vector_hw } */ /* { dg-options "-mdejagnu-cpu=power8 -O3 " } */ diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-39.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-39.c index 1dc63f3..937828b 100644 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-39.c +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-39.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-options "-mdejagnu-cpu=power8 -O3 " } */ diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-4.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-4.c index 3867c05..7ec5977 100644 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-4.c +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-4.c @@ -1,4 +1,5 @@ -/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-do compile { target le } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-options "-mdejagnu-cpu=power8 -O3" } */ /* { dg-final { scan-assembler "lxvd2x" } } */ /* { dg-final { scan-assembler "stxvd2x" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-40.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-40.c index 3c9a67d..c5376d9 100644 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-40.c +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-40.c @@ -1,4 +1,4 @@ -/* { dg-do run { target { powerpc*-*-* } } } */ +/* { dg-do run } */ /* { dg-require-effective-target p8vector_hw } */ /* { dg-options "-mdejagnu-cpu=power8 -O3 " } */ diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-41.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-41.c index ec1b917..30afea7 100644 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-41.c +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-41.c @@ -1,4 +1,4 @@ -/* { dg-do run { target { powerpc*-*-* } } } */ +/* { dg-do run } */ /* { dg-require-effective-target p8vector_hw } */ /* { dg-options "-mdejagnu-cpu=power8 -O3 " } */ diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-42.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-42.c index e18b1f8..bd29d3f 100644 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-42.c +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-42.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-options "-mdejagnu-cpu=power8 -O3 " } */ diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-43.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-43.c index 8526c08..e9245e7 100644 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-43.c +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-43.c @@ -1,4 +1,4 @@ -/* { dg-do run { target { powerpc*-*-* } } } */ +/* { dg-do run } */ /* { dg-require-effective-target p8vector_hw } */ /* { dg-options "-mdejagnu-cpu=power8 -O3 " } */ diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-44.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-44.c index 4f4ac34..57a3a3e 100644 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-44.c +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-44.c @@ -1,4 +1,4 @@ -/* { dg-do run { target { powerpc*-*-* } } } */ +/* { dg-do run } */ /* { dg-require-effective-target p8vector_hw } */ /* { dg-options "-mdejagnu-cpu=power8 -O3 " } */ diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-45.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-45.c index 46d4303..716a8b4 100644 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-45.c +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-45.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-options "-mdejagnu-cpu=power8 -O3 " } */ diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-46.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-46.c index 1873b4b5..4738d5e 100644 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-46.c +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-46.c @@ -1,4 +1,4 @@ -/* { dg-do run { target { powerpc64le-*-* } } } */ +/* { dg-do run { target le } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-options "-mdejagnu-cpu=power8 -O2 " } */ diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-5.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-5.c index 885529d..3c73569 100644 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-5.c +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-5.c @@ -1,4 +1,5 @@ -/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-do compile { target le } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-options "-mdejagnu-cpu=power8 -O3" } */ /* { dg-final { scan-assembler "lxvd2x" } } */ /* { dg-final { scan-assembler "stxvd2x" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-6.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-6.c index c895eaa..c5cb8a8 100644 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-6.c +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-6.c @@ -1,4 +1,5 @@ -/* { dg-do run { target { powerpc64le-*-* } } } */ +/* { dg-do run } */ +/* { dg-require-effective-target p8vector_hw } */ /* { dg-options "-mdejagnu-cpu=power8 -O3" } */ void abort(); diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-7.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-7.c index dace627..767657e 100644 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-7.c +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-7.c @@ -1,4 +1,5 @@ -/* { dg-do run { target { powerpc64le-*-* } } } */ +/* { dg-do run } */ +/* { dg-require-effective-target p8vector_hw } */ /* { dg-options "-mdejagnu-cpu=power8 -O3" } */ void abort (); diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-8.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-8.c index 924229d..61f8ae1 100644 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-8.c +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-8.c @@ -1,4 +1,5 @@ -/* { dg-do run { target { powerpc64le-*-* } } } */ +/* { dg-do run } */ +/* { dg-require-effective-target p8vector_hw } */ /* { dg-options "-mdejagnu-cpu=power8 -O3" } */ void abort (); diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-9.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-9.c index dc6ea54..e76799c 100644 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-9.c +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-9.c @@ -1,4 +1,5 @@ -/* { dg-do run { target { powerpc64le-*-* } } } */ +/* { dg-do run } */ +/* { dg-require-effective-target p8vector_hw } */ /* { dg-options "-mdejagnu-cpu=power8 -O3" } */ void abort (); diff --git a/gcc/testsuite/gcc.target/powerpc/vadsdu-0.c b/gcc/testsuite/gcc.target/powerpc/vadsdu-0.c index 26c9e53..e02ba44 100644 --- a/gcc/testsuite/gcc.target/powerpc/vadsdu-0.c +++ b/gcc/testsuite/gcc.target/powerpc/vadsdu-0.c @@ -1,6 +1,5 @@ -/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ -/* { dg-skip-if "" { powerpc*-*-aix* } } */ /* { dg-options "-mdejagnu-cpu=power9" } */ /* This test should succeed on both 32- and 64-bit configurations. */ diff --git a/gcc/testsuite/gcc.target/powerpc/vadsdu-1.c b/gcc/testsuite/gcc.target/powerpc/vadsdu-1.c index 7c54cfe..2f02d39 100644 --- a/gcc/testsuite/gcc.target/powerpc/vadsdu-1.c +++ b/gcc/testsuite/gcc.target/powerpc/vadsdu-1.c @@ -1,6 +1,5 @@ -/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ -/* { dg-skip-if "" { powerpc*-*-aix* } } */ /* { dg-options "-mdejagnu-cpu=power9" } */ /* This test should succeed on both 32- and 64-bit configurations. */ diff --git a/gcc/testsuite/gcc.target/powerpc/vadsdu-2.c b/gcc/testsuite/gcc.target/powerpc/vadsdu-2.c index a2a668b..2530e67 100644 --- a/gcc/testsuite/gcc.target/powerpc/vadsdu-2.c +++ b/gcc/testsuite/gcc.target/powerpc/vadsdu-2.c @@ -1,6 +1,5 @@ -/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ -/* { dg-skip-if "" { powerpc*-*-aix* } } */ /* { dg-options "-mdejagnu-cpu=power9" } */ /* This test should succeed on both 32- and 64-bit configurations. */ diff --git a/gcc/testsuite/gcc.target/powerpc/vadsdu-3.c b/gcc/testsuite/gcc.target/powerpc/vadsdu-3.c index 9755c6f..17d7c8d 100644 --- a/gcc/testsuite/gcc.target/powerpc/vadsdu-3.c +++ b/gcc/testsuite/gcc.target/powerpc/vadsdu-3.c @@ -1,6 +1,5 @@ -/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ -/* { dg-skip-if "" { powerpc*-*-aix* } } */ /* { dg-options "-mdejagnu-cpu=power9" } */ /* This test should succeed on both 32- and 64-bit configurations. */ diff --git a/gcc/testsuite/gcc.target/powerpc/vadsdu-4.c b/gcc/testsuite/gcc.target/powerpc/vadsdu-4.c index 4a3dd41..d6e56cc 100644 --- a/gcc/testsuite/gcc.target/powerpc/vadsdu-4.c +++ b/gcc/testsuite/gcc.target/powerpc/vadsdu-4.c @@ -1,6 +1,5 @@ -/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ -/* { dg-skip-if "" { powerpc*-*-aix* } } */ /* { dg-options "-mdejagnu-cpu=power9" } */ /* This test should succeed on both 32- and 64-bit configurations. */ diff --git a/gcc/testsuite/gcc.target/powerpc/vadsdu-5.c b/gcc/testsuite/gcc.target/powerpc/vadsdu-5.c index 9d5947c..ff6d436 100644 --- a/gcc/testsuite/gcc.target/powerpc/vadsdu-5.c +++ b/gcc/testsuite/gcc.target/powerpc/vadsdu-5.c @@ -1,6 +1,5 @@ -/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ -/* { dg-skip-if "" { powerpc*-*-aix* } } */ /* { dg-options "-mdejagnu-cpu=power9" } */ /* This test should succeed on both 32- and 64-bit configurations. */ diff --git a/gcc/testsuite/gcc.target/powerpc/vadsdub-1.c b/gcc/testsuite/gcc.target/powerpc/vadsdub-1.c index 58f2797..a460962 100644 --- a/gcc/testsuite/gcc.target/powerpc/vadsdub-1.c +++ b/gcc/testsuite/gcc.target/powerpc/vadsdub-1.c @@ -1,6 +1,5 @@ -/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ -/* { dg-skip-if "" { powerpc*-*-aix* } } */ /* { dg-options "-mdejagnu-cpu=power9" } */ /* This test should succeed on both 32- and 64-bit configurations. */ diff --git a/gcc/testsuite/gcc.target/powerpc/vadsdub-2.c b/gcc/testsuite/gcc.target/powerpc/vadsdub-2.c index 1d51766..c3d1bc8 100644 --- a/gcc/testsuite/gcc.target/powerpc/vadsdub-2.c +++ b/gcc/testsuite/gcc.target/powerpc/vadsdub-2.c @@ -1,6 +1,5 @@ -/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ -/* { dg-skip-if "" { powerpc*-*-aix* } } */ /* { dg-options "-mdejagnu-cpu=power9" } */ /* This test should succeed on both 32- and 64-bit configurations. */ diff --git a/gcc/testsuite/gcc.target/powerpc/vadsduh-1.c b/gcc/testsuite/gcc.target/powerpc/vadsduh-1.c index 1084e75..d08395a 100644 --- a/gcc/testsuite/gcc.target/powerpc/vadsduh-1.c +++ b/gcc/testsuite/gcc.target/powerpc/vadsduh-1.c @@ -1,6 +1,5 @@ -/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ -/* { dg-skip-if "" { powerpc*-*-aix* } } */ /* { dg-options "-mdejagnu-cpu=power9" } */ /* This test should succeed on both 32- and 64-bit configurations. */ diff --git a/gcc/testsuite/gcc.target/powerpc/vadsduh-2.c b/gcc/testsuite/gcc.target/powerpc/vadsduh-2.c index 0448917..7f17694 100644 --- a/gcc/testsuite/gcc.target/powerpc/vadsduh-2.c +++ b/gcc/testsuite/gcc.target/powerpc/vadsduh-2.c @@ -1,6 +1,5 @@ -/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ -/* { dg-skip-if "" { powerpc*-*-aix* } } */ /* { dg-options "-mdejagnu-cpu=power9" } */ /* This test should succeed on both 32- and 64-bit configurations. */ diff --git a/gcc/testsuite/gcc.target/powerpc/vadsduw-1.c b/gcc/testsuite/gcc.target/powerpc/vadsduw-1.c index 4844e3e..8a809d5 100644 --- a/gcc/testsuite/gcc.target/powerpc/vadsduw-1.c +++ b/gcc/testsuite/gcc.target/powerpc/vadsduw-1.c @@ -1,6 +1,5 @@ -/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ -/* { dg-skip-if "" { powerpc*-*-aix* } } */ /* { dg-options "-mdejagnu-cpu=power9" } */ /* This test should succeed on both 32- and 64-bit configurations. */ diff --git a/gcc/testsuite/gcc.target/powerpc/vadsduw-2.c b/gcc/testsuite/gcc.target/powerpc/vadsduw-2.c index 021772f..a330f52 100644 --- a/gcc/testsuite/gcc.target/powerpc/vadsduw-2.c +++ b/gcc/testsuite/gcc.target/powerpc/vadsduw-2.c @@ -1,6 +1,5 @@ -/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ -/* { dg-skip-if "" { powerpc*-*-aix* } } */ /* { dg-options "-mdejagnu-cpu=power9" } */ /* This test should succeed on both 32- and 64-bit configurations. */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-blend-runnable.c b/gcc/testsuite/gcc.target/powerpc/vec-blend-runnable.c index 0c3d472..d63dfee 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-blend-runnable.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-blend-runnable.c @@ -1,11 +1,12 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ -/* { dg-options "-mdejagnu-cpu=power10" } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ +/* { dg-options "-mdejagnu-cpu=power10 -save-temps" } */ #include <altivec.h> #define DEBUG 0 -#ifdef DEBUG +#if DEBUG #include <stdio.h> #endif @@ -144,7 +145,8 @@ main (int argc, char *argv []) if (!vec_all_eq (vresult_ushort, expected_vresult_ushort)) { #if DEBUG - printf("ERROR, vec_blendv (vsrc_a_ushort, vsrc_b_ushort, vsrc_c_ushort)\n"); + printf("ERROR, vec_blendv (vsrc_a_ushort, vsrc_b_ushort, " + "vsrc_c_ushort)\n"); for(i = 0; i < 8; i++) printf(" vresult_ushort[%d] = %d, expected_vresult_ushort[%d] = %d\n", i, vresult_ushort[i], i, expected_vresult_ushort[i]); diff --git a/gcc/testsuite/gcc.target/powerpc/vec-cfuged-1.c b/gcc/testsuite/gcc.target/powerpc/vec-cfuged-1.c index 2a6f5ed..7507c63 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-cfuged-1.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-cfuged-1.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-mdejagnu-cpu=power10" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-clrl-1.c b/gcc/testsuite/gcc.target/powerpc/vec-clrl-1.c index 7f7d28b..43ab32c 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-clrl-1.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-clrl-1.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-mdejagnu-cpu=power10" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-clrl-3.c b/gcc/testsuite/gcc.target/powerpc/vec-clrl-3.c index 26eae79..0ae5abc 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-clrl-3.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-clrl-3.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-mdejagnu-cpu=power10" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-clrr-1.c b/gcc/testsuite/gcc.target/powerpc/vec-clrr-1.c index 307617e..c72ae86 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-clrr-1.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-clrr-1.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-mdejagnu-cpu=power10" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-clrr-3.c b/gcc/testsuite/gcc.target/powerpc/vec-clrr-3.c index b46995d..1413c11 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-clrr-3.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-clrr-3.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-mdejagnu-cpu=power10" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-cmp.c b/gcc/testsuite/gcc.target/powerpc/vec-cmp.c index 9d53038..eaeb4c6 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-cmp.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-cmp.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target { powerpc64*-*-* } } } */ +/* { dg-do compile { target lp64 } } */ /* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-options "-O2 -mdejagnu-cpu=power8" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-cmpne.c b/gcc/testsuite/gcc.target/powerpc/vec-cmpne.c index abde916..edba9de 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-cmpne.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-cmpne.c @@ -1,4 +1,4 @@ -/* { dg-do run { target { powerpc64*-*-* } } } */ +/* { dg-do run } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-options "-mvsx -O3" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-cntlzm-1.c b/gcc/testsuite/gcc.target/powerpc/vec-cntlzm-1.c index b92bccf..f356970 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-cntlzm-1.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-cntlzm-1.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-mdejagnu-cpu=power10" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-cnttzm-1.c b/gcc/testsuite/gcc.target/powerpc/vec-cnttzm-1.c index 83bdd95..b460c16 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-cnttzm-1.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-cnttzm-1.c @@ -1,5 +1,6 @@ -/* { dg-do compile } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-mdejagnu-cpu=power10" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-v16qi-df.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-v16qi-df.c index cfcb8d7..30a9366 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-extract-v16qi-df.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-extract-v16qi-df.c @@ -1,4 +1,4 @@ -/* { dg-do run { target { powerpc*-*-* } } } */ +/* { dg-do run } */ /* { dg-require-effective-target vsx_hw } */ /* { dg-options "-O2 -mvsx" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-v16qi.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-v16qi.c index a28cb2f..9be6517 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-extract-v16qi.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-extract-v16qi.c @@ -1,4 +1,4 @@ -/* { dg-do run { target { powerpc*-*-linux* } } } */ +/* { dg-do run } */ /* { dg-require-effective-target vsx_hw } */ /* { dg-options "-O2 -mvsx" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-v16qiu-df.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-v16qiu-df.c index 514de25..e70ba41 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-extract-v16qiu-df.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-extract-v16qiu-df.c @@ -1,4 +1,4 @@ -/* { dg-do run { target { powerpc*-*-* } } } */ +/* { dg-do run } */ /* { dg-require-effective-target vsx_hw } */ /* { dg-options "-O2 -mvsx" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-v16qiu.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-v16qiu.c index 431e6fc..6efd058 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-extract-v16qiu.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-extract-v16qiu.c @@ -1,4 +1,4 @@ -/* { dg-do run { target { powerpc*-*-linux* } } } */ +/* { dg-do run } */ /* { dg-require-effective-target vsx_hw } */ /* { dg-options "-O2 -mvsx" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-v2df.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-v2df.c index 34c9b00..43c17dd 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-extract-v2df.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-extract-v2df.c @@ -1,4 +1,4 @@ -/* { dg-do run { target { powerpc*-*-linux* } } } */ +/* { dg-do run } */ /* { dg-require-effective-target vsx_hw } */ /* { dg-options "-O2 -mvsx" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-v2di.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-v2di.c index 1e6f666..870113f 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-extract-v2di.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-extract-v2di.c @@ -1,4 +1,4 @@ -/* { dg-do run { target { powerpc*-*-linux* && lp64 } } } */ +/* { dg-do run { target lp64 } } */ /* { dg-require-effective-target vsx_hw } */ /* { dg-options "-O2 -mvsx" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-v4sf.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-v4sf.c index 518ff4a..17aed71 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-extract-v4sf.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-extract-v4sf.c @@ -1,4 +1,4 @@ -/* { dg-do run { target { powerpc*-*-linux* } } } */ +/* { dg-do run } */ /* { dg-require-effective-target vsx_hw } */ /* { dg-options "-O2 -mvsx" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-v4si-df.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-v4si-df.c index afcc7de..f4feb21 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-extract-v4si-df.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-extract-v4si-df.c @@ -1,4 +1,4 @@ -/* { dg-do run { target { powerpc*-*-* } } } */ +/* { dg-do run } */ /* { dg-require-effective-target vsx_hw } */ /* { dg-options "-O2 -mvsx" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-v4si.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-v4si.c index cf38423..5b72b9e 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-extract-v4si.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-extract-v4si.c @@ -1,4 +1,4 @@ -/* { dg-do run { target { powerpc*-*-linux* } } } */ +/* { dg-do run } */ /* { dg-require-effective-target vsx_hw } */ /* { dg-options "-O2 -mvsx" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-v4siu-df.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-v4siu-df.c index 071e492..f51a377 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-extract-v4siu-df.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-extract-v4siu-df.c @@ -1,4 +1,4 @@ -/* { dg-do run { target { powerpc*-*-* } } } */ +/* { dg-do run } */ /* { dg-require-effective-target vsx_hw } */ /* { dg-options "-O2 -mvsx" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-v4siu.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-v4siu.c index 1b85f90..01121e4 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-extract-v4siu.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-extract-v4siu.c @@ -1,4 +1,4 @@ -/* { dg-do run { target { powerpc*-*-linux* } } } */ +/* { dg-do run } */ /* { dg-require-effective-target vsx_hw } */ /* { dg-options "-O2 -mvsx" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-v8hi-df.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-v8hi-df.c index 4a15fb6..b7dfe42 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-extract-v8hi-df.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-extract-v8hi-df.c @@ -1,4 +1,4 @@ -/* { dg-do run { target { powerpc*-*-* } } } */ +/* { dg-do run } */ /* { dg-require-effective-target vsx_hw } */ /* { dg-options "-O2 -mvsx" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-v8hi.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-v8hi.c index ba1e338..245e1d8 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-extract-v8hi.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-extract-v8hi.c @@ -1,4 +1,4 @@ -/* { dg-do run { target { powerpc*-*-linux* } } } */ +/* { dg-do run } */ /* { dg-require-effective-target vsx_hw } */ /* { dg-options "-O2 -mvsx" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-v8hiu-df.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-v8hiu-df.c index ff45c17..3140bcd 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-extract-v8hiu-df.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-extract-v8hiu-df.c @@ -1,4 +1,4 @@ -/* { dg-do run { target { powerpc*-*-* } } } */ +/* { dg-do run } */ /* { dg-require-effective-target vsx_hw } */ /* { dg-options "-O2 -mvsx" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-v8hiu.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-v8hiu.c index 82581e1..6082b74 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-extract-v8hiu.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-extract-v8hiu.c @@ -1,4 +1,4 @@ -/* { dg-do run { target { powerpc*-*-linux* } } } */ +/* { dg-do run } */ /* { dg-require-effective-target vsx_hw } */ /* { dg-options "-O2 -mvsx" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extracth-1.c b/gcc/testsuite/gcc.target/powerpc/vec-extracth-1.c index 13618ce..8109abc 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-extracth-1.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-extracth-1.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-mdejagnu-cpu=power10" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extracth-3.c b/gcc/testsuite/gcc.target/powerpc/vec-extracth-3.c index 1d8a690..7ba9768 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-extracth-3.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-extracth-3.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-mdejagnu-cpu=power10" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extracth-5.c b/gcc/testsuite/gcc.target/powerpc/vec-extracth-5.c index 17229f4..c59dea0 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-extracth-5.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-extracth-5.c @@ -1,4 +1,6 @@ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-mdejagnu-cpu=power10" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extracth-7.c b/gcc/testsuite/gcc.target/powerpc/vec-extracth-7.c index 64ca22e..e74ea5c 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-extracth-7.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-extracth-7.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-mdejagnu-cpu=power10" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extractl-1.c b/gcc/testsuite/gcc.target/powerpc/vec-extractl-1.c index 879c253..4153956 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-extractl-1.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-extractl-1.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-mdejagnu-cpu=power10" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extractl-3.c b/gcc/testsuite/gcc.target/powerpc/vec-extractl-3.c index b3ab433..babd25f 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-extractl-3.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-extractl-3.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-mdejagnu-cpu=power10" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extractl-5.c b/gcc/testsuite/gcc.target/powerpc/vec-extractl-5.c index df239e8..e642e31 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-extractl-5.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-extractl-5.c @@ -1,4 +1,6 @@ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-mdejagnu-cpu=power10" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extractl-7.c b/gcc/testsuite/gcc.target/powerpc/vec-extractl-7.c index fd1ab60..4c3c7cb 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-extractl-7.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-extractl-7.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-mdejagnu-cpu=power10" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-gnb-1.c b/gcc/testsuite/gcc.target/powerpc/vec-gnb-1.c index 527cc3f..e64fe02 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-gnb-1.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-gnb-1.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-require-effective-target int128 } */ /* { dg-options "-mdejagnu-cpu=power10" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-init-1.c b/gcc/testsuite/gcc.target/powerpc/vec-init-1.c index 079e6d8..e222723 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-init-1.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-init-1.c @@ -1,4 +1,4 @@ -/* { dg-do run { target { powerpc*-*-linux* } } } */ +/* { dg-do run } */ /* { dg-require-effective-target vsx_hw } */ /* { dg-options "-O2 -mvsx" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-init-2.c b/gcc/testsuite/gcc.target/powerpc/vec-init-2.c index ddd41e2..75697e0 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-init-2.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-init-2.c @@ -1,4 +1,4 @@ -/* { dg-do run { target { powerpc*-*-linux* && lp64 } } } */ +/* { dg-do run { target lp64 } } */ /* { dg-require-effective-target vsx_hw } */ /* { dg-options "-O2 -mvsx" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-init-3.c b/gcc/testsuite/gcc.target/powerpc/vec-init-3.c index dc76c2b..3265e2a 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-init-3.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-init-3.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */ +/* { dg-do compile { target lp64 } } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-options "-mdejagnu-cpu=power9 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-init-4.c b/gcc/testsuite/gcc.target/powerpc/vec-init-4.c index 5e724c8..04d1742 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-init-4.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-init-4.c @@ -1,4 +1,4 @@ -/* { dg-do run { target { powerpc*-*-linux* } } } */ +/* { dg-do run } */ /* { dg-require-effective-target vsx_hw } */ /* { dg-options "-O2 -mvsx" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-init-5.c b/gcc/testsuite/gcc.target/powerpc/vec-init-5.c index 0059c48..87e1e4d 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-init-5.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-init-5.c @@ -1,4 +1,4 @@ -/* { dg-do run { target { powerpc*-*-linux* } } } */ +/* { dg-do run } */ /* { dg-require-effective-target vsx_hw } */ /* { dg-options "-O2 -mvsx" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-init-6.c b/gcc/testsuite/gcc.target/powerpc/vec-init-6.c index 0b90da0..3b17300 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-init-6.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-init-6.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */ +/* { dg-do compile { target lp64 } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-options "-mdejagnu-cpu=power8 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-init-7.c b/gcc/testsuite/gcc.target/powerpc/vec-init-7.c index e3350fe..f75177c 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-init-7.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-init-7.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */ +/* { dg-do compile { target lp64 } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-options "-mdejagnu-cpu=power8 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-init-8.c b/gcc/testsuite/gcc.target/powerpc/vec-init-8.c index 4393398..d3c2a33 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-init-8.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-init-8.c @@ -1,4 +1,4 @@ -/* { dg-do run { target { powerpc*-*-linux* } } } */ +/* { dg-do run } */ /* { dg-require-effective-target vsx_hw } */ /* { dg-options "-O2 -mvsx" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-init-9.c b/gcc/testsuite/gcc.target/powerpc/vec-init-9.c index 3515096..0bb4e7c 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-init-9.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-init-9.c @@ -1,4 +1,4 @@ -/* { dg-do run { target { powerpc*-*-linux* && lp64 } } } */ +/* { dg-do run { target lp64 } } */ /* { dg-require-effective-target vsx_hw } */ /* { dg-options "-O2 -mvsx" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-insert-word-runnable.c b/gcc/testsuite/gcc.target/powerpc/vec-insert-word-runnable.c index 8c2721a..bd96e13 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-insert-word-runnable.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-insert-word-runnable.c @@ -1,11 +1,12 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ -/* { dg-options "-mdejagnu-cpu=power10" } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ +/* { dg-options "-mdejagnu-cpu=power10 -save-temps" } */ #include <altivec.h> #define DEBUG 0 -#ifdef DEBUG +#if DEBUG #include <stdio.h> #endif diff --git a/gcc/testsuite/gcc.target/powerpc/vec-mul.c b/gcc/testsuite/gcc.target/powerpc/vec-mul.c index db57328..bfcaf80 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-mul.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-mul.c @@ -1,4 +1,4 @@ -/* { dg-do run { target { powerpc64*-*-* } } } */ +/* { dg-do run } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-options "-mvsx -O3" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-pdep-1.c b/gcc/testsuite/gcc.target/powerpc/vec-pdep-1.c index 02404a6d..d7e6484 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-pdep-1.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-pdep-1.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-mdejagnu-cpu=power10" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-permute-ext-runnable.c b/gcc/testsuite/gcc.target/powerpc/vec-permute-ext-runnable.c index c2dcd48..f833265 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-permute-ext-runnable.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-permute-ext-runnable.c @@ -1,11 +1,12 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ -/* { dg-options "-mdejagnu-cpu=power10" } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ +/* { dg-options "-mdejagnu-cpu=power10 -save-temps" } */ #include <altivec.h> #define DEBUG 0 -#ifdef DEBUG +#if DEBUG #include <stdio.h> #endif diff --git a/gcc/testsuite/gcc.target/powerpc/vec-pext-1.c b/gcc/testsuite/gcc.target/powerpc/vec-pext-1.c index ed289bf..286fdce 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-pext-1.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-pext-1.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-mdejagnu-cpu=power10" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-replace-word-runnable.c b/gcc/testsuite/gcc.target/powerpc/vec-replace-word-runnable.c index 94af210..9497cbf 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-replace-word-runnable.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-replace-word-runnable.c @@ -1,12 +1,13 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ -/* { dg-options "-mdejagnu-cpu=power10" } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ +/* { dg-options "-mdejagnu-cpu=power10 -save-temps" } */ #include <altivec.h> #define DEBUG 0 -#ifdef DEBUG +#if DEBUG #include <stdio.h> #endif @@ -212,7 +213,8 @@ main (int argc, char *argv []) if (!vec_all_eq (vresult_float, expected_vresult_float)) { #if DEBUG - printf("ERROR, vec_replace_unaligned (src_vb_float, src_va_float, index)\n"); + printf("ERROR, vec_replace_unaligned (src_vb_float, src_va_float, " + "index)\n"); for(i = 0; i < 4; i++) printf(" vresult_float[%d] = %f, expected_vresult_float[%d] = %f\n", i, vresult_float[i], i, expected_vresult_float[i]); @@ -233,7 +235,8 @@ main (int argc, char *argv []) if (!vec_all_eq (vresult_ullint, expected_vresult_ullint)) { #if DEBUG - printf("ERROR, vec_replace_unaligned (src_vb_ullint, src_va_ullint, index)\n"); + printf("ERROR, vec_replace_unaligned (src_vb_ullint, src_va_ullint, " + "index)\n"); for(i = 0; i < 2; i++) printf(" vresult_ullint[%d] = %d, expected_vresult_ullint[%d] = %d\n", i, vresult_ullint[i], i, expected_vresult_ullint[i]); @@ -252,7 +255,8 @@ main (int argc, char *argv []) if (!vec_all_eq (vresult_llint, expected_vresult_llint)) { #if DEBUG - printf("ERROR, vec_replace_unaligned (src_vb_llint, src_va_llint, index)\n"); + printf("ERROR, vec_replace_unaligned (src_vb_llint, src_va_llint, " + "index)\n"); for(i = 0; i < 2; i++) printf(" vresult_llint[%d] = %d, expected_vresult_llint[%d] = %d\n", i, vresult_llint[i], i, expected_vresult_llint[i]); @@ -270,8 +274,8 @@ main (int argc, char *argv []) if (!vec_all_eq (vresult_double, expected_vresult_double)) { #if DEBUG - printf("ERROR, vec_replace_unaligned (src_vb_double, src_va_double, index)\ -n"); + printf("ERROR, vec_replace_unaligned (src_vb_double, src_va_double, " + "index)\n"); for(i = 0; i < 2; i++) printf(" vresult_double[%d] = %f, expected_vresult_double[%d] = %f\n", i, vresult_double[i], i, expected_vresult_double[i]); diff --git a/gcc/testsuite/gcc.target/powerpc/vec-rlmi-rlnm.c b/gcc/testsuite/gcc.target/powerpc/vec-rlmi-rlnm.c index f0d9a71..1e7d739 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-rlmi-rlnm.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-rlmi-rlnm.c @@ -1,5 +1,4 @@ -/* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-require-effective-target lp64 } */ +/* { dg-do compile } /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-options "-O2 -mdejagnu-cpu=power9" } */ @@ -63,6 +62,6 @@ rlnm_test_2 (vector unsigned long long x, vector unsigned long long y, /* { dg-final { scan-assembler-times "vextsb2d" 1 } } */ /* { dg-final { scan-assembler-times "vslw" 1 } } */ /* { dg-final { scan-assembler-times "vsld" 1 } } */ -/* { dg-final { scan-assembler-times "xxlor" 2 } } */ +/* { dg-final { scan-assembler-times "xxlor" 3 } } */ /* { dg-final { scan-assembler-times "vrlwnm" 2 } } */ /* { dg-final { scan-assembler-times "vrldnm" 2 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-set-char.c b/gcc/testsuite/gcc.target/powerpc/vec-set-char.c index 841a917..eb7296d 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-set-char.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-set-char.c @@ -1,9 +1,9 @@ -#include <altivec.h> - -/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */ +/* { dg-do compile { target lp64 } } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-options "-mdejagnu-cpu=power9 -O2" } */ +#include <altivec.h> + vector char insert_0_0 (vector char v) { diff --git a/gcc/testsuite/gcc.target/powerpc/vec-set-int.c b/gcc/testsuite/gcc.target/powerpc/vec-set-int.c index e3217b4..6dc7d73 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-set-int.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-set-int.c @@ -1,9 +1,9 @@ -#include <altivec.h> - -/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */ +/* { dg-do compile { target lp64 } } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-options "-mdejagnu-cpu=power9 -O2" } */ +#include <altivec.h> + vector int insert_0_0 (vector int v) { diff --git a/gcc/testsuite/gcc.target/powerpc/vec-set-short.c b/gcc/testsuite/gcc.target/powerpc/vec-set-short.c index 2daf0a7..a03ada7 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-set-short.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-set-short.c @@ -1,9 +1,9 @@ -#include <altivec.h> - -/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */ +/* { dg-do compile { target lp64 } } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-options "-mdejagnu-cpu=power9 -O2" } */ +#include <altivec.h> + vector short insert_0_0 (vector short v) { diff --git a/gcc/testsuite/gcc.target/powerpc/vec-setup-double.c b/gcc/testsuite/gcc.target/powerpc/vec-setup-double.c index 36c6405..1f6d6fd 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-setup-double.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-setup-double.c @@ -1,4 +1,4 @@ -/* { dg-do run { target { powerpc*-*-linux* } } } */ +/* { dg-do run } */ /* { dg-require-effective-target vsx_hw } */ /* { dg-options "-O2 -mvsx" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-setup-long.c b/gcc/testsuite/gcc.target/powerpc/vec-setup-long.c index 5588e15..d33993c 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-setup-long.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-setup-long.c @@ -1,4 +1,4 @@ -/* { dg-do run { target { powerpc*-*-linux* } } } */ +/* { dg-do run } */ /* { dg-require-effective-target vsx_hw } */ /* { dg-options "-O2 -mvsx" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-shift-double-runnable.c b/gcc/testsuite/gcc.target/powerpc/vec-shift-double-runnable.c index 13213bd..90b19f0 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-shift-double-runnable.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-shift-double-runnable.c @@ -1,11 +1,12 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ -/* { dg-options "-mdejagnu-cpu=power10" } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ +/* { dg-options "-mdejagnu-cpu=power10 -save-temps" } */ #include <altivec.h> #define DEBUG 0 -#ifdef DEBUG +#if DEBUG #include <stdio.h> #endif @@ -378,7 +379,5 @@ main (int argc, char *argv []) return 0; } -/* { dg-final { scan-assembler-times {\msldbi\M} 6 } } */ -/* { dg-final { scan-assembler-times {\msrdbi\M} 6 } } */ - - +/* { dg-final { scan-assembler-times {\mvsldbi\M} 8 } } */ +/* { dg-final { scan-assembler-times {\mvsrdbi\M} 8 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-splati-runnable.c b/gcc/testsuite/gcc.target/powerpc/vec-splati-runnable.c index afb0bfd..e84ce77 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-splati-runnable.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-splati-runnable.c @@ -1,11 +1,12 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ -/* { dg-options "-mdejagnu-cpu=power10" } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ +/* { dg-options "-mdejagnu-cpu=power10 -save-temps" } */ #include <altivec.h> #define DEBUG 0 -#ifdef DEBUG +#if DEBUG #include <stdio.h> #endif @@ -100,7 +101,7 @@ main (int argc, char *argv []) printf(" vresult_d[%i] = %e, expected_vresult_d[%i] = %e\n", i, vresult_d[i], i, expected_vresult_d[i]); #else - abort(); + ; #endif } diff --git a/gcc/testsuite/gcc.target/powerpc/vec-stril-1.c b/gcc/testsuite/gcc.target/powerpc/vec-stril-1.c index 98ee29f..ce83f77 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-stril-1.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-stril-1.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-mdejagnu-cpu=power10" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-stril-16.c b/gcc/testsuite/gcc.target/powerpc/vec-stril-16.c index 6aaad99..ad888d8 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-stril-16.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-stril-16.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-O1 -mdejagnu-cpu=power10" } */ /* See vec-stril-17.c for the same test with -O2 optimization. */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-stril-17.c b/gcc/testsuite/gcc.target/powerpc/vec-stril-17.c index 2015aad..6274f2a 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-stril-17.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-stril-17.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-O2 -mdejagnu-cpu=power10" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-stril-18.c b/gcc/testsuite/gcc.target/powerpc/vec-stril-18.c index fce56937..be48daa 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-stril-18.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-stril-18.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-O1 -mdejagnu-cpu=power10" } */ /* See vec-stril-19.c for the same test with -O2 optimization. */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-stril-19.c b/gcc/testsuite/gcc.target/powerpc/vec-stril-19.c index 6226dde..74ab15c 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-stril-19.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-stril-19.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-O2 -mdejagnu-cpu=power10" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-stril-20.c b/gcc/testsuite/gcc.target/powerpc/vec-stril-20.c index 9da116c..a2db6a7 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-stril-20.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-stril-20.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-O1 -mdejagnu-cpu=power10" } */ /* See vec-stril-21.c for the same test with -O2 optimization. */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-stril-21.c b/gcc/testsuite/gcc.target/powerpc/vec-stril-21.c index b281c45..07274c68 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-stril-21.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-stril-21.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-O2 -mdejagnu-cpu=power10" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-stril-22.c b/gcc/testsuite/gcc.target/powerpc/vec-stril-22.c index a63dab7..a2e6bac 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-stril-22.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-stril-22.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-O1 -mdejagnu-cpu=power10" } */ /* See vec-stril-23.c for the same test with -O2 optimization. */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-stril-23.c b/gcc/testsuite/gcc.target/powerpc/vec-stril-23.c index ec0e483..a5ef78d 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-stril-23.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-stril-23.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-O2 -mdejagnu-cpu=power10" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-stril-3.c b/gcc/testsuite/gcc.target/powerpc/vec-stril-3.c index 970c1a1..49cb232 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-stril-3.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-stril-3.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-mdejagnu-cpu=power10" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-stril-5.c b/gcc/testsuite/gcc.target/powerpc/vec-stril-5.c index c74cad6..8e29d55 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-stril-5.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-stril-5.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-mdejagnu-cpu=power10" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-stril-7.c b/gcc/testsuite/gcc.target/powerpc/vec-stril-7.c index 9c5d454..6b39dfc 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-stril-7.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-stril-7.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-mdejagnu-cpu=power10" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-stril_p-1.c b/gcc/testsuite/gcc.target/powerpc/vec-stril_p-1.c index cd9c468..ca2c76c 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-stril_p-1.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-stril_p-1.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-mdejagnu-cpu=power10" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-stril_p-3.c b/gcc/testsuite/gcc.target/powerpc/vec-stril_p-3.c index 24b0a86..8fb3fe7 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-stril_p-3.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-stril_p-3.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-mdejagnu-cpu=power10" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-stril_p-5.c b/gcc/testsuite/gcc.target/powerpc/vec-stril_p-5.c index 2c2ff34..bc8834a 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-stril_p-5.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-stril_p-5.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-mdejagnu-cpu=power10" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-stril_p-7.c b/gcc/testsuite/gcc.target/powerpc/vec-stril_p-7.c index 900aaf1..d235a53 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-stril_p-7.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-stril_p-7.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-mdejagnu-cpu=power10" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-strir-1.c b/gcc/testsuite/gcc.target/powerpc/vec-strir-1.c index ff09cd3..5bee3f7 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-strir-1.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-strir-1.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-mdejagnu-cpu=power10" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-strir-16.c b/gcc/testsuite/gcc.target/powerpc/vec-strir-16.c index 19e051e..86a450e 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-strir-16.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-strir-16.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-O1 -mdejagnu-cpu=power10" } */ /* See vec-strir-17.c for the same test with -O2 optimization. */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-strir-17.c b/gcc/testsuite/gcc.target/powerpc/vec-strir-17.c index 00f27cc..d660092 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-strir-17.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-strir-17.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-O2 -mdejagnu-cpu=power10" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-strir-18.c b/gcc/testsuite/gcc.target/powerpc/vec-strir-18.c index d69b474..c6dd6ca 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-strir-18.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-strir-18.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-O1 -mdejagnu-cpu=power10" } */ /* See vec-strir-19.c for the same test with -O2 optimization. */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-strir-19.c b/gcc/testsuite/gcc.target/powerpc/vec-strir-19.c index 3728d49..54277cc 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-strir-19.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-strir-19.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-O2 -mdejagnu-cpu=power10" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-strir-20.c b/gcc/testsuite/gcc.target/powerpc/vec-strir-20.c index a635a04..3baa035 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-strir-20.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-strir-20.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-O1 -mdejagnu-cpu=power10" } */ /* See vec-strir-21.c for the same test with -O2 optimization. */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-strir-21.c b/gcc/testsuite/gcc.target/powerpc/vec-strir-21.c index 5557d5d..1a90e56 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-strir-21.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-strir-21.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-O2 -mdejagnu-cpu=power10" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-strir-22.c b/gcc/testsuite/gcc.target/powerpc/vec-strir-22.c index 328a56b..5621f3c 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-strir-22.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-strir-22.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-O1 -mdejagnu-cpu=power10" } */ /* See vec-strir-23.c for the same test with -O2 optimization. */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-strir-23.c b/gcc/testsuite/gcc.target/powerpc/vec-strir-23.c index 5f05ab2..118c702 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-strir-23.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-strir-23.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-O2 -mdejagnu-cpu=power10" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-strir-3.c b/gcc/testsuite/gcc.target/powerpc/vec-strir-3.c index 5fb2306..c266d3a 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-strir-3.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-strir-3.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-mdejagnu-cpu=power10" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-strir-5.c b/gcc/testsuite/gcc.target/powerpc/vec-strir-5.c index eabecaf..f18d91b 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-strir-5.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-strir-5.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-mdejagnu-cpu=power10" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-strir-7.c b/gcc/testsuite/gcc.target/powerpc/vec-strir-7.c index a73efea..2641985 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-strir-7.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-strir-7.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-mdejagnu-cpu=power10" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-strir_p-1.c b/gcc/testsuite/gcc.target/powerpc/vec-strir_p-1.c index 569b8b4..3744c90 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-strir_p-1.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-strir_p-1.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-mdejagnu-cpu=power10" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-strir_p-3.c b/gcc/testsuite/gcc.target/powerpc/vec-strir_p-3.c index 3a411fe..70ab0f6 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-strir_p-3.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-strir_p-3.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-mdejagnu-cpu=power10" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-strir_p-5.c b/gcc/testsuite/gcc.target/powerpc/vec-strir_p-5.c index 0edff34..ad02c97 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-strir_p-5.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-strir_p-5.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-mdejagnu-cpu=power10" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-strir_p-7.c b/gcc/testsuite/gcc.target/powerpc/vec-strir_p-7.c index 18926b0..71ce608 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-strir_p-7.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-strir_p-7.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-mdejagnu-cpu=power10" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-1.c b/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-1.c index 052d99d..3cd0a55 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-1.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-1.c @@ -1,5 +1,6 @@ -/* { dg-do run} */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-mdejagnu-cpu=power10" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-3.c b/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-3.c index 411bafe..9697068 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-3.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-3.c @@ -1,6 +1,7 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ -/* { dg-options "-mdejagnu-cpu=power10" } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ +/* { dg-options "-mdejagnu-cpu=power10 -save-temps" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-5.c b/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-5.c index 527e8f2..4d4344b 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-5.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-5.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-mdejagnu-cpu=power10" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-7.c b/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-7.c index b754195..45936f3 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-7.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-7.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-options "-mdejagnu-cpu=power10" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-9.c b/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-9.c index 0d9998e..bcf4a35 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-9.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-ternarylogic-9.c @@ -1,7 +1,8 @@ -/* { dg-do run } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ /* { dg-require-effective-target int128 } */ -/* { dg-options "-mdejagnu-cpu=power10" } */ +/* { dg-options "-mdejagnu-cpu=power10 -save-temps" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-xxpermdi.c b/gcc/testsuite/gcc.target/powerpc/vec-xxpermdi.c index d56276a..d57aca5 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-xxpermdi.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-xxpermdi.c @@ -1,4 +1,5 @@ -/* { dg-do run { target { powerpc64*-*-* && vsx_hw } } } */ +/* { dg-do run } */ +/* { dg-require-effective-target vsx_hw } */ /* { dg-options "-O2 -mvsx" } */ /* Added for PR79261 to test that vec_xxpermdi works correctly for diff --git a/gcc/testsuite/gcc.target/powerpc/vslv-0.c b/gcc/testsuite/gcc.target/powerpc/vslv-0.c index b7e5172..f921b2c 100644 --- a/gcc/testsuite/gcc.target/powerpc/vslv-0.c +++ b/gcc/testsuite/gcc.target/powerpc/vslv-0.c @@ -1,6 +1,5 @@ -/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ -/* { dg-skip-if "" { powerpc*-*-aix* } } */ /* { dg-options "-mdejagnu-cpu=power9" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vslv-1.c b/gcc/testsuite/gcc.target/powerpc/vslv-1.c index c1a58c8..37407c1 100644 --- a/gcc/testsuite/gcc.target/powerpc/vslv-1.c +++ b/gcc/testsuite/gcc.target/powerpc/vslv-1.c @@ -1,6 +1,5 @@ -/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ -/* { dg-skip-if "" { powerpc*-*-aix* } } */ /* { dg-options "-mdejagnu-cpu=power9" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vsrv-0.c b/gcc/testsuite/gcc.target/powerpc/vsrv-0.c index fc3be46..8ecd326 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsrv-0.c +++ b/gcc/testsuite/gcc.target/powerpc/vsrv-0.c @@ -1,6 +1,5 @@ -/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ -/* { dg-skip-if "" { powerpc*-*-aix* } } */ /* { dg-options "-mdejagnu-cpu=power9" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vsrv-1.c b/gcc/testsuite/gcc.target/powerpc/vsrv-1.c index 112899a..186e79a 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsrv-1.c +++ b/gcc/testsuite/gcc.target/powerpc/vsrv-1.c @@ -1,6 +1,5 @@ -/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ -/* { dg-skip-if "" { powerpc*-*-aix* } } */ /* { dg-options "-mdejagnu-cpu=power9" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/vsu/vec-xl-len-13.c b/gcc/testsuite/gcc.target/powerpc/vsu/vec-xl-len-13.c index 9de6424..1cfed57 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsu/vec-xl-len-13.c +++ b/gcc/testsuite/gcc.target/powerpc/vsu/vec-xl-len-13.c @@ -10,8 +10,8 @@ error should be issued because this built-in function is not available on 32-bit configurations. */ -__vector float +int fetch_data (float *address, size_t length) { - return __builtin_vec_lxvl (address, length); /* { dg-error "'__builtin_vec_lxvl' is not supported in this compiler configuration" } */ + return __builtin_vec_lxvl (address, length); /* { dg-warning "'__builtin_vec_lxvl'" } */ } diff --git a/gcc/testsuite/gcc.target/powerpc/vsu/vsu.exp b/gcc/testsuite/gcc.target/powerpc/vsu/vsu.exp index 627b771..68b7e5b 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsu/vsu.exp +++ b/gcc/testsuite/gcc.target/powerpc/vsu/vsu.exp @@ -17,8 +17,7 @@ # <http://www.gnu.org/licenses/>. # Exit immediately if this isn't a PowerPC target or if the target is aix. -if { (![istarget powerpc*-*-*] && ![istarget rs6000-*-*]) - || [istarget "powerpc*-*-aix*"] } then { +if { (![istarget powerpc*-*-*] && ![istarget rs6000-*-*]) } then { return } diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-char.c b/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-char.c new file mode 100644 index 0000000..c23a912 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-char.c @@ -0,0 +1,172 @@ +/* + Test of vec_xl_sext and vec_xl_zext (load into rightmost + vector element and zero/sign extend). */ + +/* { dg-do run { target power10_hw } } */ +/* { dg-do compile { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ +/* { dg-require-effective-target int128 } */ +/* { dg-options "-mdejagnu-cpu=power10 -O3 -save-temps" } */ + +/* At the time of writing, the number of lxvrbx instructions is + double what we expect because we are generating a + .constprop copy of the function. */ +/* { dg-final { scan-assembler-times {\mlxvrbx\M} 4 } } */ +/* { dg-final { scan-assembler-times {\mlbx\M} 0 } } */ + +#define NUM_VEC_ELEMS 16 +#define ITERS 16 + +/* +Codegen at time of writing is a lxvrbx for both the +zero and sign extended tests. The sign extension test +also uses mfvsr*d, extsb, mtvsrdd, vextsd2q. + +0000000010000c90 <test_sign_extended_load>: + 10000c90: 1a 18 04 7c lxvrbx vs0,r4,r3 + 10000c94: 66 00 0b 7c mfvsrd r11,vs0 + 10000c98: 66 02 0a 7c mfvsrld r10,vs0 + 10000c9c: 74 07 4a 7d extsb r10,r10 + 10000ca0: 67 53 40 7c mtvsrdd vs34,0,r10 + 10000ca4: 02 16 5b 10 vextsd2q v2,v2 + 10000ca8: 20 00 80 4e blr + +0000000010000cc0 <test_zero_extended_unsigned_load>: + 10000cc0: 1b 18 44 7c lxvrbx vs34,r4,r3 + 10000cc4: 20 00 80 4e blr +*/ + +#include <altivec.h> +#include <stdio.h> +#include <inttypes.h> +#include <string.h> +#include <stdlib.h> + +long long buffer[8]; +unsigned long verbose=0; + +char initbuffer[64] = { + 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, + 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f, 0x80, + 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, + 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f, 0x90, + 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, + 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf, 0xa0, + 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, + 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf, 0xb0 +}; + +vector signed __int128 signed_expected[16] = { + { (__int128) 0x0000000000000000 << 64 | (__int128) 0x0000000000000011}, + { (__int128) 0x0000000000000000 << 64 | (__int128) 0x0000000000000012}, + { (__int128) 0x0000000000000000 << 64 | (__int128) 0x0000000000000013}, + { (__int128) 0x0000000000000000 << 64 | (__int128) 0x0000000000000014}, + { (__int128) 0x0000000000000000 << 64 | (__int128) 0x0000000000000015}, + { (__int128) 0x0000000000000000 << 64 | (__int128) 0x0000000000000016}, + { (__int128) 0x0000000000000000 << 64 | (__int128) 0x0000000000000017}, + { (__int128) 0x0000000000000000 << 64 | (__int128) 0x0000000000000018}, + { (__int128) 0xffffffffffffffff << 64 | (__int128) 0xffffffffffffff89}, + { (__int128) 0xffffffffffffffff << 64 | (__int128) 0xffffffffffffff8a}, + { (__int128) 0xffffffffffffffff << 64 | (__int128) 0xffffffffffffff8b}, + { (__int128) 0xffffffffffffffff << 64 | (__int128) 0xffffffffffffff8c}, + { (__int128) 0xffffffffffffffff << 64 | (__int128) 0xffffffffffffff8d}, + { (__int128) 0xffffffffffffffff << 64 | (__int128) 0xffffffffffffff8e}, + { (__int128) 0xffffffffffffffff << 64 | (__int128) 0xffffffffffffff8f}, + { (__int128) 0xffffffffffffffff << 64 | (__int128) 0xffffffffffffff80} +}; + +vector unsigned __int128 unsigned_expected[16] = { + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x0000000000000011}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x0000000000000012}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x0000000000000013}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x0000000000000014}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x0000000000000015}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x0000000000000016}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x0000000000000017}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x0000000000000018}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x0000000000000089}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x000000000000008a}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x000000000000008b}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x000000000000008c}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x000000000000008d}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x000000000000008e}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x000000000000008f}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x0000000000000080} +}; + +__attribute__ ((noinline)) +vector signed __int128 test_sign_extended_load(int RA, signed char * RB) { + return vec_xl_sext (RA, RB); +} + +__attribute__ ((noinline)) +vector unsigned __int128 test_zero_extended_unsigned_load(int RA, unsigned char * RB) { + return vec_xl_zext (RA, RB); +} + +int main (int argc, char *argv []) +{ + int iteration=0; + int mismatch=0; + vector signed __int128 signed_result_v; + vector unsigned __int128 unsigned_result_v; +#if VERBOSE + verbose=1; + printf("%s %s\n", __DATE__, __TIME__); +#endif + + memcpy(&buffer, &initbuffer, sizeof(buffer)); + + if (verbose) { + printf("input buffer:\n"); + for (int k=0;k<64;k++) { + printf("%x ",initbuffer[k]); + if (k && (k+1)%16==0) printf("\n"); + } + printf("signed_expected:\n"); + for (int k=0;k<ITERS;k++) { + printf("%llx ",signed_expected[iteration][0]>>64); + printf(" %llx \n",signed_expected[iteration][0]&0xffffffffffffffff); + printf("\n"); + } + printf("unsigned_expected:\n"); + for (int k=0;k<ITERS;k++) { + printf("%llx ",signed_expected[iteration][0]>>64); + printf(" %llx \n",signed_expected[iteration][0]&0xffffffffffffffff); + printf("\n"); + } + } + + for (iteration = 0; iteration < ITERS ; iteration++ ) { + signed_result_v = test_sign_extended_load (iteration, (signed char*)buffer); + if (signed_result_v[0] != signed_expected[iteration][0] ) { + mismatch++; + printf("Unexpected results from signed load. i=%d \n", iteration); + printf("got: %llx ",signed_result_v[0]>>64); + printf(" %llx \n",signed_result_v[0]&0xffffffffffffffff); + printf("expected: %llx ",signed_expected[iteration][0]>>64); + printf(" %llx \n",signed_expected[iteration][0]&0xffffffffffffffff); + fflush(stdout); + } + } + + for (iteration = 0; iteration < ITERS ; iteration++ ) { + unsigned_result_v = test_zero_extended_unsigned_load (iteration, (unsigned char*)buffer); + if (unsigned_result_v[0] != unsigned_expected[iteration][0]) { + mismatch++; + printf("Unexpected results from unsigned load. i=%d \n", iteration); + printf("got: %llx ",unsigned_result_v[0]>>64); + printf(" %llx \n",unsigned_result_v[0]&0xffffffffffffffff); + printf("expected: %llx ",unsigned_expected[iteration][0]>>64); + printf(" %llx \n",unsigned_expected[iteration][0]&0xffffffffffffffff); + fflush(stdout); + } + } + + if (mismatch) { + printf("%d mismatches. \n",mismatch); + abort(); + } + return 0; +} + diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-int.c b/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-int.c new file mode 100644 index 0000000..c40e1a3 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-int.c @@ -0,0 +1,170 @@ +/* + Test of vec_xl_sext and vec_xl_zext (load into rightmost + vector element and zero/sign extend). */ + +/* { dg-do run { target power10_hw } } */ +/* { dg-do compile { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ +/* { dg-require-effective-target int128 } */ + +/* Deliberately set optization to zero for this test to confirm + the lxvr*x instruction is generated. At higher optimization levels + the instruction we are looking for is sometimes replaced by other + load instructions. */ +/* { dg-options "-mdejagnu-cpu=power10 -O0 -save-temps" } */ + +/* { dg-final { scan-assembler-times {\mlxvrwx\M} 2 } } */ + +#define NUM_VEC_ELEMS 4 +#define ITERS 16 + +/* +Codegen at time of writing is a single lxvrwx for the zero +extended test, and a lwax,mtvsrdd,vextsd2q for the sign +extended test. + +0000000010000c90 <test_sign_extended_load>: + 10000c90: aa 1a 24 7d lwax r9,r4,r3 + 10000c94: 67 4b 40 7c mtvsrdd vs34,0,r9 + 10000c98: 02 16 5b 10 vextsd2q v2,v2 + 10000c9c: 20 00 80 4e blr + +0000000010000cb0 <test_zero_extended_unsigned_load>: + 10000cb0: 9b 18 44 7c lxvrwx vs34,r4,r3 + 10000cb4: 20 00 80 4e blr +*/ + +#include <altivec.h> +#include <stdio.h> +#include <inttypes.h> +#include <string.h> +#include <stdlib.h> + +long long buffer[8]; +unsigned long verbose=0; + +char initbuffer[64] = { + 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, + 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f, 0x80, + 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, + 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f, 0x90, + 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, + 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf, 0xa0, + 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, + 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf, 0xb0 +}; + +vector signed __int128 signed_expected[16] = { + { (__int128) 0x0000000000000000 << 64 | (__int128) 0x0000000014131211}, + { (__int128) 0x0000000000000000 << 64 | (__int128) 0x0000000015141312}, + { (__int128) 0x0000000000000000 << 64 | (__int128) 0x0000000016151413}, + { (__int128) 0x0000000000000000 << 64 | (__int128) 0x0000000017161514}, + { (__int128) 0x0000000000000000 << 64 | (__int128) 0x0000000018171615}, + { (__int128) 0xffffffffffffffff << 64 | (__int128) 0xffffffff89181716}, + { (__int128) 0xffffffffffffffff << 64 | (__int128) 0xffffffff8a891817}, + { (__int128) 0xffffffffffffffff << 64 | (__int128) 0xffffffff8b8a8918}, + { (__int128) 0xffffffffffffffff << 64 | (__int128) 0xffffffff8c8b8a89}, + { (__int128) 0xffffffffffffffff << 64 | (__int128) 0xffffffff8d8c8b8a}, + { (__int128) 0xffffffffffffffff << 64 | (__int128) 0xffffffff8e8d8c8b}, + { (__int128) 0xffffffffffffffff << 64 | (__int128) 0xffffffff8f8e8d8c}, + { (__int128) 0xffffffffffffffff << 64 | (__int128) 0xffffffff808f8e8d}, + { (__int128) 0x0000000000000000 << 64 | (__int128) 0x0000000021808f8e}, + { (__int128) 0x0000000000000000 << 64 | (__int128) 0x000000002221808f}, + { (__int128) 0x0000000000000000 << 64 | (__int128) 0x0000000023222180} +}; + +vector unsigned __int128 unsigned_expected[16] = { + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x0000000014131211}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x0000000015141312}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x0000000016151413}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x0000000017161514}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x0000000018171615}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x0000000089181716}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x000000008a891817}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x000000008b8a8918}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x000000008c8b8a89}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x000000008d8c8b8a}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x000000008e8d8c8b}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x000000008f8e8d8c}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x00000000808f8e8d}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x0000000021808f8e}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x000000002221808f}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x0000000023222180} +}; + +__attribute__ ((noinline)) +vector signed __int128 test_sign_extended_load(int RA, signed int * RB) { + return vec_xl_sext (RA, RB); +} + +__attribute__ ((noinline)) +vector unsigned __int128 test_zero_extended_unsigned_load(int RA, unsigned int * RB) { + return vec_xl_zext (RA, RB); +} + +int main (int argc, char *argv []) +{ + int iteration=0; + int mismatch=0; + vector signed __int128 signed_result_v; + vector unsigned __int128 unsigned_result_v; +#if VERBOSE + verbose=1; + printf("%s %s\n", __DATE__, __TIME__); +#endif + + memcpy(&buffer, &initbuffer, sizeof(buffer)); + + if (verbose) { + printf("input buffer:\n"); + for (int k=0;k<64;k++) { + printf("%x ",initbuffer[k]); + if (k && (k+1)%16==0) printf("\n"); + } + printf("signed_expected:\n"); + for (int k=0;k<ITERS;k++) { + printf("%llx ",signed_expected[iteration][0]>>64); + printf(" %llx \n",signed_expected[iteration][0]&0xffffffffffffffff); + printf("\n"); + } + printf("unsigned_expected:\n"); + for (int k=0;k<ITERS;k++) { + printf("%llx ",signed_expected[iteration][0]>>64); + printf(" %llx \n",signed_expected[iteration][0]&0xffffffffffffffff); + printf("\n"); + } + } + + for (iteration = 0; iteration < ITERS ; iteration++ ) { + signed_result_v = test_sign_extended_load (iteration, (signed int*)buffer); + if (signed_result_v[0] != signed_expected[iteration][0] ) { + mismatch++; + printf("Unexpected results from signed load. i=%d \n", iteration); + printf("got: %llx ",signed_result_v[0]>>64); + printf(" %llx \n",signed_result_v[0]&0xffffffffffffffff); + printf("expected: %llx ",signed_expected[iteration][0]>>64); + printf(" %llx \n",signed_expected[iteration][0]&0xffffffffffffffff); + fflush(stdout); + } + } + + for (iteration = 0; iteration < ITERS ; iteration++ ) { + unsigned_result_v = test_zero_extended_unsigned_load (iteration, (unsigned int*)buffer); + if (unsigned_result_v[0] != unsigned_expected[iteration][0]) { + mismatch++; + printf("Unexpected results from unsigned load. i=%d \n", iteration); + printf("got: %llx ",unsigned_result_v[0]>>64); + printf(" %llx \n",unsigned_result_v[0]&0xffffffffffffffff); + printf("expected: %llx ",unsigned_expected[iteration][0]>>64); + printf(" %llx \n",unsigned_expected[iteration][0]&0xffffffffffffffff); + fflush(stdout); + } + } + + if (mismatch) { + printf("%d mismatches. \n",mismatch); + abort(); + } + return 0; +} + diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-longlong.c b/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-longlong.c new file mode 100644 index 0000000..405b424 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-longlong.c @@ -0,0 +1,171 @@ +/* + Test of vec_xl_sext and vec_xl_zext (load into rightmost + vector element and zero/sign extend). */ + +/* { dg-do run { target power10_hw } } */ +/* { dg-do compile { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ +/* { dg-require-effective-target int128 } */ +/* { dg-options "-mdejagnu-cpu=power10 -O3 -save-temps" } */ + +/* At time of writing, we also geenerate a .constrprop copy + of the function, so our instruction hit count is + twice of what we would otherwise expect. */ +/* { dg-final { scan-assembler-times {\mlxvrdx\M} 4 } } */ +/* { dg-final { scan-assembler-times {\mlvdx\M} 0 } } */ + +#define NUM_VEC_ELEMS 2 +#define ITERS 16 + +/* +Codegen at time of writing uses lxvrdx for both sign and +zero extend tests. The sign extended test also uses +mfvsr*d, mtvsrdd, vextsd2q. + +0000000010000c90 <test_sign_extended_load>: + 10000c90: da 18 04 7c lxvrdx vs0,r4,r3 + 10000c94: 66 00 0b 7c mfvsrd r11,vs0 + 10000c98: 66 02 0a 7c mfvsrld r10,vs0 + 10000c9c: 67 53 40 7c mtvsrdd vs34,0,r10 + 10000ca0: 02 16 5b 10 vextsd2q v2,v2 + 10000ca4: 20 00 80 4e blr + +0000000010000cc0 <test_zero_extended_unsigned_load>: + 10000cc0: db 18 44 7c lxvrdx vs34,r4,r3 + 10000cc4: 20 00 80 4e blr +*/ + +#include <altivec.h> +#include <stdio.h> +#include <inttypes.h> +#include <string.h> +#include <stdlib.h> + +long long buffer[8]; +unsigned long verbose=0; + +char initbuffer[64] = { + 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, + 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f, 0x80, + 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, + 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f, 0x90, + 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, + 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf, 0xa0, + 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, + 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf, 0xb0 +}; + +vector signed __int128 signed_expected[16] = { + { (__int128) 0x0000000000000000 << 64 | (__int128) 0x1817161514131211}, + { (__int128) 0xffffffffffffffff << 64 | (__int128) 0x8918171615141312}, + { (__int128) 0xffffffffffffffff << 64 | (__int128) 0x8a89181716151413}, + { (__int128) 0xffffffffffffffff << 64 | (__int128) 0x8b8a891817161514}, + { (__int128) 0xffffffffffffffff << 64 | (__int128) 0x8c8b8a8918171615}, + { (__int128) 0xffffffffffffffff << 64 | (__int128) 0x8d8c8b8a89181716}, + { (__int128) 0xffffffffffffffff << 64 | (__int128) 0x8e8d8c8b8a891817}, + { (__int128) 0xffffffffffffffff << 64 | (__int128) 0x8f8e8d8c8b8a8918}, + { (__int128) 0xffffffffffffffff << 64 | (__int128) 0x808f8e8d8c8b8a89}, + { (__int128) 0x0000000000000000 << 64 | (__int128) 0x21808f8e8d8c8b8a}, + { (__int128) 0x0000000000000000 << 64 | (__int128) 0x2221808f8e8d8c8b}, + { (__int128) 0x0000000000000000 << 64 | (__int128) 0x232221808f8e8d8c}, + { (__int128) 0x0000000000000000 << 64 | (__int128) 0x24232221808f8e8d}, + { (__int128) 0x0000000000000000 << 64 | (__int128) 0x2524232221808f8e}, + { (__int128) 0x0000000000000000 << 64 | (__int128) 0x262524232221808f}, + { (__int128) 0x0000000000000000 << 64 | (__int128) 0x2726252423222180} +}; + +vector unsigned __int128 unsigned_expected[16] = { + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x1817161514131211}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x8918171615141312}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x8a89181716151413}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x8b8a891817161514}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x8c8b8a8918171615}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x8d8c8b8a89181716}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x8e8d8c8b8a891817}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x8f8e8d8c8b8a8918}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x808f8e8d8c8b8a89}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x21808f8e8d8c8b8a}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x2221808f8e8d8c8b}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x232221808f8e8d8c}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x24232221808f8e8d}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x2524232221808f8e}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x262524232221808f}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x2726252423222180} +}; + +__attribute__ ((noinline)) +vector signed __int128 test_sign_extended_load(int RA, signed long long * RB) { + return vec_xl_sext (RA, RB); +} + +__attribute__ ((noinline)) +vector unsigned __int128 test_zero_extended_unsigned_load(int RA, unsigned long long * RB) { + return vec_xl_zext (RA, RB); +} + +int main (int argc, char *argv []) +{ + int iteration=0; + int mismatch=0; + vector signed __int128 signed_result_v; + vector unsigned __int128 unsigned_result_v; +#if VERBOSE + verbose=1; + printf("%s %s\n", __DATE__, __TIME__); +#endif + + memcpy(&buffer, &initbuffer, sizeof(buffer)); + + if (verbose) { + printf("input buffer:\n"); + for (int k=0;k<64;k++) { + printf("%x ",initbuffer[k]); + if (k && (k+1)%16==0) printf("\n"); + } + printf("signed_expected:\n"); + for (int k=0;k<ITERS;k++) { + printf("%llx ",signed_expected[iteration][0]>>64); + printf(" %llx \n",signed_expected[iteration][0]&0xffffffffffffffff); + printf("\n"); + } + printf("unsigned_expected:\n"); + for (int k=0;k<ITERS;k++) { + printf("%llx ",signed_expected[iteration][0]>>64); + printf(" %llx \n",signed_expected[iteration][0]&0xffffffffffffffff); + printf("\n"); + } + } + + for (iteration = 0; iteration < ITERS ; iteration++ ) { + signed_result_v = test_sign_extended_load (iteration, (signed long long*)buffer); + if (signed_result_v[0] != signed_expected[iteration][0] ) { + mismatch++; + printf("Unexpected results from signed load. i=%d \n", iteration); + printf("got: %llx ",signed_result_v[0]>>64); + printf(" %llx \n",signed_result_v[0]&0xffffffffffffffff); + printf("expected: %llx ",signed_expected[iteration][0]>>64); + printf(" %llx \n",signed_expected[iteration][0]&0xffffffffffffffff); + fflush(stdout); + } + } + + for (iteration = 0; iteration < ITERS ; iteration++ ) { + unsigned_result_v = test_zero_extended_unsigned_load (iteration, (unsigned long long*)buffer); + if (unsigned_result_v[0] != unsigned_expected[iteration][0]) { + mismatch++; + printf("Unexpected results from unsigned load. i=%d \n", iteration); + printf("got: %llx ",unsigned_result_v[0]>>64); + printf(" %llx \n",unsigned_result_v[0]&0xffffffffffffffff); + printf("expected: %llx ",unsigned_expected[iteration][0]>>64); + printf(" %llx \n",unsigned_expected[iteration][0]&0xffffffffffffffff); + fflush(stdout); + } + } + + if (mismatch) { + printf("%d mismatches. \n",mismatch); + abort(); + } + return 0; +} + diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-short.c b/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-short.c new file mode 100644 index 0000000..837ba79 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-short.c @@ -0,0 +1,170 @@ +/* + Test of vec_xl_sext and vec_xl_zext (load into rightmost + vector element and zero/sign extend). */ + +/* { dg-do run { target power10_hw } } */ +/* { dg-do compile { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ +/* { dg-require-effective-target int128 } */ + +/* Deliberately set optization to zero for this test to confirm + the lxvr*x instruction is generated. At higher optimization levels + the instruction we are looking for is sometimes replaced by other + load instructions. */ +/* { dg-options "-mdejagnu-cpu=power10 -O0 -save-temps" } */ + +/* { dg-final { scan-assembler-times {\mlxvrhx\M} 2 } } */ + +#define NUM_VEC_ELEMS 8 +#define ITERS 16 + +/* +Codegen at time of writing uses lxvrhx for the zero +extension test and lhax,mtvsrdd,vextsd2q for the +sign extended test. + +0000000010001810 <test_sign_extended_load>: + 10001810: ae 1a 24 7d lhax r9,r4,r3 + 10001814: 67 4b 40 7c mtvsrdd vs34,0,r9 + 10001818: 02 16 5b 10 vextsd2q v2,v2 + 1000181c: 20 00 80 4e blr + +0000000010001830 <test_zero_extended_unsigned_load>: + 10001830: 5b 18 44 7c lxvrhx vs34,r4,r3 + 10001834: 20 00 80 4e blr +*/ + +#include <altivec.h> +#include <stdio.h> +#include <inttypes.h> +#include <string.h> +#include <stdlib.h> + +long long buffer[8]; +unsigned long verbose=0; + +char initbuffer[64] = { + 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, + 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f, 0x80, + 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, + 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f, 0x90, + 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, + 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf, 0xa0, + 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, + 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf, 0xb0 +}; + +vector signed __int128 signed_expected[16] = { + { (__int128) 0x0000000000000000 << 64 | (__int128) 0x0000000000001211}, + { (__int128) 0x0000000000000000 << 64 | (__int128) 0x0000000000001312}, + { (__int128) 0x0000000000000000 << 64 | (__int128) 0x0000000000001413}, + { (__int128) 0x0000000000000000 << 64 | (__int128) 0x0000000000001514}, + { (__int128) 0x0000000000000000 << 64 | (__int128) 0x0000000000001615}, + { (__int128) 0x0000000000000000 << 64 | (__int128) 0x0000000000001716}, + { (__int128) 0x0000000000000000 << 64 | (__int128) 0x0000000000001817}, + { (__int128) 0xffffffffffffffff << 64 | (__int128) 0xffffffffffff8918}, + { (__int128) 0xffffffffffffffff << 64 | (__int128) 0xffffffffffff8a89}, + { (__int128) 0xffffffffffffffff << 64 | (__int128) 0xffffffffffff8b8a}, + { (__int128) 0xffffffffffffffff << 64 | (__int128) 0xffffffffffff8c8b}, + { (__int128) 0xffffffffffffffff << 64 | (__int128) 0xffffffffffff8d8c}, + { (__int128) 0xffffffffffffffff << 64 | (__int128) 0xffffffffffff8e8d}, + { (__int128) 0xffffffffffffffff << 64 | (__int128) 0xffffffffffff8f8e}, + { (__int128) 0xffffffffffffffff << 64 | (__int128) 0xffffffffffff808f}, + { (__int128) 0x0000000000000000 << 64 | (__int128) 0x0000000000002180} +}; + +vector unsigned __int128 unsigned_expected[16] = { + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x00000000000001211}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x00000000000001312}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x00000000000001413}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x00000000000001514}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x00000000000001615}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x00000000000001716}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x00000000000001817}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x00000000000008918}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x00000000000008a89}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x00000000000008b8a}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x00000000000008c8b}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x00000000000008d8c}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x00000000000008e8d}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x00000000000008f8e}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x0000000000000808f}, + { (unsigned __int128) 0x0000000000000000 << 64 | (unsigned __int128) 0x00000000000002180} +}; + +__attribute__ ((noinline)) +vector signed __int128 test_sign_extended_load(int RA, signed short * RB) { + return vec_xl_sext (RA, RB); +} + +__attribute__ ((noinline)) +vector unsigned __int128 test_zero_extended_unsigned_load(int RA, unsigned short * RB) { + return vec_xl_zext (RA, RB); +} + +int main (int argc, char *argv []) +{ + int iteration=0; + int mismatch=0; + vector signed __int128 signed_result_v; + vector unsigned __int128 unsigned_result_v; +#if VERBOSE + verbose=1; + printf("%s %s\n", __DATE__, __TIME__); +#endif + + memcpy(&buffer, &initbuffer, sizeof(buffer)); + + if (verbose) { + printf("input buffer:\n"); + for (int k=0;k<64;k++) { + printf("%x ",initbuffer[k]); + if (k && (k+1)%16==0) printf("\n"); + } + printf("signed_expected:\n"); + for (int k=0;k<ITERS;k++) { + printf("%llx ",signed_expected[iteration][0]>>64); + printf(" %llx \n",signed_expected[iteration][0]&0xffffffffffffffff); + printf("\n"); + } + printf("unsigned_expected:\n"); + for (int k=0;k<ITERS;k++) { + printf("%llx ",signed_expected[iteration][0]>>64); + printf(" %llx \n",signed_expected[iteration][0]&0xffffffffffffffff); + printf("\n"); + } + } + + for (iteration = 0; iteration < ITERS ; iteration++ ) { + signed_result_v = test_sign_extended_load (iteration, (signed short*)buffer); + if (signed_result_v[0] != signed_expected[iteration][0] ) { + mismatch++; + printf("Unexpected results from signed load. i=%d \n", iteration); + printf("got: %llx ",signed_result_v[0]>>64); + printf(" %llx \n",signed_result_v[0]&0xffffffffffffffff); + printf("expected: %llx ",signed_expected[iteration][0]>>64); + printf(" %llx \n",signed_expected[iteration][0]&0xffffffffffffffff); + fflush(stdout); + } + } + + for (iteration = 0; iteration < ITERS ; iteration++ ) { + unsigned_result_v = test_zero_extended_unsigned_load (iteration, (unsigned short*)buffer); + if (unsigned_result_v[0] != unsigned_expected[iteration][0]) { + mismatch++; + printf("Unexpected results from unsigned load. i=%d \n", iteration); + printf("got: %llx ",unsigned_result_v[0]>>64); + printf(" %llx \n",unsigned_result_v[0]&0xffffffffffffffff); + printf("expected: %llx ",unsigned_expected[iteration][0]>>64); + printf(" %llx \n",unsigned_expected[iteration][0]&0xffffffffffffffff); + fflush(stdout); + } + } + + if (mismatch) { + printf("%d mismatches. \n",mismatch); + abort(); + } + return 0; +} + diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-char.c b/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-char.c new file mode 100644 index 0000000..3049b1c --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-char.c @@ -0,0 +1,127 @@ +/* + Test of vec_xst_trunc (truncate and store rightmost vector element) */ + +/* { dg-do run { target power10_hw } } */ +/* { dg-do compile { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ +/* { dg-require-effective-target int128 } */ +/* Deliberately set optization to zero for this test to confirm + the stxvr*x instruction is generated. At higher optimization levels + the instruction we are looking for is sometimes replaced by other + store instructions. */ +/* { dg-options "-mdejagnu-cpu=power10 -O0 -save-temps" } */ + +/* { dg-final { scan-assembler-times {\mstxvrbx\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mstbx\M} 0 } } */ + +#include <altivec.h> +#include <stdio.h> +#include <inttypes.h> +#include <string.h> +#include <stdlib.h> + +vector signed __int128 store_this_s[4] = { +{ (__int128) 0x7000000000000000 << 64 | (__int128) 0x123456789abcdef8ULL}, +{ (__int128) 0x8000000000000000 << 64 | (__int128) 0xfedcba9876543217ULL}, +{ (__int128) 0x1000000000000000 << 64 | (__int128) 0xccccccccccccccccULL}, +{ (__int128) 0xf000000000000000 << 64 | (__int128) 0xaaaaaaaaaaaaaaaaULL} +}; + +vector unsigned __int128 store_this_us[4] = { +{ (unsigned __int128) 0x7000000000000000 << 64 | (unsigned __int128) 0x123456789abcdef8ULL}, +{ (unsigned __int128) 0x8000000000000000 << 64 | (unsigned __int128) 0xfedcba9876543217ULL}, +{ (unsigned __int128) 0x1000000000000000 << 64 | (unsigned __int128) 0xeeeeeeeeeeeeeeeeULL}, +{ (unsigned __int128) 0xf000000000000000 << 64 | (unsigned __int128) 0x5555555555555555ULL} +}; + +#define NUM_VEC_ELEMS 16 + +vector signed char signed_expected[4] = { + { 0xf8, 0x0, 0x0, 0x0, 0x0 , 0x0, 0x0, 0x0, 0x0 , 0x0, 0x0, 0x0, 0x0 , 0x0, 0x0, 0x0}, + { 0x0 , 0x0, 0x0, 0x0, 0x17, 0x0, 0x0, 0x0, 0x0 , 0x0, 0x0, 0x0, 0x0 , 0x0, 0x0, 0x0}, + { 0x0 , 0x0, 0x0, 0x0, 0x0 , 0x0, 0x0, 0x0, 0xcc, 0x0, 0x0, 0x0, 0x0 , 0x0, 0x0, 0x0}, + { 0x0 , 0x0, 0x0, 0x0, 0x0 , 0x0, 0x0, 0x0, 0x0 , 0x0, 0x0, 0x0, 0xaa, 0x0, 0x0, 0x0} +}; +vector unsigned char unsigned_expected[4] = { + { 0xf8, 0x0, 0x0, 0x0, 0x0 , 0x0, 0x0, 0x0, 0x0 , 0x0, 0x0, 0x0, 0x0 , 0x0, 0x0, 0x0}, + { 0x0 , 0x0, 0x0, 0x0, 0x17, 0x0, 0x0, 0x0, 0x0 , 0x0, 0x0, 0x0, 0x0 , 0x0, 0x0, 0x0}, + { 0x0 , 0x0, 0x0, 0x0, 0x0 , 0x0, 0x0, 0x0, 0xee, 0x0, 0x0, 0x0, 0x0 , 0x0, 0x0, 0x0}, + { 0x0 , 0x0, 0x0, 0x0, 0x0 , 0x0, 0x0, 0x0, 0x0 , 0x0, 0x0, 0x0, 0x55, 0x0, 0x0, 0x0} +}; + +unsigned long long rawbuffer[32]; +signed char * vsbuffer = (char *)rawbuffer; +unsigned char * vubuffer = (unsigned char *)rawbuffer; + +void reset_buffer() { + memset (&rawbuffer,0,sizeof(rawbuffer)); +} + +#define PRINT_VEC(V) \ + for (int j=0;j<NUM_VEC_ELEMS;j++) { printf ("(0x%lx) ", V[j] ); } + +void test_signed_store(vector signed __int128 myvec, int offset, signed char * store_data ) { + vec_xst_trunc (myvec, offset, store_data ); +} + +void test_unsigned_store(vector unsigned __int128 myvec, int offset, unsigned char * store_data ) { + vec_xst_trunc (myvec, offset, store_data ); +} + +int main (int argc, char *argv []) +{ + int i; + int memcmpresult; + int mismatch=0; + int verbose=0; + +#if VERBOSE + verbose=1; + printf("%s %s\n", __DATE__, __TIME__); +#endif + + if (verbose) { + printf("expected results from signed tests:\n"); + for (i = 0; i < 4 ; i++ ) { + PRINT_VEC(signed_expected[i]); + printf("\n"); + } + } + + for (i = 0; i < 4 ; i++ ) { + reset_buffer(); + test_signed_store (store_this_s[i], 4*i, vsbuffer); + memcmpresult = memcmp(rawbuffer,&signed_expected[i],sizeof(vector char)); + if (memcmpresult) { + printf("mismatch signed buffer, i %d (memcmpresult:%d) \n",i,memcmpresult); + mismatch++; + if (verbose) { + printf("results: "); + PRINT_VEC(vsbuffer); + printf("\n"); + } + } + } + + for (i = 0; i < 4 ; i++ ) { + reset_buffer(); + test_unsigned_store (store_this_us[i], 4*i, vubuffer); + memcmpresult = memcmp(rawbuffer,&unsigned_expected[i],sizeof(vector char)); + if (memcmpresult) { + printf("mismatch unsigned buffer, i %d (memcmpresult:%d) \n",i,memcmpresult); + mismatch++; + if (verbose) { + printf("results :"); + PRINT_VEC(vubuffer); + printf("\n"); + } + } + } + + if (mismatch) { + printf("%d mismatches. \n",mismatch); + abort(); + } + return 0; +} + diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-int.c b/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-int.c new file mode 100644 index 0000000..7cc7699 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-int.c @@ -0,0 +1,127 @@ +/* + Test of vec_xst_trunc (truncate and store rightmost vector element) */ + +/* { dg-do run { target power10_hw } } */ +/* { dg-do compile { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ +/* { dg-require-effective-target int128 } */ +/* Deliberately set optization to zero for this test to confirm + the stxvr*x instruction is generated. At higher optimization levels + the instruction we are looking for is sometimes replaced by other + store instructions. */ +/* { dg-options "-mdejagnu-cpu=power10 -O0 -save-temps" } */ + +/* { dg-final { scan-assembler-times {\mstxvrwx\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mstwx\M} 0 } } */ + +#include <altivec.h> +#include <stdio.h> +#include <inttypes.h> +#include <string.h> +#include <stdlib.h> + +vector signed __int128 store_this_s[4] = { +{ (__int128) 0x7000000000000000 << 64 | (__int128) 0x123456789abcdef8ULL}, +{ (__int128) 0x8000000000000000 << 64 | (__int128) 0xfedcba9876543217ULL}, +{ (__int128) 0x1000000000000000 << 64 | (__int128) 0xccccccccccccccccULL}, +{ (__int128) 0xf000000000000000 << 64 | (__int128) 0xaaaaaaaaaaaaaaaaULL} +}; + +vector unsigned __int128 store_this_us[4] = { +{ (unsigned __int128) 0x7000000000000000 << 64 | (unsigned __int128) 0x123456789abcdef8ULL}, +{ (unsigned __int128) 0x8000000000000000 << 64 | (unsigned __int128) 0xfedcba9876543217ULL}, +{ (unsigned __int128) 0x1000000000000000 << 64 | (unsigned __int128) 0xeeeeeeeeeeeeeeeeULL}, +{ (unsigned __int128) 0xf000000000000000 << 64 | (unsigned __int128) 0x5555555555555555ULL} +}; + +#define NUM_VEC_ELEMS 4 + +vector signed int signed_expected[4] = { + {0x9abcdef8, 0x0 , 0x0 , 0x0 }, + {0x0 , 0x76543217, 0x0 , 0x0 }, + {0x0 , 0x0 , 0xcccccccc, 0x0 }, + {0x0 , 0x0 , 0x0 , 0xaaaaaaaa }, +}; +vector unsigned int unsigned_expected[4] = { + {0x9abcdef8, 0x0 , 0x0 , 0x0 }, + {0x0 , 0x76543217, 0x0 , 0x0 }, + {0x0 , 0x0 , 0xeeeeeeee, 0x0 }, + {0x0 , 0x0 , 0x0 , 0x55555555 }, +}; + +unsigned long long rawbuffer[32]; +signed int * vsbuffer = (int *)rawbuffer; +unsigned int * vubuffer = (unsigned int *)rawbuffer; + +void reset_buffer() { + memset (&rawbuffer,0,sizeof(rawbuffer)); +} + +#define PRINT_VEC(V) \ + for (int j=0;j<NUM_VEC_ELEMS;j++) { printf ("(0x%lx) ", V[j] ); } + +void test_signed_store(vector signed __int128 myvec, int offset, signed int * store_data ) { + vec_xst_trunc (myvec, offset, store_data); +} + +void test_unsigned_store(vector unsigned __int128 myvec, int offset, unsigned int * store_data ) { + vec_xst_trunc (myvec, offset, store_data); +} + +int main (int argc, char *argv []) +{ + int i; + int memcmpresult; + int mismatch=0; + int verbose=0; + +#if VERBOSE + verbose=1; + printf("%s %s\n", __DATE__, __TIME__); +#endif + + if (verbose) { + printf("expected results from signed tests:\n"); + for (i = 0; i < 4 ; i++ ) { + PRINT_VEC(signed_expected[i]); + printf("\n"); + } + } + + for (i = 0; i < 4 ; i++ ) { + reset_buffer(); + test_signed_store (store_this_s[i], 4*i, vsbuffer); + memcmpresult = memcmp(rawbuffer,&signed_expected[i],sizeof(vector int)); + if (memcmpresult) { + printf("mismatch signed buffer, i %d (memcmpresult:%d) \n",i,memcmpresult); + mismatch++; + if (verbose) { + printf("results: "); + PRINT_VEC(vsbuffer); + printf("\n"); + } + } + } + + for (i = 0; i < 4 ; i++ ) { + reset_buffer(); + test_unsigned_store (store_this_us[i], 4*i, vubuffer); + memcmpresult = memcmp(rawbuffer,&unsigned_expected[i],sizeof(vector int)); + if (memcmpresult) { + printf("mismatch unsigned buffer, i %d (memcmpresult:%d) \n",i,memcmpresult); + mismatch++; + if (verbose) { + printf("results :"); + PRINT_VEC(vubuffer); + printf("\n"); + } + } + } + + if (mismatch) { + printf("%d mismatches. \n",mismatch); + abort(); + } + return 0; +} + diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-longlong.c b/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-longlong.c new file mode 100644 index 0000000..e1bd021 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-longlong.c @@ -0,0 +1,128 @@ +/* + Test of vec_xst_trunc (truncate and store rightmost vector element) */ + +/* { dg-do run { target power10_hw } } */ +/* { dg-do compile { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ +/* { dg-require-effective-target int128 } */ + +/* Deliberately set optization to zero for this test to confirm + the stxvr*x instruction is generated. At higher optimization levels + the instruction we are looking for is sometimes replaced by other + store instructions. */ +/* { dg-options "-mdejagnu-cpu=power10 -O0 -save-temps" } */ + +/* { dg-final { scan-assembler-times {\mstxvrdx\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mstwx\M} 0 } } */ + +#include <altivec.h> +#include <stdio.h> +#include <inttypes.h> +#include <string.h> +#include <stdlib.h> + +vector signed __int128 store_this_s[4] = { +{ (__int128) 0x7000000000000000 << 64 | (__int128) 0x123456789abcdef8ULL}, +{ (__int128) 0x8000000000000000 << 64 | (__int128) 0xfedcba9876543217ULL}, +{ (__int128) 0x1000000000000000 << 64 | (__int128) 0xccccccccccccccccULL}, +{ (__int128) 0xf000000000000000 << 64 | (__int128) 0xaaaaaaaaaaaaaaaaULL} +}; + +vector unsigned __int128 store_this_us[4] = { +{ (unsigned __int128) 0x7000000000000000 << 64 | (unsigned __int128) 0x123456789abcdef8ULL}, +{ (unsigned __int128) 0x8000000000000000 << 64 | (unsigned __int128) 0xfedcba9876543217ULL}, +{ (unsigned __int128) 0x1000000000000000 << 64 | (unsigned __int128) 0xeeeeeeeeeeeeeeeeULL}, +{ (unsigned __int128) 0xf000000000000000 << 64 | (unsigned __int128) 0x5555555555555555ULL} +}; + +#define NUM_VEC_ELEMS 2 + +vector signed long long signed_expected[5] = { + { 0x123456789abcdef8, 0x0}, + { 0x7654321700000000, 0xfedcba98}, + { 0x0000000000000000, 0xcccccccccccccccc}, + { 0x0000000000000000, 0xaaaaaaaa00000000} /*note that some data written into the next word */ +}; +vector unsigned long long unsigned_expected[5] = { + { 0x123456789abcdef8, 0x0}, + { 0x7654321700000000, 0xfedcba98}, + { 0x0000000000000000, 0xeeeeeeeeeeeeeeee}, + { 0x0000000000000000, 0x5555555500000000} +}; + +unsigned long long rawbuffer[32]; +signed long long * vsbuffer = (long long *)rawbuffer; +unsigned long long * vubuffer = (unsigned long long *)rawbuffer; + +void reset_buffer() { + memset (&rawbuffer,0,sizeof(rawbuffer)); +} + +#define PRINT_VEC(V) \ + for (int j=0;j<NUM_VEC_ELEMS;j++) { printf ("(0x%lx) ", V[j] ); } + +void test_signed_store(vector signed __int128 myvec, int offset, signed long long * store_data ) { + vec_xst_trunc (myvec, offset, store_data); +} + +void test_unsigned_store(vector unsigned __int128 myvec, int offset, unsigned long long * store_data ) { + vec_xst_trunc (myvec, offset, store_data); +} + +int main (int argc, char *argv []) +{ + int i; + int memcmpresult; + int mismatch=0; + int verbose=0; + +#if VERBOSE + verbose=1; + printf("%s %s\n", __DATE__, __TIME__); +#endif + + if (verbose) { + printf("expected results from signed tests:\n"); + for (i = 0; i < 4 ; i++ ) { + PRINT_VEC(signed_expected[i]); + printf("\n"); + } + } + + for (i = 0; i < 4 ; i++ ) { + reset_buffer(); + test_signed_store (store_this_s[i], 4*i, vsbuffer); + memcmpresult = memcmp(rawbuffer,&signed_expected[i],sizeof(vector long long)); + if (memcmpresult) { + printf("mismatch signed buffer, i %d (memcmpresult:%d) \n",i,memcmpresult); + mismatch++; + if (verbose) { + printf("results: "); + PRINT_VEC(vsbuffer); + printf("\n"); + } + } + } + + for (i = 0; i < 4 ; i++ ) { + reset_buffer(); + test_unsigned_store (store_this_us[i], 4*i, vubuffer); + memcmpresult = memcmp(rawbuffer,&unsigned_expected[i],sizeof(vector long long)); + if (memcmpresult) { + printf("mismatch unsigned buffer, i %d (memcmpresult:%d) \n",i,memcmpresult); + mismatch++; + if (verbose) { + printf("results :"); + PRINT_VEC(vubuffer); + printf("\n"); + } + } + } + + if (mismatch) { + printf("%d mismatches. \n",mismatch); + abort(); + } + return 0; +} + diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-short.c b/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-short.c new file mode 100644 index 0000000..b173b36 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-short.c @@ -0,0 +1,128 @@ +/* + Test of vec_xst_trunc (truncate and store rightmost vector element) */ + +/* { dg-do run { target power10_hw } } */ +/* { dg-do compile { target { ! power10_hw } } } */ +/* { dg-require-effective-target power10_ok } */ +/* { dg-require-effective-target int128 } */ + +/* Deliberately set optization to zero for this test to confirm + the stxvr*x instruction is generated. At higher optimization levels + the instruction we are looking for is sometimes replaced by other + store instructions. */ +/* { dg-options "-mdejagnu-cpu=power10 -O0 -save-temps" } */ + +/* { dg-final { scan-assembler-times {\mstxvrhx\M} 2 } } */ +/* { dg-final { scan-assembler-times {\msthx\M} 0 } } */ + +#include <altivec.h> +#include <stdio.h> +#include <inttypes.h> +#include <string.h> +#include <stdlib.h> + +vector signed __int128 store_this_s[4] = { +{ (__int128) 0x7000000000000000 << 64 | (__int128) 0x123456789abcdef8ULL}, +{ (__int128) 0x8000000000000000 << 64 | (__int128) 0xfedcba9876543217ULL}, +{ (__int128) 0x1000000000000000 << 64 | (__int128) 0xccccccccccccccccULL}, +{ (__int128) 0xf000000000000000 << 64 | (__int128) 0xaaaaaaaaaaaaaaaaULL} +}; + +vector unsigned __int128 store_this_us[4] = { +{ (unsigned __int128) 0x7000000000000000 << 64 | (unsigned __int128) 0x123456789abcdef8ULL}, +{ (unsigned __int128) 0x8000000000000000 << 64 | (unsigned __int128) 0xfedcba9876543217ULL}, +{ (unsigned __int128) 0x1000000000000000 << 64 | (unsigned __int128) 0xeeeeeeeeeeeeeeeeULL}, +{ (unsigned __int128) 0xf000000000000000 << 64 | (unsigned __int128) 0x5555555555555555ULL} +}; + +#define NUM_VEC_ELEMS 8 + +vector signed short signed_expected[4] = { + {0xdef8, 0x0, 0x0 , 0x0, 0x0 , 0x0, 0x0 , 0x0}, + {0x0 , 0x0, 0x3217, 0x0, 0x0 , 0x0, 0x0 , 0x0}, + {0x0 , 0x0, 0x0 , 0x0, 0xcccc, 0x0, 0x0 , 0x0}, + {0x0 , 0x0, 0x0 , 0x0, 0x0 , 0x0, 0xaaaa, 0x0} + }; +vector unsigned short unsigned_expected[4] = { + {0xdef8, 0x0, 0x0 , 0x0, 0x0 , 0x0, 0x0 , 0x0}, + {0x0 , 0x0, 0x3217, 0x0, 0x0 , 0x0, 0x0 , 0x0}, + {0x0 , 0x0, 0x0 , 0x0, 0xeeee, 0x0, 0x0 , 0x0}, + {0x0 , 0x0, 0x0 , 0x0, 0x0 , 0x0, 0x5555, 0x0} +}; + +unsigned long long rawbuffer[32]; +signed short * vsbuffer = (short *)rawbuffer; +unsigned short * vubuffer = (unsigned short *)rawbuffer; + +void reset_buffer() { + memset (&rawbuffer,0,sizeof(rawbuffer)); +} + +#define PRINT_VEC(V) \ + for (int j=0;j<NUM_VEC_ELEMS;j++) { printf ("(0x%lx) ", V[j] ); } + +void test_signed_store(vector signed __int128 myvec, int offset, signed short * store_data ) { + vec_xst_trunc (myvec, offset, store_data); +} + +void test_unsigned_store(vector unsigned __int128 myvec, int offset, unsigned short * store_data ) { + vec_xst_trunc (myvec, offset, store_data); +} + +int main (int argc, char *argv []) +{ + int i; + int memcmpresult; + int mismatch=0; + int verbose=0; + +#if VERBOSE + verbose=1; + printf("%s %s\n", __DATE__, __TIME__); +#endif + + if (verbose) { + printf("expected results from signed tests:\n"); + for (i = 0; i < 4 ; i++ ) { + PRINT_VEC(signed_expected[i]); + printf("\n"); + } + } + + for (i = 0; i < 4 ; i++ ) { + reset_buffer(); + test_signed_store (store_this_s[i], 4*i, vsbuffer); + memcmpresult = memcmp(rawbuffer,&signed_expected[i],sizeof(vector short)); + if (memcmpresult) { + printf("mismatch signed buffer, i %d (memcmpresult:%d) \n",i,memcmpresult); + mismatch++; + if (verbose) { + printf("results: "); + PRINT_VEC(vsbuffer); + printf("\n"); + } + } + } + + for (i = 0; i < 4 ; i++ ) { + reset_buffer(); + test_unsigned_store (store_this_us[i], 4*i, vubuffer); + memcmpresult = memcmp(rawbuffer,&unsigned_expected[i],sizeof(vector short)); + if (memcmpresult) { + printf("mismatch unsigned buffer, i %d (memcmpresult:%d) \n",i,memcmpresult); + mismatch++; + if (verbose) { + printf("results :"); + PRINT_VEC(vubuffer); + printf("\n"); + } + } + } + + if (mismatch) { + printf("%d mismatches. \n",mismatch); + abort(); + } + return 0; +} + diff --git a/gcc/testsuite/gcc.target/powerpc/vsx_mask-count-runnable.c b/gcc/testsuite/gcc.target/powerpc/vsx_mask-count-runnable.c index f1e3860..1ea2d65 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx_mask-count-runnable.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx_mask-count-runnable.c @@ -1,6 +1,8 @@ -/* { dg-do run } */ -/* { dg-options "-mcpu=power10 -O2" } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-options "-mdejagnu-cpu=power10 -O2 -save-temps" } */ +/* { dg-require-effective-target power10_ok } */ +/* { dg-require-effective-target int128 } */ /* Check that the expected 128-bit instructions are generated if the processor supports the 128-bit integer instructions. */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx_mask-expand-runnable.c b/gcc/testsuite/gcc.target/powerpc/vsx_mask-expand-runnable.c index 0c5695e..2c49814 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx_mask-expand-runnable.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx_mask-expand-runnable.c @@ -1,6 +1,8 @@ -/* { dg-do run } */ -/* { dg-options "-mcpu=power10 -O2" } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-options "-mdejagnu-cpu=power10 -O2 -save-temps" } */ +/* { dg-require-effective-target power10_ok } */ +/* { dg-require-effective-target int128 } */ /* Check that the expected 128-bit instructions are generated if the processor supports the 128-bit integer instructions. */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx_mask-extract-runnable.c b/gcc/testsuite/gcc.target/powerpc/vsx_mask-extract-runnable.c index 93c3c72..9e257f5 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx_mask-extract-runnable.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx_mask-extract-runnable.c @@ -1,6 +1,8 @@ -/* { dg-do run } */ -/* { dg-options "-mcpu=power10 -O2" } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-options "-mdejagnu-cpu=power10 -O2 -save-temps" } */ +/* { dg-require-effective-target power10_ok } */ +/* { dg-require-effective-target int128 } */ /* Check that the expected 128-bit instructions are generated if the processor supports the 128-bit integer instructions. */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx_mask-move-runnable.c b/gcc/testsuite/gcc.target/powerpc/vsx_mask-move-runnable.c index 41dee58..53fd99e 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx_mask-move-runnable.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx_mask-move-runnable.c @@ -1,6 +1,8 @@ -/* { dg-do run } */ -/* { dg-options "-mcpu=power10 -O2" } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ +/* { dg-options "-mdejagnu-cpu=power10 -O2 -save-temps" } */ +/* { dg-require-effective-target power10_ok } */ +/* { dg-require-effective-target int128 } */ /* Check that the expected 128-bit instructions are generated if the processor supports the 128-bit integer instructions. */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsxcopy.c b/gcc/testsuite/gcc.target/powerpc/vsxcopy.c index 61c9f77..d1b7c4b 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsxcopy.c +++ b/gcc/testsuite/gcc.target/powerpc/vsxcopy.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target { powerpc64*-*-* } } } */ +/* { dg-do compile } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-options "-O1 -mvsx" } */ /* { dg-final { scan-assembler {\m(lxvd2x|lxv)\M} } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/xxgenpc-runnable.c b/gcc/testsuite/gcc.target/powerpc/xxgenpc-runnable.c index 244c573..d4040ea 100644 --- a/gcc/testsuite/gcc.target/powerpc/xxgenpc-runnable.c +++ b/gcc/testsuite/gcc.target/powerpc/xxgenpc-runnable.c @@ -1,6 +1,7 @@ -/* { dg-do run } */ +/* { dg-do run { target { power10_hw } } } */ +/* { dg-do link { target { ! power10_hw } } } */ /* { dg-options "-mdejagnu-cpu=power10 -O2" } */ -/* { dg-require-effective-target power10_hw } */ +/* { dg-require-effective-target power10_ok } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/riscv/arch-7.c b/gcc/testsuite/gcc.target/riscv/arch-7.c new file mode 100644 index 0000000..74ab248 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/arch-7.c @@ -0,0 +1,6 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -march=rv32i -march=rv32im_s -mabi=ilp32" } */ +int foo() +{ +} +/* { dg-error ".'-march=rv32im_s': name of supervisor extension must be more than 1 letter" "" { target *-*-* } 0 } */ diff --git a/gcc/testsuite/gcc.target/riscv/attribute-10.c b/gcc/testsuite/gcc.target/riscv/attribute-10.c index a874a62..26fdd08 100644 --- a/gcc/testsuite/gcc.target/riscv/attribute-10.c +++ b/gcc/testsuite/gcc.target/riscv/attribute-10.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -march=rv32i -march=rv32im_s_sx_unexpectedstring -mabi=ilp32" } */ +/* { dg-options "-O2 -march=rv32i -march=rv32im_sx_unexpectedstring -mabi=ilp32" } */ int foo() { } diff --git a/gcc/testsuite/gcc.target/riscv/mcpu-1.c b/gcc/testsuite/gcc.target/riscv/mcpu-1.c new file mode 100644 index 0000000..6f6005c --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/mcpu-1.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-skip-if "-march given" { *-*-* } { "-march=*" } } */ +/* { dg-options "-mcpu=sifive-e20 -mabi=ilp32" } */ +/* sifive-e20 = rv32imc */ + +#if !((__riscv_xlen == 32) \ + && !defined(__riscv_32e) \ + && defined(__riscv_mul) \ + && !defined(__riscv_atomic) \ + && !defined(__riscv_flen) \ + && defined(__riscv_compressed)) +#error "unexpected arch" +#endif + +int main() +{ + return 0; +} diff --git a/gcc/testsuite/gcc.target/riscv/mcpu-2.c b/gcc/testsuite/gcc.target/riscv/mcpu-2.c new file mode 100644 index 0000000..2992f4e --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/mcpu-2.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-skip-if "-march given" { *-*-* } { "-march=*" } } */ +/* { dg-options "-mcpu=sifive-e34 -mabi=ilp32" } */ +/* sifive-e34 = rv32imafc */ + +#if !((__riscv_xlen == 32) \ + && !defined(__riscv_32e) \ + && defined(__riscv_mul) \ + && defined(__riscv_atomic) \ + && (__riscv_flen == 32) \ + && defined(__riscv_compressed)) +#error "unexpected arch" +#endif + +int main() +{ + return 0; +} diff --git a/gcc/testsuite/gcc.target/riscv/mcpu-3.c b/gcc/testsuite/gcc.target/riscv/mcpu-3.c new file mode 100644 index 0000000..97b3f81 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/mcpu-3.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-skip-if "-march given" { *-*-* } { "-march=*" } } */ +/* { dg-options "-mcpu=sifive-s51 -mabi=lp64" } */ +/* sifive-s51 = rv64imac */ + +#if !((__riscv_xlen == 64) \ + && !defined(__riscv_32e) \ + && defined(__riscv_mul) \ + && defined(__riscv_atomic) \ + && !defined(__riscv_flen) \ + && defined(__riscv_compressed)) +#error "unexpected arch" +#endif + +int main() +{ + return 0; +} diff --git a/gcc/testsuite/gcc.target/riscv/mcpu-4.c b/gcc/testsuite/gcc.target/riscv/mcpu-4.c new file mode 100644 index 0000000..52c5987 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/mcpu-4.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-skip-if "-march given" { *-*-* } { "-march=*" } } */ +/* { dg-options "-mcpu=sifive-u74 -mabi=lp64" } */ +/* sifive-u74 = rv64imafdc */ + +#if !((__riscv_xlen == 64) \ + && !defined(__riscv_32e) \ + && defined(__riscv_mul) \ + && defined(__riscv_atomic) \ + && (__riscv_flen == 64) \ + && defined(__riscv_compressed)) +#error "unexpected arch" +#endif + +int main() +{ + return 0; +} diff --git a/gcc/testsuite/gcc.target/riscv/mcpu-5.c b/gcc/testsuite/gcc.target/riscv/mcpu-5.c new file mode 100644 index 0000000..c4ea7b5 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/mcpu-5.c @@ -0,0 +1,19 @@ +/* { dg-do compile } */ +/* { dg-skip-if "-march given" { *-*-* } { "-march=*" } } */ +/* Verify -march will override arch option from -mcpu. */ +/* { dg-options "-mcpu=sifive-u74 -march=rv32ic -mabi=ilp32" } */ +/* sifive-s51 = rv64imafdc */ + +#if !((__riscv_xlen == 32) \ + && !defined(__riscv_32e) \ + && !defined(__riscv_mul) \ + && !defined(__riscv_atomic) \ + && !defined(__riscv_flen) \ + && defined(__riscv_compressed)) +#error "unexpected arch" +#endif + +int main() +{ + return 0; +} diff --git a/gcc/testsuite/gcc.target/riscv/mcpu-6.c b/gcc/testsuite/gcc.target/riscv/mcpu-6.c new file mode 100644 index 0000000..57e3345 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/mcpu-6.c @@ -0,0 +1,10 @@ +/* { dg-do compile } */ +/* Verify -mtune has higher priority than -mcpu for pipeline model . */ +/* { dg-options "-mcpu=sifive-u74 -mtune=rocket -fdump-rtl-sched2-details -O3 -march=rv32i -mabi=ilp32" } */ +/* { dg-final { scan-rtl-dump "simple_return\[ \]+:alu" "sched2" } } */ + +int main() +{ + return 0; +} + diff --git a/gcc/testsuite/gcc.target/riscv/mcpu-7.c b/gcc/testsuite/gcc.target/riscv/mcpu-7.c new file mode 100644 index 0000000..fe3c04b --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/mcpu-7.c @@ -0,0 +1,10 @@ +/* { dg-do compile } */ +/* Verify -mtune has higher priority than -mcpu for pipeline model . */ +/* { dg-options "-mcpu=sifive-s21 -mtune=sifive-u74 -fdump-rtl-sched2-details -O3 -march=rv32i -mabi=ilp32" } */ +/* { dg-final { scan-rtl-dump "simple_return\[ \]+:sifive_7_B" "sched2" } } */ + +int main() +{ + return 0; +} + diff --git a/gcc/testsuite/gcc.target/riscv/pr96759.c b/gcc/testsuite/gcc.target/riscv/pr96759.c new file mode 100644 index 0000000..621c391 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/pr96759.c @@ -0,0 +1,13 @@ +/* { dg-options "-mno-strict-align" } */ +/* { dg-do compile } */ + +struct S { + int a; + double b; +}; +struct S GetNumbers(); +struct S g; + +void foo(){ + g = GetNumbers(); +} diff --git a/gcc/testsuite/gcc.target/s390/pr97497.c b/gcc/testsuite/gcc.target/s390/pr97497.c new file mode 100644 index 0000000..460c850 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/pr97497.c @@ -0,0 +1,36 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -march=z900 -mzarch -fpic" } */ + +char *t; + +void __attribute__((noinline,noclone)) +bar(int a, char* b) +{ + if (a != 1) + __builtin_abort(); +} + +void __attribute__((noinline,noclone)) +baz(char* a, int b) +{ + if (b != 1) + __builtin_abort(); +} + +int __attribute__((noinline,noclone)) +foo (int a) +{ + bar (1, t); + if (a) + baz (t, 1); + + bar (1, t); +} + +int +main () +{ + foo (1); + + return 0; +} diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-callee-abi-scan.c b/gcc/testsuite/gcc.target/s390/vector/long-double-callee-abi-scan.c new file mode 100644 index 0000000..69e8c61 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-callee-abi-scan.c @@ -0,0 +1,20 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzarch -fno-unroll-loops" } */ +#include <stdarg.h> + +__attribute__ ((noipa, used)) long double +long_double_callee (long double x, int n, ...) +{ + long double sum = x; + va_list vl; + int i; + + va_start (vl, n); + for (i = 0; i < n; i++) + sum += va_arg (vl, long double); + va_end (vl); + + return sum; +} + +/* { dg-final { scan-assembler-times {\n\tvl\t} 3 } } */ diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-caller-abi-run.c b/gcc/testsuite/gcc.target/s390/vector/long-double-caller-abi-run.c new file mode 100644 index 0000000..f3a41ba --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-caller-abi-run.c @@ -0,0 +1,4 @@ +/* { dg-do run } */ +/* { dg-options "-O3 -march=z14 -mzarch" } */ +#include "long-double-callee-abi-scan.c" +#include "long-double-caller-abi-scan.c" diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-caller-abi-scan.c b/gcc/testsuite/gcc.target/s390/vector/long-double-caller-abi-scan.c new file mode 100644 index 0000000..c1ec5b1 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-caller-abi-scan.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzarch" } */ +#include <assert.h> + +long double long_double_callee (long double x, int n, ...); + +int +main () +{ + assert (long_double_callee (1.L, 2, 2.L, 3.L) == 6.L); +} + +/* { dg-final { scan-assembler-times {\n\tvst\t} 3 } } */ diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-copysign.c b/gcc/testsuite/gcc.target/s390/vector/long-double-copysign.c new file mode 100644 index 0000000..3115195 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-copysign.c @@ -0,0 +1,21 @@ +/* { dg-do run } */ +/* { dg-options "-O3 -march=z14 -mzarch --save-temps" } */ +#include <assert.h> +#include <stdint.h> + +__attribute__ ((noipa)) static long double +long_double_copysign (long double x, long double y) +{ + return __builtin_copysignl (x, y); +} + +/* { dg-final { scan-assembler-times {\n\tvsel\t} 1 } } */ + +int +main (void) +{ + assert (long_double_copysign (1.1L, 2.2L) == 1.1L); + assert (long_double_copysign (1.1L, -2.2L) == -1.1L); + assert (long_double_copysign (-1.1L, 2.2L) == 1.1L); + assert (long_double_copysign (-1.1L, -2.2L) == -1.1L); +} diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-fprx2-constant.c b/gcc/testsuite/gcc.target/s390/vector/long-double-fprx2-constant.c new file mode 100644 index 0000000..02a6a1f --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-fprx2-constant.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mtune=z14 -funroll-loops" } */ + +long double a; +int d; +void +b () +{ + for (int c = 0; c < d; ++c) + a = (a - c) / (c + 1); +} diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-from-double.c b/gcc/testsuite/gcc.target/s390/vector/long-double-from-double.c new file mode 100644 index 0000000..5eb31f8 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-from-double.c @@ -0,0 +1,18 @@ +/* { dg-do run } */ +/* { dg-options "-O3 -march=z14 -mzarch --save-temps" } */ +#include <assert.h> + +__attribute__ ((noipa)) static long double +long_double_from_double (double x) +{ + return x; +} + +/* { dg-final { scan-assembler-times {\n\twflld\t} 1 } } */ + +int +main (void) +{ + assert (long_double_from_double (42.) == 42.L); + assert (long_double_from_double (-42.) == -42.L); +} diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-from-float.c b/gcc/testsuite/gcc.target/s390/vector/long-double-from-float.c new file mode 100644 index 0000000..0449f0c --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-from-float.c @@ -0,0 +1,19 @@ +/* { dg-do run } */ +/* { dg-options "-O3 -march=z14 -mzarch --save-temps" } */ +#include <assert.h> + +__attribute__ ((noipa)) static long double +long_double_from_float (float x) +{ + return x; +} + +/* { dg-final { scan-assembler-times {\n\tldebr\t} 1 } } */ +/* { dg-final { scan-assembler-times {\n\twflld\t} 1 } } */ + +int +main (void) +{ + assert (long_double_from_float (42.F) == 42.L); + assert (long_double_from_float (-42.F) == -42.L); +} diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-from-i16.c b/gcc/testsuite/gcc.target/s390/vector/long-double-from-i16.c new file mode 100644 index 0000000..68b164d --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-from-i16.c @@ -0,0 +1,19 @@ +/* { dg-do run } */ +/* { dg-options "-O3 -march=z14 -mzarch --save-temps" } */ +#include <assert.h> +#include <stdint.h> + +__attribute__ ((noipa)) static long double +long_double_from_i16 (int16_t x) +{ + return x; +} + +/* { dg-final { scan-assembler-times {\n\tcxfbr\t} 1 } } */ + +int +main (void) +{ + assert (long_double_from_i16 (42) == 42.L); + assert (long_double_from_i16 (-42) == -42.L); +} diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-from-i32.c b/gcc/testsuite/gcc.target/s390/vector/long-double-from-i32.c new file mode 100644 index 0000000..ad8443b --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-from-i32.c @@ -0,0 +1,19 @@ +/* { dg-do run } */ +/* { dg-options "-O3 -march=z14 -mzarch --save-temps" } */ +#include <assert.h> +#include <stdint.h> + +__attribute__ ((noipa)) static long double +long_double_from_i32 (int32_t x) +{ + return x; +} + +/* { dg-final { scan-assembler-times {\n\tcxfbr\t} 1 } } */ + +int +main (void) +{ + assert (long_double_from_i32 (42) == 42.L); + assert (long_double_from_i32 (-42) == -42.L); +} diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-from-i64.c b/gcc/testsuite/gcc.target/s390/vector/long-double-from-i64.c new file mode 100644 index 0000000..3d2c424 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-from-i64.c @@ -0,0 +1,19 @@ +/* { dg-do run } */ +/* { dg-options "-O3 -march=z14 -mzarch --save-temps" } */ +#include <assert.h> +#include <stdint.h> + +__attribute__ ((noipa)) static long double +long_double_from_i64 (int64_t x) +{ + return x; +} + +/* { dg-final { scan-assembler-times {\n\tcxgbr\t} 1 } } */ + +int +main (void) +{ + assert (long_double_from_i64 (42) == 42.L); + assert (long_double_from_i64 (-42) == -42.L); +} diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-from-i8.c b/gcc/testsuite/gcc.target/s390/vector/long-double-from-i8.c new file mode 100644 index 0000000..44c8c9d --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-from-i8.c @@ -0,0 +1,19 @@ +/* { dg-do run } */ +/* { dg-options "-O3 -march=z14 -mzarch --save-temps" } */ +#include <assert.h> +#include <stdint.h> + +__attribute__ ((noipa)) static long double +long_double_from_i8 (int8_t x) +{ + return x; +} + +/* { dg-final { scan-assembler-times {\n\tcxfbr\t} 1 } } */ + +int +main (void) +{ + assert (long_double_from_i8 (42) == 42.L); + assert (long_double_from_i8 (-42) == -42.L); +} diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-from-u16.c b/gcc/testsuite/gcc.target/s390/vector/long-double-from-u16.c new file mode 100644 index 0000000..f10c298 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-from-u16.c @@ -0,0 +1,19 @@ +/* { dg-do run } */ +/* { dg-options "-O3 -march=z14 -mzarch --save-temps" } */ +#include <assert.h> +#include <stdint.h> + +__attribute__ ((noipa)) static long double +long_double_from_u16 (uint16_t x) +{ + return x; +} + +/* { dg-final { scan-assembler-times {\n\tcxlfbr\t} 1 } } */ + +int +main (void) +{ + assert (long_double_from_u16 (42) == 42.L); + assert (long_double_from_u16 (-42) == 65494.L); +} diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-from-u32.c b/gcc/testsuite/gcc.target/s390/vector/long-double-from-u32.c new file mode 100644 index 0000000..2763fb4 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-from-u32.c @@ -0,0 +1,19 @@ +/* { dg-do run } */ +/* { dg-options "-O3 -march=z14 -mzarch --save-temps" } */ +#include <assert.h> +#include <stdint.h> + +__attribute__ ((noipa)) static long double +long_double_from_u32 (uint32_t x) +{ + return x; +} + +/* { dg-final { scan-assembler-times {\n\tcxlfbr\t} 1 } } */ + +int +main (void) +{ + assert (long_double_from_u32 (42) == 42.L); + assert (long_double_from_u32 (-42) == 4294967254.L); +} diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-from-u64.c b/gcc/testsuite/gcc.target/s390/vector/long-double-from-u64.c new file mode 100644 index 0000000..4686dfd --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-from-u64.c @@ -0,0 +1,19 @@ +/* { dg-do run } */ +/* { dg-options "-O3 -march=z14 -mzarch --save-temps" } */ +#include <assert.h> +#include <stdint.h> + +__attribute__ ((noipa)) static long double +long_double_from_u64 (uint64_t x) +{ + return x; +} + +/* { dg-final { scan-assembler-times {\n\tcxlgbr\t} 1 } } */ + +int +main (void) +{ + assert (long_double_from_u64 (42) == 42.L); + assert (long_double_from_u64 (-42) == 18446744073709551574.L); +} diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-from-u8.c b/gcc/testsuite/gcc.target/s390/vector/long-double-from-u8.c new file mode 100644 index 0000000..3e6eb92 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-from-u8.c @@ -0,0 +1,19 @@ +/* { dg-do run } */ +/* { dg-options "-O3 -march=z14 -mzarch --save-temps" } */ +#include <assert.h> +#include <stdint.h> + +__attribute__ ((noipa)) static long double +long_double_from_u8 (uint8_t x) +{ + return x; +} + +/* { dg-final { scan-assembler-times {\n\tcxlfbr\t} 1 } } */ + +int +main (void) +{ + assert (long_double_from_u8 (42) == 42.L); + assert (long_double_from_u8 (-42) == 214.L); +} diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-to-double.c b/gcc/testsuite/gcc.target/s390/vector/long-double-to-double.c new file mode 100644 index 0000000..88aa053 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-to-double.c @@ -0,0 +1,18 @@ +/* { dg-do run } */ +/* { dg-options "-O3 -march=z14 -mzarch --save-temps" } */ +#include <assert.h> + +__attribute__ ((noipa)) static double +long_double_to_double (long double x) +{ + return x; +} + +/* { dg-final { scan-assembler-times {\n\twflrx\t} 1 } } */ + +int +main (void) +{ + assert (long_double_to_double (42.L) == 42.); + assert (long_double_to_double (-42.L) == -42.); +} diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-to-float.c b/gcc/testsuite/gcc.target/s390/vector/long-double-to-float.c new file mode 100644 index 0000000..36fd429 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-to-float.c @@ -0,0 +1,19 @@ +/* { dg-do run } */ +/* { dg-options "-O3 -march=z14 -mzarch --save-temps" } */ +#include <assert.h> + +__attribute__ ((noipa)) static float +long_double_to_float (long double x) +{ + return x; +} + +/* { dg-final { scan-assembler-times {\n\twflrx\t%v\d+,%v\d+,0,3\n} 1 } } */ +/* { dg-final { scan-assembler-times {\n\tledbr\t} 1 } } */ + +int +main (void) +{ + assert (long_double_to_float (42.L) == 42.F); + assert (long_double_to_float (-42.L) == -42.F); +} diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-to-i16.c b/gcc/testsuite/gcc.target/s390/vector/long-double-to-i16.c new file mode 100644 index 0000000..ddfc668 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-to-i16.c @@ -0,0 +1,19 @@ +/* { dg-do run } */ +/* { dg-options "-O3 -march=z14 -mzarch --save-temps" } */ +#include <assert.h> +#include <stdint.h> + +__attribute__ ((noipa)) static int16_t +long_double_to_i16 (long double x) +{ + return x; +} + +/* { dg-final { scan-assembler-times {\n\tcfxbr\t} 1 } } */ + +int +main (void) +{ + assert (long_double_to_i16 (42.L) == 42); + assert (long_double_to_i16 (-42.L) == -42); +} diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-to-i32.c b/gcc/testsuite/gcc.target/s390/vector/long-double-to-i32.c new file mode 100644 index 0000000..975a5de --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-to-i32.c @@ -0,0 +1,19 @@ +/* { dg-do run } */ +/* { dg-options "-O3 -march=z14 -mzarch --save-temps" } */ +#include <assert.h> +#include <stdint.h> + +__attribute__ ((noipa)) static int32_t +long_double_to_i32 (long double x) +{ + return x; +} + +/* { dg-final { scan-assembler-times {\n\tcfxbr\t} 1 } } */ + +int +main (void) +{ + assert (long_double_to_i32 (42.L) == 42); + assert (long_double_to_i32 (-42.L) == -42); +} diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-to-i64.c b/gcc/testsuite/gcc.target/s390/vector/long-double-to-i64.c new file mode 100644 index 0000000..6bd5079 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-to-i64.c @@ -0,0 +1,21 @@ +/* { dg-do run } */ +/* { dg-options "-O3 -march=z14 -mzarch --save-temps" } */ +#include <assert.h> +#include <stdint.h> + +__attribute__ ((noipa)) static int64_t +long_double_to_i64 (long double x) +{ + return x; +} + +/* { dg-final { scan-assembler-times {\n\tvpdi\t%v\d+,%v\d+,%v\d+,1\n} 1 } } */ +/* { dg-final { scan-assembler-times {\n\tvpdi\t%v\d+,%v\d+,%v\d+,5\n} 1 } } */ +/* { dg-final { scan-assembler-times {\n\tcgxbr\t} 1 } } */ + +int +main (void) +{ + assert (long_double_to_i64 (42.L) == 42); + assert (long_double_to_i64 (-42.L) == -42); +} diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-to-i8.c b/gcc/testsuite/gcc.target/s390/vector/long-double-to-i8.c new file mode 100644 index 0000000..46e6d6b --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-to-i8.c @@ -0,0 +1,19 @@ +/* { dg-do run } */ +/* { dg-options "-O3 -march=z14 -mzarch --save-temps" } */ +#include <assert.h> +#include <stdint.h> + +__attribute__ ((noipa)) static int8_t +long_double_to_i8 (long double x) +{ + return x; +} + +/* { dg-final { scan-assembler-times {\n\tcfxbr\t} 1 } } */ + +int +main (void) +{ + assert (long_double_to_i8 (42.L) == 42); + assert (long_double_to_i8 (-42.L) == -42); +} diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-to-u16.c b/gcc/testsuite/gcc.target/s390/vector/long-double-to-u16.c new file mode 100644 index 0000000..0690f3d --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-to-u16.c @@ -0,0 +1,20 @@ +/* { dg-do run } */ +/* { dg-options "-O3 -march=z14 -mzarch --save-temps" } */ +#include <assert.h> +#include <stdint.h> + +__attribute__ ((noipa)) static uint16_t +long_double_to_u16 (long double x) +{ + return x; +} + +/* { dg-final { scan-assembler-times {\n\tclfxbr\t} 1 } } */ + +int +main (void) +{ + assert (long_double_to_u16 (42.L) == 42); + /* Not (-42 & 0xffff) due to loss of precision. */ + assert (long_double_to_u16 (-42.L) == 0); +} diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-to-u32.c b/gcc/testsuite/gcc.target/s390/vector/long-double-to-u32.c new file mode 100644 index 0000000..aa0e318 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-to-u32.c @@ -0,0 +1,20 @@ +/* { dg-do run } */ +/* { dg-options "-O3 -march=z14 -mzarch --save-temps" } */ +#include <assert.h> +#include <stdint.h> + +__attribute__ ((noipa)) static uint32_t +long_double_to_u32 (long double x) +{ + return x; +} + +/* { dg-final { scan-assembler-times {\n\tclfxbr\t} 1 } } */ + +int +main (void) +{ + assert (long_double_to_u32 (42.L) == 42); + /* Not (-42 & 0xffffffff) due to loss of precision. */ + assert (long_double_to_u32 (-42.L) == 0); +} diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-to-u64.c b/gcc/testsuite/gcc.target/s390/vector/long-double-to-u64.c new file mode 100644 index 0000000..e37b65e --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-to-u64.c @@ -0,0 +1,20 @@ +/* { dg-do run } */ +/* { dg-options "-O3 -march=z14 -mzarch --save-temps" } */ +#include <assert.h> +#include <stdint.h> + +__attribute__ ((noipa)) static uint64_t +long_double_to_u64 (long double x) +{ + return x; +} + +/* { dg-final { scan-assembler-times {\n\tclgxbr\t} 1 } } */ + +int +main (void) +{ + assert (long_double_to_u64 (42.L) == 42); + /* Not (-42 & 0xffffffffffffffff) due to loss of precision. */ + assert (long_double_to_u64 (-42.L) == 0); +} diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-to-u8.c b/gcc/testsuite/gcc.target/s390/vector/long-double-to-u8.c new file mode 100644 index 0000000..bddbff8 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-to-u8.c @@ -0,0 +1,20 @@ +/* { dg-do run } */ +/* { dg-options "-O3 -march=z14 -mzarch --save-temps" } */ +#include <assert.h> +#include <stdint.h> + +__attribute__ ((noipa)) static uint8_t +long_double_to_u8 (long double x) +{ + return x; +} + +/* { dg-final { scan-assembler-times {\n\tclfxbr\t} 1 } } */ + +int +main (void) +{ + assert (long_double_to_u8 (42.L) == 42); + /* Not (-42 & 0xff) due to loss of precision. */ + assert (long_double_to_u8 (-42.L) == 0); +} diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-vec-duplicate.c b/gcc/testsuite/gcc.target/s390/vector/long-double-vec-duplicate.c new file mode 100644 index 0000000..2ce9da3 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-vec-duplicate.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -funroll-loops -march=z14 -mtune=z14" } */ + +long double a, b; +double *c; +long double *d; + +void +e () +{ + while (d != &a) + *d++ = b * *c++; +} diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-wf.h b/gcc/testsuite/gcc.target/s390/vector/long-double-wf.h new file mode 100644 index 0000000..a564fc6 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-wf.h @@ -0,0 +1,60 @@ +#ifndef LONG_DOUBLE_WF_H +#define LONG_DOUBLE_WF_H 1 + +#include <math.h> + +#define ADD(x, y, z) ((x) + (z)) +#define DIV(x, y, z) ((x) / (z)) +#define FABSL(x, y, z) (fabsl (y)) +#define ISINFL(x, y, z) (isinfl (x) ? (y) : (z)) +#define MUL(x, y, z) ((x) * (z)) +#define MUL_ADD(x, y, z) ((x) * (y) + (z)) +#define MUL_SUB(x, y, z) ((x) * (y) - (z)) +#define NEG(x, y, z) \ + ({ \ + volatile long double r = -(y); \ + r; \ + }) +#define NEG_MUL_ADD(x, y, z) NEG (0, MUL_ADD (x, y, z), 0) +#define NEG_MUL_SUB(x, y, z) NEG (0, MUL_SUB (x, y, z), 0) +#define QUIET_IFEQUAL(x, y, z) ((x) == (y) ? (z) : 0) +#define QUIET_IFGREATER(x, y, z) (__builtin_isgreater (x, y) ? (z) : 0) +#define QUIET_IFLESS(x, y, z) (__builtin_isless (x, y) ? (z) : 0) +#define QUIET_IFUNORDERED(x, y, z) (__builtin_isunordered (x, y) ? (z) : 0) +#define SIGNALING_IFEQUAL(x, y, z) (((x) >= (y) && (x) <= (y)) ? (z) : 0) +#define SIGNALING_IFGREATER(x, y, z) ((x) > (y) ? (z) : 0) +#define SIGNALING_IFLESS(x, y, z) ((x) < (y) ? (z) : 0) +#define ROUNDL(x, y, z) (roundl (y)) +#define SQRTL(x, y, z) (sqrtl (y)) +#define SUB(x, y, z) ((x) - (z)) + +#define LONG_DOUBLE_WF(op) \ + long double test ( \ + long double x0, long double x1, long double x2, long double x3, \ + long double x4, long double x5, long double x6, long double x7, \ + long double x8, long double x9, long double x10, long double x11, \ + long double x12, long double x13, long double x14, long double x15) \ + { \ + while (x15 < 1E+30) \ + { \ + x0 = op (x1, x2, x3); \ + x1 = op (x2, x3, x4) + 1; \ + x2 = op (x3, x4, x5) + 2; \ + x3 = op (x4, x5, x6) + 3; \ + x4 = op (x5, x6, x7) + 4; \ + x5 = op (x6, x7, x8) + 5; \ + x6 = op (x7, x8, x9) + 6; \ + x7 = op (x8, x9, x10) + 7; \ + x8 = op (x9, x10, x11) + 8; \ + x9 = op (x10, x11, x12) + 9; \ + x10 = op (x11, x12, x13) + 10; \ + x11 = op (x12, x13, x14) + 11; \ + x12 = op (x13, x14, x15) + 12; \ + x13 = op (x14, x15, x0) + 13; \ + x14 = op (x15, x0, x1) + 14; \ + x15 = op (x0, x1, x2) + 15; \ + } \ + return x15; \ + } + +#endif diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-wfaxb.c b/gcc/testsuite/gcc.target/s390/vector/long-double-wfaxb.c new file mode 100644 index 0000000..1b35c1c --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-wfaxb.c @@ -0,0 +1,17 @@ +/* { dg-do run } */ +/* { dg-options "-O3 -march=z14 -mzarch --save-temps" } */ +#include <assert.h> + +__attribute__ ((noipa)) static long double +wfaxb (long double x, long double y, long double z) +{ + return x + y + z; +} + +/* { dg-final { scan-assembler-times {\n\twfaxb\t} 2 } } */ + +int +main (void) +{ + assert (wfaxb (1.11L, 2.22L, 3.33L) == 6.66L); +} diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-wfcxb-0001.c b/gcc/testsuite/gcc.target/s390/vector/long-double-wfcxb-0001.c new file mode 100644 index 0000000..9ffff6f --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-wfcxb-0001.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzarch" } */ +#include "long-double-wf.h" + +LONG_DOUBLE_WF (QUIET_IFUNORDERED); + +/* { dg-final { scan-assembler {\n\twfcxb\t} } } */ +/* jo == brc 0b0001, ... */ +/* { dg-final { scan-assembler {\n\tjo\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-wfcxb-0111.c b/gcc/testsuite/gcc.target/s390/vector/long-double-wfcxb-0111.c new file mode 100644 index 0000000..3ade835 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-wfcxb-0111.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzarch" } */ +#include "long-double-wf.h" + +LONG_DOUBLE_WF (QUIET_IFEQUAL); + +/* { dg-final { scan-assembler {\n\twfcxb\t} } } */ +/* jne == brc 0b0111, ... */ +/* { dg-final { scan-assembler {\n\tjne\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-wfcxb-1011.c b/gcc/testsuite/gcc.target/s390/vector/long-double-wfcxb-1011.c new file mode 100644 index 0000000..a9c819d --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-wfcxb-1011.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzarch" } */ +#include "long-double-wf.h" + +LONG_DOUBLE_WF (QUIET_IFLESS); + +/* { dg-final { scan-assembler {\n\twfcxb\t} } } */ +/* jnl == brc 0b1011, ... */ +/* { dg-final { scan-assembler {\n\tjnl\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-wfcxb-1101.c b/gcc/testsuite/gcc.target/s390/vector/long-double-wfcxb-1101.c new file mode 100644 index 0000000..47ea7c7 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-wfcxb-1101.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzarch" } */ +#include "long-double-wf.h" + +LONG_DOUBLE_WF (QUIET_IFGREATER); + +/* { dg-final { scan-assembler {\n\twfcxb\t} } } */ +/* jnh == brc 0b1101, ... */ +/* { dg-final { scan-assembler {\n\tjnh\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-wfdxb.c b/gcc/testsuite/gcc.target/s390/vector/long-double-wfdxb.c new file mode 100644 index 0000000..16b4893 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-wfdxb.c @@ -0,0 +1,17 @@ +/* { dg-do run } */ +/* { dg-options "-O3 -march=z14 -mzarch --save-temps" } */ +#include <assert.h> + +__attribute__ ((noipa)) static long double +wfdxb (long double x, long double y, long double z) +{ + return (x / y) / z; +} + +/* { dg-final { scan-assembler-times {\n\twfdxb\t} 2 } } */ + +int +main (void) +{ + assert (wfdxb (2.22L, 1.11L, 2.L) == 1.L); +} diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-wfixb.c b/gcc/testsuite/gcc.target/s390/vector/long-double-wfixb.c new file mode 100644 index 0000000..69348bd --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-wfixb.c @@ -0,0 +1,7 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzarch" } */ +#include "long-double-wf.h" + +LONG_DOUBLE_WF (ROUNDL); + +/* { dg-final { scan-assembler {\n\twfixb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-wfkxb-0111.c b/gcc/testsuite/gcc.target/s390/vector/long-double-wfkxb-0111.c new file mode 100644 index 0000000..0f7b209 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-wfkxb-0111.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzarch" } */ +#include "long-double-wf.h" + +LONG_DOUBLE_WF (SIGNALING_IFEQUAL); + +/* { dg-final { scan-assembler {\n\twfkxb\t} } } */ +/* jne == brc 0b0111, ... */ +/* { dg-final { scan-assembler {\n\tjne\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-wfkxb-1011.c b/gcc/testsuite/gcc.target/s390/vector/long-double-wfkxb-1011.c new file mode 100644 index 0000000..b76dbb0 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-wfkxb-1011.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzarch" } */ +#include "long-double-wf.h" + +LONG_DOUBLE_WF (SIGNALING_IFLESS); + +/* { dg-final { scan-assembler {\n\twfkxb\t} } } */ +/* jnl == brc 0b1011, ... */ +/* { dg-final { scan-assembler {\n\tjnl\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-wfkxb-1101.c b/gcc/testsuite/gcc.target/s390/vector/long-double-wfkxb-1101.c new file mode 100644 index 0000000..61f0ec4 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-wfkxb-1101.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzarch" } */ +#include "long-double-wf.h" + +LONG_DOUBLE_WF (SIGNALING_IFGREATER); + +/* { dg-final { scan-assembler {\n\twfkxb\t} } } */ +/* jnh == brc 0b1101, ... */ +/* { dg-final { scan-assembler {\n\tjnh\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-wflcxb.c b/gcc/testsuite/gcc.target/s390/vector/long-double-wflcxb.c new file mode 100644 index 0000000..ddcf972 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-wflcxb.c @@ -0,0 +1,7 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzarch" } */ +#include "long-double-wf.h" + +LONG_DOUBLE_WF (NEG); + +/* { dg-final { scan-assembler {\n\twflcxb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-wflpxb.c b/gcc/testsuite/gcc.target/s390/vector/long-double-wflpxb.c new file mode 100644 index 0000000..df90505 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-wflpxb.c @@ -0,0 +1,7 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzarch" } */ +#include "long-double-wf.h" + +LONG_DOUBLE_WF (FABSL); + +/* { dg-final { scan-assembler {\n\twflpxb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-wfmaxb-2.c b/gcc/testsuite/gcc.target/s390/vector/long-double-wfmaxb-2.c new file mode 100644 index 0000000..0b2fdcc --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-wfmaxb-2.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzarch -mvx-long-double-fma" } */ + +int a, c, d, f, k, l, m; +long double b, e, g, h, i; +double j; + +void +n (void) +{ + while (m) + { + a = b * d; + b = c; + c = d * e + 2; + e = f + g + 4; + f = h + 6; + g = h * 0 + i + 7; + h = i + 9; + i = j * k + 0 + 10; + j = l; + m = a * b; + } +} diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-wfmaxb-3.c b/gcc/testsuite/gcc.target/s390/vector/long-double-wfmaxb-3.c new file mode 100644 index 0000000..9ef49c1 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-wfmaxb-3.c @@ -0,0 +1,14 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzarch -mvx-long-double-fma" } */ + +long double a, c, d; +int b; +void +e (void) +{ + while (d) + { + a = 0 * c + 0; + d = b; + } +} diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-wfmaxb-disabled.c b/gcc/testsuite/gcc.target/s390/vector/long-double-wfmaxb-disabled.c new file mode 100644 index 0000000..59bc80a --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-wfmaxb-disabled.c @@ -0,0 +1,8 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzarch" } */ +#include "long-double-wf.h" + +LONG_DOUBLE_WF (MUL_ADD); + +/* { dg-final { scan-assembler {\n\twfmxb\t} } } */ +/* { dg-final { scan-assembler {\n\twfaxb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-wfmaxb.c b/gcc/testsuite/gcc.target/s390/vector/long-double-wfmaxb.c new file mode 100644 index 0000000..319a02f --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-wfmaxb.c @@ -0,0 +1,7 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzarch -mvx-long-double-fma" } */ +#include "long-double-wf.h" + +LONG_DOUBLE_WF (MUL_ADD); + +/* { dg-final { scan-assembler {\n\twfmaxb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-wfmsxb-disabled.c b/gcc/testsuite/gcc.target/s390/vector/long-double-wfmsxb-disabled.c new file mode 100644 index 0000000..bb5c0f2 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-wfmsxb-disabled.c @@ -0,0 +1,8 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzarch" } */ +#include "long-double-wf.h" + +LONG_DOUBLE_WF (MUL_SUB); + +/* { dg-final { scan-assembler {\n\twfmxb\t} } } */ +/* { dg-final { scan-assembler {\n\twfsxb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-wfmsxb.c b/gcc/testsuite/gcc.target/s390/vector/long-double-wfmsxb.c new file mode 100644 index 0000000..c14f673 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-wfmsxb.c @@ -0,0 +1,7 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzarch -mvx-long-double-fma" } */ +#include "long-double-wf.h" + +LONG_DOUBLE_WF (MUL_SUB); + +/* { dg-final { scan-assembler {\n\twfmsxb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-wfmxb.c b/gcc/testsuite/gcc.target/s390/vector/long-double-wfmxb.c new file mode 100644 index 0000000..6ab1e68 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-wfmxb.c @@ -0,0 +1,7 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzarch" } */ +#include "long-double-wf.h" + +LONG_DOUBLE_WF (MUL); + +/* { dg-final { scan-assembler {\n\twfmxb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-wfnmaxb-disabled.c b/gcc/testsuite/gcc.target/s390/vector/long-double-wfnmaxb-disabled.c new file mode 100644 index 0000000..8c5298e --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-wfnmaxb-disabled.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzarch" } */ +#include "long-double-wf.h" + +LONG_DOUBLE_WF (NEG_MUL_ADD); + +/* { dg-final { scan-assembler {\n\twfmxb\t} } } */ +/* { dg-final { scan-assembler {\n\twfaxb\t} } } */ +/* { dg-final { scan-assembler {\n\twflcxb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-wfnmaxb.c b/gcc/testsuite/gcc.target/s390/vector/long-double-wfnmaxb.c new file mode 100644 index 0000000..9f0da13 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-wfnmaxb.c @@ -0,0 +1,7 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzarch -mvx-long-double-fma" } */ +#include "long-double-wf.h" + +LONG_DOUBLE_WF (NEG_MUL_ADD); + +/* { dg-final { scan-assembler {\n\twfnmaxb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-wfnmsxb-disabled.c b/gcc/testsuite/gcc.target/s390/vector/long-double-wfnmsxb-disabled.c new file mode 100644 index 0000000..39e4f60 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-wfnmsxb-disabled.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzarch" } */ +#include "long-double-wf.h" + +LONG_DOUBLE_WF (NEG_MUL_SUB); + +/* { dg-final { scan-assembler {\n\twfmxb\t} } } */ +/* { dg-final { scan-assembler {\n\twfsxb\t} } } */ +/* { dg-final { scan-assembler {\n\twflcxb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-wfnmsxb.c b/gcc/testsuite/gcc.target/s390/vector/long-double-wfnmsxb.c new file mode 100644 index 0000000..698e277 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-wfnmsxb.c @@ -0,0 +1,7 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzarch -mvx-long-double-fma" } */ +#include "long-double-wf.h" + +LONG_DOUBLE_WF (NEG_MUL_SUB); + +/* { dg-final { scan-assembler {\n\twfnmsxb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-wfsqxb.c b/gcc/testsuite/gcc.target/s390/vector/long-double-wfsqxb.c new file mode 100644 index 0000000..09f9128 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-wfsqxb.c @@ -0,0 +1,7 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzarch" } */ +#include "long-double-wf.h" + +LONG_DOUBLE_WF (SQRTL); + +/* { dg-final { scan-assembler {\n\twfsqxb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-wfsxb-1.c b/gcc/testsuite/gcc.target/s390/vector/long-double-wfsxb-1.c new file mode 100644 index 0000000..20960d0 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-wfsxb-1.c @@ -0,0 +1,21 @@ +/* { dg-do run } */ +/* { dg-options "-O3 -march=z14 -mzarch" } */ +#include <assert.h> + +typedef float tf __attribute__ ((mode (TF))); +static tf x; +static tf y; + +__attribute__ ((noipa)) static tf +sub (void) +{ + return x - y; +} + +int +main (void) +{ + x = 1.5L; + y = 2.5L; + assert (sub () == -1.0L); +} diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-wfsxb.c b/gcc/testsuite/gcc.target/s390/vector/long-double-wfsxb.c new file mode 100644 index 0000000..1c430ee --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-wfsxb.c @@ -0,0 +1,7 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzarch" } */ +#include "long-double-wf.h" + +LONG_DOUBLE_WF (SUB); + +/* { dg-final { scan-assembler {\n\twfsxb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-wftcixb-1.c b/gcc/testsuite/gcc.target/s390/vector/long-double-wftcixb-1.c new file mode 100644 index 0000000..224995f --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-wftcixb-1.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O1 -march=z14 -mzarch" } */ + +int a, b; + +void +c (void) +{ + long double d; + a = d; + if (__builtin_isinf (d)) + b = 0; +} + +/* { dg-final { scan-assembler {\n\twftcixb\t} } } */ diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-wftcixb.c b/gcc/testsuite/gcc.target/s390/vector/long-double-wftcixb.c new file mode 100644 index 0000000..c2658b8 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-wftcixb.c @@ -0,0 +1,7 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzarch" } */ +#include "long-double-wf.h" + +LONG_DOUBLE_WF (ISINFL); + +/* { dg-final { scan-assembler {\n\twftcixb\t} } } */ diff --git a/gcc/testsuite/gdc.test/compilable/imports/test21299/func.d b/gcc/testsuite/gdc.test/compilable/imports/test21299/func.d new file mode 100644 index 0000000..fe3321f --- /dev/null +++ b/gcc/testsuite/gdc.test/compilable/imports/test21299/func.d @@ -0,0 +1,8 @@ +module imports.test21299.func; +import imports.test21299.mtype; +import imports.test21299.rootstringtable; +class FuncDeclaration { + StringTable!Type stringtable; + StringTable2!Type stringtable2; + StringTable3!Type stringtable3; +} diff --git a/gcc/testsuite/gdc.test/compilable/imports/test21299/mtype.d b/gcc/testsuite/gdc.test/compilable/imports/test21299/mtype.d new file mode 100644 index 0000000..01bac82 --- /dev/null +++ b/gcc/testsuite/gdc.test/compilable/imports/test21299/mtype.d @@ -0,0 +1,8 @@ +module imports.test21299.mtype; +import imports.test21299.func; +import imports.test21299.rootstringtable; +class Type { + StringTable!Type stringtable; + StringTable2!Type stringtable2; + StringTable3!Type stringtable3; +} diff --git a/gcc/testsuite/gdc.test/compilable/imports/test21299/rootstringtable.d b/gcc/testsuite/gdc.test/compilable/imports/test21299/rootstringtable.d new file mode 100644 index 0000000..12a2d92 --- /dev/null +++ b/gcc/testsuite/gdc.test/compilable/imports/test21299/rootstringtable.d @@ -0,0 +1,96 @@ +module imports.test21299.rootstringtable; +struct StringValue(T) +{ + char* lstring() + { + return cast(char*)&this; + } +} + +struct StringTable(T) +{ + StringValue!T* insert() + { + allocValue; + return getValue; + } + + uint allocValue() + { + StringValue!(T) sv; + sv.lstring[0] = 0; + return 0; + } + + StringValue!T* getValue() + { + return cast(StringValue!T*)&this; + } +} + +// Other tests are the same as the original issue, but use other kinds of +// nesting Dsymbols that need to be handled by templateInstanceSemantic(). +struct StringValue2(T) +{ + char* lstring() + { + return cast(char*)&this; + } +} + +struct StringTable2(T) +{ + @nogc // AttribDeclaration (also covers pragma, extern(), static foreach, ...) + { + StringValue2!T* insert() + { + allocValue; + return getValue; + } + + uint allocValue() + { + StringValue2!(T) sv; + sv.lstring[0] = 0; + return 0; + } + + StringValue2!T* getValue() + { + return cast(StringValue2!T*)&this; + } + } +} + +// +struct StringValue3(T) +{ + char* lstring() + { + return cast(char*)&this; + } +} + +struct StringTable3(T) +{ + static if (true) // ConditionalDeclaration (static if) + { + StringValue3!T* insert() + { + allocValue; + return getValue; + } + + uint allocValue() + { + StringValue3!(T) sv; + sv.lstring[0] = 0; + return 0; + } + + StringValue3!T* getValue() + { + return cast(StringValue3!T*)&this; + } + } +} diff --git a/gcc/testsuite/gdc.test/compilable/test21299a.d b/gcc/testsuite/gdc.test/compilable/test21299a.d new file mode 100644 index 0000000..049ee6a --- /dev/null +++ b/gcc/testsuite/gdc.test/compilable/test21299a.d @@ -0,0 +1,4 @@ +// EXTRA_SOURCES: imports/test21299/mtype.d imports/test21299/rootstringtable.d +// REQUIRED_ARGS: -main +// LINK +module test21299a; diff --git a/gcc/testsuite/gdc.test/compilable/test21299b.d b/gcc/testsuite/gdc.test/compilable/test21299b.d new file mode 100644 index 0000000..b9d992a --- /dev/null +++ b/gcc/testsuite/gdc.test/compilable/test21299b.d @@ -0,0 +1,4 @@ +// EXTRA_SOURCES: imports/test21299/func.d imports/test21299/rootstringtable.d +// REQUIRED_ARGS: -main +// LINK: +module test21299b; diff --git a/gcc/testsuite/gdc.test/compilable/test21299c.d b/gcc/testsuite/gdc.test/compilable/test21299c.d new file mode 100644 index 0000000..88ed21f --- /dev/null +++ b/gcc/testsuite/gdc.test/compilable/test21299c.d @@ -0,0 +1,5 @@ +// EXTRA_SOURCES: imports/test21299/mtype.d imports/test21299/func.d imports/test21299/rootstringtable.d +// COMPILE_SEPARATELY: +// LINK: +module test21299c; +void main() {} diff --git a/gcc/testsuite/gdc.test/compilable/test21299d.d b/gcc/testsuite/gdc.test/compilable/test21299d.d new file mode 100644 index 0000000..67ec60a --- /dev/null +++ b/gcc/testsuite/gdc.test/compilable/test21299d.d @@ -0,0 +1,27 @@ +// REQUIRED_ARGS: -main +// LINK: +module test21299d; + +struct DefaultPredicates +{ + struct IsEqual(T) + { + static opCall(in T, in T) + { + return 0; + } + } +} + +void moveToEnd(T, Pred = DefaultPredicates.IsEqual!T)(T[] array, T element, Pred pred = Pred.init) +{ + pred(array[0], element); +} + +class Task +{ + void removeTerminationHook(void delegate() hook) + { + moveToEnd([], hook); + } +} diff --git a/gcc/testsuite/gfortran.dg/analyzer/pr97668.f b/gcc/testsuite/gfortran.dg/analyzer/pr97668.f new file mode 100644 index 0000000..568c891 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/analyzer/pr97668.f @@ -0,0 +1,26 @@ +c { dg-additional-options "-std=legacy" } + + SUBROUTINE PPADD (A, C, BH) + + COMPLEX DD, FP, FPP, R1, R2 + DIMENSION A(*), C(*), BH(*) + + DO 136 IG=IS,1 + FP = (0.,0.) + FPP = (0.,0.) + + DO 121 J=1,1 + DD = 1./2 + FP = DD + FPP = DD+1 + 121 CONTINUE + + R2 = -FP + IF (ABS(R1)-ABS(R2)) 129,129,133 + 129 R1 = R2/FPP + 133 IT = IT+1 + + 136 CONTINUE + + RETURN + END diff --git a/gcc/testsuite/gfortran.dg/attr_deprecated.f90 b/gcc/testsuite/gfortran.dg/attr_deprecated.f90 new file mode 100644 index 0000000..aa3f513 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/attr_deprecated.f90 @@ -0,0 +1,30 @@ +! { dg-do compile } + +module m + implicit none + integer :: A + integer, parameter :: PARM = 5 ! { dg-warning "Using parameter 'parm' declared at .1. is deprecated" } +!GCC$ ATTRIBUTES DEPRECATED :: A, foo, func, parm +contains +subroutine foo +end +integer function func() + func = 42 +end +subroutine bar + integer :: i + call foo ! { dg-warning "Using subroutine 'foo' at .1. is deprecated" } + print *, A ! { dg-warning "Using variable 'a' at .1. is deprecated" } + i = func() ! { dg-warning "Using function 'func' at .1. is deprecated" } + print *, PARM +end + +end module m + +use m ! { dg-warning "Using parameter 'parm' declared at .1. is deprecated" } + integer :: i + call foo ! { dg-warning "Using subroutine 'foo' at .1. is deprecated" } + print *, A ! { dg-warning "Using variable 'a' at .1. is deprecated" } + i = func() ! { dg-warning "Using function 'func' at .1. is deprecated" } + print *, PARM +end diff --git a/gcc/testsuite/gfortran.dg/coverage.f90 b/gcc/testsuite/gfortran.dg/coverage.f90 new file mode 100644 index 0000000..e0800f8 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/coverage.f90 @@ -0,0 +1,17 @@ +! { dg-do compile } +! { dg-additional-options "-fprofile-arcs -ftest-coverage" } +! +! PR fortran/95847 +! +module foo +contains + subroutine sbr() + end subroutine sbr +end module foo + +function foo_suite() result(suite) + use foo + integer :: bar + integer :: res + res = bar(sbr) +end function foo_suite diff --git a/gcc/testsuite/gfortran.dg/goacc-gomp/atomic.f90 b/gcc/testsuite/gfortran.dg/goacc-gomp/atomic.f90 new file mode 100644 index 0000000..59186a2 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/goacc-gomp/atomic.f90 @@ -0,0 +1,48 @@ +! { dg-do compile } */ +! { dg-additional-options "-fdump-tree-original" } */ + +subroutine foo + !$omp requires atomic_default_mem_order(acq_rel) + integer :: i, v + + !$omp atomic read + i = v + + !$acc atomic read + i = v + + !$omp atomic write + i = v + + !$acc atomic write + i = v + + !$omp atomic update + i = i + 1 + + !$acc atomic update + i = i + 1 + + !$omp atomic capture + i = i + 1 + v = i + !$omp end atomic + + !$acc atomic capture + i = i + 1 + v = i + !$acc end atomic + + ! Valid in C/C++ since OpenACC 2.5 but not in Fortran: + ! !$acc atomic update capture + ! i = i + 1 + ! v = i + ! !$acc end atomic +end + +! { dg-final { scan-tree-dump-times "i = #pragma omp atomic read acquire" 1 "original" } } +! { dg-final { scan-tree-dump-times "i = #pragma omp atomic read relaxed" 1 "original" } } +! { dg-final { scan-tree-dump-times "#pragma omp atomic release" 2 "original" } } +! { dg-final { scan-tree-dump-times "#pragma omp atomic relaxed" 2 "original" } } +! { dg-final { scan-tree-dump-times "v = #pragma omp atomic capture acq_rel" 1 "original" } } +! { dg-final { scan-tree-dump-times "v = #pragma omp atomic capture relaxed" 1 "original" } } diff --git a/gcc/testsuite/gfortran.dg/goacc-gomp/goacc-gomp.exp b/gcc/testsuite/gfortran.dg/goacc-gomp/goacc-gomp.exp new file mode 100644 index 0000000..6073fb3 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/goacc-gomp/goacc-gomp.exp @@ -0,0 +1,37 @@ +# Copyright (C) 2005-2020 Free Software Foundation, Inc. +# +# This file is part of GCC. +# +# GCC is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3, or (at your option) +# any later version. +# +# GCC is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GCC; see the file COPYING3. If not see +# <http://www.gnu.org/licenses/>. + +# GCC testsuite that uses the `dg.exp' driver. + +# Load support procs. +load_lib gfortran-dg.exp + +if { ![check_effective_target_fopenacc] \ + || ![check_effective_target_fopenmp] } { + return +} + +# Initialize `dg'. +dg-init + +# Main loop. +gfortran-dg-runtest [lsort \ + [find $srcdir/$subdir *.\[fF\]{,90,95,03,08} ] ] "" "-fopenacc -fopenmp" + +# All done. +dg-finish diff --git a/gcc/testsuite/gfortran.dg/goacc/atomic.f90 b/gcc/testsuite/gfortran.dg/goacc/atomic.f90 new file mode 100644 index 0000000..072d024 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/goacc/atomic.f90 @@ -0,0 +1,35 @@ +! { dg-do compile } + +subroutine foo + integer :: i, v + !$acc atomic read bar ! { dg-error "21: Unexpected junk after !.ACC ATOMIC statement" } + i = v + + !$acc atomic read write ! { dg-error "21: Unexpected junk after !.ACC ATOMIC statement" } + i = v + + !$acc atomic read seq_cst ! { dg-error "21: Unexpected junk after !.ACC ATOMIC statement" } + i = v + + !$acc atomic read relaxed ! { dg-error "21: Unexpected junk after !.ACC ATOMIC statement" } + i = v + + !$acc atomic update hint(1) ! { dg-error "23: Unexpected junk after !.ACC ATOMIC statement" } + i = i + 1 + + !$acc atomic update update capture ! { dg-error "23: Unexpected junk after !.ACC ATOMIC statement" } + i = i + 1 + v = i + + !$acc atomic update capture capture ! { dg-error "23: Unexpected junk after !.ACC ATOMIC statement" } + i = i + 1 + v = i + + !$acc atomic write capture ! { dg-error "22: Unexpected junk after !.ACC ATOMIC statement" } + i = 1 + + ! Valid in C/C++ since OpenACC 2.5 but not in Fortran: + !$acc atomic update capture ! { dg-error "23: Unexpected junk after !.ACC ATOMIC statement" } + i = i + 1 + v = i +end diff --git a/gcc/testsuite/gfortran.dg/goacc/clause-locations.f90 b/gcc/testsuite/gfortran.dg/goacc/clause-locations.f90 deleted file mode 100644 index 29798d3..0000000 --- a/gcc/testsuite/gfortran.dg/goacc/clause-locations.f90 +++ /dev/null @@ -1,18 +0,0 @@ -! Verify that the location information for clauses is correct. -! See also PR 92793. - -subroutine check_clause_columns () - implicit none (type, external) - integer :: i, j, sum, diff - - !$acc parallel - !$acc loop reduction(+:sum) - do i = 1, 10 - !$acc loop reduction(-:diff) reduction(-:sum) ! { dg-warning "47: conflicting reduction operations for .sum." } - do j = 1, 10 - sum = 1 - end do - end do - !$acc end parallel -end subroutine check_clause_columns - diff --git a/gcc/testsuite/gfortran.dg/goacc/loop-2-parallel-3.f95 b/gcc/testsuite/gfortran.dg/goacc/loop-2-parallel-3.f95 index 03cae74..5379fba 100644 --- a/gcc/testsuite/gfortran.dg/goacc/loop-2-parallel-3.f95 +++ b/gcc/testsuite/gfortran.dg/goacc/loop-2-parallel-3.f95 @@ -5,52 +5,52 @@ program test integer :: i !$acc parallel - !$acc loop gang(5) ! { dg-error "num arguments" } + !$acc loop gang(5) ! { dg-error "argument not permitted" } DO i = 1,10 ENDDO - !$acc loop gang(num:5) ! { dg-error "num arguments" } + !$acc loop gang(num:5) ! { dg-error "argument not permitted" } DO i = 1,10 ENDDO - !$acc loop worker(5) ! { dg-error "num arguments" } + !$acc loop worker(5) ! { dg-error "argument not permitted" } DO i = 1,10 ENDDO - !$acc loop worker(num:5) ! { dg-error "num arguments" } + !$acc loop worker(num:5) ! { dg-error "argument not permitted" } DO i = 1,10 ENDDO - !$acc loop vector(5) ! { dg-error "length arguments" } + !$acc loop vector(5) ! { dg-error "argument not permitted" } DO i = 1,10 ENDDO - !$acc loop vector(length:5) ! { dg-error "length arguments" } + !$acc loop vector(length:5) ! { dg-error "argument not permitted" } DO i = 1,10 ENDDO !$acc end parallel - !$acc parallel loop gang(5) ! { dg-error "num arguments" } + !$acc parallel loop gang(5) ! { dg-error "argument not permitted" } DO i = 1,10 ENDDO - !$acc parallel loop gang(num:5) ! { dg-error "num arguments" } + !$acc parallel loop gang(num:5) ! { dg-error "argument not permitted" } DO i = 1,10 ENDDO - !$acc parallel loop worker(5) ! { dg-error "num arguments" } + !$acc parallel loop worker(5) ! { dg-error "argument not permitted" } DO i = 1,10 ENDDO - !$acc parallel loop worker(num:5) ! { dg-error "num arguments" } + !$acc parallel loop worker(num:5) ! { dg-error "argument not permitted" } DO i = 1,10 ENDDO - !$acc parallel loop vector(5) ! { dg-error "length arguments" } + !$acc parallel loop vector(5) ! { dg-error "argument not permitted" } DO i = 1,10 ENDDO - !$acc parallel loop vector(length:5) ! { dg-error "length arguments" } + !$acc parallel loop vector(length:5) ! { dg-error "argument not permitted" } DO i = 1,10 ENDDO end diff --git a/gcc/testsuite/gfortran.dg/goacc/loop-5.f95 b/gcc/testsuite/gfortran.dg/goacc/loop-5.f95 deleted file mode 100644 index d059cf7..0000000 --- a/gcc/testsuite/gfortran.dg/goacc/loop-5.f95 +++ /dev/null @@ -1,357 +0,0 @@ -program test - implicit none - integer :: i, j - - !$acc kernels - !$acc loop auto - DO i = 1,10 - ENDDO - !$acc loop gang - DO i = 1,10 - ENDDO - !$acc loop gang(5) - DO i = 1,10 - ENDDO - !$acc loop gang(num:5) - DO i = 1,10 - ENDDO - !$acc loop gang(static:5) - DO i = 1,10 - ENDDO - !$acc loop gang(static:*) - DO i = 1,10 - ENDDO - !$acc loop gang - DO i = 1,10 - !$acc loop vector - DO j = 1,10 - ENDDO - !$acc loop worker - DO j = 1,10 - ENDDO - ENDDO - - !$acc loop worker - DO i = 1,10 - ENDDO - !$acc loop worker(5) - DO i = 1,10 - ENDDO - !$acc loop worker(num:5) - DO i = 1,10 - ENDDO - !$acc loop worker - DO i = 1,10 - !$acc loop vector - DO j = 1,10 - ENDDO - ENDDO - !$acc loop gang worker - DO i = 1,10 - ENDDO - - !$acc loop vector - DO i = 1,10 - ENDDO - !$acc loop vector(5) - DO i = 1,10 - ENDDO - !$acc loop vector(length:5) - DO i = 1,10 - ENDDO - !$acc loop vector - DO i = 1,10 - ENDDO - !$acc loop gang vector - DO i = 1,10 - ENDDO - !$acc loop worker vector - DO i = 1,10 - ENDDO - - !$acc loop auto - DO i = 1,10 - ENDDO - - !$acc loop tile(1) - DO i = 1,10 - ENDDO - !$acc loop tile(2) - DO i = 1,10 - ENDDO - !$acc loop tile(6-2) - DO i = 1,10 - ENDDO - !$acc loop tile(6+2) - DO i = 1,10 - ENDDO - !$acc loop tile(*) - DO i = 1,10 - ENDDO - !$acc loop tile(*, 1) - DO i = 1,10 - DO j = 1,10 - ENDDO - ENDDO - !$acc loop tile(-1) ! { dg-warning "must be positive" } - do i = 1,10 - enddo - !$acc loop vector tile(*) - DO i = 1,10 - ENDDO - !$acc loop worker tile(*) - DO i = 1,10 - ENDDO - !$acc loop gang tile(*) - DO i = 1,10 - ENDDO - !$acc loop vector gang tile(*) - DO i = 1,10 - ENDDO - !$acc loop vector worker tile(*) - DO i = 1,10 - ENDDO - !$acc loop gang worker tile(*) - DO i = 1,10 - ENDDO - !$acc end kernels - - - !$acc parallel - !$acc loop tile(1) - DO i = 1,10 - ENDDO - !$acc loop tile(*) - DO i = 1,10 - ENDDO - !$acc loop tile(2) - DO i = 1,10 - DO j = 1,10 - ENDDO - ENDDO - !$acc loop tile(-1) ! { dg-warning "must be positive" } - do i = 1,10 - enddo - !$acc loop vector tile(*) - DO i = 1,10 - ENDDO - !$acc loop worker tile(*) - DO i = 1,10 - ENDDO - !$acc loop gang tile(*) - DO i = 1,10 - ENDDO - !$acc loop vector gang tile(*) - DO i = 1,10 - ENDDO - !$acc loop vector worker tile(*) - DO i = 1,10 - ENDDO - !$acc loop gang worker tile(*) - DO i = 1,10 - ENDDO - !$acc end parallel - - !$acc kernels loop auto - DO i = 1,10 - ENDDO - !$acc kernels loop gang - DO i = 1,10 - ENDDO - !$acc kernels loop gang(5) - DO i = 1,10 - ENDDO - !$acc kernels loop gang(num:5) - DO i = 1,10 - ENDDO - !$acc kernels loop gang(static:5) - DO i = 1,10 - ENDDO - !$acc kernels loop gang(static:*) - DO i = 1,10 - ENDDO - !$acc kernels loop gang - DO i = 1,10 - !$acc kernels loop gang ! { dg-error "OpenACC construct inside of non-OpenACC region" } - DO j = 1,10 - ENDDO - ENDDO - - !$acc kernels loop worker - DO i = 1,10 - ENDDO - !$acc kernels loop worker(5) - DO i = 1,10 - ENDDO - !$acc kernels loop worker(num:5) - DO i = 1,10 - ENDDO - !$acc kernels loop worker - DO i = 1,10 - !$acc kernels loop worker ! { dg-error "OpenACC construct inside of non-OpenACC region" } - DO j = 1,10 - ENDDO - !$acc kernels loop gang ! { dg-error "OpenACC construct inside of non-OpenACC region" } - DO j = 1,10 - ENDDO - ENDDO - !$acc kernels loop gang worker - DO i = 1,10 - ENDDO - - !$acc kernels loop vector - DO i = 1,10 - ENDDO - !$acc kernels loop vector(5) - DO i = 1,10 - ENDDO - !$acc kernels loop vector(length:5) - DO i = 1,10 - ENDDO - !$acc kernels loop vector - DO i = 1,10 - !$acc kernels loop vector ! { dg-error "OpenACC construct inside of non-OpenACC region" } - DO j = 1,10 - ENDDO - !$acc kernels loop worker ! { dg-error "OpenACC construct inside of non-OpenACC region" } - DO j = 1,10 - ENDDO - !$acc kernels loop gang ! { dg-error "OpenACC construct inside of non-OpenACC region" } - DO j = 1,10 - ENDDO - ENDDO - !$acc kernels loop gang vector - DO i = 1,10 - ENDDO - !$acc kernels loop worker vector - DO i = 1,10 - ENDDO - - !$acc kernels loop auto - DO i = 1,10 - ENDDO - - !$acc kernels loop tile(1) - DO i = 1,10 - ENDDO - !$acc kernels loop tile(*) - DO i = 1,10 - ENDDO - !$acc kernels loop tile(*, 1) - DO i = 1,10 - DO j = 1,10 - ENDDO - ENDDO - !$acc kernels loop tile(-1) ! { dg-warning "must be positive" } - do i = 1,10 - enddo - !$acc kernels loop vector tile(*) - DO i = 1,10 - ENDDO - !$acc kernels loop worker tile(*) - DO i = 1,10 - ENDDO - !$acc kernels loop gang tile(*) - DO i = 1,10 - ENDDO - !$acc kernels loop vector gang tile(*) - DO i = 1,10 - ENDDO - !$acc kernels loop vector worker tile(*) - DO i = 1,10 - ENDDO - !$acc kernels loop gang worker tile(*) - DO i = 1,10 - ENDDO - - !$acc parallel loop auto - DO i = 1,10 - ENDDO - !$acc parallel loop gang - DO i = 1,10 - ENDDO - !$acc parallel loop gang(static:5) - DO i = 1,10 - ENDDO - !$acc parallel loop gang(static:*) - DO i = 1,10 - ENDDO - !$acc parallel loop gang - DO i = 1,10 - !$acc parallel loop gang ! { dg-error "OpenACC construct inside of non-OpenACC region" } - DO j = 1,10 - ENDDO - ENDDO - - !$acc parallel loop worker - DO i = 1,10 - ENDDO - !$acc parallel loop worker - DO i = 1,10 - !$acc parallel loop worker ! { dg-error "OpenACC construct inside of non-OpenACC region" } - DO j = 1,10 - ENDDO - !$acc parallel loop gang ! { dg-error "OpenACC construct inside of non-OpenACC region" } - DO j = 1,10 - ENDDO - ENDDO - !$acc parallel loop gang worker - DO i = 1,10 - ENDDO - - !$acc parallel loop vector - DO i = 1,10 - !$acc parallel loop vector ! { dg-error "OpenACC construct inside of non-OpenACC region" } - DO j = 1,10 - ENDDO - !$acc parallel loop worker ! { dg-error "OpenACC construct inside of non-OpenACC region" } - DO j = 1,10 - ENDDO - !$acc parallel loop gang ! { dg-error "OpenACC construct inside of non-OpenACC region" } - DO j = 1,10 - ENDDO - ENDDO - !$acc parallel loop gang vector - DO i = 1,10 - ENDDO - !$acc parallel loop worker vector - DO i = 1,10 - ENDDO - - !$acc parallel loop auto - DO i = 1,10 - ENDDO - - !$acc parallel loop tile(1) - DO i = 1,10 - ENDDO - !$acc parallel loop tile(*) - DO i = 1,10 - ENDDO - !$acc parallel loop tile(*, 1) - DO i = 1,10 - DO j = 1,10 - ENDDO - ENDDO - !$acc parallel loop tile(-1) ! { dg-warning "must be positive" } - do i = 1,10 - enddo - !$acc parallel loop vector tile(*) - DO i = 1,10 - ENDDO - !$acc parallel loop worker tile(*) - DO i = 1,10 - ENDDO - !$acc parallel loop gang tile(*) - DO i = 1,10 - ENDDO - !$acc parallel loop vector gang tile(*) - DO i = 1,10 - ENDDO - !$acc parallel loop vector worker tile(*) - DO i = 1,10 - ENDDO - !$acc parallel loop gang worker tile(*) - DO i = 1,10 - ENDDO -end diff --git a/gcc/testsuite/gfortran.dg/goacc/loop-6.f95 b/gcc/testsuite/gfortran.dg/goacc/loop-6.f95 deleted file mode 100644 index d0855b4..0000000 --- a/gcc/testsuite/gfortran.dg/goacc/loop-6.f95 +++ /dev/null @@ -1,74 +0,0 @@ -program test - implicit none - integer :: i, j - - !$acc parallel - !$acc loop auto - DO i = 1,10 - ENDDO - !$acc loop gang - DO i = 1,10 - ENDDO - !$acc loop gang(static:5) - DO i = 1,10 - ENDDO - !$acc loop gang(static:*) - DO i = 1,10 - ENDDO - !$acc loop gang - DO i = 1,10 - !$acc loop vector - DO j = 1,10 - ENDDO - !$acc loop worker - DO j = 1,10 - ENDDO - ENDDO - - !$acc loop worker - DO i = 1,10 - ENDDO - !$acc loop worker - DO i = 1,10 - !$acc loop vector - DO j = 1,10 - ENDDO - ENDDO - !$acc loop gang worker - DO i = 1,10 - ENDDO - - !$acc loop vector - DO i = 1,10 - ENDDO - !$acc loop vector(5) ! { dg-error "length arguments" } - DO i = 1,10 - ENDDO - !$acc loop vector(length:5) ! { dg-error "length arguments" } - DO i = 1,10 - ENDDO - !$acc loop vector - DO i = 1,10 - ENDDO - !$acc loop gang vector - DO i = 1,10 - ENDDO - !$acc loop worker vector - DO i = 1,10 - ENDDO - - !$acc loop auto - DO i = 1,10 - ENDDO - !$acc end parallel - - !$acc parallel loop vector - DO i = 1,10 - ENDDO - !$acc parallel loop vector(5) ! { dg-error "length arguments" } - DO i = 1,10 - ENDDO - !$acc parallel loop vector(length:5) ! { dg-error "length arguments" } - DO i = 1,10 - ENDDO -end diff --git a/gcc/testsuite/gfortran.dg/goacc/nested-reductions-1-kernels.f90 b/gcc/testsuite/gfortran.dg/goacc/nested-reductions-1-kernels.f90 new file mode 100644 index 0000000..60cb630 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/goacc/nested-reductions-1-kernels.f90 @@ -0,0 +1,300 @@ +! Test cases of nested 'reduction' clauses expected to compile cleanly. + +! See also 'c-c++-common/goacc/nested-reductions-1-kernels.c'. + +subroutine acc_kernels () + implicit none (type, external) + integer :: i, j, k, sum, diff + + !$acc kernels + !$acc loop reduction(+:sum) + do i = 1, 10 + do j = 1, 10 + do k = 1, 10 + sum = 1 + end do + end do + end do + + !$acc loop collapse(2) reduction(+:sum) + do i = 1, 10 + do j = 1, 10 + do k = 1, 10 + sum = 1 + end do + end do + end do + + !$acc loop reduction(+:sum) + do i = 1, 10 + !$acc loop reduction(+:sum) + do j = 1, 10 + do k = 1, 10 + sum = 1 + end do + end do + end do + + !$acc loop reduction(+:sum) + do i = 1, 10 + !$acc loop collapse(2) reduction(+:sum) + do j = 1, 10 + do k = 1, 10 + sum = 1 + end do + end do + end do + + !$acc loop reduction(+:sum) + do i = 1, 10 + do j = 1, 10 + !$acc loop reduction(+:sum) + do k = 1, 10 + sum = 1 + end do + end do + end do + + !$acc loop reduction(+:sum) + do i = 1, 10 + !$acc loop reduction(+:sum) + do j = 1, 10 + !$acc loop reduction(+:sum) + do k = 1, 10 + sum = 1 + end do + end do + end do + + !$acc loop reduction(+:sum) reduction(-:diff) + do i = 1, 10 + !$acc loop reduction(+:sum) + do j = 1, 10 + !$acc loop reduction(+:sum) + do k = 1, 10 + sum = 1 + end do + end do + + !$acc loop reduction(-:diff) + do j = 1, 10 + !$acc loop reduction(-:diff) + do k = 1, 10 + diff = 1 + end do + end do + end do + !$acc end kernels +end subroutine acc_kernels + +! The same tests as above, but using a combined kernels loop construct. + +subroutine acc_kernels_loop () + implicit none (type, external) + integer :: h, i, j, k, l, sum, diff + + !$acc kernels loop + do h = 1, 10 + !$acc loop reduction(+:sum) + do i = 1, 10 + do j = 1, 10 + do k = 1, 10 + sum = 1 + end do + end do + end do + + !$acc loop collapse(2) reduction(+:sum) + do i = 1, 10 + do j = 1, 10 + do k = 1, 10 + sum = 1 + end do + end do + end do + + !$acc loop reduction(+:sum) + do i = 1, 10 + !$acc loop reduction(+:sum) + do j = 1, 10 + do k = 1, 10 + sum = 1 + end do + end do + end do + + !$acc loop reduction(+:sum) + do i = 1, 10 + !$acc loop collapse(2) reduction(+:sum) + do j = 1, 10 + do k = 1, 10 + sum = 1 + end do + end do + end do + + !$acc loop reduction(+:sum) + do i = 1, 10 + do j = 1, 10 + !$acc loop reduction(+:sum) + do k = 1, 10 + sum = 1 + end do + end do + end do + + !$acc loop reduction(+:sum) + do i = 1, 10 + !$acc loop reduction(+:sum) ! { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } } + do j = 1, 10 + !$acc loop reduction(+:sum) + do k = 1, 10 + sum = 1 + end do + end do + end do + + !$acc loop reduction(+:sum) reduction(-:diff) + do i = 1, 10 + !$acc loop reduction(+:sum) ! { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } } + do j = 1, 10 + !$acc loop reduction(+:sum) + do k = 1, 10 + sum = 1 + end do + end do + + !$acc loop reduction(-:diff) ! { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } } + do j = 1, 10 + !$acc loop reduction(-:diff) + do k = 1, 10 + diff = 1 + end do + end do + end do + end do +end subroutine acc_kernels_loop + +! The same tests as above, but now the outermost reduction clause is on +! the kernels region, not the outermost loop. */ + +subroutine acc_kernels_reduction () + implicit none (type, external) + + ! In contrast to the 'parallel' construct, the 'reduction' clause is not + ! supported on the 'kernels' construct. +end subroutine acc_kernels_reduction + +! The same tests as above, but using a combined kernels loop construct, and +! the outermost reduction clause is on that one, not the outermost loop. */ +subroutine acc_kernels_loop_reduction () + implicit none (type, external) + integer :: h, i, j, k, sum, diff + + !$acc kernels loop reduction(+:sum) + do h = 1, 10 + do i = 1, 10 + do j = 1, 10 + do k = 1, 10 + sum = 1 + end do + end do + end do + + do i = 1, 10 + !$acc loop + do j = 1, 10 + do k = 1, 10 + sum = 1 + end do + end do + end do + + !$acc loop reduction(+:sum) + do i = 1, 10 + do j = 1, 10 + !$acc loop reduction(+:sum) + do k = 1, 10 + sum = 1 + end do + end do + end do + + do i = 1, 10 + do j = 1, 10 + !$acc loop + do k = 1, 10 + sum = 1 + end do + end do + end do + + !$acc loop reduction(+:sum) + do i = 1, 10 + !$acc loop reduction(+:sum) ! { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } } + do j = 1, 10 + !$acc loop reduction(+:sum) + do k = 1, 10 + sum = 1 + end do + end do + end do + + !$acc loop reduction(+:sum) reduction(-:diff) + do i = 1, 10 + !$acc loop reduction(+:sum) ! { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } } + do j = 1, 10 + !$acc loop reduction(+:sum) + do k = 1, 10 + sum = 1 + end do + end do + + !$acc loop reduction(-:diff) ! { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } } + do j = 1, 10 + !$acc loop reduction(-:diff) + do k = 1, 10 + diff = 1 + end do + end do + end do + + !$acc loop reduction(+:sum) + do i = 1, 10 + !$acc loop reduction(+:sum) ! { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } } + do j = 1, 10 + !$acc loop reduction(+:sum) + do k = 1, 10 + sum = 1 + end do + end do + + !$acc loop reduction(-:diff) ! { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } } + do j = 1, 10 + !$acc loop reduction(-:diff) + do k = 1, 10 + diff = 1 + end do + end do + end do + + !$acc loop reduction(+:sum) + do i = 1, 10 + !$acc loop reduction(+:sum) ! { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } } + do j = 1, 10 + !$acc loop reduction(+:sum) + do k = 1, 10 + sum = 1 + end do + end do + + !$acc loop ! { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } } + do j = 1, 10 + !$acc loop reduction(-:diff) + do k = 1, 10 + diff = 1 + end do + end do + end do + end do +end subroutine acc_kernels_loop_reduction diff --git a/gcc/testsuite/gfortran.dg/goacc/nested-reductions.f90 b/gcc/testsuite/gfortran.dg/goacc/nested-reductions-1-parallel.f90 index 3becafa..2915d67 100644 --- a/gcc/testsuite/gfortran.dg/goacc/nested-reductions.f90 +++ b/gcc/testsuite/gfortran.dg/goacc/nested-reductions-1-parallel.f90 @@ -1,4 +1,6 @@ -! Test cases of nested reduction loops that should compile cleanly. +! Test cases of nested 'reduction' clauses expected to compile cleanly. + +! See also 'c-c++-common/goacc/nested-reductions-1-parallel.c'. subroutine acc_parallel () implicit none (type, external) @@ -400,141 +402,3 @@ subroutine acc_parallel_loop_reduction () end do end do end subroutine acc_parallel_loop_reduction - -! The same tests as above, but inside a routine construct. -subroutine acc_routine () - implicit none (type, external) - !$acc routine gang - - integer :: i, j, k, sum, diff - - !$acc loop reduction(+:sum) - do i = 1, 10 - do j = 1, 10 - do k = 1, 10 - sum = 1 - end do - end do - end do - - !$acc loop collapse(2) reduction(+:sum) - do i = 1, 10 - do j = 1, 10 - do k = 1, 10 - sum = 1 - end do - end do - end do - - !$acc loop reduction(+:sum) - do i = 1, 10 - !$acc loop reduction(+:sum) - do j = 1, 10 - do k = 1, 10 - sum = 1 - end do - end do - end do - - !$acc loop reduction(+:sum) - do i = 1, 10 - !$acc loop collapse(2) reduction(+:sum) - do j = 1, 10 - do k = 1, 10 - sum = 1 - end do - end do - end do - - !$acc loop reduction(+:sum) - do i = 1, 10 - do j = 1, 10 - !$acc loop reduction(+:sum) - do k = 1, 10 - sum = 1 - end do - end do - end do - - !$acc loop reduction(+:sum) - do i = 1, 10 - !$acc loop reduction(+:sum) - do j = 1, 10 - !$acc loop reduction(+:sum) - do k = 1, 10 - sum = 1 - end do - end do - end do - - !$acc loop reduction(+:sum) reduction(-:diff) - do i = 1, 10 - !$acc loop reduction(+:sum) - do j = 1, 10 - !$acc loop reduction(+:sum) - do k = 1, 10 - sum = 1 - end do - end do - - !$acc loop reduction(-:diff) - do j = 1, 10 - !$acc loop reduction(-:diff) - do k = 1, 10 - diff = 1 - end do - end do - end do -end subroutine acc_routine - -subroutine acc_kernels () - implicit none (type, external) - integer :: i, j, k, sum, diff - - ! FIXME: These tests are not meaningful yet because reductions in - ! kernels regions are not supported yet. - !$acc kernels - !$acc loop reduction(+:sum) - do i = 1, 10 - do j = 1, 10 - do k = 1, 10 - sum = 1 - end do - end do - end do - - !$acc loop reduction(+:sum) - do i = 1, 10 - !$acc loop reduction(+:sum) - do j = 1, 10 - do k = 1, 10 - sum = 1 - end do - end do - end do - - - !$acc loop reduction(+:sum) - do i = 1, 10 - do j = 1, 10 - !$acc loop reduction(+:sum) - do k = 1, 10 - sum = 1 - end do - end do - end do - - - !$acc loop reduction(+:sum) - do i = 1, 10 - !$acc loop reduction(+:sum) - do j = 1, 10 - !$acc loop reduction(+:sum) - do k = 1, 10 - sum = 1 - end do - end do - end do - - !$acc end kernels -end subroutine acc_kernels diff --git a/gcc/testsuite/gfortran.dg/goacc/nested-reductions-1-routine.f90 b/gcc/testsuite/gfortran.dg/goacc/nested-reductions-1-routine.f90 new file mode 100644 index 0000000..17a5861 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/goacc/nested-reductions-1-routine.f90 @@ -0,0 +1,88 @@ +! Test cases of nested 'reduction' clauses expected to compile cleanly. + +! See also 'c-c++-common/goacc/nested-reductions-1-routine.c'. + +subroutine acc_routine () + implicit none (type, external) + !$acc routine gang + + integer :: i, j, k, sum, diff + + !$acc loop reduction(+:sum) + do i = 1, 10 + do j = 1, 10 + do k = 1, 10 + sum = 1 + end do + end do + end do + + !$acc loop collapse(2) reduction(+:sum) + do i = 1, 10 + do j = 1, 10 + do k = 1, 10 + sum = 1 + end do + end do + end do + + !$acc loop reduction(+:sum) + do i = 1, 10 + !$acc loop reduction(+:sum) + do j = 1, 10 + do k = 1, 10 + sum = 1 + end do + end do + end do + + !$acc loop reduction(+:sum) + do i = 1, 10 + !$acc loop collapse(2) reduction(+:sum) + do j = 1, 10 + do k = 1, 10 + sum = 1 + end do + end do + end do + + !$acc loop reduction(+:sum) + do i = 1, 10 + do j = 1, 10 + !$acc loop reduction(+:sum) + do k = 1, 10 + sum = 1 + end do + end do + end do + + !$acc loop reduction(+:sum) + do i = 1, 10 + !$acc loop reduction(+:sum) + do j = 1, 10 + !$acc loop reduction(+:sum) + do k = 1, 10 + sum = 1 + end do + end do + end do + + !$acc loop reduction(+:sum) reduction(-:diff) + do i = 1, 10 + !$acc loop reduction(+:sum) + do j = 1, 10 + !$acc loop reduction(+:sum) + do k = 1, 10 + sum = 1 + end do + end do + + !$acc loop reduction(-:diff) + do j = 1, 10 + !$acc loop reduction(-:diff) + do k = 1, 10 + diff = 1 + end do + end do + end do +end subroutine acc_routine diff --git a/gcc/testsuite/gfortran.dg/goacc/nested-reductions-2-kernels.f90 b/gcc/testsuite/gfortran.dg/goacc/nested-reductions-2-kernels.f90 new file mode 100644 index 0000000..6ee41843 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/goacc/nested-reductions-2-kernels.f90 @@ -0,0 +1,389 @@ +! Test erroneous cases of nested 'reduction' clauses. + +! See also 'c-c++-common/goacc/nested-reductions-2-kernels.c'. + +subroutine acc_kernels () + implicit none (type, external) + integer :: i, j, k, l, sum, diff + + !$acc kernels + !$acc loop reduction(+:sum) + do i = 1, 10 + !$acc loop ! { dg-warning "nested loop in reduction needs reduction clause for .sum." } + do j = 1, 10 + !$acc loop reduction(+:sum) + do k = 1, 10 + sum = 1 + end do + end do + end do + + !$acc loop reduction(+:sum) + do i = 1, 10 + !$acc loop collapse(2) ! { dg-warning "nested loop in reduction needs reduction clause for .sum." } + do j = 1, 10 + do k = 1, 10 + !$acc loop reduction(+:sum) + do l = 1, 10 + sum = 1 + end do + end do + end do + end do + + !$acc loop reduction(+:sum) + do i = 1, 10 + !$acc loop ! { dg-warning "nested loop in reduction needs reduction clause for .sum." } + do j = 1, 10 + !$acc loop ! { dg-warning "nested loop in reduction needs reduction clause for .sum." } + ! { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + do k = 1, 10 + !$acc loop reduction(+:sum) + do l = 1, 10 + sum = 1 + end do + end do + end do + end do + + !$acc loop reduction(+:sum) + do i = 1, 10 + !$acc loop reduction(-:sum) ! { dg-warning "conflicting reduction operations for .sum." } + do j = 1, 10 + !$acc loop reduction(+:sum) ! { dg-warning "conflicting reduction operations for .sum." } + do k = 1, 10 + sum = 1 + end do + end do + end do + + !$acc loop reduction(+:sum) + do i = 1, 10 + !$acc loop reduction(-:sum) ! { dg-warning "conflicting reduction operations for .sum." } + do j = 1, 10 + !$acc loop reduction(-:sum) + do k = 1, 10 + sum = 1 + end do + end do + end do + + !$acc loop reduction(+:sum) + do i = 1, 10 + !$acc loop reduction(-:sum) ! { dg-warning "conflicting reduction operations for .sum." } + do j = 1, 10 + !$acc loop ! { dg-warning "nested loop in reduction needs reduction clause for .sum." } + ! { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + do k = 1, 10 + !$acc loop reduction(*:sum) ! { dg-warning "conflicting reduction operations for .sum." } + do l = 1, 10 + sum = 1 + end do + end do + end do + end do + + !$acc loop reduction(+:sum) + do i = 1, 10 + !$acc loop reduction(-:sum) ! { dg-warning "conflicting reduction operations for .sum." } + do j = 1, 10 + !$acc loop reduction(+:sum) ! { dg-warning "conflicting reduction operations for .sum." } + ! { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + do k = 1, 10 + !$acc loop reduction(*:sum) ! { dg-warning "conflicting reduction operations for .sum." } + do l = 1, 10 + sum = 1 + end do + end do + end do + end do + + !$acc loop reduction(+:sum) reduction(-:diff) + do i = 1, 10 + !$acc loop reduction(-:diff) ! { dg-warning "nested loop in reduction needs reduction clause for .sum." } + do j = 1, 10 + !$acc loop reduction(+:sum) + do k = 1, 10 + sum = 1 + end do + end do + + !$acc loop reduction(+:sum) ! { dg-warning "nested loop in reduction needs reduction clause for .diff." } + do j = 1, 10 + !$acc loop reduction(-:diff) + do k = 1, 10 + diff = 1 + end do + end do + end do + !$acc end kernels +end subroutine acc_kernels + +! The same tests as above, but using a combined kernels loop construct. + +subroutine acc_kernels_loop () + implicit none (type, external) + integer :: h, i, j, k, l, sum, diff + + !$acc kernels loop + do h = 1, 10 + !$acc loop reduction(+:sum) + do i = 1, 10 + !$acc loop ! { dg-warning "nested loop in reduction needs reduction clause for .sum." } + ! { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + do j = 1, 10 + !$acc loop reduction(+:sum) + do k = 1, 10 + sum = 1 + end do + end do + end do + + !$acc loop reduction(+:sum) + do i = 1, 10 + !$acc loop collapse(2) ! { dg-warning "nested loop in reduction needs reduction clause for .sum." } + ! { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + do j = 1, 10 + do k = 1, 10 + !$acc loop reduction(+:sum) + do l = 1, 10 + sum = 1 + end do + end do + end do + end do + + + !$acc loop reduction(+:sum) + do i = 1, 10 + !$acc loop ! { dg-warning "nested loop in reduction needs reduction clause for .sum." } + ! { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + do j = 1, 10 + !$acc loop ! { dg-warning "nested loop in reduction needs reduction clause for .sum." } + ! { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + do k = 1, 10 + !$acc loop reduction(+:sum) + do l = 1, 10 + sum = 1 + end do + end do + end do + end do + + !$acc loop reduction(+:sum) + do i = 1, 10 + !$acc loop reduction(-:sum) ! { dg-warning "conflicting reduction operations for .sum." } + ! { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + do j = 1, 10 + !$acc loop reduction(+:sum) ! { dg-warning "conflicting reduction operations for .sum." } + do k = 1, 10 + sum = 1 + end do + end do + end do + + !$acc loop reduction(+:sum) + do i = 1, 10 + !$acc loop reduction(-:sum) ! { dg-warning "conflicting reduction operations for .sum." } + ! { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + do j = 1, 10 + !$acc loop reduction(-:sum) + do k = 1, 10 + sum = 1 + end do + end do + end do + + !$acc loop reduction(+:sum) + do i = 1, 10 + !$acc loop reduction(-:sum) ! { dg-warning "conflicting reduction operations for .sum." } + ! { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + do j = 1, 10 + !$acc loop ! { dg-warning "nested loop in reduction needs reduction clause for .sum." } + ! { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + do k = 1, 10 + !$acc loop reduction(*:sum) ! { dg-warning "conflicting reduction operations for .sum." } + do l = 1, 10 + sum = 1 + end do + end do + end do + end do + + !$acc loop reduction(+:sum) + do i = 1, 10 + !$acc loop reduction(-:sum) ! { dg-warning "conflicting reduction operations for .sum." } + ! { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + do j = 1, 10 + !$acc loop reduction(+:sum) ! { dg-warning "conflicting reduction operations for .sum." } + ! { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + do k = 1, 10 + !$acc loop reduction(*:sum) ! { dg-warning "conflicting reduction operations for .sum." } + do l = 1, 10 + sum = 1 + end do + end do + end do + end do + + !$acc loop reduction(+:sum) reduction(-:diff) + do i = 1, 10 + !$acc loop reduction(-:diff) ! { dg-warning "nested loop in reduction needs reduction clause for .sum." } + ! { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + do j = 1, 10 + !$acc loop reduction(+:sum) + do k = 1, 10 + sum = 1 + end do + end do + + !$acc loop reduction(+:sum) ! { dg-warning "nested loop in reduction needs reduction clause for .diff." } + ! { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + do j = 1, 10 + !$acc loop reduction(-:diff) + do k = 1, 10 + diff = 1 + end do + end do + end do + end do +end subroutine acc_kernels_loop + +! The same tests as above, but now the outermost reduction clause is on +! the kernels region, not the outermost loop. + +subroutine acc_kernels_reduction () + implicit none (type, external) + + ! In contrast to the 'parallel' construct, the 'reduction' clause is not + ! supported on the 'kernels' construct. +end subroutine acc_kernels_reduction + +! The same tests as above, but using a combined kernels loop construct, and +! the outermost reduction clause is on that one, not the outermost loop. */ +subroutine acc_kernels_loop_reduction () + implicit none (type, external) + integer :: h, i, j, k, l, sum, diff + + !$acc kernels loop reduction(+:sum) + do h = 1, 10 + !$acc loop ! { dg-warning "nested loop in reduction needs reduction clause for .sum." } + do i = 1, 10 + !$acc loop ! { dg-warning "nested loop in reduction needs reduction clause for .sum." } + ! { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + do j = 1, 10 + !$acc loop reduction(+:sum) + do k = 1, 10 + sum = 1 + end do + end do + end do + + !$acc loop ! { dg-warning "nested loop in reduction needs reduction clause for .sum." } + do i = 1, 10 + !$acc loop collapse(2) ! { dg-warning "nested loop in reduction needs reduction clause for .sum." } + ! { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + do j = 1, 10 + do k = 1, 10 + !$acc loop reduction(+:sum) + do l = 1, 10 + sum = 1 + end do + end do + end do + end do + + !$acc loop ! { dg-warning "nested loop in reduction needs reduction clause for .sum." } + do i = 1, 10 + !$acc loop ! { dg-warning "nested loop in reduction needs reduction clause for .sum." } + ! { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + do j = 1, 10 + !$acc loop ! { dg-warning "nested loop in reduction needs reduction clause for .sum." } + ! { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + do k = 1, 10 + !$acc loop reduction(+:sum) + do l = 1, 10 + sum = 1 + end do + end do + end do + end do + + !$acc loop ! { dg-warning "nested loop in reduction needs reduction clause for .sum." } + do i = 1, 10 + !$acc loop reduction(-:sum) ! { dg-warning "conflicting reduction operations for .sum." } + ! { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + do j = 1, 10 + !$acc loop reduction(+:sum) ! { dg-warning "conflicting reduction operations for .sum." } + do k = 1, 10 + sum = 1 + end do + end do + end do + + !$acc loop ! { dg-warning "nested loop in reduction needs reduction clause for .sum." } + do i = 1, 10 + !$acc loop reduction(-:sum) ! { dg-warning "conflicting reduction operations for .sum." } + ! { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + do j = 1, 10 + !$acc loop reduction(-:sum) + do k = 1, 10 + sum = 1 + end do + end do + end do + + !$acc loop reduction(max:sum) ! { dg-warning "conflicting reduction operations for .sum." } + do i = 1, 10 + !$acc loop reduction(-:sum) ! { dg-warning "conflicting reduction operations for .sum." } + ! { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + do j = 1, 10 + !$acc loop ! { dg-warning "nested loop in reduction needs reduction clause for .sum." } + ! { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + do k = 1, 10 + !$acc loop reduction(*:sum) ! { dg-warning "conflicting reduction operations for .sum." } + do l = 1, 10 + sum = 1 + end do + end do + end do + end do + + !$acc loop reduction(max:sum) ! { dg-warning "conflicting reduction operations for .sum." } + do i = 1, 10 + !$acc loop reduction(-:sum) ! { dg-warning "conflicting reduction operations for .sum." } + ! { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + do j = 1, 10 + !$acc loop reduction(+:sum) ! { dg-warning "conflicting reduction operations for .sum." } + ! { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + do k = 1, 10 + !$acc loop reduction(*:sum) ! { dg-warning "conflicting reduction operations for .sum." } + do l = 1, 10 + sum = 1 + end do + end do + end do + end do + + !$acc loop reduction(-:diff) ! { dg-warning "nested loop in reduction needs reduction clause for .sum." } + do i = 1, 10 + !$acc loop reduction(-:diff) ! { dg-warning "nested loop in reduction needs reduction clause for .sum." } + ! { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + do j = 1, 10 + !$acc loop reduction(+:sum) + do k = 1, 10 + sum = 1 + end do + end do + + !$acc loop reduction(+:sum) ! { dg-warning "nested loop in reduction needs reduction clause for .diff." } + ! { dg-warning "insufficient partitioning available to parallelize loop" "TODO" { xfail *-*-* } .-1 } + do j = 1, 10 + !$acc loop reduction(-:diff) + do k = 1, 10 + diff = 1 + end do + end do + end do + end do +end subroutine acc_kernels_loop_reduction diff --git a/gcc/testsuite/gfortran.dg/goacc/nested-reductions-warn.f90 b/gcc/testsuite/gfortran.dg/goacc/nested-reductions-2-parallel.f90 index ec36bc9..8fa2cab 100644 --- a/gcc/testsuite/gfortran.dg/goacc/nested-reductions-warn.f90 +++ b/gcc/testsuite/gfortran.dg/goacc/nested-reductions-2-parallel.f90 @@ -1,4 +1,6 @@ -! Test erroneous cases of nested reduction loops. +! Test erroneous cases of nested 'reduction' clauses. + +! See also 'c-c++-common/goacc/nested-reductions-2-parallel.c'. subroutine acc_parallel () implicit none (type, external) @@ -495,180 +497,3 @@ subroutine acc_parallel_loop_reduction () end do end do end subroutine acc_parallel_loop_reduction - -! The same tests as above, but inside a routine construct. -subroutine acc_routine () - implicit none (type, external) - !$acc routine gang - integer :: i, j, k, l, sum, diff - - !$acc loop reduction(+:sum) - do i = 1, 10 - !$acc loop ! { dg-warning "nested loop in reduction needs reduction clause for .sum." } - do j = 1, 10 - !$acc loop reduction(+:sum) - do k = 1, 10 - sum = 1 - end do - end do - end do - - !$acc loop reduction(+:sum) - do i = 1, 10 - !$acc loop collapse(2) ! { dg-warning "nested loop in reduction needs reduction clause for .sum." } - do j = 1, 10 - do k = 1, 10 - !$acc loop reduction(+:sum) - do l = 1, 10 - sum = 1 - end do - end do - end do - end do - - !$acc loop reduction(+:sum) - do i = 1, 10 - !$acc loop ! { dg-warning "nested loop in reduction needs reduction clause for .sum." } - do j = 1, 10 - !$acc loop ! { dg-warning "nested loop in reduction needs reduction clause for .sum." } - ! { dg-warning "insufficient partitioning available to parallelize loop" "" { target *-*-* } .-1 } - do k = 1, 10 - !$acc loop reduction(+:sum) - do l = 1, 10 - sum = 1 - end do - end do - end do - end do - - !$acc loop reduction(+:sum) - do i = 1, 10 - !$acc loop reduction(-:sum) ! { dg-warning "conflicting reduction operations for .sum." } - do j = 1, 10 - !$acc loop reduction(+:sum) ! { dg-warning "conflicting reduction operations for .sum." } - do k = 1, 10 - sum = 1 - end do - end do - end do - - !$acc loop reduction(+:sum) - do i = 1, 10 - !$acc loop reduction(-:sum) ! { dg-warning "conflicting reduction operations for .sum." } - do j = 1, 10 - !$acc loop reduction(-:sum) - do k = 1, 10 - sum = 1 - end do - end do - end do - - !$acc loop reduction(+:sum) - do i = 1, 10 - !$acc loop reduction(-:sum) ! { dg-warning "conflicting reduction operations for .sum." } - do j = 1, 10 - !$acc loop ! { dg-warning "nested loop in reduction needs reduction clause for .sum." } - ! { dg-warning "insufficient partitioning available to parallelize loop" "" { target *-*-* } .-1 } - do k = 1, 10 - !$acc loop reduction(*:sum) ! { dg-warning "conflicting reduction operations for .sum." } - do l = 1, 10 - sum = 1 - end do - end do - end do - end do - - !$acc loop reduction(+:sum) - do i = 1, 10 - !$acc loop reduction(-:sum) ! { dg-warning "conflicting reduction operations for .sum." } - do j = 1, 10 - !$acc loop reduction(+:sum) ! { dg-warning "conflicting reduction operations for .sum." } - ! { dg-warning "insufficient partitioning available to parallelize loop" "" { target *-*-* } .-1 } - do k = 1, 10 - !$acc loop reduction(*:sum) ! { dg-warning "conflicting reduction operations for .sum." } - do l = 1, 10 - sum = 1 - end do - end do - end do - end do - - !$acc loop reduction(+:sum) reduction(-:diff) - do i = 1, 10 - !$acc loop reduction(-:diff) ! { dg-warning "nested loop in reduction needs reduction clause for .sum." } - do j = 1, 10 - !$acc loop reduction(+:sum) - do k = 1, 10 - sum = 1 - end do - end do - - !$acc loop reduction(+:sum) ! { dg-warning "nested loop in reduction needs reduction clause for .diff." } - do j = 1, 10 - !$acc loop reduction(-:diff) - do k = 1, 10 - diff = 1 - end do - end do - end do -end subroutine acc_routine - -subroutine acc_kernels () - integer :: i, j, k, sum, diff - - ! FIXME: No diagnostics are produced for these loops because reductions - ! in kernels regions are not supported yet. - !$acc kernels - !$acc loop reduction(+:sum) - do i = 1, 10 - do j = 1, 10 - do k = 1, 10 - sum = 1 - end do - end do - end do - - !$acc loop reduction(+:sum) - do i = 1, 10 - !$acc loop - do j = 1, 10 - do k = 1, 10 - sum = 1 - end do - end do - end do - - !$acc loop reduction(+:sum) - do i = 1, 10 - !$acc loop reduction(-:diff) - do j = 1, 10 - !$acc loop - do k = 1, 10 - sum = 1 - end do - end do - end do - - !$acc loop reduction(+:sum) - do i = 1, 10 - !$acc loop - do j = 1, 10 - !$acc loop reduction(+:sum) - do k = 1, 10 - sum = 1 - end do - end do - end do - - !$acc loop reduction(+:sum) - do i = 1, 10 - !$acc loop reduction(-:sum) - do j = 1, 10 - !$acc loop reduction(+:sum) - do k = 1, 10 - sum = 1 - end do - end do - end do - !$acc end kernels -end subroutine acc_kernels diff --git a/gcc/testsuite/gfortran.dg/goacc/nested-reductions-2-routine.f90 b/gcc/testsuite/gfortran.dg/goacc/nested-reductions-2-routine.f90 new file mode 100644 index 0000000..cc7802e --- /dev/null +++ b/gcc/testsuite/gfortran.dg/goacc/nested-reductions-2-routine.f90 @@ -0,0 +1,119 @@ +! Test erroneous cases of nested 'reduction' clauses. + +! See also 'c-c++-common/goacc/nested-reductions-2-routine.c'. + +subroutine acc_routine () + implicit none (type, external) + !$acc routine gang + integer :: i, j, k, l, sum, diff + + !$acc loop reduction(+:sum) + do i = 1, 10 + !$acc loop ! { dg-warning "nested loop in reduction needs reduction clause for .sum." } + do j = 1, 10 + !$acc loop reduction(+:sum) + do k = 1, 10 + sum = 1 + end do + end do + end do + + !$acc loop reduction(+:sum) + do i = 1, 10 + !$acc loop collapse(2) ! { dg-warning "nested loop in reduction needs reduction clause for .sum." } + do j = 1, 10 + do k = 1, 10 + !$acc loop reduction(+:sum) + do l = 1, 10 + sum = 1 + end do + end do + end do + end do + + !$acc loop reduction(+:sum) + do i = 1, 10 + !$acc loop ! { dg-warning "nested loop in reduction needs reduction clause for .sum." } + do j = 1, 10 + !$acc loop ! { dg-warning "nested loop in reduction needs reduction clause for .sum." } + ! { dg-warning "insufficient partitioning available to parallelize loop" "" { target *-*-* } .-1 } + do k = 1, 10 + !$acc loop reduction(+:sum) + do l = 1, 10 + sum = 1 + end do + end do + end do + end do + + !$acc loop reduction(+:sum) + do i = 1, 10 + !$acc loop reduction(-:sum) ! { dg-warning "conflicting reduction operations for .sum." } + do j = 1, 10 + !$acc loop reduction(+:sum) ! { dg-warning "conflicting reduction operations for .sum." } + do k = 1, 10 + sum = 1 + end do + end do + end do + + !$acc loop reduction(+:sum) + do i = 1, 10 + !$acc loop reduction(-:sum) ! { dg-warning "conflicting reduction operations for .sum." } + do j = 1, 10 + !$acc loop reduction(-:sum) + do k = 1, 10 + sum = 1 + end do + end do + end do + + !$acc loop reduction(+:sum) + do i = 1, 10 + !$acc loop reduction(-:sum) ! { dg-warning "conflicting reduction operations for .sum." } + do j = 1, 10 + !$acc loop ! { dg-warning "nested loop in reduction needs reduction clause for .sum." } + ! { dg-warning "insufficient partitioning available to parallelize loop" "" { target *-*-* } .-1 } + do k = 1, 10 + !$acc loop reduction(*:sum) ! { dg-warning "conflicting reduction operations for .sum." } + do l = 1, 10 + sum = 1 + end do + end do + end do + end do + + !$acc loop reduction(+:sum) + do i = 1, 10 + !$acc loop reduction(-:sum) ! { dg-warning "conflicting reduction operations for .sum." } + do j = 1, 10 + !$acc loop reduction(+:sum) ! { dg-warning "conflicting reduction operations for .sum." } + ! { dg-warning "insufficient partitioning available to parallelize loop" "" { target *-*-* } .-1 } + do k = 1, 10 + !$acc loop reduction(*:sum) ! { dg-warning "conflicting reduction operations for .sum." } + do l = 1, 10 + sum = 1 + end do + end do + end do + end do + + !$acc loop reduction(+:sum) reduction(-:diff) + do i = 1, 10 + !$acc loop reduction(-:diff) ! { dg-warning "nested loop in reduction needs reduction clause for .sum." } + do j = 1, 10 + !$acc loop reduction(+:sum) + do k = 1, 10 + sum = 1 + end do + end do + + !$acc loop reduction(+:sum) ! { dg-warning "nested loop in reduction needs reduction clause for .diff." } + do j = 1, 10 + !$acc loop reduction(-:diff) + do k = 1, 10 + diff = 1 + end do + end do + end do +end subroutine acc_routine diff --git a/gcc/testsuite/gfortran.dg/goacc/pr92793-1.f90 b/gcc/testsuite/gfortran.dg/goacc/pr92793-1.f90 new file mode 100644 index 0000000..422131b --- /dev/null +++ b/gcc/testsuite/gfortran.dg/goacc/pr92793-1.f90 @@ -0,0 +1,135 @@ +! Verify column location information. + +! See also 'c-c++-common/goacc/pr92793-1.c'. + +! { dg-additional-options "-fdump-tree-original-lineno" } +! { dg-additional-options "-fdump-tree-gimple-lineno" } + +! No tabs. Funny indentation/spacing for a reason. + + +subroutine check () + implicit none (type, external) + integer :: i, j, sum, diff + + !$acc parallel & + !$acc & & ! Fortran location information points to the last line, and last character of the directive. +!$acc && ! { dg-final { scan-tree-dump-times "pr92793-1\\\.f90:18:123\\\] #pragma acc parallel" 1 "original" } } + !$acc & ! { dg-final { scan-tree-dump-times "pr92793-1\\\.f90:18:123\\\] #pragma omp target oacc_parallel" 1 "gimple" } } + !$acc loop & + !$acc & & ! Fortran location information points to the last line, and last character of the directive. + !$acc & & ! { dg-final { scan-tree-dump-times "pr92793-1\\\.f90:26:22\\\] #pragma acc loop" 1 "original" } } + !$acc & & ! { dg-final { scan-tree-dump-times "pr92793-1\\\.f90:26:22\\\] #pragma acc loop" 1 "gimple" } } + !$acc& reduction ( + : sum ) & ! { dg-line sum1 } + !$acc && ! Fortran location information points to the ':' in 'reduction(+:sum)'. + !$acc & & ! { dg-message "36: location of the previous reduction for 'sum'" "" { target *-*-* } sum1 } +!$acc& independent + do i = 1, 10 + !$acc loop & +!$acc & & ! Fortran location information points to the last line, and last character of the directive. + !$acc & & ! { dg-final { scan-tree-dump-times "pr92793-1\\\.f90:36:34\\\] #pragma acc loop" 1 "original" } } + !$acc & & ! { dg-final { scan-tree-dump-times "pr92793-1\\\.f90:36:34\\\] #pragma acc loop" 1 "gimple" } } + !$acc & reduction(-: diff ) & + !$acc&reduction(- : sum) & ! { dg-line sum2 } + !$acc & & ! Fortran location information points to the ':' in 'reduction(-:sum)'. + !$acc& & ! { dg-warning "32: conflicting reduction operations for 'sum'" "" { target *-*-* } sum2 } + !$acc &independent + do j = 1, 10 + sum & + & = & + & 1 + ! Fortran location information points to the last line, and last character of the statement. + ! { dg-final { scan-tree-dump-times "pr92793-1\\\.f90:40:9\\\] sum = 1" 1 "original" } } + ! { dg-final { scan-tree-dump-times "pr92793-1\\\.f90:40:9\\\] sum = 1" 1 "gimple" } } + end do + end do +!$acc end parallel +end subroutine check + + +subroutine gwv_sl_1 () + implicit none (type, external) + integer :: i + + !$acc serial loop & + !$acc & gang(num:5) & ! { dg-error "25: argument not permitted on 'gang' clause" } + !$acc & worker(num:5) & ! { dg-error "24: argument not permitted on 'worker' clause" } + !$acc & vector(length:5) ! { dg-error "28: argument not permitted on 'vector' clause" } + ! { dg-message "93: enclosing parent compute construct" "" { target *-*-* } .-1 } + do i = 0, 10 + end do + !$acc end serial loop +end subroutine gwv_sl_1 + +subroutine gwv_sl_2 () + implicit none (type, external) + integer :: i, j, k + + !$acc serial loop ! { dg-message "77: enclosing parent compute construct" } + do i = 0, 10 + !$acc loop ! { dg-bogus "enclosing parent compute construct" } + do j = 0, 10 + !$acc loop & + !$acc & gang(num:5) & ! { dg-error "35: argument not permitted on 'gang' clause" } + !$acc & worker(num:5) & ! { dg-error "32: argument not permitted on 'worker' clause" } + !$acc & vector(length:5) ! { dg-error "33: argument not permitted on 'vector' clause" } + do k = 0, 10 + end do + end do + end do + !$acc end serial loop +end subroutine gwv_sl_2 + +subroutine gwv_s_l () + implicit none (type, external) + integer :: i, j, k + + !$acc serial ! { dg-message "72: enclosing parent compute construct" } + !$acc loop & + !$acc & gang(num:5) & ! { dg-error "27: argument not permitted on 'gang' clause" } + !$acc & worker(num:5) & ! { dg-error "23: argument not permitted on 'worker' clause" } + !$acc & vector(length:5) ! { dg-error "29: argument not permitted on 'vector' clause" } + do i = 0, 10 + end do + + !$acc loop + do i = 0, 10 + !$acc loop ! { dg-bogus "enclosing parent compute construct" } + do j = 0, 10 + !$acc loop & + !$acc & gang(num:5) & ! { dg-error "35: argument not permitted on 'gang' clause" } + !$acc & worker(num:5) & ! { dg-error "32: argument not permitted on 'worker' clause" } + !$acc & vector(length:5) ! { dg-error "37: argument not permitted on 'vector' clause" } + do k = 0, 10 + end do + end do + end do +!$acc end serial +end subroutine gwv_s_l + +subroutine gwv_r () ! { dg-message "16: enclosing routine" } + implicit none (type, external) + integer :: i, j, k + + !$acc routine(gwv_r) + + !$acc loop & + !$acc & gang(num:5) & ! { dg-error "23: argument not permitted on 'gang' clause" } + !$acc & worker(num:5) & ! { dg-error "26: argument not permitted on 'worker' clause" } + !$acc & vector(length:5) ! { dg-error "27: argument not permitted on 'vector' clause" } + do i = 0, 10 + end do + + !$acc loop + do i = 0, 10 + !$acc loop + do j = 0, 10 + !$acc loop & + !$acc & gang(num:5) & ! { dg-error "31: argument not permitted on 'gang' clause" } + !$acc & worker(num:5) & ! { dg-error "31: argument not permitted on 'worker' clause" } + !$acc & vector(length:5) ! { dg-error "36: argument not permitted on 'vector' clause" } + do k = 0, 10 + end do + end do + end do +end subroutine gwv_r diff --git a/gcc/testsuite/gfortran.dg/goacc/specification-part.f90 b/gcc/testsuite/gfortran.dg/goacc/specification-part.f90 new file mode 100644 index 0000000..14af6ae --- /dev/null +++ b/gcc/testsuite/gfortran.dg/goacc/specification-part.f90 @@ -0,0 +1,100 @@ +! { dg-do compile } +! +! PR fortran/90111 +! +! Check that OpenACC directives in everywhere in specification part, +! i.e. it may appear before/after the use, import, implicit, and declaration +! + +module m +end module m + +subroutine foo0(kk) + use m + implicit none + integer :: jj, kk + !$acc routine +end + +subroutine foo1() + use m + implicit none + !$acc routine + integer :: jj +end + +subroutine foo2() + use m + !$acc routine + implicit none +end + +subroutine foo3() + !$acc routine + use m + implicit none +end + +module m2 + interface + subroutine foo0(kk) + use m + import + implicit none + integer :: kk + !$acc routine + end + subroutine foo1() + use m + import + implicit none + !$acc routine + end + subroutine foo2() + use m + import + !$acc routine + implicit none + end + subroutine foo3() + use m + !$acc routine + import + implicit none + end + subroutine foo4() + use m + !$acc routine + import + implicit none + end + end interface +end module m2 + +subroutine bar0() + use m + implicit none + integer :: ii + !$acc declare copyin(ii) +end + +subroutine bar1() + use m + implicit none + !$acc declare copyin(ii) + integer :: ii +end + +subroutine bar2() + use m + !$acc declare copyin(ii) + implicit none + integer :: ii +end + +subroutine bar3() + !$acc declare copyin(ii) + use m + implicit none + integer :: ii +end diff --git a/gcc/testsuite/gfortran.dg/goacc/warn_truncated.f90 b/gcc/testsuite/gfortran.dg/goacc/warn_truncated.f90 new file mode 100644 index 0000000..15ef3f5 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/goacc/warn_truncated.f90 @@ -0,0 +1,11 @@ +! { dg-do compile } +! PR fortran/97390 +! +integer :: tempRbuffer, array, compactHaloInfo, dimsizes, nHaloLayers, gpu_nList_send, gpu_idx_send, gpu_bufferOffset_send, counter + !$acc data present(tempRbuffer, array, compactHaloInfo, dimsizes, nHaloLayers, gpu_nList_send, gpu_idx_send, gpu_bufferOffset_send) async(counter+1) ! { dg-error "Line truncated" } +! { dg-error "Syntax error in Open.* variable list" "" { target "*-*-*" } .-1 } + + !$acc end data ! { dg-error "Unexpected !.ACC END DATA statement" } +end + +! { dg-message "some warnings being treated as errors" "" {target "*-*-*"} 0 } diff --git a/gcc/testsuite/gfortran.dg/gomp/atomic-2.f90 b/gcc/testsuite/gfortran.dg/gomp/atomic-2.f90 new file mode 100644 index 0000000..1de418d --- /dev/null +++ b/gcc/testsuite/gfortran.dg/gomp/atomic-2.f90 @@ -0,0 +1,70 @@ +! { dg-do compile } + +subroutine bar + integer :: i, v + real :: f + !$omp atomic update acq_rel hint("abc") ! { dg-error "OMP ATOMIC UPDATE at .1. incompatible with ACQ_REL or ACQUIRE clauses" } + ! { dg-error "HINT clause at .1. requires a scalar INTEGER expression" "" { target *-*-* } .-1 } + ! { dg-error "Value of HINT clause at .1. shall be a valid constant hint expression" "" { target *-*-* } .-2 } + i = i + 1 + !$omp end atomic + + !$omp atomic acq_rel ! { dg-error "OMP ATOMIC UPDATE at .1. incompatible with ACQ_REL or ACQUIRE clauses" } + i = i + 1 + !$omp end atomic + + !$omp atomic capture,acq_rel , hint (1) + i = i + 1 + v = i + !$omp end atomic + + !$omp atomic acq_rel , hint (1), update ! { dg-error "OMP ATOMIC UPDATE at .1. incompatible with ACQ_REL or ACQUIRE clauses" } + i = i + 1 + !$omp end atomic + + !$omp atomic hint(0),acquire capture + i = i + 1 + v = i + !$omp end atomic + + !$omp atomic write capture ! { dg-error "multiple atomic clauses" } + i = 2 + v = i + !$omp end atomic + + !$omp atomic foobar ! { dg-error "Failed to match clause" } +end + +! moved here from atomic.f90 +subroutine openmp51_foo + integer :: x, v + !$omp atomic update seq_cst capture ! { dg-error "multiple atomic clauses" } + x = x + 2 + v = x + !$omp end atomic + !$omp atomic seq_cst, capture, update ! { dg-error "multiple atomic clauses" } + x = x + 2 + v = x + !$omp end atomic + !$omp atomic capture, seq_cst ,update ! { dg-error "multiple atomic clauses" } + x = x + 2 + v = x + !$omp end atomic +end + +subroutine openmp51_bar + integer :: i, v + real :: f + !$omp atomic relaxed capture update ! { dg-error "multiple atomic clauses" } + i = i + 1 + v = i + !$omp end atomic + !$omp atomic update capture,release , hint (1) ! { dg-error "multiple atomic clauses" } + i = i + 1 + v = i + !$omp end atomic + !$omp atomic hint(0),update relaxed capture ! { dg-error "multiple atomic clauses" } + i = i + 1 + v = i + !$omp end atomic +end diff --git a/gcc/testsuite/gfortran.dg/gomp/atomic.f90 b/gcc/testsuite/gfortran.dg/gomp/atomic.f90 new file mode 100644 index 0000000..b4caf03 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/gomp/atomic.f90 @@ -0,0 +1,87 @@ +! { dg-do compile } +! { dg-additional-options "-fdump-tree-original" } + +! { dg-final { scan-tree-dump-times "#pragma omp atomic relaxed" 4 "original" } } +! { dg-final { scan-tree-dump-times "#pragma omp atomic release" 4 "original" } } +! { dg-final { scan-tree-dump-times "v = #pragma omp atomic capture relaxed" 2 "original" } } +! { dg-final { scan-tree-dump-times "v = #pragma omp atomic capture release" 1 "original" } } +! { dg-final { scan-tree-dump-times "v = #pragma omp atomic read acquire" 1 "original" } } + +! { dg-final { scan-tree-dump-times "#pragma omp atomic seq_cst" 7 "original" } } +! { dg-final { scan-tree-dump-times "v = #pragma omp atomic read seq_cst" 3 "original" } } +! { dg-final { scan-tree-dump-times "v = #pragma omp atomic capture seq_cst" 3 "original" } } + + +subroutine foo () + integer :: x, v + !$omp atomic + i = i + 2 + + !$omp atomic relaxed + i = i + 2 + + !$omp atomic seq_cst read + v = x + !$omp atomic seq_cst, read + v = x + !$omp atomic seq_cst write + x = v + !$omp atomic seq_cst ,write + x = v + !$omp atomic seq_cst update + x = x + v + !$omp atomic seq_cst , update + x = x + v + !$omp atomic seq_cst capture + x = x + 2 + v = x + !$omp end atomic + !$omp atomic seq_cst, capture + x = x + 2 + v = x + !$omp end atomic + !$omp atomic read , seq_cst + v = x + !$omp atomic write ,seq_cst + x = v + !$omp atomic update, seq_cst + x = x + v + !$omp atomic capture, seq_cst + x = x + 2 + v = x + !$omp end atomic +end + +subroutine bar + integer :: i, v + real :: f + !$omp atomic release, hint (0), update + i = i + 1 + !$omp end atomic + !$omp atomic hint(0)seq_cst + i = i + 1 + !$omp atomic relaxed,update,hint (0) + i = i + 1 + !$omp atomic release + i = i + 1 + !$omp atomic relaxed + i = i + 1 + !$omp atomic relaxed capture + i = i + 1 + v = i + !$omp end atomic + !$omp atomic capture,release , hint (1) + i = i + 1 + v = i + !$omp end atomic + !$omp atomic hint(0),relaxed capture + i = i + 1 + v = i + !$omp end atomic + !$omp atomic read acquire + v = i + !$omp atomic release,write + i = v + !$omp atomic hint(1),update,release + f = f + 2.0 +end diff --git a/gcc/testsuite/gfortran.dg/gomp/flush-1.f90 b/gcc/testsuite/gfortran.dg/gomp/flush-1.f90 new file mode 100644 index 0000000..d0b7f9e --- /dev/null +++ b/gcc/testsuite/gfortran.dg/gomp/flush-1.f90 @@ -0,0 +1,41 @@ +! { dg-additional-options "-fdump-tree-gimple" } +! { dg-final { scan-tree-dump "foo \\(4\\);\[\n\r]* __atomic_thread_fence \\(4\\);\[\n\r]* foo \\(4\\);" "gimple" } } +! { dg-final { scan-tree-dump "foo \\(3\\);\[\n\r]* __atomic_thread_fence \\(3\\);\[\n\r]* foo \\(3\\);" "gimple" } } +! { dg-final { scan-tree-dump "foo \\(2\\);\[\n\r]* __atomic_thread_fence \\(2\\);\[\n\r]* foo \\(2\\);" "gimple" } } +! { dg-final { scan-tree-dump "foo \\(5\\);\[\n\r]* __sync_synchronize \\(\\);\[\n\r]* foo \\(5\\);" "gimple" } } + +module m + interface + subroutine foo(x) + integer, value :: x + end + end interface +end module m + +subroutine f1 + use m + call foo (4) + !$omp flush acq_rel + call foo (4) +end + +subroutine f2 + use m + call foo (3) + !$omp flush release + call foo (3) +end + +subroutine f3 + use m + call foo (2) + !$omp flush acquire + call foo (2) +end + +subroutine f4 + use m + call foo (5) + !$omp flush + call foo (5) +end diff --git a/gcc/testsuite/gfortran.dg/gomp/flush-2.f90 b/gcc/testsuite/gfortran.dg/gomp/flush-2.f90 new file mode 100644 index 0000000..6857371 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/gomp/flush-2.f90 @@ -0,0 +1,18 @@ +module m + integer :: a, b +end module m + +subroutine foo (void) + use m + !$omp flush + !$omp flush (a, b) + !$omp flush acquire + !$omp flush release + !$omp flush acq_rel + !$omp flush relaxed ! { dg-error "Expected AQC_REL, RELEASE, or ACQUIRE" } + !$omp flush seq_cst ! { dg-error "Expected AQC_REL, RELEASE, or ACQUIRE" } + !$omp flush foobar ! { dg-error "Expected AQC_REL, RELEASE, or ACQUIRE" } + !$omp flush acquire (a, b) ! { dg-error "List specified together with memory order clause in FLUSH directive" } + !$omp flush release (a, b) ! { dg-error "List specified together with memory order clause in FLUSH directive" } + !$omp flush acq_rel (a, b) ! { dg-error "List specified together with memory order clause in FLUSH directive" } +end diff --git a/gcc/testsuite/gfortran.dg/gomp/map-2.f90 b/gcc/testsuite/gfortran.dg/gomp/map-2.f90 index 73c4f5a..79bab72 100644 --- a/gcc/testsuite/gfortran.dg/gomp/map-2.f90 +++ b/gcc/testsuite/gfortran.dg/gomp/map-2.f90 @@ -2,5 +2,5 @@ type t integer :: i end type t type(t) v -!$omp target enter data map(to:v%i, v%i) ! { dg-error "appears more than once in map clauses" } +!$omp target enter data map(to:v%i, v%i) end diff --git a/gcc/testsuite/gfortran.dg/gomp/requires-9.f90 b/gcc/testsuite/gfortran.dg/gomp/requires-9.f90 index a2b0f50..d90940d 100644 --- a/gcc/testsuite/gfortran.dg/gomp/requires-9.f90 +++ b/gcc/testsuite/gfortran.dg/gomp/requires-9.f90 @@ -80,6 +80,6 @@ end subroutine ! { dg-final { scan-tree-dump-times "#pragma omp atomic seq_cst\[\n\r]\[^\n\r]*&i5 =" 1 "original" } } ! { dg-final { scan-tree-dump-times "#pragma omp atomic seq_cst\[\n\r]\[^\n\r]*&i5b =" 1 "original" } } ! { dg-final { scan-tree-dump-times "#pragma omp atomic seq_cst\[\n\r]\[^\n\r]*&i6 =" 1 "original" } } -! { dg-final { scan-tree-dump-times "#pragma omp atomic acq_rel\[\n\r]\[^\n\r]*&i7 =" 1 "original" } } -! { dg-final { scan-tree-dump-times "#pragma omp atomic acq_rel\[\n\r]\[^\n\r]*&i7b =" 1 "original" } } +! { dg-final { scan-tree-dump-times "#pragma omp atomic release\[\n\r]\[^\n\r]*&i7 =" 1 "original" } } +! { dg-final { scan-tree-dump-times "#pragma omp atomic release\[\n\r]\[^\n\r]*&i7b =" 1 "original" } } ! { dg-final { scan-tree-dump-times "#pragma omp atomic seq_cst\[\n\r]\[^\n\r]*&i8 =" 1 "original" } } diff --git a/gcc/testsuite/gfortran.dg/guality/guality.exp b/gcc/testsuite/gfortran.dg/guality/guality.exp index eaa7ae7..0375edf 100644 --- a/gcc/testsuite/gfortran.dg/guality/guality.exp +++ b/gcc/testsuite/gfortran.dg/guality/guality.exp @@ -19,7 +19,7 @@ global GDB if ![info exists ::env(GUALITY_GDB_NAME)] { if [info exists GDB] { set guality_gdb_name "$GDB" - } elseif [file exists $rootme/../gdb/gdb] { + } elseif { [info exists rootme] && [file exists $rootme/../gdb/gdb] } { # If we're doing a combined build, and gdb is available, use it. set guality_gdb_name "$rootme/../gdb/gdb" } else { diff --git a/gcc/testsuite/gfortran.dg/index_4.f90 b/gcc/testsuite/gfortran.dg/index_4.f90 new file mode 100644 index 0000000..0909378 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/index_4.f90 @@ -0,0 +1,19 @@ +! { dg-do run } +! { dg-options "-fdump-tree-original" } +! { dg-final { scan-tree-dump-times "string_index" 0 "original" } } +! PR fortran/95979 + +program p + implicit none + integer, parameter :: i0 = index( 'abcd', 'b' , .true. , kind=4) + integer, parameter :: i1(*) = index(['abcd'], 'b' , .true. , kind=4) + integer, parameter :: i2(*) = index( 'abcd' ,['b'], .true. ) + integer, parameter :: i3(*) = index( 'abcd' , 'b' ,[.true.] ) + integer, parameter :: i4(*) = index(['abcd'],['b'],[.true.], kind=8) + if (size (i1) /= 1) stop 1 + if (size (i2) /= 1) stop 2 + if (size (i3) /= 1) stop 3 + if (size (i4) /= 1) stop 4 + if (i0 /= 2) stop 5 + if (i1(1) /= 2 .or. i2(1) /= 2 .or. i3(1) /= 2 .or. i4(1) /= 2) stop 6 +end diff --git a/gcc/testsuite/gfortran.dg/matmul_20.f90 b/gcc/testsuite/gfortran.dg/matmul_20.f90 new file mode 100644 index 0000000..7a211a4 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/matmul_20.f90 @@ -0,0 +1,47 @@ +! { dg-do run } +! PR97063 - Wrong result for vector (step size is negative) * matrix + +program p + implicit none + integer, parameter :: m = 3, k = 2*m, l = k-1, n = 4 + integer :: i, j, m1, m2, ms + integer :: ai(k), bi(k,n), ci(n), ci_ref(n), c1, c2 + real :: ar(k), br(k,n), cr(n), cr_ref(n) + + ai(:) = [(i,i=0,k-1)] + bi(:,:) = reshape ([(((5*i+j),i=0,k-1),j=0,n-1)],[k,n]) + + ! Parameters of subscript triplet + m1 = 1; m2 = l; ms = 2 + + ! Reference values for cross-checks: integer variant + c1 = dot_product (ai(m1:m2: ms), bi(m1:m2: ms,1)) + c2 = dot_product (ai(m1:m2: ms), bi(m1:m2: ms,2)) + ci_ref = matmul (ai(m1:m2: ms), bi(m1:m2: ms,:)) + ci = matmul (ai(m2:m1:-ms), bi(m2:m1:-ms,:)) + + if (ci_ref(1) /= c1 .or. ci_ref(2) /= c2) stop 1 + if (any (ci /= ci_ref)) stop 2 + + ! Real variant + ar = real (ai) + br = real (bi) + cr_ref = matmul (ar(m1:m2: ms), br(m1:m2: ms,:)) + cr = matmul (ar(m2:m1:-ms), br(m2:m1:-ms,:)) + + if (any (cr_ref /= real (ci_ref))) stop 3 + if (any (cr /= cr_ref )) stop 4 + + ! Mixed variants + cr_ref = matmul (ar(m1:m2: ms), bi(m1:m2: ms,:)) + cr = matmul (ar(m2:m1:-ms), bi(m2:m1:-ms,:)) + + if (any (cr_ref /= real (ci_ref))) stop 5 + if (any (cr /= cr_ref )) stop 6 + + cr_ref = matmul (ai(m1:m2: ms), br(m1:m2: ms,:)) + cr = matmul (ai(m2:m1:-ms), br(m2:m1:-ms,:)) + + if (any (cr_ref /= real (ci_ref))) stop 7 + if (any (cr /= cr_ref )) stop 8 +end program diff --git a/gcc/testsuite/gfortran.dg/pr95614_1.f90 b/gcc/testsuite/gfortran.dg/pr95614_1.f90 new file mode 100644 index 0000000..f835143 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/pr95614_1.f90 @@ -0,0 +1,6 @@ +! { dg-do compile } + +module m ! { dg-error ".1." } + common m ! { dg-error "cannot appear in a COMMON" } +end + diff --git a/gcc/testsuite/gfortran.dg/pr95614_2.f90 b/gcc/testsuite/gfortran.dg/pr95614_2.f90 new file mode 100644 index 0000000..9d69a50 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/pr95614_2.f90 @@ -0,0 +1,6 @@ +! { dg-do compile } + +module m ! { dg-error ".1." } + common /xc/ m ! { dg-error "cannot appear in a COMMON" } +end + diff --git a/gcc/testsuite/gfortran.dg/pr95614_3.f90 b/gcc/testsuite/gfortran.dg/pr95614_3.f90 new file mode 100644 index 0000000..7a66bec --- /dev/null +++ b/gcc/testsuite/gfortran.dg/pr95614_3.f90 @@ -0,0 +1,9 @@ +! { dg-do compile } + +subroutine s +end subroutine + +program pr95614 + common /c1/ s + s = 9.0 +end program diff --git a/gcc/testsuite/gfortran.dg/pr95614_4.f90 b/gcc/testsuite/gfortran.dg/pr95614_4.f90 new file mode 100644 index 0000000..48f9b9b --- /dev/null +++ b/gcc/testsuite/gfortran.dg/pr95614_4.f90 @@ -0,0 +1,9 @@ +! { dg-do compile } + +function f() + f = 1.0 +end function + +program pr95614 + common /c1/ f +end program diff --git a/gcc/testsuite/gfortran.dg/pr97500.f90 b/gcc/testsuite/gfortran.dg/pr97500.f90 new file mode 100644 index 0000000..d63b861 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/pr97500.f90 @@ -0,0 +1,35 @@ +! { dg-do run } +! { dg-additional-options "-ftree-vectorize -fno-guess-branch-probability" } +module testmod + implicit none + + contains + + subroutine foo(n) + integer, intent(in) :: n + real :: r(0:n,-n:n), a(0:n,-n:n), dj + integer :: k, j + + ! initialize with some dummy values + do j = -n, n + a(:, j) = j + r(:,j) = j + 1 + end do + + ! here be dragons + do k = 0, n + dj = r(k, k - 2) * a(k, k - 2) + r(k,k) = a(k, k - 1) * dj + enddo + + if (r(0,0) .ne. -2.) STOP 1 + + end subroutine + +end module + +program test + use testmod + implicit none + call foo(5) +end program diff --git a/gcc/testsuite/gfortran.dg/pr97505.f90 b/gcc/testsuite/gfortran.dg/pr97505.f90 new file mode 100644 index 0000000..f0599b3 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/pr97505.f90 @@ -0,0 +1,49 @@ +! { dg-do compile } +! { dg-options "-Os -fsanitize=signed-integer-overflow" } +! +! Test the fix for PR35824, in which the interface assignment and +! negation did not work correctly. +! +! Contributed by Rolf Roth <everyo@gmx.net> +! +module typemodule + type alltype + double precision :: a + double precision,allocatable :: b(:) + end type + interface assignment(=) + module procedure at_from_at + end interface + interface operator(-) + module procedure neg_at + end interface +contains + subroutine at_from_at(b,a) + type(alltype), intent(in) :: a + type(alltype), intent(out) :: b + b%a=a%a + allocate(b%b(2)) + b%b=a%b + end subroutine at_from_at + function neg_at(a) result(b) + type(alltype), intent(in) :: a + type(alltype) :: b + b%a=-a%a + allocate(b%b(2)) + b%b=-a%b + end function neg_at +end module + use typemodule + type(alltype) t1,t2,t3 + allocate(t1%b(2)) + t1%a=0.5d0 + t1%b(1)=1d0 + t1%b(2)=2d0 + t2=-t1 + if (t2%a .ne. -0.5d0) STOP 1 + if (any(t2%b .ne. [-1d0, -2d0])) STOP 2 + + t1=-t1 + if (t1%a .ne. -0.5d0) STOP 3 + if (any(t1%b .ne. [-1d0, -2d0])) STOP 4 +end diff --git a/gcc/testsuite/gfortran.dg/value_8.f90 b/gcc/testsuite/gfortran.dg/value_8.f90 new file mode 100644 index 0000000..8273fe8 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/value_8.f90 @@ -0,0 +1,16 @@ +! { dg-do compile } +! PR97491 - Wrong restriction for VALUE arguments of pure procedures + +pure function foo (x) result (ret) + integer :: ret + integer, value :: x + x = x / 2 + ret = x +end function foo + +elemental function foo1 (x) + integer :: foo1 + integer, value :: x + x = x / 2 + foo1 = x +end function foo1 diff --git a/gcc/testsuite/gfortran.dg/vect/O3-bb-slp-1.f b/gcc/testsuite/gfortran.dg/vect/O3-bb-slp-1.f new file mode 100644 index 0000000..74b3b17 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/vect/O3-bb-slp-1.f @@ -0,0 +1,28 @@ +! { dg-do compile } + subroutine tranx3 (jbeg,jend,kbeg,kend,dlo,den,mflx,zro) + parameter(in = 128+5 + & , jn = 128+5 + & , kn = 128+5) + parameter(ijkn = 128+5) + real*8 zro, dqm, dqp, dx3bi (kn) + real*8 mflux (ijkn,4), dtwid (ijkn,4), dd (ijkn,4) + real*8 mflx (in,jn,kn) + real*8 dlo (in,jn,kn), den (in,jn,kn) + do 2100 j=jbeg-1,jend + dtwid (k,1) = ( 0.5 + q1 ) * ( dlo(i ,j,k-1) + 3 - ( dx3a(k ) + xi ) * dd (k ,1) ) + mflux (k,1) = dtwid (k,1) * ( v3(i ,j,k) - vg3(k) ) * dt + if (j.ge.jbeg) then + den(i ,j,k) = ( dlo(i ,j,k) * dvl3a(k) + 1 - etwid (k+1,1) + etwid (k,1) ) * dvl3a i(k) + if (kend .eq. ke) mflx(i ,j,ke+1) = mflux (ke+1,1) + endif + do 2030 k=max(kbeg-2,ks-1),kend+1 + dqm = (dlo(i ,j,k ) - dlo(i ,j,k-1)) * dx3bi(k ) + dqp = (dlo(i ,j,k+1) - dlo(i ,j,k )) * dx3bi(k+1) + dd(k,1) = max ( dqm * dqp, zro ) +2030 continue + dtwid (k,3) = ( 0.5 + q1 ) * ( dlo(i+2,j,k-1) + 3 - ( dx3a(k ) + xi ) * deod (k ,3) ) +2100 continue + end diff --git a/gcc/testsuite/gfortran.dg/vect/O3-bb-slp-2.f b/gcc/testsuite/gfortran.dg/vect/O3-bb-slp-2.f new file mode 100644 index 0000000..34c44de --- /dev/null +++ b/gcc/testsuite/gfortran.dg/vect/O3-bb-slp-2.f @@ -0,0 +1,40 @@ +! { dg-do compile } +! { dg-additional-options "-mavx2" { target x86_64-*-* i?86-*-* } } + subroutine tranx3 (ibeg,jbeg,jend,kbeg,kend + & ,dlo,den + & ,edn) + parameter(in = 128+5 + & , jn = 128+5 + & , kn = 128+5) + parameter(ijkn = 128+5) + real*8 e (in,jn,kn), dqm, dvl3a (kn), dvl3ai (kn) + & , dtwid (ijkn,4), dd (ijkn,4) + & , etwid (ijkn,4), deod (ijkn,4) + real*8 dlo (in,jn,kn), den (in,jn,kn) + & , edn (in,jn,kn) + do 2100 j=jbeg-1,jend + i = ibeg - 1 + do 1080 k=kbeg,kend + den(i ,j,k) = ( dlo(i ,j,k) * dvl3a(k) + 1 - etwid (k+1,1) + etwid (k,1) ) * dvl3a i(k) +1080 continue + do 2030 k=max(kbeg-2,ks-1),kend+1 + dqm = (dlo(i+2,j,k ) - dlo(i+2,j,k-1)) * dx3bi(k ) + dd(k,4) = max ( dqm * dqp, zro ) +2030 continue + dtwid (k,3) = ( 0.5 + q1 ) * ( dlo(i+2,j,k-1) + 1 + ( dx3a(k-1) - xi ) * dd (k-1,3) ) + 2 + ( 0.5 - q1 ) * ( dlo(i+2,j,k ) + 3 - ( dx3a(k ) + xi ) * deod (k ,3) ) + do 2080 k=kbeg,kend + den(i ,j,k) = ( dlo(i ,j,k) * dvl3a(k) + 1 - dtwid (k+1,3) + dtwid (k,3) ) * dvl3a i(k) + e (i+2,j,k) = ( e (i+2,j,k) * dvl3a(k) + 1 - etwid (k+1,3) + etwid (k,3) ) * dvl3a i(k) + edn(i+2,j,k) = e(i+2,j,k) / den(i+2,j,k) + e (i+3,j,k) = ( e (i+3,j,k) * dvl3a(k) + 1 - etwid (k+1,4) + etwid (k,4) ) * dvl3a i(k) + edn(i+3,j,k) = e(i+3,j,k) / den(i+3,j,k) +2080 continue +2100 continue + end diff --git a/gcc/testsuite/gfortran.dg/vect/pr97761.f90 b/gcc/testsuite/gfortran.dg/vect/pr97761.f90 new file mode 100644 index 0000000..250e2bf --- /dev/null +++ b/gcc/testsuite/gfortran.dg/vect/pr97761.f90 @@ -0,0 +1,32 @@ +! { dg-do compile } +! { dg-additional-options "-O1" } + +subroutine ni (ps) + type vector + real x, y + end type + type quad_inductor + type (vector) v1, v2 + end type + type (quad_inductor), dimension(inout) :: ps + integer :: dl, nk = 1.0 + fo = 1.0 + if (f == 1) then + nk = 0.0 + fo = 0.0 + end if + ot = nk * 0.5 + gb = -fo * 0.5 + wu = fo * 0.5 + up = nk * 0.1 + xe = up * 0.1 + do lx = 0, 7 + ps%v2%y = -wu + ps(dl)%v1%x = xe + 1.0 + ps(dl)%v1%y = wu - tn + end do + do lx = 0, 7 + ps(dl)%v1%x = 0.1 - ot + ps(dl)%v1%y = 0.1 - wu + end do +end diff --git a/gcc/testsuite/gfortran.dg/vect/vect-4.f90 b/gcc/testsuite/gfortran.dg/vect/vect-4.f90 index c2eeafd..9c067c6 100644 --- a/gcc/testsuite/gfortran.dg/vect/vect-4.f90 +++ b/gcc/testsuite/gfortran.dg/vect/vect-4.f90 @@ -13,4 +13,3 @@ Y = Y + A * X END ! { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } -! { dg-final { scan-tree-dump-times "accesses have the same alignment." 1 "vect" } } diff --git a/gcc/testsuite/gnat.dg/assert1.adb b/gcc/testsuite/gnat.dg/assert1.adb index d761cd0..7a40d3c 100644 --- a/gcc/testsuite/gnat.dg/assert1.adb +++ b/gcc/testsuite/gnat.dg/assert1.adb @@ -2,8 +2,9 @@ -- { dg-options "-gnatws" } pragma Assertion_Policy (Check); -with Text_IO; use Text_IO; + procedure assert1 is + Int128 : constant Boolean := Standard'Max_Integer_Size = 128; type p1 is array (1 .. 113) of Boolean; pragma Pack (p1); type p2 is array (1 .. 13) of Boolean; @@ -19,21 +20,21 @@ procedure assert1 is v3 : p3; v4 : p4; begin - pragma Assert (p1'Size = 120); + pragma Assert (p1'Size = (if Int128 then 113 else 120)); pragma Assert (p2'Size = 13); pragma Assert (p3'Size = 113); pragma Assert (p4'Size = 13); - pragma Assert (p1'Value_Size = 120); + pragma Assert (p1'Value_Size = (if Int128 then 113 else 120)); pragma Assert (p2'Value_Size = 13); pragma Assert (p3'Value_Size = 113); pragma Assert (p4'Value_Size = 13); - pragma Assert (p1'Object_Size = 120); + pragma Assert (p1'Object_Size = (if Int128 then 128 else 120)); pragma Assert (p2'Object_Size = 16); - pragma Assert (p3'Object_Size = 120); + pragma Assert (p3'Object_Size = (if Int128 then 128 else 120)); pragma Assert (p4'Object_Size = 16); - pragma Assert (v1'Size = 120); + pragma Assert (v1'Size = (if Int128 then 128 else 120)); pragma Assert (v2'Size = 16); - pragma Assert (v3'Size = 120); + pragma Assert (v3'Size = (if Int128 then 128 else 120)); pragma Assert (v4'Size = 16); null; end; diff --git a/gcc/testsuite/gnat.dg/multfixed.adb b/gcc/testsuite/gnat.dg/multfixed.adb index 2eca3cd..572cd32 100644 --- a/gcc/testsuite/gnat.dg/multfixed.adb +++ b/gcc/testsuite/gnat.dg/multfixed.adb @@ -18,7 +18,7 @@ begin raise Program_Error; exception when Exc : Constraint_Error => - if Exception_Message (Exc) /= "System.Arith_64.Raise_Error: 64-bit arithmetic overflow" then + if Exception_Message (Exc) /= "System.Arith_64.Impl.Raise_Error: Double arithmetic overflow" then raise Program_Error; end if; -end Multfixed;
\ No newline at end of file +end Multfixed; diff --git a/gcc/testsuite/gnat.dg/opt11.adb b/gcc/testsuite/gnat.dg/opt11.adb index 9189814..e02e426 100644 --- a/gcc/testsuite/gnat.dg/opt11.adb +++ b/gcc/testsuite/gnat.dg/opt11.adb @@ -6,7 +6,7 @@ package body Opt11 is procedure Proc is R : Rec; begin - R := (others => <>); + R := (others => <>); -- { dg-warning "aggregate not fully initialized" } end; end Opt11; diff --git a/gcc/testsuite/gnat.dg/opt88.adb b/gcc/testsuite/gnat.dg/opt88.adb new file mode 100644 index 0000000..a6abd01 --- /dev/null +++ b/gcc/testsuite/gnat.dg/opt88.adb @@ -0,0 +1,52 @@ +-- { dg-do run } +-- { dg-options "-O -ftree-vrp -fno-inline" } + +procedure Opt88 is + + Val : Integer := 1; + + procedure Dummy (B : out Boolean) is + begin + B := True; + end; + + function Test return Boolean is + begin + return False; + end; + + procedure Do_It (OK : out Boolean) is + + Blue : Boolean := False; + Red : Boolean := False; + + begin + OK := True; + Blue := True; + Dummy (Red); + + if Red then + Red := False; + + if Test then + Dummy (Red); + end if; + end if; + + if Blue and not Red then + Val := 0; + end if; + + if Red then + OK := False; + end if; + end; + + OK : Boolean; + +begin + Do_It (OK); + if not OK then + raise Program_Error; + end if; +end; diff --git a/gcc/testsuite/gnat.dg/sin_cos.adb b/gcc/testsuite/gnat.dg/sin_cos.adb new file mode 100644 index 0000000..6e18df9 --- /dev/null +++ b/gcc/testsuite/gnat.dg/sin_cos.adb @@ -0,0 +1,14 @@ +-- { dg-do compile } +-- { dg-options "-O2 -gnatn" } + +with Ada.Numerics.Elementary_Functions; +use Ada.Numerics.Elementary_Functions; +package body Sin_Cos is + procedure Sin_Cos (Angle : T; SinA, CosA : out T) is + begin + SinA := Sin (Angle); + CosA := Cos (Angle); + end; +end Sin_Cos; + +-- { dg-final { scan-assembler "sincos\|cexp" { target *-linux-gnu* *-w64-mingw* *-*-vxworks* } } } diff --git a/gcc/testsuite/gnat.dg/sin_cos.ads b/gcc/testsuite/gnat.dg/sin_cos.ads new file mode 100644 index 0000000..a0eff3d --- /dev/null +++ b/gcc/testsuite/gnat.dg/sin_cos.ads @@ -0,0 +1,4 @@ +package Sin_Cos is + subtype T is Float; + procedure Sin_Cos (Angle : T; SinA, CosA : out T); +end Sin_Cos; diff --git a/gcc/testsuite/gnat.dg/size_clause1.adb b/gcc/testsuite/gnat.dg/size_clause1.adb index fc090eb..0a313bf 100644 --- a/gcc/testsuite/gnat.dg/size_clause1.adb +++ b/gcc/testsuite/gnat.dg/size_clause1.adb @@ -4,7 +4,7 @@ procedure Size_Clause1 is for Modular'Size use 64; subtype Enlarged_Modular is Modular; - for Enlarged_Modular'Object_Size use 128; -- { dg-warning "warning: 64 bits of \"Enlarged_Modular\" unused" } + for Enlarged_Modular'Object_Size use 128; -- { dg-warning "64 bits of \"Enlarged_Modular\" unused" "" { target { ! lp64 } } } begin null; diff --git a/gcc/testsuite/gnat.dg/specs/rep_clause5.ads b/gcc/testsuite/gnat.dg/specs/rep_clause5.ads index ffac17b..3e1ff4d 100644 --- a/gcc/testsuite/gnat.dg/specs/rep_clause5.ads +++ b/gcc/testsuite/gnat.dg/specs/rep_clause5.ads @@ -33,6 +33,7 @@ package Rep_Clause5 is type Array_2_Type is array (0 .. 127) of Boolean; for Array_2_Type'size use 128; + for Array_2_Type'Alignment use 4; type Array_3_Type is array (0 .. 31) of Boolean; for Array_3_Type'size use 32; diff --git a/gcc/testsuite/gnat.dg/warn11.adb b/gcc/testsuite/gnat.dg/warn11.adb index e92835f..7e6f1a1 100644 --- a/gcc/testsuite/gnat.dg/warn11.adb +++ b/gcc/testsuite/gnat.dg/warn11.adb @@ -5,7 +5,7 @@ with Ada.Text_IO; use Ada.Text_IO; procedure Warn11 is type My_Integer is new Integer range 1 .. 10; - for My_Integer'Size use 65; -- { dg-warning "unused" } + for My_Integer'Size use 65; -- { dg-warning "unused" "" { target { ! lp64 } } } type My_Integer2 is new Integer range 1 .. 10; for My_Integer2'Size use 129; -- { dg-warning "unused" } diff --git a/gcc/testsuite/gnat.dg/warn14.adb b/gcc/testsuite/gnat.dg/warn14.adb index d7fbece..f9d03d1 100644 --- a/gcc/testsuite/gnat.dg/warn14.adb +++ b/gcc/testsuite/gnat.dg/warn14.adb @@ -23,7 +23,7 @@ procedure Warn14 is package YY is type XX is tagged null record; - function F4 (Y : XX; U : Boolean) return Natural is (1); -- { dg-warning "formal parameter \"U\" is not referenced" } + function F4 (Y : XX; U : Boolean) return Natural is (1); end YY; XXX : YY.XX; diff --git a/gcc/testsuite/lib/asan-dg.exp b/gcc/testsuite/lib/asan-dg.exp index 2124607..ce745df 100644 --- a/gcc/testsuite/lib/asan-dg.exp +++ b/gcc/testsuite/lib/asan-dg.exp @@ -151,8 +151,10 @@ proc asan_finish { args } { unset TEST_ALWAYS_FLAGS } } - set ld_library_path $asan_saved_library_path - set_ld_library_path_env_vars + if [info exists asan_saved_library_path ] { + set ld_library_path $asan_saved_library_path + set_ld_library_path_env_vars + } clear_effective_target_cache } diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index ecf8be3..60ebbb3 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -86,7 +86,10 @@ proc check_compile {basename type contents args} { set f [open $src "w"] puts $f $contents close $f + global compiler_flags + set save_compiler_flags $compiler_flags set lines [${tool}_target_compile $src $output $compile_type "$options"] + set compiler_flags $save_compiler_flags file delete $src set scan_output $output @@ -9690,6 +9693,44 @@ proc check_effective_target_fenv_exceptions {} { } [add_options_for_ieee "-std=gnu99"]] } +# Return 1 if <fenv.h> is available with all the standard IEEE +# exceptions and floating-point exceptions are raised by arithmetic +# operations for decimal floating point. (If the target requires +# special options for "inexact" exceptions, those need to be specified +# in the testcases.) + +proc check_effective_target_fenv_exceptions_dfp {} { + return [check_runtime fenv_exceptions_dfp { + #include <fenv.h> + #include <stdlib.h> + #ifndef FE_DIVBYZERO + # error Missing FE_DIVBYZERO + #endif + #ifndef FE_INEXACT + # error Missing FE_INEXACT + #endif + #ifndef FE_INVALID + # error Missing FE_INVALID + #endif + #ifndef FE_OVERFLOW + # error Missing FE_OVERFLOW + #endif + #ifndef FE_UNDERFLOW + # error Missing FE_UNDERFLOW + #endif + volatile _Decimal64 a = 0.0DD, r; + int + main (void) + { + r = a / a; + if (fetestexcept (FE_INVALID)) + exit (0); + else + abort (); + } + } [add_options_for_ieee "-std=gnu99"]] +} + # Return 1 if -fexceptions is supported. proc check_effective_target_exceptions {} { @@ -10579,3 +10620,14 @@ proc check_effective_target_movdir { } { } } "-mmovdiri -mmovdir64b" ] } + +# Return 1 if target is not support address sanitize, 1 otherwise. + +proc check_effective_target_no_fsanitize_address {} { + if ![check_no_compiler_messages fsanitize_address executable { + int main (void) { return 0; } + }] { + return 1; + } + return 0; +} diff --git a/gcc/testsuite/lib/tsan-dg.exp b/gcc/testsuite/lib/tsan-dg.exp index b5631a7..6dcfd0a 100644 --- a/gcc/testsuite/lib/tsan-dg.exp +++ b/gcc/testsuite/lib/tsan-dg.exp @@ -150,7 +150,9 @@ proc tsan_finish { args } { } else { unset dg-do-what-default } - set ld_library_path $tsan_saved_library_path - set_ld_library_path_env_vars + if [info exists tsan_saved_library_path ] { + set ld_library_path $tsan_saved_library_path + set_ld_library_path_env_vars + } clear_effective_target_cache } diff --git a/gcc/testsuite/lib/ubsan-dg.exp b/gcc/testsuite/lib/ubsan-dg.exp index f4ab29e..31740e0 100644 --- a/gcc/testsuite/lib/ubsan-dg.exp +++ b/gcc/testsuite/lib/ubsan-dg.exp @@ -141,7 +141,9 @@ proc ubsan_finish { args } { unset TEST_ALWAYS_FLAGS } } - set ld_library_path $ubsan_saved_library_path - set_ld_library_path_env_vars + if [info exists ubsan_saved_library_path ] { + set ld_library_path $ubsan_saved_library_path + set_ld_library_path_env_vars + } clear_effective_target_cache } diff --git a/gcc/testsuite/obj-c++.dg/SEL-typedef.mm b/gcc/testsuite/obj-c++.dg/SEL-typedef.mm new file mode 100644 index 0000000..2ece1fd --- /dev/null +++ b/gcc/testsuite/obj-c++.dg/SEL-typedef.mm @@ -0,0 +1,7 @@ +/* Check that we accept the SEL typedef. */ +/* { dg-additional-options "-fsyntax-only " } */ + +SEL aSelector; + +typedef SEL MySEL; + diff --git a/gcc/testsuite/obj-c++.dg/attributes/nsobject-01.mm b/gcc/testsuite/obj-c++.dg/attributes/nsobject-01.mm new file mode 100644 index 0000000..498fbc7 --- /dev/null +++ b/gcc/testsuite/obj-c++.dg/attributes/nsobject-01.mm @@ -0,0 +1,66 @@ +/* Test handling of the NSObject attribute. */ +/* { dg-additional-options "-fsyntax-only " } */ + +typedef struct AnObj * __attribute__ ((NSObject)) AnObjRef; +typedef struct AnObj * __attribute__ ((__NSObject__)) AnotherObjRef; + +/* We allow a void * to be labeled as NSObject. */ +typedef void * __attribute__((NSObject)) AnonRef; + +typedef struct AnObj * __attribute__((NSObject("foo"))) Bad; // { dg-error {wrong number of arguments specified for 'NSObject' attribute} } +typedef struct AnObj * __attribute__((NSObject(42))) Wrong; // { dg-error {wrong number of arguments specified for 'NSObject' attribute} } + +/* Must be a pointer. */ +typedef struct AnObj __attribute__((NSObject)) BadRef; // { dg-error {'NSObject' attribute is for pointer types only} } + +typedef void * VPtr; + +@interface CheckAttrNSObject +{ +@public + AnObjRef aor; + /* TODO: synthesize without pre-defined ivars. */ + VPtr obj_v; + int bar; + /* TODO: This should warn, even tho the property does not */ + __attribute__((NSObject)) struct AnObj *Thing; +} + +@property(copy) AnObjRef aor; + +typedef struct AnObj * __attribute__((NSObject)) AnObjPtr3; +@property (nonatomic, retain) AnObjPtr3 obj_3; + +@property (retain) __attribute__((NSObject)) VPtr obj_v; + +//@property (strong, nullable) AnObjPtr3 objp_4; + +@property(retain) __attribute__((NSObject)) int bar; + // { dg-error {'NSObject' attribute is for pointer types only} "" { target *-*-* } .-1 } + // { dg-error {'retain' attribute is only valid for Objective-C objects} "" { target *-*-* } .-2 } + +@end + +void foo () +{ + __attribute__((NSObject)) struct AnObj *AnotherThing; // { dg-warning {'NSObject' attribute may be put on a typedef only; attribute is ignored} } +} + +void +setProperty(id self, id value) +{ + ((CheckAttrNSObject *)self)->aor = value; +} + +id +getProperty(id self) +{ + return (id)((CheckAttrNSObject *)self)->aor; +} + +@implementation CheckAttrNSObject +@synthesize aor; +@dynamic obj_3; +@synthesize obj_v; +@synthesize bar; +@end // { dg-error {invalid conversion} } diff --git a/gcc/testsuite/obj-c++.dg/property/at-property-1.mm b/gcc/testsuite/obj-c++.dg/property/at-property-1.mm index 7cf650f..3325823 100644 --- a/gcc/testsuite/obj-c++.dg/property/at-property-1.mm +++ b/gcc/testsuite/obj-c++.dg/property/at-property-1.mm @@ -6,15 +6,18 @@ { Class isa; } -@property; /* { dg-error "expected identifier" } */ +@property; /* { dg-error "expected" } */ @property int; /* { dg-error "expected identifier" } */ + @property int a; @property int b, c; -@property () int d; /* { dg-error "expected identifier" } */ +@property () int d; /* { dg-warning "empty property attribute list" } */ @property (readonly) int e; -@property (readonly,) int f; /* { dg-error "expected identifier" } */ +@property (readonly,) int f; /* { dg-warning "missing property attribute" } */ @property (xxx) int g; /* { dg-error "unknown property attribute" } */ @property (readonly,xxx) int h; /* { dg-error "unknown property attribute" } */ -@property ( int i; /* { dg-error "expected identifier" } */ - /* { dg-error "expected ... " "" { target *-*-* } .-1 } */ +@property ( int i; /* { dg-error "unknown property attribute" } */ + /* { dg-error "expected" "" { target *-*-* } .-1 } */ +@property (assign,,nonatomic) int j; /* { dg-warning "missing property attribute" } */ +@property (assign nonatomic) int k; /* { dg-error {expected } } */ @end diff --git a/gcc/testsuite/obj-c++.dg/property/at-property-29.mm b/gcc/testsuite/obj-c++.dg/property/at-property-29.mm index 0f31617..64dfe83 100644 --- a/gcc/testsuite/obj-c++.dg/property/at-property-29.mm +++ b/gcc/testsuite/obj-c++.dg/property/at-property-29.mm @@ -8,7 +8,9 @@ Class isa; } /* Test missing '=' in setter/getter attributes. */ -@property (getter) int property_a; /* { dg-error "missing .=. .after .getter. attribute." } */ -@property (setter) int property_b; /* { dg-error "missing .=. .after .setter. attribute." } */ -@property (assign, getter) int property_c; /* { dg-error "missing .=. .after .getter. attribute." } */ +@property (getter) int property_a; /* { dg-error {expected '=' after Objective-C 'getter'} } */ +@property (setter) int property_b; /* { dg-error {expected '=' after Objective-C 'setter'} } */ +@property (assign, getter) int property_c; /* { dg-error {expected '=' after Objective-C 'getter'} } */ +@property (retain, getter=) id x; /* { dg-error {expected 'getter' selector name} } */ +@property (retain, setter=) id y; /* { dg-error {expected 'setter' selector name} } */ @end diff --git a/gcc/testsuite/obj-c++.dg/property/at-property-4.mm b/gcc/testsuite/obj-c++.dg/property/at-property-4.mm index 941aab8..f73d706 100644 --- a/gcc/testsuite/obj-c++.dg/property/at-property-4.mm +++ b/gcc/testsuite/obj-c++.dg/property/at-property-4.mm @@ -14,27 +14,35 @@ - (void) mySetter2: (int)property; /* Test that all the new property attributes can be parsed. */ -@property (assign) id property_a; -@property (copy) id property_b; -@property (nonatomic) int property_c; -@property (readonly) int property_d; -@property (readwrite) int property_e; -@property (retain) id property_f; -@property (release) int property_g; /* { dg-error "unknown property attribute" } */ +@property (assign) id property_as_1; +@property (copy) id property_as_2; +@property (retain) id property_as_3; -@property (getter=myGetter) int property_h; -@property (setter=mySetter:) int property_i; +@property (atomic) int property_at_1; +@property (nonatomic) int property_at_2; + +@property (readonly) int property_rw_1; +@property (readwrite) int property_rw_2; + +@property (class) int property_cl_1; + +@property (release) int property_err_1; /* { dg-error "unknown property attribute" } */ + +@property (getter=myGetter) int property_g0; +@property (setter=mySetter:) int property_s0; /* Now test various problems. */ -@property (readonly, readwrite) int a; /* { dg-error ".readonly. attribute conflicts with .readwrite. attribute" } */ +@property (readonly, readwrite) int a; /* { dg-error ".readwrite. attribute conflicts with .readonly. attribute" } */ @property (readonly, setter=mySetterB:) int b; /* { dg-error ".readonly. attribute conflicts with .setter. attribute" } */ -@property (assign, retain) id c; /* { dg-error ".assign. attribute conflicts with .retain. attribute" } */ -@property (assign, copy) id d; /* { dg-error ".assign. attribute conflicts with .copy. attribute" } */ +@property (assign, retain) id c; /* { dg-error ".retain. attribute conflicts with .assign. attribute" } */ +@property (assign, copy) id d; /* { dg-error ".copy. attribute conflicts with .assign. attribute" } */ @property (copy, retain) id e; /* { dg-error ".retain. attribute conflicts with .copy. attribute" } */ -@property (setter=mySetter:,setter=mySetter2:) int f; /* { dg-error ".setter. attribute may only be specified once" } */ -@property (getter=myGetter, getter=myGetter2 ) int g; /* { dg-error ".getter. attribute may only be specified once" } */ +@property (atomic, nonatomic) int property_j; /* { dg-error {'nonatomic' attribute conflicts with 'atomic' attribute} } */ + +@property (setter=mySetter:,setter=mySetter2:) int f; /* { dg-warning {multiple property 'setter' methods specified, the latest one will be used} } */ +@property (getter=myGetter, getter=myGetter2 ) int g; /* { dg-warning {multiple property 'getter' methods specified, the latest one will be used} } */ @end diff --git a/gcc/testsuite/obj-c++.dg/property/property-neg-2.mm b/gcc/testsuite/obj-c++.dg/property/property-neg-2.mm index f730fe8..794f2bd 100644 --- a/gcc/testsuite/obj-c++.dg/property/property-neg-2.mm +++ b/gcc/testsuite/obj-c++.dg/property/property-neg-2.mm @@ -4,5 +4,5 @@ @end @implementation Bar -@property int FooBar; /* { dg-error "property declaration not in @interface or @protocol context" } */ +@property int FooBar; /* { dg-error {property declaration not in '@interface', '@protocol' or 'category' context} } */ @end diff --git a/gcc/testsuite/objc.dg/SEL-typedef.m b/gcc/testsuite/objc.dg/SEL-typedef.m new file mode 100644 index 0000000..2ece1fd --- /dev/null +++ b/gcc/testsuite/objc.dg/SEL-typedef.m @@ -0,0 +1,7 @@ +/* Check that we accept the SEL typedef. */ +/* { dg-additional-options "-fsyntax-only " } */ + +SEL aSelector; + +typedef SEL MySEL; + diff --git a/gcc/testsuite/objc.dg/attributes/nsobject-01.m b/gcc/testsuite/objc.dg/attributes/nsobject-01.m new file mode 100644 index 0000000..5b56849 --- /dev/null +++ b/gcc/testsuite/objc.dg/attributes/nsobject-01.m @@ -0,0 +1,66 @@ +/* Test handling of the NSObject attribute. */ +/* { dg-additional-options "-fsyntax-only " } */ + +typedef struct AnObj * __attribute__ ((NSObject)) AnObjRef; +typedef struct AnObj * __attribute__ ((__NSObject__)) AnotherObjRef; + +/* We allow a void * to be labeled as NSObject. */ +typedef void * __attribute__((NSObject)) AnonRef; + +typedef struct AnObj * __attribute__((NSObject("foo"))) Bad; // { dg-error {wrong number of arguments specified for 'NSObject' attribute} } +typedef struct AnObj * __attribute__((NSObject(42))) Wrong; // { dg-error {wrong number of arguments specified for 'NSObject' attribute} } + +/* Must be a pointer. */ +typedef struct AnObj __attribute__((NSObject)) BadRef; // { dg-error {'NSObject' attribute is for pointer types only} } + +typedef void * VPtr; + +@interface CheckAttrNSObject +{ +@public + AnObjRef aor; + /* TODO: synthesize without pre-defined ivars. */ + VPtr obj_v; + int bar; + /* TODO: This should warn, even tho the property does not */ + __attribute__((NSObject)) struct AnObj *Thing; +} + +@property(copy) AnObjRef aor; + +typedef struct AnObj * __attribute__((NSObject)) AnObjPtr3; +@property (nonatomic, retain) AnObjPtr3 obj_3; + +@property (retain) __attribute__((NSObject)) VPtr obj_v; + +//@property (strong, nullable) AnObjPtr3 objp_4; + +@property(retain) __attribute__((NSObject)) int bar; + // { dg-error {'NSObject' attribute is for pointer types only} "" { target *-*-* } .-1 } + // { dg-error {'retain' attribute is only valid for Objective-C objects} "" { target *-*-* } .-2 } + +@end + +void foo () +{ + __attribute__((NSObject)) struct AnObj *AnotherThing; // { dg-warning {'NSObject' attribute may be put on a typedef only; attribute is ignored} } +} + +void +setProperty(id self, id value) +{ + ((CheckAttrNSObject *)self)->aor = value; +} + +id +getProperty(id self) +{ + return (id)((CheckAttrNSObject *)self)->aor; +} + +@implementation CheckAttrNSObject +@synthesize aor; +@dynamic obj_3; +@synthesize obj_v; +@synthesize bar; // { dg-warning {returning 'id' from a function with return type 'int'} } +@end // { dg-warning {passing argument} } diff --git a/gcc/testsuite/objc.dg/property/at-property-1.m b/gcc/testsuite/objc.dg/property/at-property-1.m index fa12fa2..6dba8f4 100644 --- a/gcc/testsuite/objc.dg/property/at-property-1.m +++ b/gcc/testsuite/objc.dg/property/at-property-1.m @@ -11,11 +11,15 @@ /* { dg-warning "declaration does not declare anything" "" { target *-*-* } .-1 } */ @property int a; @property int b, c; -@property () int d; /* { dg-error "expected identifier" } */ +@property () int d; /* { dg-warning "empty property attribute list" } */ @property (readonly) int e; -@property (readonly,) int f; /* { dg-error "expected identifier" } */ +@property (readonly,) int f; /* { dg-warning "missing property attribute" } */ @property (xxx) int g; /* { dg-error "unknown property attribute" } */ @property (readonly,xxx) int h; /* { dg-error "unknown property attribute" } */ @property ( int i; /* { dg-error "unknown property attribute" } */ -/* Because the last syntax error opens a '(' and never closes it, we get to the end of input. */ -@end /* { dg-error "expected ..end. at end of input" } */ + /* { dg-error "expected" "" { target *-*-* } .-1 } */ +@property (assign,,nonatomic) int j; /* { dg-warning "missing property attribute" } */ +@property (assign nonatomic) int k; /* { dg-error {expected } } */ +@property (assign) int l[4]; /* { dg-error {property cannot be an array} } */ +@property (assign) int : 5; /* { dg-error {properties must be named} } */ +@end diff --git a/gcc/testsuite/objc.dg/property/at-property-29.m b/gcc/testsuite/objc.dg/property/at-property-29.m index 0f31617..0b34e1c 100644 --- a/gcc/testsuite/objc.dg/property/at-property-29.m +++ b/gcc/testsuite/objc.dg/property/at-property-29.m @@ -8,7 +8,8 @@ Class isa; } /* Test missing '=' in setter/getter attributes. */ -@property (getter) int property_a; /* { dg-error "missing .=. .after .getter. attribute." } */ -@property (setter) int property_b; /* { dg-error "missing .=. .after .setter. attribute." } */ -@property (assign, getter) int property_c; /* { dg-error "missing .=. .after .getter. attribute." } */ +@property (getter) int property_a; /* { dg-error {expected '=' after Objective-C 'getter'} } */ +@property (setter) int property_b; /* { dg-error {expected '=' after Objective-C 'setter'} } */ +@property (assign, getter) int property_c; /* { dg-error {expected '=' after Objective-C 'getter'} } */ +@property (retain, getter=) id x; /* { dg-error {expected 'getter' selector name} } */ @end diff --git a/gcc/testsuite/objc.dg/property/at-property-4.m b/gcc/testsuite/objc.dg/property/at-property-4.m index 941aab8..0e905db 100644 --- a/gcc/testsuite/objc.dg/property/at-property-4.m +++ b/gcc/testsuite/objc.dg/property/at-property-4.m @@ -14,27 +14,35 @@ - (void) mySetter2: (int)property; /* Test that all the new property attributes can be parsed. */ -@property (assign) id property_a; -@property (copy) id property_b; -@property (nonatomic) int property_c; -@property (readonly) int property_d; -@property (readwrite) int property_e; -@property (retain) id property_f; -@property (release) int property_g; /* { dg-error "unknown property attribute" } */ +@property (assign) id property_as_1; +@property (copy) id property_as_2; +@property (retain) id property_as_3; + +@property (atomic) int property_at_1; +@property (nonatomic) int property_at_2; + +@property (readonly) int property_rw_1; +@property (readwrite) int property_rw_2; + +@property (class) int property_cl_1; + +@property (release) int property_err_1; /* { dg-error "unknown property attribute" } */ @property (getter=myGetter) int property_h; @property (setter=mySetter:) int property_i; /* Now test various problems. */ -@property (readonly, readwrite) int a; /* { dg-error ".readonly. attribute conflicts with .readwrite. attribute" } */ +@property (readonly, readwrite) int a; /* { dg-error ".readwrite. attribute conflicts with .readonly. attribute" } */ @property (readonly, setter=mySetterB:) int b; /* { dg-error ".readonly. attribute conflicts with .setter. attribute" } */ -@property (assign, retain) id c; /* { dg-error ".assign. attribute conflicts with .retain. attribute" } */ -@property (assign, copy) id d; /* { dg-error ".assign. attribute conflicts with .copy. attribute" } */ +@property (assign, retain) id c; /* { dg-error ".retain. attribute conflicts with .assign. attribute" } */ +@property (assign, copy) id d; /* { dg-error ".copy. attribute conflicts with .assign. attribute" } */ @property (copy, retain) id e; /* { dg-error ".retain. attribute conflicts with .copy. attribute" } */ -@property (setter=mySetter:,setter=mySetter2:) int f; /* { dg-error ".setter. attribute may only be specified once" } */ -@property (getter=myGetter, getter=myGetter2 ) int g; /* { dg-error ".getter. attribute may only be specified once" } */ +@property (atomic, nonatomic) int property_j; /* { dg-error {'nonatomic' attribute conflicts with 'atomic' attribute} } */ + +@property (setter=mySetter:,setter=mySetter2:) int f; /* { dg-warning {multiple property 'setter' methods specified, the latest one will be used} } */ +@property (getter=myGetter, getter=myGetter2 ) int g; /* { dg-warning {multiple property 'getter' methods specified, the latest one will be used} } */ @end diff --git a/gcc/testsuite/objc.dg/property/at-property-5.m b/gcc/testsuite/objc.dg/property/at-property-5.m index 1267df3..820f5b3 100644 --- a/gcc/testsuite/objc.dg/property/at-property-5.m +++ b/gcc/testsuite/objc.dg/property/at-property-5.m @@ -31,4 +31,4 @@ /* { dg-message "originally specified here" "" { target *-*-* } property_e_first } */ @end -@property id test; /* { dg-error "property declaration not in .interface or .protocol context" } */ +@property id test; /* { dg-error {property declaration not in '@interface', '@protocol' or 'category' context} } */ diff --git a/gcc/testsuite/objc.dg/property/property-neg-2.m b/gcc/testsuite/objc.dg/property/property-neg-2.m index f730fe8..794f2bd 100644 --- a/gcc/testsuite/objc.dg/property/property-neg-2.m +++ b/gcc/testsuite/objc.dg/property/property-neg-2.m @@ -4,5 +4,5 @@ @end @implementation Bar -@property int FooBar; /* { dg-error "property declaration not in @interface or @protocol context" } */ +@property int FooBar; /* { dg-error {property declaration not in '@interface', '@protocol' or 'category' context} } */ @end |