Merge from trunk revision b737b70fad398728f6006e8397d1bb31ccea4ce7.

256 files changed, 7638 insertions, 26 deletions

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 0e91a06..d65e539 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,388 @@
+2020-12-06  H.J. Lu  <hjl.tools@gmail.com>
+
+	* gcc.target/i386/pr98161.c: New test.
+
+2020-12-06  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/96232
+	* gcc.dg/tree-ssa/pr96232-2.c: New test.
+	* gcc.dg/tree-ssa/pr88676-2.c: Check phiopt2 dump rather than phiopt1.
+
+2020-12-06  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/96232
+	* gcc.dg/tree-ssa/pr96232-1.c: New test.
+
+2020-12-06  Thomas Koenig  <tkoenig@gcc.gnu.org>
+
+	PR testsuite/98156
+	* gfortran.dg/coarray/alloc_comp_1.f90: Upper cobound is
+	determined by num_images(), not this_image().
+
+2020-12-06  Alan Modra  <amodra@gmail.com>
+
+	* gcc.target/powerpc/signbit-1.c: Reinstate lp64 condition.
+	* gcc.target/powerpc/signbit-2.c: Match 32-bit output too.
+
+2020-12-05  Patrick Palka  <ppalka@redhat.com>
+
+	PR c++/97093
+	* g++.dg/cpp2a/concepts-requires22.C: New test.
+
+2020-12-05  Patrick Palka  <ppalka@redhat.com>
+
+	PR c++/97093
+	* g++.dg/concepts/pr94252.C: Verify we no longer issue a
+	spurious unsatisfaction note when diagnosing ill-formed
+	satisfaction.
+	* g++.dg/cpp2a/concepts-requires18.C: No longer expect a
+	spurious unsatisfaction diagnostic when evaluating the
+	nested-requirement subst<void&> of a requires-expression that
+	appears outside of a template.
+	* g++.dg/cpp2a/concepts-requires21.C: Verify we no longer issue
+	a spurious unsatisfaction note when evaluating a
+	nested-requirement of a requires-expression that appears outside
+	of a template.
+	* g++.dg/cpp2a/concepts-nonbool3.C: New test.
+	* g++.dg/cpp2a/concepts-pr97093.C: New test.
+
+2020-12-05  Maciej W. Rozycki  <macro@linux-mips.org>
+
+	PR target/95294
+	* gcc.target/vax/cmpelim-eq-adddf.c: New test.
+	* gcc.target/vax/cmpelim-eq-addhi.c: New test.
+	* gcc.target/vax/cmpelim-eq-addqi.c: New test.
+	* gcc.target/vax/cmpelim-eq-addsf.c: New test.
+	* gcc.target/vax/cmpelim-eq-addsi.c: New test.
+	* gcc.target/vax/cmpelim-eq-andhi.c: New test.
+	* gcc.target/vax/cmpelim-eq-andqi.c: New test.
+	* gcc.target/vax/cmpelim-eq-andsi.c: New test.
+	* gcc.target/vax/cmpelim-eq-ashlsi.c: New test.
+	* gcc.target/vax/cmpelim-eq-ashrsi.c: New test.
+	* gcc.target/vax/cmpelim-eq-divdf.c: New test.
+	* gcc.target/vax/cmpelim-eq-divhi.c: New test.
+	* gcc.target/vax/cmpelim-eq-divqi.c: New test.
+	* gcc.target/vax/cmpelim-eq-divsf.c: New test.
+	* gcc.target/vax/cmpelim-eq-divsi.c: New test.
+	* gcc.target/vax/cmpelim-eq-extendhisi.c: New test.
+	* gcc.target/vax/cmpelim-eq-extendqisi.c: New test.
+	* gcc.target/vax/cmpelim-eq-extvsi.c: New test.
+	* gcc.target/vax/cmpelim-eq-extzvsi.c: New test.
+	* gcc.target/vax/cmpelim-eq-fixdfhi.c: New test.
+	* gcc.target/vax/cmpelim-eq-fixdfqi.c: New test.
+	* gcc.target/vax/cmpelim-eq-fixdfsi.c: New test.
+	* gcc.target/vax/cmpelim-eq-fixsfhi.c: New test.
+	* gcc.target/vax/cmpelim-eq-fixsfqi.c: New test.
+	* gcc.target/vax/cmpelim-eq-fixsfsi.c: New test.
+	* gcc.target/vax/cmpelim-eq-floatsisf.c: New test.
+	* gcc.target/vax/cmpelim-eq-insvsi.c: New test.
+	* gcc.target/vax/cmpelim-eq-iorhi.c: New test.
+	* gcc.target/vax/cmpelim-eq-iorqi.c: New test.
+	* gcc.target/vax/cmpelim-eq-iorsi.c: New test.
+	* gcc.target/vax/cmpelim-eq-mova.c: New test.
+	* gcc.target/vax/cmpelim-eq-movdf.c: New test.
+	* gcc.target/vax/cmpelim-eq-movhi.c: New test.
+	* gcc.target/vax/cmpelim-eq-movqi.c: New test.
+	* gcc.target/vax/cmpelim-eq-movsf.c: New test.
+	* gcc.target/vax/cmpelim-eq-movsi.c: New test.
+	* gcc.target/vax/cmpelim-eq-muldf.c: New test.
+	* gcc.target/vax/cmpelim-eq-mulhi.c: New test.
+	* gcc.target/vax/cmpelim-eq-mulqi.c: New test.
+	* gcc.target/vax/cmpelim-eq-mulsf.c: New test.
+	* gcc.target/vax/cmpelim-eq-mulsi.c: New test.
+	* gcc.target/vax/cmpelim-eq-nothi.c: New test.
+	* gcc.target/vax/cmpelim-eq-notqi.c: New test.
+	* gcc.target/vax/cmpelim-eq-notsi.c: New test.
+	* gcc.target/vax/cmpelim-eq-rotlsi.c: New test.
+	* gcc.target/vax/cmpelim-eq-rotrsi.c: New test.
+	* gcc.target/vax/cmpelim-eq-subdf.c: New test.
+	* gcc.target/vax/cmpelim-eq-subhi.c: New test.
+	* gcc.target/vax/cmpelim-eq-subqi.c: New test.
+	* gcc.target/vax/cmpelim-eq-subsf.c: New test.
+	* gcc.target/vax/cmpelim-eq-subsi.c: New test.
+	* gcc.target/vax/cmpelim-eq-truncdfsf.c: New test.
+	* gcc.target/vax/cmpelim-eq-trunchiqi.c: New test.
+	* gcc.target/vax/cmpelim-eq-truncsihi.c: New test.
+	* gcc.target/vax/cmpelim-eq-truncsiqi.c: New test.
+	* gcc.target/vax/cmpelim-eq-zextendhisi.c: New test.
+	* gcc.target/vax/cmpelim-eq-zextendqihi.c: New test.
+	* gcc.target/vax/cmpelim-eq-zextendqisi.c: New test.
+	* gcc.target/vax/cmpelim-le-adddf.c: New test.
+	* gcc.target/vax/cmpelim-le-addhi.c: New test.
+	* gcc.target/vax/cmpelim-le-addqi.c: New test.
+	* gcc.target/vax/cmpelim-le-addsf.c: New test.
+	* gcc.target/vax/cmpelim-le-addsi.c: New test.
+	* gcc.target/vax/cmpelim-le-andhi.c: New test.
+	* gcc.target/vax/cmpelim-le-andqi.c: New test.
+	* gcc.target/vax/cmpelim-le-andsi.c: New test.
+	* gcc.target/vax/cmpelim-le-ashlsi.c: New test.
+	* gcc.target/vax/cmpelim-le-ashrsi.c: New test.
+	* gcc.target/vax/cmpelim-le-divdf.c: New test.
+	* gcc.target/vax/cmpelim-le-divhi.c: New test.
+	* gcc.target/vax/cmpelim-le-divqi.c: New test.
+	* gcc.target/vax/cmpelim-le-divsf.c: New test.
+	* gcc.target/vax/cmpelim-le-divsi.c: New test.
+	* gcc.target/vax/cmpelim-le-extendhisi.c: New test.
+	* gcc.target/vax/cmpelim-le-extendqisi.c: New test.
+	* gcc.target/vax/cmpelim-le-extvsi.c: New test.
+	* gcc.target/vax/cmpelim-le-extzvsi.c: New test.
+	* gcc.target/vax/cmpelim-le-fixdfhi.c: New test.
+	* gcc.target/vax/cmpelim-le-fixdfqi.c: New test.
+	* gcc.target/vax/cmpelim-le-fixdfsi.c: New test.
+	* gcc.target/vax/cmpelim-le-fixsfhi.c: New test.
+	* gcc.target/vax/cmpelim-le-fixsfqi.c: New test.
+	* gcc.target/vax/cmpelim-le-fixsfsi.c: New test.
+	* gcc.target/vax/cmpelim-le-floatsisf.c: New test.
+	* gcc.target/vax/cmpelim-le-insvsi.c: New test.
+	* gcc.target/vax/cmpelim-le-iorhi.c: New test.
+	* gcc.target/vax/cmpelim-le-iorqi.c: New test.
+	* gcc.target/vax/cmpelim-le-iorsi.c: New test.
+	* gcc.target/vax/cmpelim-le-movdf.c: New test.
+	* gcc.target/vax/cmpelim-le-movhi.c: New test.
+	* gcc.target/vax/cmpelim-le-movqi.c: New test.
+	* gcc.target/vax/cmpelim-le-movsf.c: New test.
+	* gcc.target/vax/cmpelim-le-movsi.c: New test.
+	* gcc.target/vax/cmpelim-le-muldf.c: New test.
+	* gcc.target/vax/cmpelim-le-mulhi.c: New test.
+	* gcc.target/vax/cmpelim-le-mulqi.c: New test.
+	* gcc.target/vax/cmpelim-le-mulsf.c: New test.
+	* gcc.target/vax/cmpelim-le-mulsi.c: New test.
+	* gcc.target/vax/cmpelim-le-nothi.c: New test.
+	* gcc.target/vax/cmpelim-le-notqi.c: New test.
+	* gcc.target/vax/cmpelim-le-notsi.c: New test.
+	* gcc.target/vax/cmpelim-le-rotlsi.c: New test.
+	* gcc.target/vax/cmpelim-le-rotrsi.c: New test.
+	* gcc.target/vax/cmpelim-le-subdf.c: New test.
+	* gcc.target/vax/cmpelim-le-subhi.c: New test.
+	* gcc.target/vax/cmpelim-le-subqi.c: New test.
+	* gcc.target/vax/cmpelim-le-subsf.c: New test.
+	* gcc.target/vax/cmpelim-le-subsi.c: New test.
+	* gcc.target/vax/cmpelim-le-truncdfsf.c: New test.
+	* gcc.target/vax/cmpelim-le-xorhi.c: New test.
+	* gcc.target/vax/cmpelim-le-xorqi.c: New test.
+	* gcc.target/vax/cmpelim-le-xorsi.c: New test.
+	* gcc.target/vax/cmpelim-leu-subhi.c: New test.
+	* gcc.target/vax/cmpelim-leu-subqi.c: New test.
+	* gcc.target/vax/cmpelim-leu-subsi.c: New test.
+	* gcc.target/vax/cmpelim-lt-adddf.c: New test.
+	* gcc.target/vax/cmpelim-lt-addhi.c: New test.
+	* gcc.target/vax/cmpelim-lt-addqi.c: New test.
+	* gcc.target/vax/cmpelim-lt-addsf.c: New test.
+	* gcc.target/vax/cmpelim-lt-addsi.c: New test.
+	* gcc.target/vax/cmpelim-lt-andhi.c: New test.
+	* gcc.target/vax/cmpelim-lt-andqi.c: New test.
+	* gcc.target/vax/cmpelim-lt-andsi.c: New test.
+	* gcc.target/vax/cmpelim-lt-ashlsi.c: New test.
+	* gcc.target/vax/cmpelim-lt-ashrsi.c: New test.
+	* gcc.target/vax/cmpelim-lt-divdf.c: New test.
+	* gcc.target/vax/cmpelim-lt-divhi.c: New test.
+	* gcc.target/vax/cmpelim-lt-divqi.c: New test.
+	* gcc.target/vax/cmpelim-lt-divsf.c: New test.
+	* gcc.target/vax/cmpelim-lt-divsi.c: New test.
+	* gcc.target/vax/cmpelim-lt-extendhisi.c: New test.
+	* gcc.target/vax/cmpelim-lt-extendqisi.c: New test.
+	* gcc.target/vax/cmpelim-lt-extvsi.c: New test.
+	* gcc.target/vax/cmpelim-lt-extzvsi.c: New test.
+	* gcc.target/vax/cmpelim-lt-fixdfhi.c: New test.
+	* gcc.target/vax/cmpelim-lt-fixdfqi.c: New test.
+	* gcc.target/vax/cmpelim-lt-fixdfsi.c: New test.
+	* gcc.target/vax/cmpelim-lt-fixsfhi.c: New test.
+	* gcc.target/vax/cmpelim-lt-fixsfqi.c: New test.
+	* gcc.target/vax/cmpelim-lt-fixsfsi.c: New test.
+	* gcc.target/vax/cmpelim-lt-floatsisf.c: New test.
+	* gcc.target/vax/cmpelim-lt-insvsi.c: New test.
+	* gcc.target/vax/cmpelim-lt-iorhi.c: New test.
+	* gcc.target/vax/cmpelim-lt-iorqi.c: New test.
+	* gcc.target/vax/cmpelim-lt-iorsi.c: New test.
+	* gcc.target/vax/cmpelim-lt-movdf.c: New test.
+	* gcc.target/vax/cmpelim-lt-movhi.c: New test.
+	* gcc.target/vax/cmpelim-lt-movqi.c: New test.
+	* gcc.target/vax/cmpelim-lt-movsf.c: New test.
+	* gcc.target/vax/cmpelim-lt-movsi.c: New test.
+	* gcc.target/vax/cmpelim-lt-muldf.c: New test.
+	* gcc.target/vax/cmpelim-lt-mulhi.c: New test.
+	* gcc.target/vax/cmpelim-lt-mulqi.c: New test.
+	* gcc.target/vax/cmpelim-lt-mulsf.c: New test.
+	* gcc.target/vax/cmpelim-lt-mulsi.c: New test.
+	* gcc.target/vax/cmpelim-lt-nothi.c: New test.
+	* gcc.target/vax/cmpelim-lt-notqi.c: New test.
+	* gcc.target/vax/cmpelim-lt-notsi.c: New test.
+	* gcc.target/vax/cmpelim-lt-rotlsi.c: New test.
+	* gcc.target/vax/cmpelim-lt-rotrsi.c: New test.
+	* gcc.target/vax/cmpelim-lt-subdf.c: New test.
+	* gcc.target/vax/cmpelim-lt-subhi.c: New test.
+	* gcc.target/vax/cmpelim-lt-subqi.c: New test.
+	* gcc.target/vax/cmpelim-lt-subsf.c: New test.
+	* gcc.target/vax/cmpelim-lt-subsi.c: New test.
+	* gcc.target/vax/cmpelim-lt-truncdfsf.c: New test.
+	* gcc.target/vax/cmpelim-lt-xorhi.c: New test.
+	* gcc.target/vax/cmpelim-lt-xorqi.c: New test.
+	* gcc.target/vax/cmpelim-lt-xorsi.c: New test.
+	* gcc.target/vax/cmpelim-ltu-subhi.c: New test.
+	* gcc.target/vax/cmpelim-ltu-subqi.c: New test.
+	* gcc.target/vax/cmpelim-ltu-subsi.c: New test.
+	* gcc.target/vax/cmpelim-xx-addsi.c: New test.
+	* gcc.target/vax/cmpelim-xx-insvsi.c: New test.
+	* gcc.target/vax/cmpelim-xxu-subsi.c: New test.
+	* gcc.target/vax/peephole2-eq-andhi.c: New test.
+	* gcc.target/vax/peephole2-eq-andqi.c: New test.
+	* gcc.target/vax/peephole2-eq-andsi.c: New test.
+	* gcc.target/vax/peephole2-eq-cmpvsi.c: New test.
+	* gcc.target/vax/peephole2-eq-cmpzvsi.c: New test.
+	* gcc.target/vax/peephole2-eq-ctzhi-0.c: New test.
+	* gcc.target/vax/peephole2-eq-ctzhi-1.c: New test.
+	* gcc.target/vax/peephole2-eq-ctzqi-0.c: New test.
+	* gcc.target/vax/peephole2-eq-ctzqi-1.c: New test.
+	* gcc.target/vax/peephole2-eq-ctzsi-0.c: New test.
+	* gcc.target/vax/peephole2-eq-ctzsi-1.c: New test.
+	* gcc.target/vax/peephole2-eq-ffshi.c: New test.
+	* gcc.target/vax/peephole2-eq-ffsqi.c: New test.
+	* gcc.target/vax/peephole2-eq-ffssi.c: New test.
+	* gcc.target/vax/peephole2-le-andhi.c: New test.
+	* gcc.target/vax/peephole2-le-andqi.c: New test.
+	* gcc.target/vax/peephole2-le-andsi.c: New test.
+	* gcc.target/vax/peephole2-le-cmpvsi.c: New test.
+	* gcc.target/vax/peephole2-le-cmpzvsi.c: New test.
+	* gcc.target/vax/peephole2-leu-cmpvsi.c: New test.
+	* gcc.target/vax/peephole2-leu-cmpzvsi.c: New test.
+	* gcc.target/vax/peephole2-lt-andhi.c: New test.
+	* gcc.target/vax/peephole2-lt-andqi.c: New test.
+	* gcc.target/vax/peephole2-lt-andsi.c: New test.
+	* gcc.target/vax/peephole2-lt-cmpvsi.c: New test.
+	* gcc.target/vax/peephole2-lt-cmpzvsi.c: New test.
+	* gcc.target/vax/peephole2-ltu-cmpvsi.c: New test.
+	* gcc.target/vax/peephole2-ltu-cmpzvsi.c: New test.
+
+2020-12-05  Maciej W. Rozycki  <macro@linux-mips.org>
+
+	* gcc.target/vax/movmem.c: New test.
+
+2020-12-05  Maciej W. Rozycki  <macro@linux-mips.org>
+
+	* gcc.target/vax/cpymem.c: New test.
+
+2020-12-05  Maciej W. Rozycki  <macro@linux-mips.org>
+
+	* gcc.target/vax/ctzhi.c: New test.
+	* gcc.target/vax/ctzqi.c: New test.
+	* gcc.target/vax/ffshi.c: New test.
+	* gcc.target/vax/ffsqi.c: New test.
+
+2020-12-05  Maciej W. Rozycki  <macro@linux-mips.org>
+
+	* gcc.target/vax/ctzsi.c: New test.
+
+2020-12-05  Maciej W. Rozycki  <macro@linux-mips.org>
+
+	* gcc.target/vax/bbcci.c: New test.
+	* gcc.target/vax/bbssi.c: New test.
+
+2020-12-05  Maciej W. Rozycki  <macro@linux-mips.org>
+
+	* gcc.target/vax/ffssi.c: New test.
+
+2020-12-05  Maciej W. Rozycki  <macro@linux-mips.org>
+
+	* gcc.dg/loop-8.c: Exclude for `vax-*-*'.
+	* gcc.target/vax/compare-add-zero.c: New test.
+	* gcc.target/vax/compare-mov-zero.c: New test.
+
+2020-12-05  Maciej W. Rozycki  <macro@linux-mips.org>
+
+	* gcc.target/vax/vax.exp: Use `gcc-dg-runtest' rather than
+	`dg-runtest'.
+	* gcc.target/vax/pr56875.c (dg-options): Make empty.
+	(a): Rewrite for calculations to make effect.  Reformat.
+
+2020-12-05  Matt Thomas  <matt@3am-software.com>
+	    Maciej W. Rozycki  <macro@linux-mips.org>
+
+	PR target/58901
+	* gcc.c-torture/compile/pr58901-0.c: New test.
+	* gcc.c-torture/compile/pr58901-1.c: New test.
+
+2020-12-05  Roman Zhuykov  <zhroma@ispras.ru>
+
+	PR rtl-optimization/97421
+	* gcc.c-torture/execute/pr97421-1.c: New test.
+	* gcc.c-torture/execute/pr97421-2.c: New test.
+	* gcc.c-torture/execute/pr97421-3.c: New test.
+
+2020-12-05  Paul Thomas  <pault@gcc.gnu.org>
+
+	PR fortran/98016
+	* gfortran.dg/pr98016.f90: New test.
+
+2020-12-05  Venkataramanan Kumar  <Venkataramanan.Kumar@amd.com>
+	    Sharavan Kumar  <Shravan.Kumar@amd.com>
+
+	* gcc.target/i386/funcspec-56.inc: Handle new march.
+	* g++.target/i386/mv29.C: New file.
+
+2020-12-05  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c++/98122
+	* g++.dg/cpp1y/constexpr-98122.C: New test.
+	* g++.dg/cpp2a/constexpr-98122.C: New test.
+
+2020-12-04  Jason Merrill  <jason@redhat.com>
+
+	PR c++/93083
+	* g++.dg/cpp2a/nontype-class40.C: New test.
+
+2020-12-04  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c++/98130
+	* g++.dg/opt/pr98130.C: New test.
+
+2020-12-04  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/96226
+	* gcc.target/i386/pr96226.c: New test.
+
+2020-12-04  Jakub Jelinek  <jakub@redhat.com>
+
+	PR libstdc++/93121
+	* g++.dg/cpp2a/bit-cast6.C: New test.
+
+2020-12-04  Nathan Sidwell  <nathan@acm.org>
+
+	PR c++/98116
+	* g++.dg/template/pr98116.C: Enable robust checking.
+
+2020-12-04  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/98100
+	* gcc.target/i386/pr98100.c: New test.
+
+2020-12-04  Martin Liska  <mliska@suse.cz>
+
+	PR testsuite/98123
+	* gcc.dg/tree-ssa/if-to-switch-4.c: Add param to make the test
+	stable on all architectures.
+	* gcc.dg/tree-ssa/if-to-switch-6.c: Likewise.
+	* gcc.dg/tree-ssa/if-to-switch-8.c: Likewise.
+
+2020-12-04  Eric Botcazou  <ebotcazou@adacore.com>
+
+	* gcc.dg/pr98099.c: Compile only for dfp targets.
+
+2020-12-04  Eric Botcazou  <ebotcazou@adacore.com>
+
+	* gnat.dg/opt91.ads, gnat.dg/opt91.adb: New test.
+	* gnat.dg/opt91_pkg.ads, gnat.dg/opt91_pkg.adb: New helper.
+
+2020-12-04  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c++/80780
+	* g++.dg/cpp2a/srcloc1.C (quux): Use __PRETTY_FUNCTION__ instead of
+	function.
+	* g++.dg/cpp2a/srcloc2.C (quux): Likewise.
+	* g++.dg/cpp2a/srcloc15.C (S::S): Likewise.
+	(bar): Likewise.  Adjust expected column.
+	* g++.dg/cpp2a/srcloc17.C (S::S): Likewise.
+	(bar): Likewise.  Adjust expected column.
+
 2020-12-03  Jason Merrill  <jason@redhat.com>
 
 	* g++.dg/cpp2a/concepts-nodiscard1.C: XFAIL.
diff --git a/gcc/testsuite/g++.dg/concepts/pr94252.C b/gcc/testsuite/g++.dg/concepts/pr94252.C
index 56ce5f8..b045703 100644
--- a/gcc/testsuite/g++.dg/concepts/pr94252.C
+++ b/gcc/testsuite/g++.dg/concepts/pr94252.C
@@ -16,6 +16,7 @@ static_assert(requires(S o, int i) {
 
 template<typename T>
   concept c = requires (T t) { requires (T)5; }; // { dg-error "has type .int." }
+// { dg-bogus "not satisfied" "" { target *-*-* } .-1 }
 
 int
 foo()
diff --git a/gcc/testsuite/g++.dg/cpp0x/enum41.C b/gcc/testsuite/g++.dg/cpp0x/enum41.C
new file mode 100644
index 0000000..5f6ef13
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/enum41.C
@@ -0,0 +1,32 @@
+// PR c++/98043
+// { dg-do compile { target c++11 } }
+
+enum class B { A };
+struct C { B c : 8; };
+
+bool
+foo (C x)
+{
+  switch (x.c)
+    {
+    case B::A:
+      return false;
+    default:
+      return true;
+    }
+}
+
+enum E { X };
+struct D { E c : 7; };
+
+bool
+bar (D x)
+{
+  switch (x.c)
+    {
+    case E::X:
+      return false;
+    default:
+      return true;
+    }
+}
diff --git a/gcc/testsuite/g++.dg/cpp1y/constexpr-98122.C b/gcc/testsuite/g++.dg/cpp1y/constexpr-98122.C
new file mode 100644
index 0000000..86b8aa9
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp1y/constexpr-98122.C
@@ -0,0 +1,14 @@
+// PR c++/98122
+// { dg-do compile { target c++14 } }
+
+union U { int a; };
+
+constexpr bool
+foo ()
+{
+  U f { 42 };
+  constexpr auto m = &U::a;
+  return (f.*m) == 42;
+}
+
+static_assert (foo (), "");
diff --git a/gcc/testsuite/g++.dg/cpp2a/concepts-nonbool3.C b/gcc/testsuite/g++.dg/cpp2a/concepts-nonbool3.C
new file mode 100644
index 0000000..2a2af54
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp2a/concepts-nonbool3.C
@@ -0,0 +1,5 @@
+// { dg-do compile { target c++20 } }
+
+template <auto V> concept C = false || V || false; // { dg-error "has type 'int'" }
+template <auto V> int f() requires C<V>;
+int a = f<0>(); // { dg-error "no match" }
diff --git a/gcc/testsuite/g++.dg/cpp2a/concepts-pr97093.C b/gcc/testsuite/g++.dg/cpp2a/concepts-pr97093.C
new file mode 100644
index 0000000..d662552
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp2a/concepts-pr97093.C
@@ -0,0 +1,32 @@
+// PR c++/97093
+// { dg-do compile { target c++20 } }
+// { dg-additional-options "-fconcepts-diagnostics-depth=3 --param=hash-table-verification-limit=10000" }
+
+template <typename T>
+concept C =  requires (T t)
+{
+  requires t.some_const < 2 || requires { t.some_fn (); };
+};
+
+template <unsigned, unsigned>
+struct c
+{};
+
+template <typename T>
+concept P = requires (T t, c <0, 1> v) { { t (v) }; }; // { dg-error "no match" }
+
+template <P auto, P auto ...>
+struct m
+{
+  constexpr auto operator () (C auto) const
+  {};
+};
+
+struct pc
+{
+  constexpr auto operator () (C auto) const
+  {};
+};
+
+constexpr auto cc = pc {};
+constexpr auto mmcc = m <cc> {}; // { dg-error "not satisfied" }
diff --git a/gcc/testsuite/g++.dg/cpp2a/concepts-requires18.C b/gcc/testsuite/g++.dg/cpp2a/concepts-requires18.C
index a9b7720..9e45c58 100644
--- a/gcc/testsuite/g++.dg/cpp2a/concepts-requires18.C
+++ b/gcc/testsuite/g++.dg/cpp2a/concepts-requires18.C
@@ -4,7 +4,7 @@ template<typename T>
 concept integer = __is_same_as(T, int);
 
 template<typename T>
-concept subst = requires (T x) { requires true; }; // { dg-error "parameter type .void." }
+concept subst = requires (T x) { requires true; };
 
 template<typename T>
 concept c1 = requires { requires integer<T> || subst<T&>; }; // { dg-message "in requirements" }
diff --git a/gcc/testsuite/g++.dg/cpp2a/concepts-requires21.C b/gcc/testsuite/g++.dg/cpp2a/concepts-requires21.C
index bc38b89..8aead2f 100644
--- a/gcc/testsuite/g++.dg/cpp2a/concepts-requires21.C
+++ b/gcc/testsuite/g++.dg/cpp2a/concepts-requires21.C
@@ -5,3 +5,4 @@ template<typename T, typename U>
 constexpr bool is_same_v = __is_same (T, U);
 
 static_assert(is_same_v<bool, decltype(requires { requires false; })>);
+// { dg-bogus "evaluated to 'false" "" { target *-*-* } .-1 }
diff --git a/gcc/testsuite/g++.dg/cpp2a/concepts-requires22.C b/gcc/testsuite/g++.dg/cpp2a/concepts-requires22.C
new file mode 100644
index 0000000..5afcbbe
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp2a/concepts-requires22.C
@@ -0,0 +1,18 @@
+// PR c++/97093
+// { dg-do compile { target c++20 } }
+// { dg-additional-options "-fconcepts-diagnostics-depth=3" }
+
+template<class X, X x>
+concept C = requires {
+    requires (X)x;                     // { dg-message "false" }
+  };
+
+template<class X, X x>
+concept D = requires {
+    requires false || (X)x;                    // { dg-message "false" }
+  };
+
+int main() {
+  static_assert(C<bool, 0>); // { dg-error "failed" }
+  static_assert(D<bool, 0>); // { dg-error "failed" }
+}
diff --git a/gcc/testsuite/g++.dg/cpp2a/constexpr-98122.C b/gcc/testsuite/g++.dg/cpp2a/constexpr-98122.C
new file mode 100644
index 0000000..01bdfa5
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp2a/constexpr-98122.C
@@ -0,0 +1,25 @@
+// PR c++/98122
+// { dg-do compile { target c++20 } }
+
+union V { int a; char b; };
+union W { int a; int b; };
+
+constexpr bool
+bar ()
+{
+  V f { .b = 42 };
+  constexpr auto m = &V::a;
+  return (f.*m) == 42;
+}
+
+constexpr bool
+baz ()
+{
+  W f { .b = 42 };
+  constexpr auto m = &W::b;
+  return (f.*m) == 42;
+}
+
+static_assert (bar (), "");	// { dg-error "non-constant condition for static assertion" }
+				// { dg-error "accessing 'V::a' member instead of initialized 'V::b' member in constant expression" "" { target *-*-* } .-1 }
+static_assert (baz (), "");
diff --git a/gcc/testsuite/g++.dg/template/pr98116-2.C b/gcc/testsuite/g++.dg/template/pr98116-2.C
new file mode 100644
index 0000000..fd12bb1
--- /dev/null
+++ b/gcc/testsuite/g++.dg/template/pr98116-2.C
@@ -0,0 +1,34 @@
+// PR 98116, ICE with stripping typedef array type
+// { dg-do compile { target c++11 } }
+// { dg-additional-options {--param=hash-table-verification-limit=10000000 -fchecking=2} }
+
+// We got confused by alias templates that alias the same type.  Their
+// hashes were different (good), but they compared equal (bad)
+
+namespace std {
+typedef int is_convertible;
+template <typename _Tp> using remove_pointer_t = typename _Tp ::type;
+template <bool> struct enable_if;
+template <typename> void declval();
+template <bool _Cond> using enable_if_t = typename enable_if<_Cond>::type;
+template <typename, typename> class Trans_NS___cxx11_basic_string {
+  long _M_string_length;
+};
+} // namespace std
+struct string16_char_traits;
+template class std::Trans_NS___cxx11_basic_string<unsigned short,
+                                                  string16_char_traits>;
+template <typename, typename> using IsLegalDataConversion = std::is_convertible;
+template <typename Container, typename T>
+using ContainerHasConvertibleData = IsLegalDataConversion<
+    std::remove_pointer_t<decltype(std::declval<Container>)>, T>;
+template <typename Array, typename T, long>
+using EnableIfSpanCompatibleArray =
+  std::enable_if_t<!!sizeof (ContainerHasConvertibleData<Array, T>)>;
+template <int Extent> class span {
+  template <long N, EnableIfSpanCompatibleArray<
+                        const std::Trans_NS___cxx11_basic_string<
+                            unsigned short, string16_char_traits>[N],
+                        std::Trans_NS___cxx11_basic_string<short, int>, Extent>>
+  span();
+};
diff --git a/gcc/testsuite/g++.dg/template/pr98116.C b/gcc/testsuite/g++.dg/template/pr98116.C
index 874c590..7d54314 100644
--- a/gcc/testsuite/g++.dg/template/pr98116.C
+++ b/gcc/testsuite/g++.dg/template/pr98116.C
@@ -1,10 +1,9 @@
 // PR 98116, ICE with stripping typedef array type
 // { dg-do compile { target c++11 } }
 // { dg-additional-options {--param=hash-table-verification-limit=10000000 -fchecking=2} }
-// { dg-ice "spec_hasher::equal" }
 
-// We get confused by alias templates that alias the same type.
-// { dg-prune-output "hash table checking failed" }
+// We got confused by alias templates that alias the same type.  Their
+// hashes were different (good), but they compared equal (bad)
 
 namespace std {
 struct is_convertible;
diff --git a/gcc/testsuite/g++.dg/warn/Wsequence-point-4.C b/gcc/testsuite/g++.dg/warn/Wsequence-point-4.C
new file mode 100644
index 0000000..b3d9cf1
--- /dev/null
+++ b/gcc/testsuite/g++.dg/warn/Wsequence-point-4.C
@@ -0,0 +1,53 @@
+// PR c++/98126
+// { dg-do compile }
+// { dg-options "-Wsequence-point" }
+// Make sure we don't hang when verify_tree processes a large expression.
+
+struct T { bool operator==(const T &ot) const; };
+
+#define CMP(M, N, L) t[100 * M + 10 * N + L] == ot.t[100 * M + 10 * N + L] &&
+
+#define CMP1(M, N) \
+  CMP(M, N, 0) \
+  CMP(M, N, 1) \
+  CMP(M, N, 2) \
+  CMP(M, N, 3) \
+  CMP(M, N, 4) \
+  CMP(M, N, 5) \
+  CMP(M, N, 6) \
+  CMP(M, N, 7) \
+  CMP(M, N, 8) \
+  CMP(M, N, 9)
+
+#define CMP2(M) \
+  CMP1(M, 0) \
+  CMP1(M, 1) \
+  CMP1(M, 2) \
+  CMP1(M, 3) \
+  CMP1(M, 4) \
+  CMP1(M, 5) \
+  CMP1(M, 6) \
+  CMP1(M, 7) \
+  CMP1(M, 8) \
+  CMP1(M, 9)
+
+#define GENERATE_CMPS \
+  CMP2(0) \
+  CMP2(1) \
+  CMP2(2) \
+  CMP2(3) \
+  CMP2(4) \
+  CMP2(5) \
+  CMP2(6) \
+  CMP2(7) \
+  CMP2(8) \
+  CMP2(9)
+
+struct C {
+  bool operator==(const C &ot) const {
+    return
+      GENERATE_CMPS
+      true;
+  }
+  T t[999];
+};
diff --git a/gcc/testsuite/g++.target/i386/mv29.C b/gcc/testsuite/g++.target/i386/mv29.C
new file mode 100644
index 0000000..c7723e3
--- /dev/null
+++ b/gcc/testsuite/g++.target/i386/mv29.C
@@ -0,0 +1,79 @@
+// Test that dispatching can choose the right multiversion
+// for AMD CPUs with the same internal GCC processor id
+
+// { dg-do run }
+// { dg-require-ifunc "" }
+// { dg-options "-O2" }
+
+#include <assert.h>
+
+int __attribute__ ((target("default")))
+foo ()
+{
+  return 0;
+}
+
+int __attribute__ ((target("arch=amdfam10"))) foo () {
+  return 1;
+}
+
+int __attribute__ ((target("arch=btver1"))) foo () {
+  return 2;
+}
+
+int __attribute__ ((target("arch=btver2"))) foo () {
+  return 3;
+}
+
+int __attribute__ ((target("arch=bdver1"))) foo () {
+  return 4;
+}
+
+int __attribute__ ((target("arch=bdver2"))) foo () {
+  return 5;
+}
+
+int __attribute__ ((target("arch=bdver3"))) foo () {
+  return 6;
+}
+
+int __attribute__ ((target("arch=znver1"))) foo () {
+  return 7;
+}
+
+int __attribute__ ((target("arch=znver2"))) foo () {
+  return 8;
+}
+
+int __attribute__ ((target("arch=znver3"))) foo () {
+  return 9;
+}
+
+
+int main ()
+{
+  int val = foo ();
+
+  if (__builtin_cpu_is ("amdfam10h"))
+    assert (val == 1);
+  else if  (__builtin_cpu_is ("btver1"))
+    assert (val == 2);
+  else if  (__builtin_cpu_is ("btver2"))
+    assert (val == 3);
+  else if (__builtin_cpu_is ("bdver1"))
+    assert (val == 4);
+  else if (__builtin_cpu_is ("bdver2"))
+    assert (val == 5);
+  else if (__builtin_cpu_is ("bdver3"))
+    assert (val == 6);
+  else if (__builtin_cpu_is ("znver1"))
+    assert (val == 7);
+  else if (__builtin_cpu_is ("znver2"))
+    assert (val == 8);
+  else if (__builtin_cpu_is ("znver3"))
+    assert (val == 9);
+  else
+    assert (val == 0);
+
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.c-torture/compile/pr58901-0.c b/gcc/testsuite/gcc.c-torture/compile/pr58901-0.c
new file mode 100644
index 0000000..d98e29e
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/compile/pr58901-0.c
@@ -0,0 +1,17 @@
+typedef int __attribute__ ((mode (SI))) int_t;
+
+struct s
+{
+  int_t n;
+  int_t c[];
+};
+
+int_t
+ashlsi (int_t x, const struct s *s)
+{
+  int_t i;
+
+  for (i = 0; i < s->n; i++)
+    x ^= 1 << s->c[i];
+  return x;
+}
diff --git a/gcc/testsuite/gcc.c-torture/compile/pr58901-1.c b/gcc/testsuite/gcc.c-torture/compile/pr58901-1.c
new file mode 100644
index 0000000..e01dba0
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/compile/pr58901-1.c
@@ -0,0 +1,21 @@
+typedef signed int __attribute__ ((mode (SI))) int_t;
+
+struct s
+{
+  int_t n;
+  int_t m : 1;
+  int_t l : 31;
+};
+
+int_t
+movdi (int_t x, const struct s *s)
+{
+  int_t i;
+
+  for (i = 0; i < x; i++)
+    {
+      const struct s t = s[i];
+      x += t.m ? 1 : 0;
+    }
+  return x;
+}
diff --git a/gcc/testsuite/gcc.c-torture/execute/pr97421-1.c b/gcc/testsuite/gcc.c-torture/execute/pr97421-1.c
new file mode 100644
index 0000000..e32fb12
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/execute/pr97421-1.c
@@ -0,0 +1,23 @@
+/* PR rtl-optimization/97421 */
+/* { dg-additional-options "-fmodulo-sched" } */
+
+int a, b, d, e;
+int *volatile c = &a;
+
+__attribute__((noinline))
+void f(void)
+{
+  for (int g = 2; g >= 0; g--) {
+    d = 0;
+    for (b = 0; b <= 2; b++)
+      ;
+    e = *c;
+  }
+}
+
+int main(void)
+{
+  f();
+  if (b != 3)
+    __builtin_abort();
+}
diff --git a/gcc/testsuite/gcc.c-torture/execute/pr97421-2.c b/gcc/testsuite/gcc.c-torture/execute/pr97421-2.c
new file mode 100644
index 0000000..142bcbc
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/execute/pr97421-2.c
@@ -0,0 +1,18 @@
+/* PR rtl-optimization/97421 */
+/* { dg-additional-options "-fmodulo-sched -fno-dce -fno-strict-aliasing" } */
+
+static int a, b, c;
+int *d = &c;
+int **e = &d;
+int ***f = &e;
+int main()
+{
+  int h;
+  for (a = 2; a; a--)
+    for (h = 0; h <= 2; h++)
+      for (b = 0; b <= 2; b++)
+        ***f = 6;
+
+  if (b != 3)
+    __builtin_abort();
+}
diff --git a/gcc/testsuite/gcc.c-torture/execute/pr97421-3.c b/gcc/testsuite/gcc.c-torture/execute/pr97421-3.c
new file mode 100644
index 0000000..3f1485a
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/execute/pr97421-3.c
@@ -0,0 +1,22 @@
+/* PR rtl-optimization/97421 */
+/* { dg-additional-options "-fmodulo-sched" } */
+
+int a, b, c;
+short d;
+void e(void) {
+  unsigned f = 0;
+  for (; f <= 2; f++) {
+    int g[1];
+    int h = (long)g;
+    c = 0;
+    for (; c < 10; c++)
+      g[0] = a = 0;
+    for (; a <= 2; a++)
+      b = d;
+  }
+}
+int main(void) {
+  e();
+  if (a != 3)
+    __builtin_abort();
+}
diff --git a/gcc/testsuite/gcc.dg/loop-8.c b/gcc/testsuite/gcc.dg/loop-8.c
index af317d8..90ea1c4 100644
--- a/gcc/testsuite/gcc.dg/loop-8.c
+++ b/gcc/testsuite/gcc.dg/loop-8.c
@@ -1,6 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-O1 -fdump-rtl-loop2_invariant" } */
-/* { dg-skip-if "unexpected IV" { "hppa*-*-* mips*-*-* visium-*-* powerpc*-*-* riscv*-*-* mmix-*-*" } } */
+/* { dg-skip-if "unexpected IV" { "hppa*-*-* mips*-*-* visium-*-* powerpc*-*-* riscv*-*-* mmix-*-* vax-*-*" } } */
 /* Load immediate on condition is available from z13 on and prevents moving
    the load out of the loop, so always run this test with -march=zEC12 that
    does not have load immediate on condition.  */
diff --git a/gcc/testsuite/gcc.dg/pr98147.c b/gcc/testsuite/gcc.dg/pr98147.c
new file mode 100644
index 0000000..3edc798
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr98147.c
@@ -0,0 +1,10 @@
+/* PR target/98147 */
+
+char buffer[32] = "foo bar";
+
+int
+main ()
+{
+  __builtin___clear_cache (buffer, buffer + 32);
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.dg/torture/pr98117.c b/gcc/testsuite/gcc.dg/torture/pr98117.c
new file mode 100644
index 0000000..f216025
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/pr98117.c
@@ -0,0 +1,19 @@
+/* { dg-do run } */
+/* { dg-additional-options "-fno-tree-scev-cprop" } */
+
+unsigned char c;
+void __attribute__((noipa))
+e()
+{
+  do
+    {
+    }
+  while (++c);
+}
+int main()
+{
+  e();
+  if (c != 0)
+    __builtin_abort ();
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr88676-2.c b/gcc/testsuite/gcc.dg/tree-ssa/pr88676-2.c
index 0e61636..ea88407 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/pr88676-2.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/pr88676-2.c
@@ -1,7 +1,7 @@
 /* PR tree-optimization/88676 */
 /* { dg-do compile } */
-/* { dg-options "-O2 -fdump-tree-phiopt1" } */
-/* { dg-final { scan-tree-dump-not " = PHI <" "phiopt1" { target le } } } */
+/* { dg-options "-O2 -fdump-tree-phiopt2" } */
+/* { dg-final { scan-tree-dump-not " = PHI <" "phiopt2" { target le } } } */
 
 struct foo1 {
   int i:1;
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr96232-1.c b/gcc/testsuite/gcc.dg/tree-ssa/pr96232-1.c
new file mode 100644
index 0000000..3170ffd
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/pr96232-1.c
@@ -0,0 +1,11 @@
+/* PR tree-optimization/96232 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-optimized" } */
+/* { dg-final { scan-tree-dump " \\+ -1;" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "~x_\[0-9]*\\\(D\\\)" "optimized" } } */
+
+int
+foo (_Bool x)
+{
+  return x ? 0 : -1;
+}
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr96232-2.c b/gcc/testsuite/gcc.dg/tree-ssa/pr96232-2.c
new file mode 100644
index 0000000..9f51820
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/pr96232-2.c
@@ -0,0 +1,18 @@
+/* PR tree-optimization/96232 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-optimized" } */
+/* { dg-final { scan-tree-dump " 38 - " "optimized" } } */
+/* { dg-final { scan-tree-dump " \\+ 97;" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "PHI <" "optimized" } } */
+
+int
+foo (_Bool x)
+{
+  return x ? 37 : 38;
+}
+
+int
+bar (_Bool x)
+{
+  return x ? 98 : 97;
+}
diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-70.c b/gcc/testsuite/gcc.dg/vect/bb-slp-70.c
new file mode 100644
index 0000000..0eb7011
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/vect/bb-slp-70.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-mavx512vl -mavx512vpopcntdq" { target avx512vpopcntdq } } */
+
+typedef unsigned uv4si __attribute__((vector_size(16)));
+
+uv4si __attribute__((noinline))
+vpopctf (uv4si a)
+{
+  uv4si r;
+  r[2] = __builtin_popcount (a[2]);
+  r[1] = __builtin_popcount (a[1]);
+  r[0] = __builtin_popcount (a[0]);
+  r[3] = __builtin_popcount (a[3]);
+  return r;
+}
+
+/* { dg-final { scan-tree-dump "optimized: basic block" "slp2" { target avx512vpopcntdq } } } */
diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-pr98137.c b/gcc/testsuite/gcc.dg/vect/bb-slp-pr98137.c
new file mode 100644
index 0000000..ecf7df2
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/vect/bb-slp-pr98137.c
@@ -0,0 +1,27 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-O3" } */
+/* { dg-require-effective-target vect_double } */
+
+void
+gemm (const double* __restrict__ A, const double* __restrict__ B,
+      double* __restrict__ C)
+{
+  unsigned int l_m = 0;
+  unsigned int l_n = 0;
+  unsigned int l_k = 0;
+
+  for ( l_n = 0; l_n < 9; l_n++ ) {
+    /* Use -O3 so this loop is unrolled completely early.  */
+    for ( l_m = 0; l_m < 10; l_m++ ) { C[(l_n*10)+l_m] = 0.0; }
+    for ( l_k = 0; l_k < 17; l_k++ ) {
+      /* Use -O3 so this loop is unrolled completely early.  */
+      for ( l_m = 0; l_m < 10; l_m++ ) {
+        C[(l_n*10)+l_m] += A[(l_k*20)+l_m] * B[(l_n*20)+l_k];
+      }
+    }
+  }
+}
+
+/* Exact scanning is difficult but we expect all loads and stores
+   and computations to be vectorized.  */
+/* { dg-final { scan-tree-dump "optimized: basic block" "slp1" } } */
diff --git a/gcc/testsuite/gcc.target/i386/funcspec-56.inc b/gcc/testsuite/gcc.target/i386/funcspec-56.inc
index 395a21c..5d4800f 100644
--- a/gcc/testsuite/gcc.target/i386/funcspec-56.inc
+++ b/gcc/testsuite/gcc.target/i386/funcspec-56.inc
@@ -193,6 +193,9 @@ extern void test_arch_barcelona (void)		__attribute__((__target__("arch=barcelon
 extern void test_arch_bdver1 (void)		__attribute__((__target__("arch=bdver1")));
 extern void test_arch_bdver2 (void)		__attribute__((__target__("arch=bdver2")));
 extern void test_arch_bdver3 (void)		__attribute__((__target__("arch=bdver3")));
+extern void test_arch_znver1 (void)             __attribute__((__target__("arch=znver1")));
+extern void test_arch_znver2 (void)             __attribute__((__target__("arch=znver2")));
+extern void test_arch_znver3 (void)             __attribute__((__target__("arch=znver3")));
 
 extern void test_tune_nocona (void)		__attribute__((__target__("tune=nocona")));
 extern void test_tune_core2 (void)		__attribute__((__target__("tune=core2")));
@@ -212,6 +215,9 @@ extern void test_tune_bdver1 (void)		__attribute__((__target__("tune=bdver1")));
 extern void test_tune_bdver2 (void)		__attribute__((__target__("tune=bdver2")));
 extern void test_tune_bdver3 (void)		__attribute__((__target__("tune=bdver3")));
 extern void test_tune_generic (void)		__attribute__((__target__("tune=generic")));
+extern void test_tune_znver1 (void)             __attribute__((__target__("tune=znver1")));
+extern void test_tune_znver2 (void)             __attribute__((__target__("tune=znver2")));
+extern void test_tune_znver3 (void)             __attribute__((__target__("tune=znver3")));
 
 extern void test_fpmath_sse (void)		__attribute__((__target__("sse2,fpmath=sse")));
 extern void test_fpmath_387 (void)		__attribute__((__target__("sse2,fpmath=387")));
diff --git a/gcc/testsuite/gcc.target/i386/pr98161.c b/gcc/testsuite/gcc.target/i386/pr98161.c
new file mode 100644
index 0000000..5825b9b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr98161.c
@@ -0,0 +1,48 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -msse4" } */
+/* { dg-require-effective-target sse4} */
+
+typedef unsigned short u16;
+typedef unsigned int   u32;
+typedef unsigned char  u8;
+
+u32
+__attribute__((__force_align_arg_pointer__))
+unreach(const u16 * pu16, u16 *dst, u32 dstlen, const u8 *src, u32 srclen)
+{
+  for (u32 i = dstlen; srclen && i; i--, srclen--, src++, dst++)
+    {
+      u16 off = pu16[*src];
+      if (off)
+	{
+	  src++; srclen--;
+	  *dst = pu16[off + *src];
+	}
+    }
+  return 56;
+}
+
+u32
+__attribute__((__force_align_arg_pointer__))
+__attribute__((noipa))
+bug(const u16 * pu16, u16 *dst, u32 dstlen, const u8 *src, u32 srclen)
+{
+  if (pu16)
+    /* Branch should not execute, but stack realignment
+     * reads wrong 'pu16' value from stack. */
+    return unreach(pu16, dst, dstlen, src, srclen);
+
+  return (srclen < dstlen) ? srclen : dstlen;
+}
+
+int
+main()
+{
+  if (__builtin_cpu_supports ("sse4.1"))
+    {
+      /* Should return 12 */
+      if (bug(0, 0, 12, 0, 34) != 12)
+	__builtin_abort ();
+    }
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/signbit-1.c b/gcc/testsuite/gcc.target/powerpc/signbit-1.c
index eb4f53e..1642bf4 100644
--- a/gcc/testsuite/gcc.target/powerpc/signbit-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/signbit-1.c
@@ -1,4 +1,5 @@
 /* { dg-do compile } */
+/* { dg-require-effective-target lp64 } */
 /* { dg-require-effective-target ppc_float128_sw } */
 /* { dg-require-effective-target powerpc_p8vector_ok } */
 /* { dg-options "-mdejagnu-cpu=power8 -O2 -mfloat128" } */
diff --git a/gcc/testsuite/gcc.target/powerpc/signbit-2.c b/gcc/testsuite/gcc.target/powerpc/signbit-2.c
index ff6af96..1b79291 100644
--- a/gcc/testsuite/gcc.target/powerpc/signbit-2.c
+++ b/gcc/testsuite/gcc.target/powerpc/signbit-2.c
@@ -13,5 +13,7 @@ int do_signbit_kf (__float128 *a) { return __builtin_signbit (*a); }
 /* { dg-final { scan-assembler-not   "lxvw4x"   } } */
 /* { dg-final { scan-assembler-not   "lxsd"     } } */
 /* { dg-final { scan-assembler-not   "lxsdx"    } } */
-/* { dg-final { scan-assembler-times "ld"     1 } } */
-/* { dg-final { scan-assembler-times "srdi"   1 } } */
+/* { dg-final { scan-assembler-times "ld"     1 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "srdi"   1 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "lwz"    1 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times "rlwinm" 1 { target ilp32 } } } */
diff --git a/gcc/testsuite/gcc.target/s390/s390.exp b/gcc/testsuite/gcc.target/s390/s390.exp
index 00e0555..d76d80d 100644
--- a/gcc/testsuite/gcc.target/s390/s390.exp
+++ b/gcc/testsuite/gcc.target/s390/s390.exp
@@ -202,6 +202,13 @@ proc check_effective_target_s390_z14_hw { } {
 	}
     }] "-march=z14 -m64 -mzarch" ] } { return 0 } else { return 1 }
 }
+# Return 1 if the default compiler options enable z/Architecture mode
+proc check_effective_target_s390_zarch { } {
+    return [check_no_compiler_messages s390_zarch object {
+	int dummy[sizeof (int __attribute__((__mode__(__word__)))) == 8
+		  ? 1 : -1];
+    }]
+}
 
 # If a testcase doesn't have special options, use these.
 global DEFAULT_CFLAGS
diff --git a/gcc/testsuite/gcc.target/s390/stack-clash-1.c b/gcc/testsuite/gcc.target/s390/stack-clash-1.c
index 3d29cab..45221c4 100644
--- a/gcc/testsuite/gcc.target/s390/stack-clash-1.c
+++ b/gcc/testsuite/gcc.target/s390/stack-clash-1.c
@@ -13,5 +13,5 @@ void large_stack() {
 
 /* We use a compare for the stack probe.  There needs to be one inside
    a loop and another for the remaining bytes.  */
-/* { dg-final { scan-assembler-times "cg\t" 2 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "c\t" 2 { target { ! lp64 } } } } */
+/* { dg-final { scan-assembler-times "cg\t" 2 { target s390_zarch } } } */
+/* { dg-final { scan-assembler-times "c\t" 2 { target { ! s390_zarch } } } } */
diff --git a/gcc/testsuite/gcc.target/s390/stack-clash-2.c b/gcc/testsuite/gcc.target/s390/stack-clash-2.c
index e554ad5..20f645d 100644
--- a/gcc/testsuite/gcc.target/s390/stack-clash-2.c
+++ b/gcc/testsuite/gcc.target/s390/stack-clash-2.c
@@ -13,5 +13,5 @@ foo ()
 /* For alloca a common code routine emits the probes.  Make sure the
    "probe_stack" expander is used in that case. We want to use mem
    compares instead of stores.  */
-/* { dg-final { scan-assembler-times "cg\t" 5 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "c\t" 5 { target { ! lp64 } } } } */
+/* { dg-final { scan-assembler-times "cg\t" 5 { target s390_zarch } } } */
+/* { dg-final { scan-assembler-times "c\t" 5 { target { ! s390_zarch } } } } */
diff --git a/gcc/testsuite/gcc.target/s390/stack-clash-3.c b/gcc/testsuite/gcc.target/s390/stack-clash-3.c
index 929d3fb..12a2d34 100644
--- a/gcc/testsuite/gcc.target/s390/stack-clash-3.c
+++ b/gcc/testsuite/gcc.target/s390/stack-clash-3.c
@@ -13,5 +13,5 @@ foo ()
 /* For alloca a common code routine emits the probes.  Make sure the
    "probe_stack" expander is used in that case. We want to use mem
    compares instead of stores.  */
-/* { dg-final { scan-assembler-times "cg\t" 5 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "c\t" 5 { target { ! lp64 } } } } */
+/* { dg-final { scan-assembler-times "cg\t" 5 { target s390_zarch } } } */
+/* { dg-final { scan-assembler-times "c\t" 5 { target { ! s390_zarch } } } } */
diff --git a/gcc/testsuite/gcc.target/s390/stack-clash-5.c b/gcc/testsuite/gcc.target/s390/stack-clash-5.c
new file mode 100644
index 0000000..81e202e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/stack-clash-5.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-O1 -m31 -mzarch -fstack-clash-protection" } */
+
+extern void bar (char*);
+
+void
+foo() {
+  char a[4000];
+  bar (a) ;
+}
diff --git a/gcc/testsuite/gcc.target/vax/bbcci.c b/gcc/testsuite/gcc.target/vax/bbcci.c
new file mode 100644
index 0000000..f58d3a7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/bbcci.c
@@ -0,0 +1,20 @@
+/* { dg-do compile } */
+
+#include <stdatomic.h>
+
+extern volatile atomic_flag guard;
+
+void
+try_atomic_flag_clear (void)
+{
+  atomic_flag_clear (&guard);
+}
+
+/* Expect assembly like:
+
+	jbcci $0,guard,.L2
+.L2:
+
+ */
+
+/* { dg-final { scan-assembler "\tjbcci \\\$0,guard," } } */
diff --git a/gcc/testsuite/gcc.target/vax/bbssi.c b/gcc/testsuite/gcc.target/vax/bbssi.c
new file mode 100644
index 0000000..65111e9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/bbssi.c
@@ -0,0 +1,20 @@
+/* { dg-do compile } */
+
+#include <stdatomic.h>
+
+extern volatile atomic_flag guard;
+
+void
+try_atomic_flag_test_and_set (void)
+{
+  atomic_flag_test_and_set (&guard);
+}
+
+/* Expect assembly like:
+
+	jbssi $0,guard,.L1
+.L1:
+
+ */
+
+/* { dg-final { scan-assembler "\tjbssi \\\$0,guard," } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-adddf.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-adddf.c
new file mode 100644
index 0000000..872d46b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-adddf.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (DF))) float_t;
+
+float_t
+eq_adddf (float_t x, float_t y)
+{
+  x += y;
+  if (x == 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	addd3 4(%ap),12(%ap),%r0	# 35	[c=68]  *adddf3_ccz/2
+	jeql .L1			# 37	[c=26]  *branch_ccz
+	addd2 $0d2.0e+0,%r0		# 34	[c=56]  *adddf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "adddf\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-addhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-addhi.c
new file mode 100644
index 0000000..3a5dbad
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-addhi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+eq_addhi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x + *y;
+  if (v == 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	addw3 *8(%ap),*12(%ap),%r0	# 33	[c=64]  *addhi3_ccz
+	jeql .L2			# 35	[c=26]  *branch_ccz
+	addw2 $2,%r0			# 32	[c=32]  *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "addhi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-addqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-addqi.c
new file mode 100644
index 0000000..b0fe468
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-addqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+eq_addqi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x + *y;
+  if (v == 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	addb3 *8(%ap),*12(%ap),%r0	# 33	[c=64]  *addqi3_ccz
+	jeql .L2			# 35	[c=26]  *branch_ccz
+	addb2 $2,%r0			# 32	[c=32]  *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "addqi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-addsf.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-addsf.c
new file mode 100644
index 0000000..de9e9c1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-addsf.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+
+float_t
+eq_addsf (float_t x, float_t y)
+{
+  x += y;
+  if (x == 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	addf3 4(%ap),8(%ap),%r0		# 34	[c=48]  *addsf3_ccz/2
+	jeql .L1			# 36	[c=26]  *branch_ccz
+	addf2 $0f2.0e+0,%r0		# 33	[c=36]  *addsf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "addsf\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-addsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-addsi.c
new file mode 100644
index 0000000..6998e60
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-addsi.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+eq_addsi (int_t x, int_t y)
+{
+  x += y;
+  if (x == 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	addl3 4(%ap),8(%ap),%r0		# 33	[c=48]  *addsi3_ccz
+	jeql .L1			# 35	[c=26]  *branch_ccz
+	addl2 $2,%r0			# 32	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "addsi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-andhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-andhi.c
new file mode 100644
index 0000000..d4d0c59
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-andhi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+eq_andhi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x & ~*y;
+  if (v == 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	bicw3 *12(%ap),*8(%ap),%r0	# 34	[c=44]  *andhi3_2_ccz/1
+	jeql .L2			# 36	[c=26]  *branch_ccz
+	addw2 $2,%r0			# 33	[c=32]  *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "andhi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-andqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-andqi.c
new file mode 100644
index 0000000..efa0dfe
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-andqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+eq_andqi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x & ~*y;
+  if (v == 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	bicb3 *12(%ap),*8(%ap),%r0	# 34	[c=44]  *andqi3_2_ccz/1
+	jeql .L2			# 36	[c=26]  *branch_ccz
+	addb2 $2,%r0			# 33	[c=32]  *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "andqi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-andsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-andsi.c
new file mode 100644
index 0000000..9afc860
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-andsi.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+eq_andsi (int_t x, int_t y)
+{
+  x &= ~y;
+  if (x == 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	bicl3 8(%ap),4(%ap),%r0		# 35	[c=28]  *andsi3_2_ccz/1
+	jeql .L1			# 37	[c=26]  *branch_ccz
+	addl2 $2,%r0			# 34	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "andsi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-ashlsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-ashlsi.c
new file mode 100644
index 0000000..a824f2d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-ashlsi.c
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+typedef int __attribute__ ((mode (QI))) short_t;
+
+int_t
+eq_ashlsi (int_t x, short_t y)
+{
+  x <<= y;
+  if (x == 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	ashl 8(%ap),4(%ap),%r0		# 35	[c=56]  *ashlsi3_ccz
+	jeql .L1			# 37	[c=26]  *branch_ccz
+	addl2 $2,%r0			# 34	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "ashlsi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-ashrsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-ashrsi.c
new file mode 100644
index 0000000..5f1e3a4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-ashrsi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+typedef int __attribute__ ((mode (QI))) short_t;
+
+int_t
+eq_ashrsi (int_t x, short_t y)
+{
+  x >>= y;
+  if (x == 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	mnegb 8(%ap),%r0		# 36	[c=16]  *negqi2
+	ashl %r0,4(%ap),%r0		# 37	[c=52]  *ashlnegsi3_2_ccz
+	jeql .L1			# 39	[c=26]  *branch_ccz
+	addl2 $2,%r0			# 35	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "ashlnegsi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-divdf.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-divdf.c
new file mode 100644
index 0000000..7101960
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-divdf.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (DF))) float_t;
+
+float_t
+eq_divdf (float_t x, float_t y)
+{
+  x /= y;
+  if (x == 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	divd3 12(%ap),4(%ap),%r0	# 35	[c=112]  *divdf3_ccz/1
+	jeql .L1			# 37	[c=26]  *branch_ccz
+	addd2 $0d2.0e+0,%r0		# 34	[c=56]  *adddf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "divdf\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-divhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-divhi.c
new file mode 100644
index 0000000..03866f9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-divhi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (HI), vector_size (2))) int_t;
+
+void
+eq_divhi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x / *y;
+  if (v[0] == 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	divw3 *12(%ap),*8(%ap),%r0	# 38	[c=76]  *divhi3_ccz/1
+	jeql .L2			# 40	[c=26]  *branch_ccz
+	addw2 $2,%r0			# 37	[c=32]  *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "divhi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-divqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-divqi.c
new file mode 100644
index 0000000..e4cfbf0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-divqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (QI), vector_size (1))) int_t;
+
+void
+eq_divqi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x / *y;
+  if (v[0] == 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	divb3 *12(%ap),*8(%ap),%r0	# 38	[c=76]  *divqi3_ccz/1
+	jeql .L2			# 40	[c=26]  *branch_ccz
+	addb2 $2,%r0			# 37	[c=32]  *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "divqi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-divsf.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-divsf.c
new file mode 100644
index 0000000..492becf
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-divsf.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+
+float_t
+eq_divsf (float_t x, float_t y)
+{
+  x /= y;
+  if (x == 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	divf3 8(%ap),4(%ap),%r0		# 34	[c=60]  *divsf3_ccz/1
+	jeql .L1			# 36	[c=26]  *branch_ccz
+	addf2 $0f2.0e+0,%r0		# 33	[c=36]  *addsf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "divsf\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-divsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-divsi.c
new file mode 100644
index 0000000..324614f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-divsi.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+eq_divsi (int_t x, int_t y)
+{
+  x /= y;
+  if (x == 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	divl3 8(%ap),4(%ap),%r0		# 33	[c=60]  *divsi3_ccz/1
+	jeql .L1			# 35	[c=26]  *branch_ccz
+	addl2 $2,%r0			# 32	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "divsi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-extendhisi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-extendhisi.c
new file mode 100644
index 0000000..f875da9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-extendhisi.c
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+typedef int __attribute__ ((mode (HI))) short_t;
+
+int_t
+eq_extendhisi (int_t x)
+{
+  x = (short_t) x;
+  if (x == 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	cvtwl 4(%ap),%r0		# 33	[c=20]  *extendhisi2_ccz
+	jeql .L1			# 35	[c=26]  *branch_ccz
+	addl2 $2,%r0			# 32	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "extendhisi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-extendqisi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-extendqisi.c
new file mode 100644
index 0000000..16a6acd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-extendqisi.c
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+typedef int __attribute__ ((mode (QI))) short_t;
+
+int_t
+eq_extendqisi (int_t x)
+{
+  x = (short_t) x;
+  if (x == 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	cvtbl 4(%ap),%r0		# 33	[c=20]  *extendqisi2_ccz
+	jeql .L1			# 35	[c=26]  *branch_ccz
+	addl2 $2,%r0			# 32	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "extendqisi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-extvsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-extvsi.c
new file mode 100644
index 0000000..5383059
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-extvsi.c
@@ -0,0 +1,38 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef signed int __attribute__ ((mode (SI))) int_t;
+typedef struct
+  {
+    int_t h : 7;
+    int_t i : 18;
+    int_t l : 7;
+  }
+bit_t;
+
+int_t
+eq_extvsi (bit_t x)
+{
+  int_t v;
+
+  v = x.i;
+  if (v == 0)
+    return v;
+  else
+    return v + 2;
+}
+
+/* Expect assembly like:
+
+	extv $7,$18,4(%ap),%r0		# 32	[c=68]  *extv_non_const_2_ccz
+	jeql .L1			# 34	[c=26]  *branch_ccz
+	addl2 $2,%r0			# 31	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "extv\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-extzvsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-extzvsi.c
new file mode 100644
index 0000000..d21fa29
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-extzvsi.c
@@ -0,0 +1,39 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (SI))) int_t;
+typedef struct
+  {
+    int_t h : 7;
+    int_t i : 18;
+    int_t l : 7;
+  }
+bit_t;
+
+int_t
+eq_extzvsi (bit_t x)
+{
+  int_t v;
+
+  v = x.i;
+  if (v == 0)
+    return v;
+  else
+    return v + 2;
+}
+
+/* Expect assembly like:
+
+	rotl $25,4(%ap),%r0		# 32	[c=68]  *extzv_non_const_2_ccz
+	bicl2 $-262144,%r0
+	jeql .L1			# 34	[c=26]  *branch_ccz
+	addl2 $2,%r0			# 31	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "extzv\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-fixdfhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-fixdfhi.c
new file mode 100644
index 0000000..8912d14
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-fixdfhi.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (DF))) float_t;
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+eq_fixdfhi (int_t *w, float_t x)
+{
+  int_t v;
+
+  v = x;
+  if (v == 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	cvtdw 8(%ap),%r0		# 31	[c=36]  *fix_truncdfhi2_ccz
+	jeql .L2			# 33	[c=26]  *branch_ccz
+	addw2 $2,%r0			# 30	[c=32]  *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "fix_truncdfhi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-fixdfqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-fixdfqi.c
new file mode 100644
index 0000000..12f9385
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-fixdfqi.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (DF))) float_t;
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+eq_fixdfqi (int_t *w, float_t x)
+{
+  int_t v;
+
+  v = x;
+  if (v == 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	cvtdb 8(%ap),%r0		# 31	[c=36]  *fix_truncdfqi2_ccz
+	jeql .L2			# 33	[c=26]  *branch_ccz
+	addb2 $2,%r0			# 30	[c=32]  *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "fix_truncdfqi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-fixdfsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-fixdfsi.c
new file mode 100644
index 0000000..ad54d88
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-fixdfsi.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (DF))) float_t;
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+eq_fixdfsi (float_t x)
+{
+  int_t v;
+
+  v = x;
+  if (v == 0)
+    return v;
+  else
+    return v + 2;
+}
+
+/* Expect assembly like:
+
+	cvtdl 4(%ap),%r0		# 32	[c=36]  *fix_truncdfsi2_ccz
+	jeql .L1			# 34	[c=26]  *branch_ccz
+	addl2 $2,%r0			# 31	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "fix_truncdfsi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-fixsfhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-fixsfhi.c
new file mode 100644
index 0000000..0c26857
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-fixsfhi.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+eq_fixsfhi (int_t *w, float_t x)
+{
+  int_t v;
+
+  v = x;
+  if (v == 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	cvtfw 8(%ap),%r0		# 31	[c=36]  *fix_truncsfhi2_ccz
+	jeql .L2			# 33	[c=26]  *branch_ccz
+	addw2 $2,%r0			# 30	[c=32]  *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "fix_truncsfhi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-fixsfqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-fixsfqi.c
new file mode 100644
index 0000000..2d32525
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-fixsfqi.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+eq_fixsfqi (int_t *w, float_t x)
+{
+  int_t v;
+
+  v = x;
+  if (v == 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	cvtfb 8(%ap),%r0		# 31	[c=36]  *fix_truncsfqi2_ccz
+	jeql .L2			# 33	[c=26]  *branch_ccz
+	addb2 $2,%r0			# 30	[c=32]  *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "fix_truncsfqi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-fixsfsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-fixsfsi.c
new file mode 100644
index 0000000..a704ad8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-fixsfsi.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+eq_fixsfsi (float_t x)
+{
+  int_t v;
+
+  v = x;
+  if (v == 0)
+    return v;
+  else
+    return v + 2;
+}
+
+/* Expect assembly like:
+
+	cvtfl 4(%ap),%r0		# 32	[c=36]  *fix_truncsfsi2_ccz
+	jeql .L1			# 34	[c=26]  *branch_ccz
+	addl2 $2,%r0			# 31	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "fix_truncsfsi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-floatsisf.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-floatsisf.c
new file mode 100644
index 0000000..1ea83cc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-floatsisf.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+typedef int __attribute__ ((mode (SI))) int_t;
+
+float_t
+eq_floatsisf (int_t x)
+{
+  float_t v;
+
+  v = x;
+  if (v == 0)
+    return v;
+  else
+    return v + 2;
+}
+
+/* Expect assembly like:
+
+	cvtlf 4(%ap),%r0		# 33	[c=32]  *floatsisf2_ccz
+	jeql .L1			# 35	[c=26]  *branch_ccz
+	addf2 $0f2.0e+0,%r0		# 32	[c=36]  *addsf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "floatsisf\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-insvsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-insvsi.c
new file mode 100644
index 0000000..fbdcdb4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-insvsi.c
@@ -0,0 +1,46 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef signed int __attribute__ ((mode (SI))) int_t;
+typedef union
+  {
+    int_t i;
+    struct
+      {
+	int_t h : 7;
+	int_t i : 18;
+	int_t l : 7;
+      } b;
+  }
+bit_t;
+
+int
+eq_insvsi (bit_t x, int_t y)
+{
+  int_t v;
+
+  v = x.b.i;
+  x.b.i = y;
+  if (v != 0)
+    return x.i;
+  else
+    return x.i + 2;
+}
+
+/* Expect assembly like:
+
+	movl 4(%ap),%r0			# 35	[c=16]  *movsi_2
+	extv $7,$18,%r0,%r1		# 36	[c=60]  *extv_non_const_2_ccz
+	insv 8(%ap),$7,$18,%r0		# 8	[c=16]  *insv_2
+	jneq .L1			# 38	[c=26]  *branch_ccz
+	addl2 $2,%r0			# 34	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "extv\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "extv.*insv.*branch" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-iorhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-iorhi.c
new file mode 100644
index 0000000..9bbe881
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-iorhi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+eq_iorhi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x | *y;
+  if (v == 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	bisw3 *12(%ap),*8(%ap),%r0	# 32	[c=44]  *iorhi3_ccz/2
+	jeql .L2			# 34	[c=26]  *branch_ccz
+	addw2 $2,%r0			# 31	[c=32]  *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "iorhi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-iorqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-iorqi.c
new file mode 100644
index 0000000..82f3f6b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-iorqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+eq_iorqi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x | *y;
+  if (v == 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	bisb3 *12(%ap),*8(%ap),%r0	# 32	[c=44]  *iorqi3_ccz/2
+	jeql .L2			# 34	[c=26]  *branch_ccz
+	addb2 $2,%r0			# 31	[c=32]  *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "iorqi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-iorsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-iorsi.c
new file mode 100644
index 0000000..dd4490d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-iorsi.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+eq_iorsi (int_t x, int_t y)
+{
+  x |= y;
+  if (x == 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	bisl3 8(%ap),4(%ap),%r0		# 33	[c=28]  *iorsi3_ccz/2
+	jeql .L1			# 35	[c=26]  *branch_ccz
+	addl2 $2,%r0			# 32	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "iorsi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-mova.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-mova.c
new file mode 100644
index 0000000..286025f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-mova.c
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+extern char __attribute__ ((weak)) c;
+
+char *
+eq_mova (char *p)
+{
+  char *v;
+
+  v = &c;
+  if (v)
+    return v;
+  return p;
+}
+
+/* Expect assembly like:
+
+	movab c,%r0			# 35	[c=12]  *movsym_2_ccz
+	jeql .L6			# 37	[c=26]  *branch_ccz
+	ret				# 43	[c=0]  return
+.L6:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "movsym\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-movdf.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-movdf.c
new file mode 100644
index 0000000..c83e966
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-movdf.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (DF))) float_t;
+
+float_t
+eq_movdf (float_t x)
+{
+  if (x == 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	movd 4(%ap),%r0			# 34	[c=24]  *movdf_ccz/1
+	jeql .L2			# 36	[c=26]  *branch_ccz
+	addd2 $0d2.0e+0,%r0		# 33	[c=56]  *adddf3/0
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "movdf\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-movhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-movhi.c
new file mode 100644
index 0000000..99832dc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-movhi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+eq_movhi (int_t *w, int_t *x)
+{
+  int_t v;
+
+  v = *x;
+  if (v == 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	movw *8(%ap),%r0		# 31	[c=24]  *movhi_ccz
+	jeql .L2			# 33	[c=26]  *branch_ccz
+	addw2 $2,%r0			# 30	[c=32]  *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "movhi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-movqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-movqi.c
new file mode 100644
index 0000000..5014b8b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-movqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+eq_movqi (int_t *w, int_t *x)
+{
+  int_t v;
+
+  v = *x;
+  if (v == 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	movb *8(%ap),%r0		# 31	[c=24]  *movqi_ccz
+	jeql .L2			# 33	[c=26]  *branch_ccz
+	addb2 $2,%r0			# 30	[c=32]  *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "movqi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-movsf.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-movsf.c
new file mode 100644
index 0000000..8907461
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-movsf.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+
+float_t
+eq_movsf (float_t x)
+{
+  if (x == 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	movf 4(%ap),%r0			# 33	[c=16]  *movsf_ccz/1
+	jeql .L2			# 35	[c=26]  *branch_ccz
+	addf2 $0f2.0e+0,%r0		# 32	[c=36]  *addsf3/0
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "movsf\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-movsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-movsi.c
new file mode 100644
index 0000000..1e65f4b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-movsi.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+eq_movsi (int_t x)
+{
+  if (x == 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	movl 4(%ap),%r0			# 32	[c=16]  *movsi_2_ccz
+	jeql .L2			# 34	[c=26]  *branch_ccz
+	addl2 $2,%r0			# 31	[c=32]  *addsi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "movsi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-muldf.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-muldf.c
new file mode 100644
index 0000000..7271c21
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-muldf.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (DF))) float_t;
+
+float_t
+eq_muldf (float_t x, float_t y)
+{
+  x *= y;
+  if (x == 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	muld3 4(%ap),12(%ap),%r0	# 35	[c=80]  *muldf3_ccz/2
+	jeql .L1			# 37	[c=26]  *branch_ccz
+	addd2 $0d2.0e+0,%r0		# 34	[c=56]  *adddf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "muldf\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-mulhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-mulhi.c
new file mode 100644
index 0000000..d44a622
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-mulhi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+eq_mulhi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x * *y;
+  if (v == 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	mulw3 *8(%ap),*12(%ap),%r0	# 33	[c=72]  *mulhi3_ccz/2
+	jeql .L2			# 35	[c=26]  *branch_ccz
+	addw2 $2,%r0			# 32	[c=32]  *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "mulhi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-mulqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-mulqi.c
new file mode 100644
index 0000000..2451843
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-mulqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+eq_mulqi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x * *y;
+  if (v == 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	mulb3 *8(%ap),*12(%ap),%r0	# 33	[c=72]  *mulqi3_ccz/2
+	jeql .L2			# 35	[c=26]  *branch_ccz
+	addb2 $2,%r0			# 32	[c=32]  *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "mulqi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-mulsf.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-mulsf.c
new file mode 100644
index 0000000..824487b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-mulsf.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+
+float_t
+eq_mulsf (float_t x, float_t y)
+{
+  x *= y;
+  if (x == 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	mulf3 4(%ap),8(%ap),%r0		# 34	[c=52]  *mulsf3_ccz/2
+	jeql .L1			# 36	[c=26]  *branch_ccz
+	addf2 $0f2.0e+0,%r0		# 33	[c=36]  *addsf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "mulsf\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-mulsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-mulsi.c
new file mode 100644
index 0000000..fbefa54
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-mulsi.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+eq_mulsi (int_t x, int_t y)
+{
+  x *= y;
+  if (x == 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	mull3 4(%ap),8(%ap),%r0		# 33	[c=56]  *mulsi3_ccz/2
+	jeql .L1			# 35	[c=26]  *branch_ccz
+	addl2 $2,%r0			# 32	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "mulsi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-nothi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-nothi.c
new file mode 100644
index 0000000..79b274c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-nothi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+eq_nothi (int_t *w, int_t *x)
+{
+  int_t v;
+
+  v = ~*x;
+  if (v == 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	mcomw *8(%ap),%r0		# 31	[c=24]  *one_cmplhi2_ccz
+	jeql .L2			# 33	[c=26]  *branch_ccz
+	addw2 $2,%r0			# 30	[c=32]  *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "one_cmplhi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-notqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-notqi.c
new file mode 100644
index 0000000..ae98a2f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-notqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+eq_notqi (int_t *w, int_t *x)
+{
+  int_t v;
+
+  v = ~*x;
+  if (v == 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	mcomb *8(%ap),%r0		# 31	[c=24]  *one_cmplqi2_ccz
+	jeql .L2			# 33	[c=26]  *branch_ccz
+	addb2 $2,%r0			# 30	[c=32]  *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "one_cmplqi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-notsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-notsi.c
new file mode 100644
index 0000000..ba5b735
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-notsi.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+eq_notsi (int_t x)
+{
+  x = ~x;
+  if (x == 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	mcoml 4(%ap),%r0		# 32	[c=16]  *one_cmplsi2_ccz
+	jeql .L1			# 34	[c=26]  *branch_ccz
+	addl2 $2,%r0			# 31	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "one_cmplsi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-rotlsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-rotlsi.c
new file mode 100644
index 0000000..17c4868
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-rotlsi.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (SI))) ulong_t;
+typedef int __attribute__ ((mode (SI))) long_t;
+typedef int __attribute__ ((mode (QI))) int_t;
+
+ulong_t
+eq_rotlsi (ulong_t x, int_t y)
+{
+  long_t v;
+
+  v = x << y | x >> 8 * sizeof (x) - y;
+  if (v == 0)
+    return v;
+  else
+    return v + 2;
+}
+
+/* Expect assembly like:
+
+	rotl 8(%ap),4(%ap),%r0		# 36	[c=40]  *rotlsi3_ccz
+	jeql .L1			# 38	[c=26]  *branch_ccz
+	addl2 $2,%r0			# 35	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "rotlsi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-rotrsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-rotrsi.c
new file mode 100644
index 0000000..ffbca23
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-rotrsi.c
@@ -0,0 +1,34 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (SI))) ulong_t;
+typedef int __attribute__ ((mode (SI))) long_t;
+typedef int __attribute__ ((mode (QI))) int_t;
+
+ulong_t
+eq_rotrsi (ulong_t x, int_t y)
+{
+  long_t v;
+
+  v = x >> y | x << 8 * sizeof (x) - y;
+  if (v == 0)
+    return v;
+  else
+    return v + 2;
+}
+
+/* Expect assembly like:
+
+	mnegb 8(%ap),%r0		# 37	[c=16]  *negqi2
+	rotl %r0,4(%ap),%r0		# 38	[c=36]  *rotrnegsi3_2_ccz
+	jeql .L1			# 40	[c=26]  *branch_ccz
+	addl2 $2,%r0			# 36	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "rotrnegsi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-subdf.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-subdf.c
new file mode 100644
index 0000000..a8d3f1f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-subdf.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (DF))) float_t;
+
+float_t
+eq_subdf (float_t x, float_t y)
+{
+  x -= y;
+  if (x == 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	subd3 12(%ap),4(%ap),%r0	# 35	[c=68]  *subdf3_ccz/1
+	jeql .L1			# 37	[c=26]  *branch_ccz
+	addd2 $0d2.0e+0,%r0		# 34	[c=56]  *adddf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "subdf\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-subhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-subhi.c
new file mode 100644
index 0000000..f01b4b6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-subhi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+eq_subhi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x - *y;
+  if (v == 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	subw3 *12(%ap),*8(%ap),%r0	# 33	[c=64]  *subhi3_ccz/1
+	jeql .L2			# 35	[c=26]  *branch_ccz
+	addw2 $2,%r0			# 32	[c=32]  *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "subhi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-subqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-subqi.c
new file mode 100644
index 0000000..733e30f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-subqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+eq_subqi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x - *y;
+  if (v == 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	subb3 *12(%ap),*8(%ap),%r0	# 33	[c=64]  *subqi3_ccz/1
+	jeql .L2			# 35	[c=26]  *branch_ccz
+	addb2 $2,%r0			# 32	[c=32]  *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "subqi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-subsf.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-subsf.c
new file mode 100644
index 0000000..34e8555
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-subsf.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+
+float_t
+eq_subsf (float_t x, float_t y)
+{
+  x -= y;
+  if (x == 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	subf3 8(%ap),4(%ap),%r0		# 34	[c=48]  *subsf3_ccz/1
+	jeql .L1			# 36	[c=26]  *branch_ccz
+	addf2 $0f2.0e+0,%r0		# 33	[c=36]  *addsf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "subsf\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-subsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-subsi.c
new file mode 100644
index 0000000..456e35a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-subsi.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+eq_subsi (int_t x, int_t y)
+{
+  x -= y;
+  if (x == 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	subl3 8(%ap),4(%ap),%r0		# 33	[c=48]  *subsi3_ccz/1
+	jeql .L1			# 35	[c=26]  *branch_ccz
+	addl2 $2,%r0			# 32	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "subsi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-truncdfsf.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-truncdfsf.c
new file mode 100644
index 0000000..7192d87
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-truncdfsf.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) single_t;
+typedef float __attribute__ ((mode (DF))) double_t;
+
+single_t
+eq_truncdfsf (double_t x)
+{
+  single_t v;
+
+  v = x;
+  if (v == 0)
+    return v;
+  else
+    return v + 2;
+}
+
+/* Expect assembly like:
+
+	cvtdf 4(%ap),%r0		# 33	[c=20]  *truncdfsf2_ccz
+	jeql .L1			# 35	[c=26]  *branch_ccz
+	addf2 $0f2.0e+0,%r0		# 32	[c=36]  *addsf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "truncdfsf\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-trunchiqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-trunchiqi.c
new file mode 100644
index 0000000..9e7a885
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-trunchiqi.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (HI))) int_t;
+typedef unsigned int __attribute__ ((mode (QI))) short_t;
+
+void
+eq_trunchiqi (short_t *w, int_t *x, int y)
+{
+  short_t v;
+
+  v = x[y];
+  if (v == 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	movl 12(%ap),%r0		# 33	[c=16]  *movsi_2
+	cvtwb *8(%ap)[%r0],%r0		# 34	[c=28]  *trunchiqi2_ccz
+	jeql .L2			# 36	[c=26]  *branch_ccz
+	addb2 $2,%r0			# 32	[c=32]  *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "trunchiqi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-truncsihi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-truncsihi.c
new file mode 100644
index 0000000..36dd7df
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-truncsihi.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (SI))) int_t;
+typedef unsigned int __attribute__ ((mode (HI))) short_t;
+
+void
+eq_truncsihi (short_t *w, int_t *x, int y)
+{
+  short_t v;
+
+  v = x[y];
+  if (v == 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	movl 12(%ap),%r0		# 33	[c=16]  *movsi_2
+	cvtlw *8(%ap)[%r0],%r0		# 34	[c=28]  *truncsihi2_ccz
+	jeql .L2			# 36	[c=26]  *branch_ccz
+	addw2 $2,%r0			# 32	[c=32]  *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "truncsihi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-truncsiqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-truncsiqi.c
new file mode 100644
index 0000000..a0ee4cf
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-truncsiqi.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (SI))) int_t;
+typedef unsigned int __attribute__ ((mode (QI))) short_t;
+
+void
+eq_truncsiqi (short_t *w, int_t *x, int y)
+{
+  short_t v;
+
+  v = x[y];
+  if (v == 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	movl 12(%ap),%r0		# 33	[c=16]  *movsi_2
+	cvtlb *8(%ap)[%r0],%r0		# 34	[c=28]  *truncsiqi2_ccz
+	jeql .L2			# 36	[c=26]  *branch_ccz
+	addb2 $2,%r0			# 32	[c=32]  *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "truncsiqi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-zextendhisi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-zextendhisi.c
new file mode 100644
index 0000000..2fa86dd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-zextendhisi.c
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (SI))) int_t;
+typedef unsigned int __attribute__ ((mode (HI))) short_t;
+
+int_t
+eq_zextendhisi (int_t x)
+{
+  x = (short_t) x;
+  if (x == 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	movzwl 4(%ap),%r0		# 32	[c=20]  *zero_extendhisi2_ccz
+	jeql .L1			# 34	[c=26]  *branch_ccz
+	addl2 $2,%r0			# 31	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "zero_extendhisi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-zextendqihi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-zextendqihi.c
new file mode 100644
index 0000000..16613c6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-zextendqihi.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (HI))) int_t;
+typedef unsigned int __attribute__ ((mode (QI))) short_t;
+
+void
+eq_zextendqihi (int_t *w, int_t *x)
+{
+  int_t v;
+
+  v = (short_t) *x;
+  if (v == 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	movzbw *8(%ap),%r0		# 31	[c=28]  *zero_extendqihi2_ccz
+	jeql .L2			# 33	[c=26]  *branch_ccz
+	addw2 $2,%r0			# 30	[c=32]  *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "zero_extendqihi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-eq-zextendqisi.c b/gcc/testsuite/gcc.target/vax/cmpelim-eq-zextendqisi.c
new file mode 100644
index 0000000..bb75f73
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-eq-zextendqisi.c
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (SI))) int_t;
+typedef unsigned int __attribute__ ((mode (QI))) short_t;
+
+int_t
+eq_zextendqisi (int_t x)
+{
+  x = (short_t) x;
+  if (x == 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	movzbl 4(%ap),%r0		# 32	[c=20]  *zero_extendqisi2_ccz
+	jeql .L1			# 34	[c=26]  *branch_ccz
+	addl2 $2,%r0			# 31	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "zero_extendqisi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-adddf.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-adddf.c
new file mode 100644
index 0000000..383d51d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-adddf.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (DF))) float_t;
+
+float_t
+le_adddf (float_t x, float_t y)
+{
+  x += y;
+  if (x <= 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	addd3 4(%ap),12(%ap),%r0	# 29	[c=68]  *adddf3_ccnz/2
+	jleq .L1			# 31	[c=26]  *branch_ccnz
+	addd2 $0d2.0e+0,%r0		# 28	[c=56]  *adddf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "adddf\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-addhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-addhi.c
new file mode 100644
index 0000000..19cc621
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-addhi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+le_addhi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x + *y;
+  if (v <= 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	addw3 *8(%ap),*12(%ap),%r0	# 29	[c=64]  *addhi3_ccnz
+	jleq .L2			# 31	[c=26]  *branch_ccnz
+	addw2 $2,%r0			# 28	[c=32]  *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "addhi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-addqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-addqi.c
new file mode 100644
index 0000000..291beb0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-addqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+le_addqi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x + *y;
+  if (v <= 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	addb3 *8(%ap),*12(%ap),%r0	# 29	[c=64]  *addqi3_ccnz
+	jleq .L2			# 31	[c=26]  *branch_ccnz
+	addb2 $2,%r0			# 28	[c=32]  *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "addqi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-addsf.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-addsf.c
new file mode 100644
index 0000000..e4596fe
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-addsf.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+
+float_t
+le_addsf (float_t x, float_t y)
+{
+  x += y;
+  if (x <= 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	addf3 4(%ap),8(%ap),%r0		# 28	[c=48]  *addsf3_ccnz/2
+	jleq .L1			# 30	[c=26]  *branch_ccnz
+	addf2 $0f2.0e+0,%r0		# 27	[c=36]  *addsf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "addsf\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-addsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-addsi.c
new file mode 100644
index 0000000..254b30c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-addsi.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+le_addsi (int_t x, int_t y)
+{
+  x += y;
+  if (x <= 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	addl3 4(%ap),8(%ap),%r0		# 29	[c=48]  *addsi3_ccnz
+	jleq .L1			# 31	[c=26]  *branch_ccnz
+	addl2 $2,%r0			# 28	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "addsi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-andhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-andhi.c
new file mode 100644
index 0000000..ddf04d9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-andhi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+le_andhi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x & ~*y;
+  if (v <= 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	bicw3 *12(%ap),*8(%ap),%r0	# 30	[c=44]  *andhi3_2_ccnz/1
+	jleq .L2			# 32	[c=26]  *branch_ccnz
+	addw2 $2,%r0			# 29	[c=32]  *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "andhi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-andqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-andqi.c
new file mode 100644
index 0000000..bd781dc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-andqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+le_andqi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x & ~*y;
+  if (v <= 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	bicb3 *12(%ap),*8(%ap),%r0	# 30	[c=44]  *andqi3_2_ccnz/1
+	jleq .L2			# 32	[c=26]  *branch_ccnz
+	addb2 $2,%r0			# 29	[c=32]  *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "andqi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-andsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-andsi.c
new file mode 100644
index 0000000..81fd7ba
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-andsi.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+le_andsi (int_t x, int_t y)
+{
+  x &= ~y;
+  if (x <= 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	bicl3 8(%ap),4(%ap),%r0		# 31	[c=28]  *andsi3_2_ccnz/1
+	jleq .L1			# 33	[c=26]  *branch_ccnz
+	addl2 $2,%r0			# 30	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "andsi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-ashlsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-ashlsi.c
new file mode 100644
index 0000000..2b67742
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-ashlsi.c
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+typedef int __attribute__ ((mode (QI))) short_t;
+
+int_t
+le_ashlsi (int_t x, short_t y)
+{
+  x <<= y;
+  if (x <= 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	ashl 8(%ap),4(%ap),%r0		# 31	[c=56]  *ashlsi3_ccnz
+	jleq .L1			# 33	[c=26]  *branch_ccnz
+	addl2 $2,%r0			# 30	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "ashlsi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-ashrsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-ashrsi.c
new file mode 100644
index 0000000..c4d9f28
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-ashrsi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+typedef int __attribute__ ((mode (QI))) short_t;
+
+int_t
+le_ashrsi (int_t x, short_t y)
+{
+  x >>= y;
+  if (x <= 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	mnegb 8(%ap),%r0		# 32	[c=16]  *negqi2
+	ashl %r0,4(%ap),%r0		# 33	[c=52]  *ashlnegsi3_2_ccnz
+	jleq .L1			# 35	[c=26]  *branch_ccnz
+	addl2 $2,%r0			# 31	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "ashlnegsi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-divdf.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-divdf.c
new file mode 100644
index 0000000..62b419c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-divdf.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (DF))) float_t;
+
+float_t
+le_divdf (float_t x, float_t y)
+{
+  x /= y;
+  if (x <= 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	divd3 12(%ap),4(%ap),%r0	# 29	[c=112]  *divdf3_ccnz/1
+	jleq .L1			# 31	[c=26]  *branch_ccnz
+	addd2 $0d2.0e+0,%r0		# 28	[c=56]  *adddf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "divdf\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-divhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-divhi.c
new file mode 100644
index 0000000..68ee484
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-divhi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (HI), vector_size (2))) int_t;
+
+void
+le_divhi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x / *y;
+  if (v[0] <= 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	divw3 *12(%ap),*8(%ap),%r0	# 34	[c=76]  *divhi3_ccnz/1
+	jleq .L2			# 36	[c=26]  *branch_ccnz
+	addw2 $2,%r0			# 33	[c=32]  *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "divhi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-divqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-divqi.c
new file mode 100644
index 0000000..e0b0cd3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-divqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (QI), vector_size (1))) int_t;
+
+void
+le_divqi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x / *y;
+  if (v[0] <= 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	divb3 *12(%ap),*8(%ap),%r0	# 34	[c=76]  *divqi3_ccnz/1
+	jleq .L2			# 36	[c=26]  *branch_ccnz
+	addb2 $2,%r0			# 33	[c=32]  *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "divqi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-divsf.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-divsf.c
new file mode 100644
index 0000000..b55b36e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-divsf.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+
+float_t
+le_divsf (float_t x, float_t y)
+{
+  x /= y;
+  if (x <= 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	divf3 8(%ap),4(%ap),%r0		# 28	[c=60]  *divsf3_ccnz/1
+	jleq .L1			# 30	[c=26]  *branch_ccnz
+	addf2 $0f2.0e+0,%r0		# 27	[c=36]  *addsf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "divsf\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-divsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-divsi.c
new file mode 100644
index 0000000..6a45a38
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-divsi.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+le_divsi (int_t x, int_t y)
+{
+  x /= y;
+  if (x <= 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	divl3 8(%ap),4(%ap),%r0		# 29	[c=60]  *divsi3_ccnz/1
+	jleq .L1			# 31	[c=26]  *branch_ccnz
+	addl2 $2,%r0			# 28	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "divsi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-extendhisi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-extendhisi.c
new file mode 100644
index 0000000..693c752f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-extendhisi.c
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+typedef int __attribute__ ((mode (HI))) short_t;
+
+int_t
+le_extendhisi (int_t x)
+{
+  x = (short_t) x;
+  if (x <= 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	cvtwl 4(%ap),%r0		# 29	[c=20]  *extendhisi2_ccnz
+	jleq .L1			# 31	[c=26]  *branch_ccnz
+	addl2 $2,%r0			# 28	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "extendhisi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-extendqisi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-extendqisi.c
new file mode 100644
index 0000000..4965bcf
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-extendqisi.c
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+typedef int __attribute__ ((mode (QI))) short_t;
+
+int_t
+le_extendqisi (int_t x)
+{
+  x = (short_t) x;
+  if (x <= 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	cvtbl 4(%ap),%r0		# 29	[c=20]  *extendqisi2_ccnz
+	jleq .L1			# 31	[c=26]  *branch_ccnz
+	addl2 $2,%r0			# 28	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "extendqisi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-extvsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-extvsi.c
new file mode 100644
index 0000000..641c8f0d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-extvsi.c
@@ -0,0 +1,38 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef signed int __attribute__ ((mode (SI))) int_t;
+typedef struct
+  {
+    int_t h : 7;
+    int_t i : 18;
+    int_t l : 7;
+  }
+bit_t;
+
+int_t
+le_extvsi (bit_t x)
+{
+  int_t v;
+
+  v = x.i;
+  if (v <= 0)
+    return v;
+  else
+    return v + 2;
+}
+
+/* Expect assembly like:
+
+	extv $7,$18,4(%ap),%r0		# 28	[c=68]  *extv_non_const_2_ccnz
+	jleq .L1			# 30	[c=26]  *branch_ccnz
+	addl2 $2,%r0			# 27	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "extv\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-extzvsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-extzvsi.c
new file mode 100644
index 0000000..18dd7ff
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-extzvsi.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (SI))) uint_t;
+typedef int __attribute__ ((mode (SI))) int_t;
+
+uint_t
+le_extzvsi (uint_t x, int_t y)
+{
+  int_t v;
+
+  v = x >> y;
+  if (v <= 0)
+    return v;
+  else
+    return v + 2;
+}
+
+/* Expect assembly like:
+
+	subb3 8(%ap),$32,%r0		# 31	[c=40]  *subqi3/1
+	extzv 8(%ap),%r0,4(%ap),%r0	# 32	[c=76]  *extzv_non_const_2_ccnz
+	jleq .L1			# 34	[c=26]  *branch_ccnz
+	addl2 $2,%r0			# 30	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "extzv\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-fixdfhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-fixdfhi.c
new file mode 100644
index 0000000..ea649c6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-fixdfhi.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (DF))) float_t;
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+le_fixdfhi (int_t *w, float_t x)
+{
+  int_t v;
+
+  v = x;
+  if (v <= 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	cvtdw 8(%ap),%r0		# 27	[c=36]  *fix_truncdfhi2_ccnz
+	jleq .L2			# 29	[c=26]  *branch_ccnz
+	addw2 $2,%r0			# 26	[c=32]  *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "fix_truncdfhi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-fixdfqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-fixdfqi.c
new file mode 100644
index 0000000..a53e936
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-fixdfqi.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (DF))) float_t;
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+le_fixdfqi (int_t *w, float_t x)
+{
+  int_t v;
+
+  v = x;
+  if (v <= 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	cvtdb 8(%ap),%r0		# 27	[c=36]  *fix_truncdfqi2_ccnz
+	jleq .L2			# 29	[c=26]  *branch_ccnz
+	addb2 $2,%r0			# 26	[c=32]  *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "fix_truncdfqi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-fixdfsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-fixdfsi.c
new file mode 100644
index 0000000..bcf5f36
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-fixdfsi.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (DF))) float_t;
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+le_fixdfsi (float_t x)
+{
+  int_t v;
+
+  v = x;
+  if (v <= 0)
+    return v;
+  else
+    return v + 2;
+}
+
+/* Expect assembly like:
+
+	cvtdl 4(%ap),%r0		# 28	[c=36]  *fix_truncdfsi2_ccnz
+	jleq .L1			# 30	[c=26]  *branch_ccnz
+	addl2 $2,%r0			# 27	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "fix_truncdfsi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-fixsfhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-fixsfhi.c
new file mode 100644
index 0000000..2301500
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-fixsfhi.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+le_fixsfhi (int_t *w, float_t x)
+{
+  int_t v;
+
+  v = x;
+  if (v <= 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	cvtfw 8(%ap),%r0		# 27	[c=36]  *fix_truncsfhi2_ccnz
+	jleq .L2			# 29	[c=26]  *branch_ccnz
+	addw2 $2,%r0			# 26	[c=32]  *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "fix_truncsfhi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-fixsfqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-fixsfqi.c
new file mode 100644
index 0000000..34a4783
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-fixsfqi.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+le_fixsfqi (int_t *w, float_t x)
+{
+  int_t v;
+
+  v = x;
+  if (v <= 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	cvtfb 8(%ap),%r0		# 27	[c=36]  *fix_truncsfqi2_ccnz
+	jleq .L2			# 29	[c=26]  *branch_ccnz
+	addb2 $2,%r0			# 26	[c=32]  *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "fix_truncsfqi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-fixsfsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-fixsfsi.c
new file mode 100644
index 0000000..39735af
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-fixsfsi.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+le_fixsfsi (float_t x)
+{
+  int_t v;
+
+  v = x;
+  if (v <= 0)
+    return v;
+  else
+    return v + 2;
+}
+
+/* Expect assembly like:
+
+	cvtfl 4(%ap),%r0		# 28	[c=36]  *fix_truncsfsi2_ccnz
+	jleq .L1			# 30	[c=26]  *branch_ccnz
+	addl2 $2,%r0			# 27	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "fix_truncsfsi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-floatsisf.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-floatsisf.c
new file mode 100644
index 0000000..bab7101c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-floatsisf.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+typedef int __attribute__ ((mode (SI))) int_t;
+
+float_t
+le_floatsisf (int_t x)
+{
+  float_t v;
+
+  v = x;
+  if (v <= 0)
+    return v;
+  else
+    return v + 2;
+}
+
+/* Expect assembly like:
+
+	cvtlf 4(%ap),%r0		# 27	[c=32]  *floatsisf2_ccnz
+	jleq .L1			# 29	[c=26]  *branch_ccnz
+	addf2 $0f2.0e+0,%r0		# 26	[c=36]  *addsf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "floatsisf\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-insvsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-insvsi.c
new file mode 100644
index 0000000..26c368b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-insvsi.c
@@ -0,0 +1,46 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef signed int __attribute__ ((mode (SI))) int_t;
+typedef union
+  {
+    int_t i;
+    struct
+      {
+	int_t h : 7;
+	int_t i : 18;
+	int_t l : 7;
+      } b;
+  }
+bit_t;
+
+int
+le_insvsi (bit_t x, int_t y)
+{
+  int_t v;
+
+  v = x.b.i;
+  x.b.i = y;
+  if (v <= 0)
+    return x.i;
+  else
+    return x.i + 2;
+}
+
+/* Expect assembly like:
+
+	movl 4(%ap),%r0			# 37	[c=16]  *movsi_2
+	extv $7,$18,%r0,%r1		# 38	[c=60]  *extv_non_const_2_ccnz
+	insv 8(%ap),$7,$18,%r0		# 8	[c=16]  *insv_2
+	jleq .L1			# 40	[c=26]  *branch_ccnz
+	addl2 $2,%r0			# 36	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "extv\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "extv.*insv.*branch" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-iorhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-iorhi.c
new file mode 100644
index 0000000..26a4d76
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-iorhi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+le_iorhi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x | *y;
+  if (v <= 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	bisw3 *12(%ap),*8(%ap),%r0	# 28	[c=44]  *iorhi3_ccnz/2
+	jleq .L2			# 30	[c=26]  *branch_ccnz
+	addw2 $2,%r0			# 27	[c=32]  *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "iorhi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-iorqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-iorqi.c
new file mode 100644
index 0000000..fbb97b3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-iorqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+le_iorqi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x | *y;
+  if (v <= 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	bisb3 *12(%ap),*8(%ap),%r0	# 28	[c=44]  *iorqi3_ccnz/2
+	jleq .L2			# 30	[c=26]  *branch_ccnz
+	addb2 $2,%r0			# 27	[c=32]  *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "iorqi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-iorsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-iorsi.c
new file mode 100644
index 0000000..4cf50fe
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-iorsi.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+le_iorsi (int_t x, int_t y)
+{
+  x |= y;
+  if (x <= 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	bisl3 8(%ap),4(%ap),%r0		# 29	[c=28]  *iorsi3_ccnz/2
+	jleq .L1			# 31	[c=26]  *branch_ccnz
+	addl2 $2,%r0			# 28	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "iorsi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-movdf.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-movdf.c
new file mode 100644
index 0000000..acbaa2d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-movdf.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (DF))) float_t;
+
+float_t
+le_movdf (float_t x)
+{
+  if (x <= 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	movd 4(%ap),%r0			# 34	[c=24]  *movdf_ccnz/1
+	jleq .L1			# 36	[c=26]  *branch_ccnz
+	addd2 $0d2.0e+0,%r0		# 33	[c=56]  *adddf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "movdf\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-movhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-movhi.c
new file mode 100644
index 0000000..3e99f87
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-movhi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+le_movhi (int_t *w, int_t *x)
+{
+  int_t v;
+
+  v = *x;
+  if (v <= 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	movw *8(%ap),%r0		# 27	[c=24]  *movhi_ccnz
+	jleq .L2			# 29	[c=26]  *branch_ccnz
+	addw2 $2,%r0			# 26	[c=32]  *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "movhi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-movqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-movqi.c
new file mode 100644
index 0000000..8c73a82
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-movqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+le_movqi (int_t *w, int_t *x)
+{
+  int_t v;
+
+  v = *x;
+  if (v <= 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	movb *8(%ap),%r0		# 27	[c=24]  *movqi_ccnz
+	jleq .L2			# 29	[c=26]  *branch_ccnz
+	addb2 $2,%r0			# 26	[c=32]  *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "movqi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-movsf.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-movsf.c
new file mode 100644
index 0000000..71a70b8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-movsf.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+
+float_t
+le_movsf (float_t x)
+{
+  if (x <= 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	movf 4(%ap),%r0			# 33	[c=16]  *movsf_ccnz/1
+	jleq .L1			# 35	[c=26]  *branch_ccnz
+	addf2 $0f2.0e+0,%r0		# 32	[c=36]  *addsf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "movsf\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-movsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-movsi.c
new file mode 100644
index 0000000..2203f8b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-movsi.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+le_movsi (int_t x)
+{
+  if (x <= 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	movl 4(%ap),%r0			# 34	[c=16]  *movsi_2_ccnz
+	jleq .L1			# 36	[c=26]  *branch_ccnz
+	addl2 $2,%r0			# 33	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "movsi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-muldf.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-muldf.c
new file mode 100644
index 0000000..ed3193d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-muldf.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (DF))) float_t;
+
+float_t
+le_muldf (float_t x, float_t y)
+{
+  x *= y;
+  if (x <= 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	muld3 4(%ap),12(%ap),%r0	# 29	[c=80]  *muldf3_ccnz/2
+	jleq .L1			# 31	[c=26]  *branch_ccnz
+	addd2 $0d2.0e+0,%r0		# 28	[c=56]  *adddf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "muldf\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-mulhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-mulhi.c
new file mode 100644
index 0000000..426a469
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-mulhi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+le_mulhi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x * *y;
+  if (v <= 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	mulw3 *8(%ap),*12(%ap),%r0	# 29	[c=72]  *mulhi3_ccnz/2
+	jleq .L2			# 31	[c=26]  *branch_ccnz
+	addw2 $2,%r0			# 28	[c=32]  *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "mulhi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-mulqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-mulqi.c
new file mode 100644
index 0000000..ca3bb48
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-mulqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+le_mulqi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x * *y;
+  if (v <= 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	mulb3 *8(%ap),*12(%ap),%r0	# 29	[c=72]  *mulqi3_ccnz/2
+	jleq .L2			# 31	[c=26]  *branch_ccnz
+	addb2 $2,%r0			# 28	[c=32]  *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "mulqi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-mulsf.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-mulsf.c
new file mode 100644
index 0000000..0d3ac37
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-mulsf.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+
+float_t
+le_mulsf (float_t x, float_t y)
+{
+  x *= y;
+  if (x <= 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	mulf3 4(%ap),8(%ap),%r0		# 28	[c=52]  *mulsf3_ccnz/2
+	jleq .L1			# 30	[c=26]  *branch_ccnz
+	addf2 $0f2.0e+0,%r0		# 27	[c=36]  *addsf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "mulsf\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-mulsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-mulsi.c
new file mode 100644
index 0000000..de72158
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-mulsi.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+le_mulsi (int_t x, int_t y)
+{
+  x *= y;
+  if (x <= 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	mull3 4(%ap),8(%ap),%r0		# 29	[c=56]  *mulsi3_ccnz/2
+	jleq .L1			# 31	[c=26]  *branch_ccnz
+	addl2 $2,%r0			# 28	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "mulsi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-nothi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-nothi.c
new file mode 100644
index 0000000..6884a78
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-nothi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+le_nothi (int_t *w, int_t *x)
+{
+  int_t v;
+
+  v = ~*x;
+  if (v <= 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	mcomw *8(%ap),%r0		# 27	[c=24]  *one_cmplhi2_ccnz
+	jleq .L2			# 29	[c=26]  *branch_ccnz
+	addw2 $2,%r0			# 26	[c=32]  *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "one_cmplhi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-notqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-notqi.c
new file mode 100644
index 0000000..60a9e61
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-notqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+le_notqi (int_t *w, int_t *x)
+{
+  int_t v;
+
+  v = ~*x;
+  if (v <= 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	mcomb *8(%ap),%r0		# 27	[c=24]  *one_cmplqi2_ccnz
+	jleq .L2			# 29	[c=26]  *branch_ccnz
+	addb2 $2,%r0			# 26	[c=32]  *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "one_cmplqi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-notsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-notsi.c
new file mode 100644
index 0000000..938a6b3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-notsi.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+le_notsi (int_t x)
+{
+  x = ~x;
+  if (x <= 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	mcoml 4(%ap),%r0		# 28	[c=16]  *one_cmplsi2_ccnz
+	jleq .L1			# 30	[c=26]  *branch_ccnz
+	addl2 $2,%r0			# 27	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "one_cmplsi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-rotlsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-rotlsi.c
new file mode 100644
index 0000000..9e01429
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-rotlsi.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (SI))) ulong_t;
+typedef int __attribute__ ((mode (SI))) long_t;
+typedef int __attribute__ ((mode (QI))) int_t;
+
+ulong_t
+le_rotlsi (ulong_t x, int_t y)
+{
+  long_t v;
+
+  v = x << y | x >> 8 * sizeof (x) - y;
+  if (v <= 0)
+    return v;
+  else
+    return v + 2;
+}
+
+/* Expect assembly like:
+
+	rotl 8(%ap),4(%ap),%r0		# 32	[c=40]  *rotlsi3_ccnz
+	jleq .L1			# 34	[c=26]  *branch_ccnz
+	addl2 $2,%r0			# 31	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "rotlsi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-rotrsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-rotrsi.c
new file mode 100644
index 0000000..4fe533b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-rotrsi.c
@@ -0,0 +1,34 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (SI))) ulong_t;
+typedef int __attribute__ ((mode (SI))) long_t;
+typedef int __attribute__ ((mode (QI))) int_t;
+
+ulong_t
+le_rotrsi (ulong_t x, int_t y)
+{
+  long_t v;
+
+  v = x >> y | x << 8 * sizeof (x) - y;
+  if (v <= 0)
+    return v;
+  else
+    return v + 2;
+}
+
+/* Expect assembly like:
+
+	mnegb 8(%ap),%r0		# 33	[c=16]  *negqi2
+	rotl %r0,4(%ap),%r0		# 34	[c=36]  *rotrnegsi3_2_ccnz
+	jleq .L1			# 36	[c=26]  *branch_ccnz
+	addl2 $2,%r0			# 32	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "rotrnegsi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-subdf.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-subdf.c
new file mode 100644
index 0000000..0456cd3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-subdf.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (DF))) float_t;
+
+float_t
+le_subdf (float_t x, float_t y)
+{
+  x -= y;
+  if (x <= 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	subd3 12(%ap),4(%ap),%r0	# 29	[c=68]  *subdf3_ccnz/1
+	jleq .L1			# 31	[c=26]  *branch_ccnz
+	addd2 $0d2.0e+0,%r0		# 28	[c=56]  *adddf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "subdf\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-subhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-subhi.c
new file mode 100644
index 0000000..4391b76
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-subhi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+le_subhi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x - *y;
+  if (v <= 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	subw3 *12(%ap),*8(%ap),%r0	# 29	[c=64]  *subhi3_ccnz/1
+	jleq .L2			# 31	[c=26]  *branch_ccnz
+	addw2 $2,%r0			# 28	[c=32]  *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "subhi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-subqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-subqi.c
new file mode 100644
index 0000000..f725be9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-subqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+le_subqi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x - *y;
+  if (v <= 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	subb3 *12(%ap),*8(%ap),%r0	# 29	[c=64]  *subqi3_ccnz/1
+	jleq .L2			# 31	[c=26]  *branch_ccnz
+	addb2 $2,%r0			# 28	[c=32]  *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "subqi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-subsf.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-subsf.c
new file mode 100644
index 0000000..77a9bf0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-subsf.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+
+float_t
+le_subsf (float_t x, float_t y)
+{
+  x -= y;
+  if (x <= 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	subf3 8(%ap),4(%ap),%r0		# 28	[c=48]  *subsf3_ccnz/1
+	jleq .L1			# 30	[c=26]  *branch_ccnz
+	addf2 $0f2.0e+0,%r0		# 27	[c=36]  *addsf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "subsf\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-subsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-subsi.c
new file mode 100644
index 0000000..db64ffc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-subsi.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+le_subsi (int_t x, int_t y)
+{
+  x -= y;
+  if (x <= 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	subl3 8(%ap),4(%ap),%r0		# 29	[c=48]  *subsi3_ccnz/1
+	jleq .L1			# 31	[c=26]  *branch_ccnz
+	addl2 $2,%r0			# 28	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "subsi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-truncdfsf.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-truncdfsf.c
new file mode 100644
index 0000000..6e7673d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-truncdfsf.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) single_t;
+typedef float __attribute__ ((mode (DF))) double_t;
+
+single_t
+le_truncdfsf (double_t x)
+{
+  single_t v;
+
+  v = x;
+  if (v <= 0)
+    return v;
+  else
+    return v + 2;
+}
+
+/* Expect assembly like:
+
+	cvtdf 4(%ap),%r0		# 27	[c=20]  *truncdfsf2_ccnz
+	jleq .L1			# 29	[c=26]  *branch_ccnz
+	addf2 $0f2.0e+0,%r0		# 26	[c=36]  *addsf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "truncdfsf\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-xorhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-xorhi.c
new file mode 100644
index 0000000..e65eed8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-xorhi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+le_xorhi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x ^ *y;
+  if (v <= 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	xorw3 *12(%ap),*8(%ap),%r0	# 28	[c=44]  *xorhi3_ccnz/2
+	jleq .L2			# 30	[c=26]  *branch_ccnz
+	addw2 $2,%r0			# 27	[c=32]  *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "xorhi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-xorqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-xorqi.c
new file mode 100644
index 0000000..ca8d5fb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-xorqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+le_xorqi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x ^ *y;
+  if (v <= 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	xorb3 *12(%ap),*8(%ap),%r0	# 28	[c=44]  *xorqi3_ccnz/2
+	jleq .L2			# 30	[c=26]  *branch_ccnz
+	addb2 $2,%r0			# 27	[c=32]  *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "xorqi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-le-xorsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-le-xorsi.c
new file mode 100644
index 0000000..3de63ca
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-le-xorsi.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+le_xorsi (int_t x, int_t y)
+{
+  x ^= y;
+  if (x <= 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	xorl3 8(%ap),4(%ap),%r0		# 29	[c=28]  *xorsi3_ccnz/2
+	jleq .L1			# 31	[c=26]  *branch_ccnz
+	addl2 $2,%r0			# 28	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "xorsi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-leu-subhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-leu-subhi.c
new file mode 100644
index 0000000..5f3e372
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-leu-subhi.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (HI))) int_t;
+
+void
+leu_subhi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x - *y;
+  if (*x <= *y)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	movw *8(%ap),%r2		# 28	[c=24]  *movhi
+	movw *12(%ap),%r1		# 29	[c=24]  *movhi
+	subw3 %r1,%r2,%r0		# 30	[c=32]  *subhi3_cc/1
+	jlequ .L2			# 32	[c=26]  *branch_cc
+	addw2 $2,%r0			# 27	[c=32]  *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "subhi\[^ \]*_cc(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_cc\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-leu-subqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-leu-subqi.c
new file mode 100644
index 0000000..97ef2a9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-leu-subqi.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (QI))) int_t;
+
+void
+leu_subqi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x - *y;
+  if (*x <= *y)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	movb *8(%ap),%r2		# 28	[c=24]  *movqi
+	movb *12(%ap),%r1		# 29	[c=24]  *movqi
+	subb3 %r1,%r2,%r0		# 30	[c=32]  *subqi3_cc/1
+	jlequ .L2			# 32	[c=26]  *branch_cc
+	addb2 $2,%r0			# 27	[c=32]  *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "subqi\[^ \]*_cc(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_cc\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-leu-subsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-leu-subsi.c
new file mode 100644
index 0000000..9402fab
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-leu-subsi.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (SI))) int_t;
+
+int_t
+leu_subsi (int_t x, int_t y)
+{
+  int_t v;
+
+  v = x - y;
+  if (x <= y)
+    return v;
+  else
+    return v + 2;
+}
+
+/* Expect assembly like:
+
+	movl 4(%ap),%r2			# 27	[c=16]  *movsi_2
+	movl 8(%ap),%r1			# 28	[c=16]  *movsi_2
+	subl3 %r1,%r2,%r0		# 29	[c=32]  *subsi3_cc/1
+	jlequ .L1			# 31	[c=26]  *branch_cc
+	addl2 $2,%r0			# 26	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "subsi\[^ \]*_cc(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_cc\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-adddf.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-adddf.c
new file mode 100644
index 0000000..6e3718d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-adddf.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (DF))) float_t;
+
+float_t
+lt_adddf (float_t x, float_t y)
+{
+  x += y;
+  if (x < 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	addd3 4(%ap),12(%ap),%r0	# 29	[c=68]  *adddf3_ccn/2
+	jlss .L1			# 31	[c=26]  *branch_ccn
+	addd2 $0d2.0e+0,%r0		# 28	[c=56]  *adddf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "adddf\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-addhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-addhi.c
new file mode 100644
index 0000000..a93675a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-addhi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+lt_addhi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x + *y;
+  if (v < 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	addw3 *8(%ap),*12(%ap),%r0	# 29	[c=64]  *addhi3_ccn
+	jlss .L2			# 31	[c=26]  *branch_ccn
+	addw2 $2,%r0			# 28	[c=32]  *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "addhi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-addqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-addqi.c
new file mode 100644
index 0000000..32a1328
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-addqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+lt_addqi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x + *y;
+  if (v < 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	addb3 *8(%ap),*12(%ap),%r0	# 29	[c=64]  *addqi3_ccn
+	jlss .L2			# 31	[c=26]  *branch_ccn
+	addb2 $2,%r0			# 28	[c=32]  *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "addqi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-addsf.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-addsf.c
new file mode 100644
index 0000000..19c0b68
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-addsf.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+
+float_t
+lt_addsf (float_t x, float_t y)
+{
+  x += y;
+  if (x < 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	addf3 4(%ap),8(%ap),%r0		# 28	[c=48]  *addsf3_ccn/2
+	jlss .L1			# 30	[c=26]  *branch_ccn
+	addf2 $0f2.0e+0,%r0		# 27	[c=36]  *addsf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "addsf\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-addsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-addsi.c
new file mode 100644
index 0000000..1bb59d3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-addsi.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+lt_addsi (int_t x, int_t y)
+{
+  x += y;
+  if (x < 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	addl3 4(%ap),8(%ap),%r0		# 29	[c=48]  *addsi3_ccn
+	jlss .L1			# 31	[c=26]  *branch_ccn
+	addl2 $2,%r0			# 28	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "addsi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-andhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-andhi.c
new file mode 100644
index 0000000..f725931
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-andhi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+lt_andhi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x & ~*y;
+  if (v < 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	bicw3 *12(%ap),*8(%ap),%r0	# 30	[c=44]  *andhi3_2_ccn/1
+	jlss .L2			# 32	[c=26]  *branch_ccn
+	addw2 $2,%r0			# 29	[c=32]  *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "andhi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-andqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-andqi.c
new file mode 100644
index 0000000..afae635
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-andqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+lt_andqi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x & ~*y;
+  if (v < 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	bicb3 *12(%ap),*8(%ap),%r0	# 30	[c=44]  *andqi3_2_ccn/1
+	jlss .L2			# 32	[c=26]  *branch_ccn
+	addb2 $2,%r0			# 29	[c=32]  *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "andqi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-andsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-andsi.c
new file mode 100644
index 0000000..5a86ddb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-andsi.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+lt_andsi (int_t x, int_t y)
+{
+  x &= ~y;
+  if (x < 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	bicl3 8(%ap),4(%ap),%r0		# 31	[c=28]  *andsi3_2_ccn/1
+	jlss .L1			# 33	[c=26]  *branch_ccn
+	addl2 $2,%r0			# 30	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "andsi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-ashlsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-ashlsi.c
new file mode 100644
index 0000000..0c85893
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-ashlsi.c
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+typedef int __attribute__ ((mode (QI))) short_t;
+
+int_t
+lt_ashlsi (int_t x, short_t y)
+{
+  x <<= y;
+  if (x < 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	ashl 8(%ap),4(%ap),%r0		# 31	[c=56]  *ashlsi3_ccn
+	jlss .L1			# 33	[c=26]  *branch_ccn
+	addl2 $2,%r0			# 30	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "ashlsi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-ashrsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-ashrsi.c
new file mode 100644
index 0000000..977f32c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-ashrsi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+typedef int __attribute__ ((mode (QI))) short_t;
+
+int_t
+lt_ashrsi (int_t x, short_t y)
+{
+  x >>= y;
+  if (x < 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	mnegb 8(%ap),%r0		# 32	[c=16]  *negqi2
+	ashl %r0,4(%ap),%r0		# 33	[c=52]  *ashlnegsi3_2_ccn
+	jlss .L1			# 35	[c=26]  *branch_ccn
+	addl2 $2,%r0			# 31	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "ashlnegsi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-divdf.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-divdf.c
new file mode 100644
index 0000000..ddcb8c1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-divdf.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (DF))) float_t;
+
+float_t
+lt_divdf (float_t x, float_t y)
+{
+  x /= y;
+  if (x < 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	divd3 12(%ap),4(%ap),%r0	# 29	[c=112]  *divdf3_ccn/1
+	jlss .L1			# 31	[c=26]  *branch_ccn
+	addd2 $0d2.0e+0,%r0		# 28	[c=56]  *adddf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "divdf\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-divhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-divhi.c
new file mode 100644
index 0000000..23bbf42
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-divhi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (HI), vector_size (2))) int_t;
+
+void
+lt_divhi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x / *y;
+  if (v[0] < 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	divw3 *12(%ap),*8(%ap),%r0	# 34	[c=76]  *divhi3_ccn/1
+	jlss .L2			# 36	[c=26]  *branch_ccn
+	addw2 $2,%r0			# 33	[c=32]  *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "divhi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-divqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-divqi.c
new file mode 100644
index 0000000..5401b6b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-divqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (QI), vector_size (1))) int_t;
+
+void
+lt_divqi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x / *y;
+  if (v[0] < 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	divb3 *12(%ap),*8(%ap),%r0	# 34	[c=76]  *divqi3_ccn/1
+	jlss .L2			# 36	[c=26]  *branch_ccn
+	addb2 $2,%r0			# 33	[c=32]  *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "divqi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-divsf.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-divsf.c
new file mode 100644
index 0000000..89d5930
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-divsf.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+
+float_t
+lt_divsf (float_t x, float_t y)
+{
+  x /= y;
+  if (x < 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	divf3 8(%ap),4(%ap),%r0		# 28	[c=60]  *divsf3_ccn/1
+	jlss .L1			# 30	[c=26]  *branch_ccn
+	addf2 $0f2.0e+0,%r0		# 27	[c=36]  *addsf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "divsf\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-divsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-divsi.c
new file mode 100644
index 0000000..5c50635
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-divsi.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+lt_divsi (int_t x, int_t y)
+{
+  x /= y;
+  if (x < 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	divl3 8(%ap),4(%ap),%r0		# 29	[c=60]  *divsi3_ccn/1
+	jlss .L1			# 31	[c=26]  *branch_ccn
+	addl2 $2,%r0			# 28	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "divsi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-extendhisi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-extendhisi.c
new file mode 100644
index 0000000..5dcc89a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-extendhisi.c
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+typedef int __attribute__ ((mode (HI))) short_t;
+
+int_t
+lt_extendhisi (int_t x)
+{
+  x = (short_t) x;
+  if (x < 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	cvtwl 4(%ap),%r0		# 29	[c=20]  *extendhisi2_ccn
+	jlss .L1			# 31	[c=26]  *branch_ccn
+	addl2 $2,%r0			# 28	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "extendhisi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-extendqisi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-extendqisi.c
new file mode 100644
index 0000000..9ec5a41
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-extendqisi.c
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+typedef int __attribute__ ((mode (QI))) short_t;
+
+int_t
+lt_extendqisi (int_t x)
+{
+  x = (short_t) x;
+  if (x < 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	cvtbl 4(%ap),%r0		# 29	[c=20]  *extendqisi2_ccn
+	jlss .L1			# 31	[c=26]  *branch_ccn
+	addl2 $2,%r0			# 28	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "extendqisi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-extvsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-extvsi.c
new file mode 100644
index 0000000..a10435b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-extvsi.c
@@ -0,0 +1,38 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef signed int __attribute__ ((mode (SI))) int_t;
+typedef struct
+  {
+    int_t h : 7;
+    int_t i : 18;
+    int_t l : 7;
+  }
+bit_t;
+
+int_t
+lt_extvsi (bit_t x)
+{
+  int_t v;
+
+  v = x.i;
+  if (v < 0)
+    return v;
+  else
+    return v + 2;
+}
+
+/* Expect assembly like:
+
+	extv $7,$18,4(%ap),%r0		# 28	[c=68]  *extv_non_const_2_ccn
+	jlss .L1			# 30	[c=26]  *branch_ccn
+	addl2 $2,%r0			# 27	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "extv\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-extzvsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-extzvsi.c
new file mode 100644
index 0000000..e019d74
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-extzvsi.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (SI))) uint_t;
+typedef int __attribute__ ((mode (SI))) int_t;
+
+uint_t
+lt_extzvsi (uint_t x, int_t y)
+{
+  int_t v;
+
+  v = x >> y;
+  if (v < 0)
+    return v;
+  else
+    return v + 2;
+}
+
+/* Expect assembly like:
+
+	subb3 8(%ap),$32,%r0		# 31	[c=40]  *subqi3/1
+	extzv 8(%ap),%r0,4(%ap),%r0	# 32	[c=76]  *extzv_non_const_2_ccn
+	jlss .L1			# 34	[c=26]  *branch_ccn
+	addl2 $2,%r0			# 30	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "extzv\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-fixdfhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-fixdfhi.c
new file mode 100644
index 0000000..5d63a22
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-fixdfhi.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (DF))) float_t;
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+lt_fixdfhi (int_t *w, float_t x)
+{
+  int_t v;
+
+  v = x;
+  if (v < 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	cvtdw 8(%ap),%r0		# 27	[c=36]  *fix_truncdfhi2_ccn
+	jlss .L2			# 29	[c=26]  *branch_ccn
+	addw2 $2,%r0			# 26	[c=32]  *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "fix_truncdfhi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-fixdfqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-fixdfqi.c
new file mode 100644
index 0000000..d161655
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-fixdfqi.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (DF))) float_t;
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+lt_fixdfqi (int_t *w, float_t x)
+{
+  int_t v;
+
+  v = x;
+  if (v < 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	cvtdb 8(%ap),%r0		# 27	[c=36]  *fix_truncdfqi2_ccn
+	jlss .L2			# 29	[c=26]  *branch_ccn
+	addb2 $2,%r0			# 26	[c=32]  *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "fix_truncdfqi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-fixdfsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-fixdfsi.c
new file mode 100644
index 0000000..b07d1de
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-fixdfsi.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (DF))) float_t;
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+lt_fixdfsi (float_t x)
+{
+  int_t v;
+
+  v = x;
+  if (v < 0)
+    return v;
+  else
+    return v + 2;
+}
+
+/* Expect assembly like:
+
+	cvtdl 4(%ap),%r0		# 28	[c=36]  *fix_truncdfsi2_ccn
+	jlss .L1			# 30	[c=26]  *branch_ccn
+	addl2 $2,%r0			# 27	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "fix_truncdfsi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-fixsfhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-fixsfhi.c
new file mode 100644
index 0000000..42c8d74
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-fixsfhi.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+lt_fixsfhi (int_t *w, float_t x)
+{
+  int_t v;
+
+  v = x;
+  if (v < 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	cvtfw 8(%ap),%r0		# 27	[c=36]  *fix_truncsfhi2_ccn
+	jlss .L2			# 29	[c=26]  *branch_ccn
+	addw2 $2,%r0			# 26	[c=32]  *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "fix_truncsfhi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-fixsfqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-fixsfqi.c
new file mode 100644
index 0000000..49327ee
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-fixsfqi.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+lt_fixsfqi (int_t *w, float_t x)
+{
+  int_t v;
+
+  v = x;
+  if (v < 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	cvtfb 8(%ap),%r0		# 27	[c=36]  *fix_truncsfqi2_ccn
+	jlss .L2			# 29	[c=26]  *branch_ccn
+	addb2 $2,%r0			# 26	[c=32]  *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "fix_truncsfqi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-fixsfsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-fixsfsi.c
new file mode 100644
index 0000000..3d17291
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-fixsfsi.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+lt_fixsfsi (float_t x)
+{
+  int_t v;
+
+  v = x;
+  if (v < 0)
+    return v;
+  else
+    return v + 2;
+}
+
+/* Expect assembly like:
+
+	cvtfl 4(%ap),%r0		# 28	[c=36]  *fix_truncsfsi2_ccn
+	jlss .L1			# 30	[c=26]  *branch_ccn
+	addl2 $2,%r0			# 27	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "fix_truncsfsi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-floatsisf.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-floatsisf.c
new file mode 100644
index 0000000..cefc71e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-floatsisf.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+typedef int __attribute__ ((mode (SI))) int_t;
+
+float_t
+lt_floatsisf (int_t x)
+{
+  float_t v;
+
+  v = x;
+  if (v < 0)
+    return v;
+  else
+    return v + 2;
+}
+
+/* Expect assembly like:
+
+	cvtlf 4(%ap),%r0		# 27	[c=32]  *floatsisf2_ccn
+	jlss .L1			# 29	[c=26]  *branch_ccn
+	addf2 $0f2.0e+0,%r0		# 26	[c=36]  *addsf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "floatsisf\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-insvsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-insvsi.c
new file mode 100644
index 0000000..52f97ef
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-insvsi.c
@@ -0,0 +1,46 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef signed int __attribute__ ((mode (SI))) int_t;
+typedef union
+  {
+    int_t i;
+    struct
+      {
+	int_t h : 7;
+	int_t i : 18;
+	int_t l : 7;
+      } b;
+  }
+bit_t;
+
+int
+lt_insvsi (bit_t x, int_t y)
+{
+  int_t v;
+
+  v = x.b.i;
+  x.b.i = y;
+  if (v < 0)
+    return x.i;
+  else
+    return x.i + 2;
+}
+
+/* Expect assembly like:
+
+	movl 4(%ap),%r0			# 37	[c=16]  *movsi_2
+	extv $7,$18,%r0,%r1		# 38	[c=60]  *extv_non_const_2_ccn
+	insv 8(%ap),$7,$18,%r0		# 8	[c=16]  *insv_2
+	jlss .L1			# 40	[c=26]  *branch_ccn
+	addl2 $2,%r0			# 36	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "extv\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "extv.*insv.*branch" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-iorhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-iorhi.c
new file mode 100644
index 0000000..edd91e1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-iorhi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+lt_iorhi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x | *y;
+  if (v < 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	bisw3 *12(%ap),*8(%ap),%r0	# 28	[c=44]  *iorhi3_ccn/2
+	jlss .L2			# 30	[c=26]  *branch_ccn
+	addw2 $2,%r0			# 27	[c=32]  *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "iorhi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-iorqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-iorqi.c
new file mode 100644
index 0000000..82a9e04
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-iorqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+lt_iorqi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x | *y;
+  if (v < 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	bisb3 *12(%ap),*8(%ap),%r0	# 28	[c=44]  *iorqi3_ccn/2
+	jlss .L2			# 30	[c=26]  *branch_ccn
+	addb2 $2,%r0			# 27	[c=32]  *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "iorqi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-iorsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-iorsi.c
new file mode 100644
index 0000000..1246686
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-iorsi.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+lt_iorsi (int_t x, int_t y)
+{
+  x |= y;
+  if (x < 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	bisl3 8(%ap),4(%ap),%r0		# 29	[c=28]  *iorsi3_ccn/2
+	jlss .L1			# 31	[c=26]  *branch_ccn
+	addl2 $2,%r0			# 28	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "iorsi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-movdf.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-movdf.c
new file mode 100644
index 0000000..02b4c5a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-movdf.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (DF))) float_t;
+
+float_t
+lt_movdf (float_t x)
+{
+  if (x < 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	movd 4(%ap),%r0			# 34	[c=24]  *movdf_ccn/1
+	jlss .L1			# 36	[c=26]  *branch_ccn
+	addd2 $0d2.0e+0,%r0		# 33	[c=56]  *adddf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "movdf\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-movhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-movhi.c
new file mode 100644
index 0000000..51ce5b7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-movhi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+lt_movhi (int_t *w, int_t *x)
+{
+  int_t v;
+
+  v = *x;
+  if (v < 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	movw *8(%ap),%r0		# 27	[c=24]  *movhi_ccn
+	jlss .L2			# 29	[c=26]  *branch_ccn
+	addw2 $2,%r0			# 26	[c=32]  *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "movhi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-movqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-movqi.c
new file mode 100644
index 0000000..fb5450c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-movqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+lt_movqi (int_t *w, int_t *x)
+{
+  int_t v;
+
+  v = *x;
+  if (v < 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	movb *8(%ap),%r0		# 27	[c=24]  *movqi_ccn
+	jlss .L2			# 29	[c=26]  *branch_ccn
+	addb2 $2,%r0			# 26	[c=32]  *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "movqi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-movsf.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-movsf.c
new file mode 100644
index 0000000..1669f16
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-movsf.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+
+float_t
+lt_movsf (float_t x)
+{
+  if (x < 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	movf 4(%ap),%r0			# 33	[c=16]  *movsf_ccn/1
+	jlss .L1			# 35	[c=26]  *branch_ccn
+	addf2 $0f2.0e+0,%r0		# 32	[c=36]  *addsf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "movsf\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-movsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-movsi.c
new file mode 100644
index 0000000..b4cd073
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-movsi.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+lt_movsi (int_t x)
+{
+  if (x < 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	movl 4(%ap),%r0			# 34	[c=16]  *movsi_2_ccn
+	jlss .L1			# 36	[c=26]  *branch_ccn
+	addl2 $2,%r0			# 33	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "movsi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-muldf.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-muldf.c
new file mode 100644
index 0000000..1f9279b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-muldf.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (DF))) float_t;
+
+float_t
+lt_muldf (float_t x, float_t y)
+{
+  x *= y;
+  if (x < 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	muld3 4(%ap),12(%ap),%r0	# 29	[c=80]  *muldf3_ccn/2
+	jlss .L1			# 31	[c=26]  *branch_ccn
+	addd2 $0d2.0e+0,%r0		# 28	[c=56]  *adddf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "muldf\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-mulhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-mulhi.c
new file mode 100644
index 0000000..29a77e3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-mulhi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+lt_mulhi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x * *y;
+  if (v < 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	mulw3 *8(%ap),*12(%ap),%r0	# 29	[c=72]  *mulhi3_ccn/2
+	jlss .L2			# 31	[c=26]  *branch_ccn
+	addw2 $2,%r0			# 28	[c=32]  *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "mulhi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-mulqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-mulqi.c
new file mode 100644
index 0000000..844456e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-mulqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+lt_mulqi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x * *y;
+  if (v < 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	mulb3 *8(%ap),*12(%ap),%r0	# 29	[c=72]  *mulqi3_ccn/2
+	jlss .L2			# 31	[c=26]  *branch_ccn
+	addb2 $2,%r0			# 28	[c=32]  *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "mulqi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-mulsf.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-mulsf.c
new file mode 100644
index 0000000..ea1c083
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-mulsf.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+
+float_t
+lt_mulsf (float_t x, float_t y)
+{
+  x *= y;
+  if (x < 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	mulf3 4(%ap),8(%ap),%r0		# 28	[c=52]  *mulsf3_ccn/2
+	jlss .L1			# 30	[c=26]  *branch_ccn
+	addf2 $0f2.0e+0,%r0		# 27	[c=36]  *addsf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "mulsf\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-mulsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-mulsi.c
new file mode 100644
index 0000000..5f46c8c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-mulsi.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+lt_mulsi (int_t x, int_t y)
+{
+  x *= y;
+  if (x < 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	mull3 4(%ap),8(%ap),%r0		# 29	[c=56]  *mulsi3_ccn/2
+	jlss .L1			# 31	[c=26]  *branch_ccn
+	addl2 $2,%r0			# 28	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "mulsi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-nothi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-nothi.c
new file mode 100644
index 0000000..59d1d9a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-nothi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+lt_nothi (int_t *w, int_t *x)
+{
+  int_t v;
+
+  v = ~*x;
+  if (v < 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	mcomw *8(%ap),%r0		# 27	[c=24]  *one_cmplhi2_ccn
+	jlss .L2			# 29	[c=26]  *branch_ccn
+	addw2 $2,%r0			# 26	[c=32]  *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "one_cmplhi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-notqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-notqi.c
new file mode 100644
index 0000000..7a2ef96
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-notqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+lt_notqi (int_t *w, int_t *x)
+{
+  int_t v;
+
+  v = ~*x;
+  if (v < 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	mcomb *8(%ap),%r0		# 27	[c=24]  *one_cmplqi2_ccn
+	jlss .L2			# 29	[c=26]  *branch_ccn
+	addb2 $2,%r0			# 26	[c=32]  *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "one_cmplqi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-notsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-notsi.c
new file mode 100644
index 0000000..c3586b1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-notsi.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+lt_notsi (int_t x)
+{
+  x = ~x;
+  if (x < 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	mcoml 4(%ap),%r0		# 28	[c=16]  *one_cmplsi2_ccn
+	jlss .L1			# 30	[c=26]  *branch_ccn
+	addl2 $2,%r0			# 27	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "one_cmplsi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-rotlsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-rotlsi.c
new file mode 100644
index 0000000..7f5c89d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-rotlsi.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (SI))) ulong_t;
+typedef int __attribute__ ((mode (SI))) long_t;
+typedef int __attribute__ ((mode (QI))) int_t;
+
+ulong_t
+lt_rotlsi (ulong_t x, int_t y)
+{
+  long_t v;
+
+  v = x << y | x >> 8 * sizeof (x) - y;
+  if (v < 0)
+    return v;
+  else
+    return v + 2;
+}
+
+/* Expect assembly like:
+
+	rotl 8(%ap),4(%ap),%r0		# 32	[c=40]  *rotlsi3_ccn
+	jlss .L1			# 34	[c=26]  *branch_ccn
+	addl2 $2,%r0			# 31	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "rotlsi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-rotrsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-rotrsi.c
new file mode 100644
index 0000000..6c9daf4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-rotrsi.c
@@ -0,0 +1,34 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (SI))) ulong_t;
+typedef int __attribute__ ((mode (SI))) long_t;
+typedef int __attribute__ ((mode (QI))) int_t;
+
+ulong_t
+lt_rotrsi (ulong_t x, int_t y)
+{
+  long_t v;
+
+  v = x >> y | x << 8 * sizeof (x) - y;
+  if (v < 0)
+    return v;
+  else
+    return v + 2;
+}
+
+/* Expect assembly like:
+
+	mnegb 8(%ap),%r0		# 33	[c=16]  *negqi2
+	rotl %r0,4(%ap),%r0		# 34	[c=36]  *rotrnegsi3_2_ccn
+	jlss .L1			# 36	[c=26]  *branch_ccn
+	addl2 $2,%r0			# 32	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "rotrnegsi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-subdf.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-subdf.c
new file mode 100644
index 0000000..fb7bb1d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-subdf.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (DF))) float_t;
+
+float_t
+lt_subdf (float_t x, float_t y)
+{
+  x -= y;
+  if (x < 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	subd3 12(%ap),4(%ap),%r0	# 29	[c=68]  *subdf3_ccn/1
+	jlss .L1			# 31	[c=26]  *branch_ccn
+	addd2 $0d2.0e+0,%r0		# 28	[c=56]  *adddf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "subdf\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-subhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-subhi.c
new file mode 100644
index 0000000..d06af83
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-subhi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+lt_subhi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x - *y;
+  if (v < 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	subw3 *12(%ap),*8(%ap),%r0	# 29	[c=64]  *subhi3_ccn/1
+	jlss .L2			# 31	[c=26]  *branch_ccn
+	addw2 $2,%r0			# 28	[c=32]  *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "subhi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-subqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-subqi.c
new file mode 100644
index 0000000..254ad71
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-subqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+lt_subqi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x - *y;
+  if (v < 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	subb3 *12(%ap),*8(%ap),%r0	# 29	[c=64]  *subqi3_ccn/1
+	jlss .L2			# 31	[c=26]  *branch_ccn
+	addb2 $2,%r0			# 28	[c=32]  *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "subqi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-subsf.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-subsf.c
new file mode 100644
index 0000000..26181d8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-subsf.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) float_t;
+
+float_t
+lt_subsf (float_t x, float_t y)
+{
+  x -= y;
+  if (x < 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	subf3 8(%ap),4(%ap),%r0		# 28	[c=48]  *subsf3_ccn/1
+	jlss .L1			# 30	[c=26]  *branch_ccn
+	addf2 $0f2.0e+0,%r0		# 27	[c=36]  *addsf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "subsf\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-subsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-subsi.c
new file mode 100644
index 0000000..6e98e4c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-subsi.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+lt_subsi (int_t x, int_t y)
+{
+  x -= y;
+  if (x < 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	subl3 8(%ap),4(%ap),%r0		# 29	[c=48]  *subsi3_ccn/1
+	jlss .L1			# 31	[c=26]  *branch_ccn
+	addl2 $2,%r0			# 28	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "subsi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-truncdfsf.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-truncdfsf.c
new file mode 100644
index 0000000..98fac66
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-truncdfsf.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef float __attribute__ ((mode (SF))) single_t;
+typedef float __attribute__ ((mode (DF))) double_t;
+
+single_t
+lt_truncdfsf (double_t x)
+{
+  single_t v;
+
+  v = x;
+  if (v < 0)
+    return v;
+  else
+    return v + 2;
+}
+
+/* Expect assembly like:
+
+	cvtdf 4(%ap),%r0		# 27	[c=20]  *truncdfsf2_ccn
+	jlss .L1			# 29	[c=26]  *branch_ccn
+	addf2 $0f2.0e+0,%r0		# 26	[c=36]  *addsf3/0
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "truncdfsf\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-xorhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-xorhi.c
new file mode 100644
index 0000000..be36e0a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-xorhi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+lt_xorhi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x ^ *y;
+  if (v < 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	xorw3 *12(%ap),*8(%ap),%r0	# 28	[c=44]  *xorhi3_ccn/2
+	jlss .L2			# 30	[c=26]  *branch_ccn
+	addw2 $2,%r0			# 27	[c=32]  *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "xorhi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-xorqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-xorqi.c
new file mode 100644
index 0000000..51b05e7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-xorqi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+lt_xorqi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x ^ *y;
+  if (v < 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	xorb3 *12(%ap),*8(%ap),%r0	# 28	[c=44]  *xorqi3_ccn/2
+	jlss .L2			# 30	[c=26]  *branch_ccn
+	addb2 $2,%r0			# 27	[c=32]  *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "xorqi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-lt-xorsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-lt-xorsi.c
new file mode 100644
index 0000000..439e36d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-lt-xorsi.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+lt_xorsi (int_t x, int_t y)
+{
+  x ^= y;
+  if (x < 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	xorl3 8(%ap),4(%ap),%r0		# 29	[c=28]  *xorsi3_ccn/2
+	jlss .L1			# 31	[c=26]  *branch_ccn
+	addl2 $2,%r0			# 28	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "xorsi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-ltu-subhi.c b/gcc/testsuite/gcc.target/vax/cmpelim-ltu-subhi.c
new file mode 100644
index 0000000..7965322
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-ltu-subhi.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (HI))) int_t;
+
+void
+ltu_subhi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x - *y;
+  if (*x < *y)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	movw *8(%ap),%r2		# 28	[c=24]  *movhi
+	movw *12(%ap),%r1		# 29	[c=24]  *movhi
+	subw3 %r1,%r2,%r0		# 30	[c=32]  *subhi3_cc/1
+	jlssu .L2			# 32	[c=26]  *branch_cc
+	addw2 $2,%r0			# 27	[c=32]  *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "subhi\[^ \]*_cc(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_cc\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-ltu-subqi.c b/gcc/testsuite/gcc.target/vax/cmpelim-ltu-subqi.c
new file mode 100644
index 0000000..3ba1d0f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-ltu-subqi.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (QI))) int_t;
+
+void
+ltu_subqi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x - *y;
+  if (*x < *y)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	movb *8(%ap),%r2		# 28	[c=24]  *movqi
+	movb *12(%ap),%r1		# 29	[c=24]  *movqi
+	subb3 %r1,%r2,%r0		# 30	[c=32]  *subqi3_cc/1
+	jlssu .L2			# 32	[c=26]  *branch_cc
+	addb2 $2,%r0			# 27	[c=32]  *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "subqi\[^ \]*_cc(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_cc\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-ltu-subsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-ltu-subsi.c
new file mode 100644
index 0000000..542ff80
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-ltu-subsi.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (SI))) int_t;
+
+int_t
+ltu_subsi (int_t x, int_t y)
+{
+  int_t v;
+
+  v = x - y;
+  if (x < y)
+    return v;
+  else
+    return v + 2;
+}
+
+/* Expect assembly like:
+
+	movl 4(%ap),%r2			# 27	[c=16]  *movsi_2
+	movl 8(%ap),%r1			# 28	[c=16]  *movsi_2
+	subl3 %r1,%r2,%r0		# 29	[c=32]  *subsi3_cc/1
+	jlssu .L1			# 31	[c=26]  *branch_cc
+	addl2 $2,%r0			# 26	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 1 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "subsi\[^ \]*_cc(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_cc\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-xx-addsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-xx-addsi.c
new file mode 100644
index 0000000..033b119
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-xx-addsi.c
@@ -0,0 +1,36 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+xx_addsi (int_t x, int_t y)
+{
+  x += y;
+  if (x == 0)
+    return x;
+  else if (x >= 0)
+    return x + 2;
+  else
+    return x - 3;
+}
+
+/* Expect assembly like:
+
+	addl3 4(%ap),8(%ap),%r0		# 47	[c=48]  *addsi3_ccnz
+	jeql .L1			# 49	[c=26]  *branch_ccz
+	jlss .L3			# 46	[c=26]  *branch_ccn
+	addl2 $2,%r0			# 44	[c=32]  *addsi3
+	ret				# 39	[c=0]  return
+.L3:
+	subl2 $3,%r0			# 43	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 2 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "addsi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-xx-insvsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-xx-insvsi.c
new file mode 100644
index 0000000..8f3e4ff
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-xx-insvsi.c
@@ -0,0 +1,53 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef signed int __attribute__ ((mode (SI))) int_t;
+typedef union
+  {
+    int_t i;
+    struct
+      {
+	int_t h : 7;
+	int_t i : 18;
+	int_t l : 7;
+      } b;
+  }
+bit_t;
+
+int
+xx_insvsi (bit_t x, int_t y)
+{
+  int_t v;
+
+  v = x.b.i;
+  x.b.i = y;
+  if (v == 0)
+    return x.i;
+  else if (v >= 0)
+    return x.i + 2;
+  else
+    return x.i - 3;
+}
+
+/* Expect assembly like:
+
+	movl 4(%ap),%r0			# 50	[c=16]  *movsi_2
+	extv $7,$18,%r0,%r1		# 51	[c=60]  *extv_non_const_2_ccnz
+	insv 8(%ap),$7,$18,%r0		# 8	[c=16]  *insv_2
+	jeql .L1			# 53	[c=26]  *branch_ccz
+	jlss .L4			# 49	[c=26]  *branch_ccn
+	addl2 $2,%r0			# 47	[c=32]  *addsi3
+	ret				# 42	[c=0]  return
+.L4:
+	subl2 $3,%r0			# 46	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 2 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "extv\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "extv.*insv.*branch" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/cmpelim-xxu-subsi.c b/gcc/testsuite/gcc.target/vax/cmpelim-xxu-subsi.c
new file mode 100644
index 0000000..b9f7304
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cmpelim-xxu-subsi.c
@@ -0,0 +1,40 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-cmpelim -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (SI))) int_t;
+
+int_t
+xxu_subsi (int_t x, int_t y)
+{
+  int_t v;
+
+  v = x - y;
+  if (x == y)
+    return v;
+  else if (x >= y)
+    return v + 2;
+  else
+    return v - 3;
+}
+
+/* Expect assembly like:
+
+	movl 4(%ap),%r2			# 39	[c=16]  *movsi_2
+	movl 8(%ap),%r1			# 40	[c=16]  *movsi_2
+	subl3 %r1,%r2,%r0		# 41	[c=32]  *subsi3_cc/1
+	jeql .L1			# 43	[c=26]  *branch_ccz
+	jlssu .L3			# 38	[c=26]  *branch_cc
+	addl2 $2,%r0			# 36	[c=32]  *addsi3
+	ret				# 31	[c=0]  return
+.L3:
+	subl2 $3,%r0			# 35	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "deleting insn with uid" 2 "cmpelim" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "subsi\[^ \]*_cc(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_cc\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/compare-add-zero.c b/gcc/testsuite/gcc.target/vax/compare-add-zero.c
new file mode 100644
index 0000000..97d4c53
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/compare-add-zero.c
@@ -0,0 +1,27 @@
+/* { dg-do compile } */
+/* { dg-options "" } */
+
+int
+compare_add (int x, int y)
+{
+  int z;
+
+  z = x + y;
+  if (z < 0)
+    return z;
+  else
+    return z + 2;
+}
+
+/* Expect assembly like:
+
+	addl3 4(%ap),8(%ap),%r0
+	jlss .L1
+	addl2 $2,%r0
+.L1:
+
+A reverse branch may be used at some optimization levels.  */
+
+/* Make sure the comparison is made against 0 rather than -1.  */
+/* { dg-final { scan-assembler-not "\tj(gtr|leq) " } } */
+/* { dg-final { scan-assembler "\tj(geq|lss) " } } */
diff --git a/gcc/testsuite/gcc.target/vax/compare-mov-zero.c b/gcc/testsuite/gcc.target/vax/compare-mov-zero.c
new file mode 100644
index 0000000..c802049
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/compare-mov-zero.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "" } */
+
+int
+compare_mov (int x)
+{
+  if (x > 0)
+    return x;
+  else
+    return x + 2;
+}
+
+/* Expect assembly like:
+
+	movl 4(%ap),%r0
+	jgtr .L2
+	addl2 $2,%r0
+.L2:
+
+A reverse branch may be used at some optimization levels.  */
+
+/* Make sure the comparison is made against 0 rather than 1.  */
+/* { dg-final { scan-assembler-not "\tj(geq|lss) " } } */
+/* { dg-final { scan-assembler "\tj(gtr|leq) " } } */
diff --git a/gcc/testsuite/gcc.target/vax/cpymem.c b/gcc/testsuite/gcc.target/vax/cpymem.c
new file mode 100644
index 0000000..91805a1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/cpymem.c
@@ -0,0 +1,23 @@
+/* { dg-do compile } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+#include <stddef.h>
+
+void *
+memcpy8 (void *to, const void *from, size_t size)
+{
+  unsigned char s8 = size;
+  return __builtin_memcpy (to, from, s8);
+}
+
+/* Expect assembly like:
+
+	movl 4(%ap),%r6
+	movzbl 12(%ap),%r7
+	movl 8(%ap),%r8
+	movc3 %r7,(%r8),(%r6)
+	movl %r6,%r0
+
+ */
+
+/* { dg-final { scan-assembler "\tmovc3 " } } */
diff --git a/gcc/testsuite/gcc.target/vax/ctzhi.c b/gcc/testsuite/gcc.target/vax/ctzhi.c
new file mode 100644
index 0000000..fcc9f06
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/ctzhi.c
@@ -0,0 +1,20 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (HI))) int_t;
+
+int
+ctzhi (int_t *x)
+{
+  return __builtin_ctz (*x);
+}
+
+/* Expect assembly like:
+
+	ffs $0,$16,*4(%ap),%r0
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler "\tffs \\\$0,\\\$16," } } */
diff --git a/gcc/testsuite/gcc.target/vax/ctzqi.c b/gcc/testsuite/gcc.target/vax/ctzqi.c
new file mode 100644
index 0000000..067334b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/ctzqi.c
@@ -0,0 +1,20 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (QI))) int_t;
+
+int
+ctzqi (int_t *x)
+{
+  return __builtin_ctz (*x);
+}
+
+/* Expect assembly like:
+
+	ffs $0,$8,*4(%ap),%r0
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler "\tffs \\\$0,\\\$8," } } */
diff --git a/gcc/testsuite/gcc.target/vax/ctzsi.c b/gcc/testsuite/gcc.target/vax/ctzsi.c
new file mode 100644
index 0000000..8be4271
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/ctzsi.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+
+int
+ctzsi (unsigned int x)
+{
+  return __builtin_ctz (x);
+}
+
+/* Expect assembly like:
+
+	ffs $0,$32,4(%ap),%r0
+
+ */
+
+/* { dg-final { scan-assembler "\tffs \\\$0,\\\$32," } } */
diff --git a/gcc/testsuite/gcc.target/vax/ffshi.c b/gcc/testsuite/gcc.target/vax/ffshi.c
new file mode 100644
index 0000000..db592fb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/ffshi.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+int
+ffshi (int_t *x)
+{
+  return __builtin_ffs (*x);
+}
+
+/* Expect assembly like:
+
+	ffs $0,$16,*4(%ap),%r0
+	jneq .L2
+	mnegl $1,%r0
+.L2:
+	incl %r0
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler "\tffs \\\$0,\\\$16," } } */
diff --git a/gcc/testsuite/gcc.target/vax/ffsqi.c b/gcc/testsuite/gcc.target/vax/ffsqi.c
new file mode 100644
index 0000000..ebcd946
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/ffsqi.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+int
+ffsqi (int_t *x)
+{
+  return __builtin_ffs (*x);
+}
+
+/* Expect assembly like:
+
+	ffs $0,$8,*4(%ap),%r0
+	jneq .L2
+	mnegl $1,%r0
+.L2:
+	incl %r0
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler "\tffs \\\$0,\\\$8," } } */
diff --git a/gcc/testsuite/gcc.target/vax/ffssi.c b/gcc/testsuite/gcc.target/vax/ffssi.c
new file mode 100644
index 0000000..3e7a3c2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/ffssi.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+
+int
+ffssi (int x)
+{
+  return __builtin_ffs (x);
+}
+
+/* Expect assembly like:
+
+	ffs $0,$32,%r1,%r0
+	jneq .L2
+	mnegl $1,%r0
+.L2:
+	incl %r0
+
+ */
+
+/* { dg-final { scan-assembler "\tffs \\\$0,\\\$32," } } */
diff --git a/gcc/testsuite/gcc.target/vax/movmem.c b/gcc/testsuite/gcc.target/vax/movmem.c
new file mode 100644
index 0000000..b907d8a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/movmem.c
@@ -0,0 +1,23 @@
+/* { dg-do compile } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+#include <stddef.h>
+
+void *
+memmove8 (void *to, const void *from, size_t size)
+{
+  unsigned char s8 = size;
+  return __builtin_memmove (to, from, s8);
+}
+
+/* Expect assembly like:
+
+	movl 4(%ap),%r6
+	movzbl 12(%ap),%r7
+	movl 8(%ap),%r8
+	movc3 %r7,(%r8),(%r6)
+	movl %r6,%r0
+
+ */
+
+/* { dg-final { scan-assembler "\tmovc3 " } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-eq-andhi.c b/gcc/testsuite/gcc.target/vax/peephole2-eq-andhi.c
new file mode 100644
index 0000000..485b324
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-eq-andhi.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+eq_andhi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x & *y;
+  if (v == 0)
+    *w = 1;
+  else
+    *w = 2;
+}
+
+/* Expect assembly like:
+
+	bitw *8(%ap),*12(%ap)		# 50	[c=50]  *bithi_ccz
+	jneq .L3			# 40	[c=26]  *branch_ccz
+	movw $1,%r0			# 36	[c=4]  *movhi
+	movw %r0,*4(%ap)		# 34	[c=4]  *movhi
+	ret				# 46	[c=0]  return
+.L3:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "bithi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-eq-andqi.c b/gcc/testsuite/gcc.target/vax/peephole2-eq-andqi.c
new file mode 100644
index 0000000..ffea453
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-eq-andqi.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+eq_andqi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x & *y;
+  if (v == 0)
+    *w = 1;
+  else
+    *w = 2;
+}
+
+/* Expect assembly like:
+
+	bitb *8(%ap),*12(%ap)		# 50	[c=50]  *bitqi_ccz
+	jneq .L3			# 40	[c=26]  *branch_ccz
+	movb $1,%r0			# 36	[c=4]  *movqi
+	movb %r0,*4(%ap)		# 34	[c=4]  *movqi
+	ret				# 46	[c=0]  return
+.L3:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "bitqi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-eq-andsi.c b/gcc/testsuite/gcc.target/vax/peephole2-eq-andsi.c
new file mode 100644
index 0000000..b84c352
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-eq-andsi.c
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+eq_andsi (int_t x, int_t y)
+{
+  x &= y;
+  if (x == 0)
+    return 1;
+  else
+    return 2;
+}
+
+/* Expect assembly like:
+
+	bitl 4(%ap),8(%ap)		# 52	[c=34]  *bitsi_ccz
+	jneq .L6			# 41	[c=26]  *branch_ccz
+	movl $1,%r0			# 36	[c=4]  *movsi_2
+	ret				# 47	[c=0]  return
+.L6:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "bitsi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-eq-cmpvsi.c b/gcc/testsuite/gcc.target/vax/peephole2-eq-cmpvsi.c
new file mode 100644
index 0000000..3e09a78
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-eq-cmpvsi.c
@@ -0,0 +1,36 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef signed int __attribute__ ((mode (SI))) int_t;
+typedef struct
+  {
+    int_t h : 7;
+    int_t i : 18;
+    int_t l : 7;
+  }
+bit_t;
+
+int_t
+eq_cmpvsi (bit_t x, int_t y)
+{
+  if (x.i == y)
+    return 1;
+  else
+    return 2;
+}
+
+/* Expect assembly like:
+
+	cmpv $7,$18,4(%ap),8(%ap)	# 50	[c=88]  *cmpv_ccz
+	jeql .L3			# 39	[c=26]  *branch_ccz
+	movl $2,%r0			# 36	[c=4]  *movsi_2
+	ret				# 31	[c=0]  return
+.L3:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmp|tst)\[bwl\] " } } */
+/* { dg-final { scan-assembler "cmpv\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-eq-cmpzvsi.c b/gcc/testsuite/gcc.target/vax/peephole2-eq-cmpzvsi.c
new file mode 100644
index 0000000..3713c1d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-eq-cmpzvsi.c
@@ -0,0 +1,36 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (SI))) int_t;
+typedef struct
+  {
+    int_t h : 7;
+    int_t i : 18;
+    int_t l : 7;
+  }
+bit_t;
+
+int_t
+eq_extzvsi (bit_t x, int_t y)
+{
+  if (x.i == y)
+    return 1;
+  else
+    return 2;
+}
+
+/* Expect assembly like:
+
+	cmpzv $7,$18,4(%ap),8(%ap)	# 50	[c=88]  *cmpzv_ccz
+	jeql .L3			# 39	[c=26]  *branch_ccz
+	movl $2,%r0			# 36	[c=4]  *movsi_2
+	ret				# 31	[c=0]  return
+.L3:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmp|tst)\[bwl\] " } } */
+/* { dg-final { scan-assembler "cmpzv\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-eq-ctzhi-0.c b/gcc/testsuite/gcc.target/vax/peephole2-eq-ctzhi-0.c
new file mode 100644
index 0000000..8a56451
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-eq-ctzhi-0.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+eq_ctzhi (int_t *w, int_t *x)
+{
+  int_t v;
+
+  v = __builtin_ctz (*x);
+  if (*x == 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	movw *8(%ap),%r1		# 34	[c=24]  *movhi
+	ffs $0,$16,%r1,%r0		# 49	[c=4]  *ctzhi2_ccz
+	jeql .L3			# 38	[c=26]  *branch_ccz
+	addw2 $2,%r0			# 33	[c=32]  *addhi3
+.L3:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 2 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "ctzhi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-eq-ctzhi-1.c b/gcc/testsuite/gcc.target/vax/peephole2-eq-ctzhi-1.c
new file mode 100644
index 0000000..db76da4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-eq-ctzhi-1.c
@@ -0,0 +1,34 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+eq_ctzhi (int_t *w, int_t *x)
+{
+  int_t v;
+
+  v = __builtin_ctz (*x + 1);
+  if (v == 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	cvtwl *8(%ap),%r0		# 34	[c=28]  *extendhisi2
+	incl %r0			# 35	[c=32]  *addsi3
+	ffs $0,$32,%r0,%r0		# 36	[c=4]  *ctzsi2
+	tstl %r0			# 37	[c=6]  *cmpsi_ccz/0
+	jeql .L2			# 38	[c=26]  *branch_ccz
+	addw2 $2,%r0			# 33	[c=32]  *addhi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-not "Splitting with gen_peephole2" "peephole2" } } */
+/* { dg-final { scan-assembler "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "cmpsi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-eq-ctzqi-0.c b/gcc/testsuite/gcc.target/vax/peephole2-eq-ctzqi-0.c
new file mode 100644
index 0000000..b6078bc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-eq-ctzqi-0.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+eq_ctzqi (int_t *w, int_t *x)
+{
+  int_t v;
+
+  v = __builtin_ctz (*x);
+  if (*x == 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	movb *8(%ap),%r1		# 34	[c=24]  *movqi
+	ffs $0,$8,%r1,%r0		# 49	[c=4]  *ctzqi2_ccz
+	jeql .L3			# 38	[c=26]  *branch_ccz
+	addb2 $2,%r0			# 33	[c=32]  *addqi3
+.L3:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 2 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "ctzqi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-eq-ctzqi-1.c b/gcc/testsuite/gcc.target/vax/peephole2-eq-ctzqi-1.c
new file mode 100644
index 0000000..44311b9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-eq-ctzqi-1.c
@@ -0,0 +1,34 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+eq_ctzqi (int_t *w, int_t *x)
+{
+  int_t v;
+
+  v = __builtin_ctz (*x + 1);
+  if (v == 0)
+    *w = v;
+  else
+    *w = v + 2;
+}
+
+/* Expect assembly like:
+
+	cvtbl *8(%ap),%r0		# 34	[c=28]  *extendqisi2
+	incl %r0			# 35	[c=32]  *addsi3
+	ffs $0,$32,%r0,%r0		# 36	[c=4]  *ctzsi2
+	tstl %r0			# 37	[c=6]  *cmpsi_ccz/0
+	jeql .L2			# 38	[c=26]  *branch_ccz
+	addb2 $2,%r0			# 33	[c=32]  *addqi3
+.L2:
+
+ */
+
+/* { dg-final { scan-rtl-dump-not "Splitting with gen_peephole2" "peephole2" } } */
+/* { dg-final { scan-assembler "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "cmpsi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-eq-ctzsi-0.c b/gcc/testsuite/gcc.target/vax/peephole2-eq-ctzsi-0.c
new file mode 100644
index 0000000..bf84bdc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-eq-ctzsi-0.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+eq_ctzsi (int_t x)
+{
+  int_t v;
+
+  v = __builtin_ctz (x);
+  if (x == 0)
+    return v;
+  else
+    return v + 2;
+}
+
+/* Expect assembly like:
+
+	movl 4(%ap),%r1			# 32	[c=16]  *movsi_2
+	ffs $0,$32,%r1,%r0		# 45	[c=4]  *ctzsi2_ccz
+	jeql .L1			# 35	[c=26]  *branch_ccz
+	addl2 $2,%r0			# 31	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "ctzsi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-eq-ctzsi-1.c b/gcc/testsuite/gcc.target/vax/peephole2-eq-ctzsi-1.c
new file mode 100644
index 0000000..0cc40ed
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-eq-ctzsi-1.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+eq_ctzsi (int_t x)
+{
+  int_t v;
+
+  v = __builtin_ctz (x + 1);
+  if (v == 0)
+    return v;
+  else
+    return v + 2;
+}
+
+/* Expect assembly like:
+
+	addl3 4(%ap),$1,%r0		# 33	[c=40]  *addsi3
+	ffs $0,$32,%r0,%r0		# 34	[c=4]  *ctzsi2
+	tstl %r0			# 35	[c=6]  *cmpsi_ccz/0
+	jeql .L1			# 36	[c=26]  *branch_ccz
+	addl2 $2,%r0			# 32	[c=32]  *addsi3
+.L1:
+
+ */
+
+/* { dg-final { scan-rtl-dump-not "Splitting with gen_peephole2" "peephole2" } } */
+/* { dg-final { scan-assembler "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "cmpsi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-eq-ffshi.c b/gcc/testsuite/gcc.target/vax/peephole2-eq-ffshi.c
new file mode 100644
index 0000000..50a6cdb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-eq-ffshi.c
@@ -0,0 +1,26 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+eq_ffshi (int_t *w, int_t *x)
+{
+  *w = __builtin_ffs (*x);
+}
+
+/* Expect assembly like:
+
+	ffs $0,$16,*8(%ap),%r1		# 40	[c=28]  *ctzhi2_ccz
+	jneq .L2			# 30	[c=26]  *branch_ccz
+	mnegl $1,%r1			# 26	[c=8]  *negsi2
+.L2:
+	addw3 %r1,$1,*4(%ap)		# 25	[c=32]  *addhi3
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "ctzhi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-eq-ffsqi.c b/gcc/testsuite/gcc.target/vax/peephole2-eq-ffsqi.c
new file mode 100644
index 0000000..0b3ef0f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-eq-ffsqi.c
@@ -0,0 +1,26 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+eq_ffsqi (int_t *w, int_t *x)
+{
+  *w = __builtin_ffs (*x);
+}
+
+/* Expect assembly like:
+
+	ffs $0,$8,*8(%ap),%r1		# 40	[c=28]  *ctzqi2_ccz
+	jneq .L2			# 30	[c=26]  *branch_ccz
+	mnegl $1,%r1			# 26	[c=8]  *negsi2
+.L2:
+	addb3 %r1,$1,*4(%ap)		# 25	[c=32]  *addqi3
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "ctzqi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-eq-ffssi.c b/gcc/testsuite/gcc.target/vax/peephole2-eq-ffssi.c
new file mode 100644
index 0000000..0e32121
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-eq-ffssi.c
@@ -0,0 +1,27 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+eq_ffssi (int_t x)
+{
+  return __builtin_ffs (x);
+}
+
+/* Expect assembly like:
+
+	movl 4(%ap),%r1			# 28	[c=16]  *movsi_2
+	ffs $0,$32,%r1,%r0		# 41	[c=4]  *ctzsi2_ccz
+	jneq .L2			# 31	[c=26]  *branch_ccz
+	mnegl $1,%r0			# 27	[c=8]  *negsi2
+.L2:
+	incl %r0			# 26	[c=32]  *addsi3
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "ctzsi\[^ \]*_ccz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-le-andhi.c b/gcc/testsuite/gcc.target/vax/peephole2-le-andhi.c
new file mode 100644
index 0000000..9eb40c0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-le-andhi.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+le_andhi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x & *y;
+  if (v <= 0)
+    *w = 1;
+  else
+    *w = 2;
+}
+
+/* Expect assembly like:
+
+	bitw *8(%ap),*12(%ap)		# 56	[c=50]  *bithi_ccnz
+	jleq .L6			# 46	[c=26]  *branch_ccnz
+	movw $2,%r0			# 41	[c=4]  *movhi
+	movw %r0,*4(%ap)		# 40	[c=4]  *movhi
+	ret				# 52	[c=0]  return
+.L6:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "bithi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-le-andqi.c b/gcc/testsuite/gcc.target/vax/peephole2-le-andqi.c
new file mode 100644
index 0000000..14797b0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-le-andqi.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+le_andqi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x & *y;
+  if (v <= 0)
+    *w = 1;
+  else
+    *w = 2;
+}
+
+/* Expect assembly like:
+
+	bitb *8(%ap),*12(%ap)		# 56	[c=50]  *bitqi_ccnz
+	jleq .L6			# 46	[c=26]  *branch_ccnz
+	movb $2,%r0			# 41	[c=4]  *movqi
+	movb %r0,*4(%ap)		# 40	[c=4]  *movqi
+	ret				# 52	[c=0]  return
+.L6:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "bitqi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-le-andsi.c b/gcc/testsuite/gcc.target/vax/peephole2-le-andsi.c
new file mode 100644
index 0000000..6d1193e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-le-andsi.c
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+le_andsi (int_t x, int_t y)
+{
+  x &= y;
+  if (x <= 0)
+    return 1;
+  else
+    return 2;
+}
+
+/* Expect assembly like:
+
+	bitl 4(%ap),8(%ap)		# 58	[c=34]  *bitsi_ccnz
+	jgtr .L6			# 47	[c=26]  *branch_ccnz
+	movl $1,%r0			# 42	[c=4]  *movsi_2
+	ret				# 53	[c=0]  return
+.L6:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "bitsi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-le-cmpvsi.c b/gcc/testsuite/gcc.target/vax/peephole2-le-cmpvsi.c
new file mode 100644
index 0000000..dd26849
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-le-cmpvsi.c
@@ -0,0 +1,36 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef signed int __attribute__ ((mode (SI))) int_t;
+typedef struct
+  {
+    int_t h : 7;
+    int_t i : 18;
+    int_t l : 7;
+  }
+bit_t;
+
+int_t
+le_cmpvsi (bit_t x, int_t y)
+{
+  if (x.i <= y)
+    return 1;
+  else
+    return 2;
+}
+
+/* Expect assembly like:
+
+	cmpv $7,$18,4(%ap),8(%ap)	# 50	[c=88]  *cmpv_ccnz
+	jgtr .L6			# 39	[c=26]  *branch_ccnz
+	movl $1,%r0			# 35	[c=4]  *movsi_2
+	ret				# 45	[c=0]  return
+.L6:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmp|tst)\[bwl\] " } } */
+/* { dg-final { scan-assembler "cmpv\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-le-cmpzvsi.c b/gcc/testsuite/gcc.target/vax/peephole2-le-cmpzvsi.c
new file mode 100644
index 0000000..3cf028a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-le-cmpzvsi.c
@@ -0,0 +1,34 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (SI))) uint_t;
+typedef int __attribute__ ((mode (SI))) int_t;
+
+uint_t
+le_cmpzvsi (uint_t x, int_t y, int_t z)
+{
+  int_t v;
+
+  v = x >> y;
+  if (v <= z)
+    return 1;
+  else
+    return 2;
+}
+
+/* Expect assembly like:
+
+	subb3 8(%ap),$32,%r0		# 39	[c=40]  *subqi3/1
+	cmpzv 8(%ap),%r0,4(%ap),12(%ap)	# 53	[c=96]  *cmpzv_ccnz
+	jgtr .L6			# 42	[c=26]  *branch_ccnz
+	movl $1,%r0			# 37	[c=4]  *movsi_2
+	ret				# 48	[c=0]  return
+.L6:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmp|tst)\[bwl\] " } } */
+/* { dg-final { scan-assembler "cmpzv\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-leu-cmpvsi.c b/gcc/testsuite/gcc.target/vax/peephole2-leu-cmpvsi.c
new file mode 100644
index 0000000..0a0468b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-leu-cmpvsi.c
@@ -0,0 +1,40 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (SI))) uint_t;
+typedef signed int __attribute__ ((mode (SI))) int_t;
+typedef struct
+  {
+    int_t h : 7;
+    int_t i : 18;
+    int_t l : 7;
+  }
+bit_t;
+
+int_t
+leu_cmpvsi (bit_t x, uint_t y)
+{
+  uint_t v;
+
+  v = x.i;
+  if (v <= y)
+    return 1;
+  else
+    return 2;
+}
+
+/* Expect assembly like:
+
+	cmpv $7,$18,4(%ap),8(%ap)	# 50	[c=88]  *cmpv_cc
+	jgtru .L6			# 39	[c=26]  *branch_cc
+	movl $1,%r0			# 35	[c=4]  *movsi_2
+	ret				# 45	[c=0]  return
+.L6:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmp|tst)\[bwl\] " } } */
+/* { dg-final { scan-assembler "cmpv\[^ \]*_cc(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_cc\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-leu-cmpzvsi.c b/gcc/testsuite/gcc.target/vax/peephole2-leu-cmpzvsi.c
new file mode 100644
index 0000000..ca7cfe4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-leu-cmpzvsi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (SI))) uint_t;
+typedef int __attribute__ ((mode (SI))) int_t;
+
+uint_t
+leu_cmpzvsi (uint_t x, int_t y, uint_t z)
+{
+  if (x >> y <= z)
+    return 1;
+  else
+    return 2;
+}
+
+/* Expect assembly like:
+
+	subb3 8(%ap),$32,%r0		# 39	[c=40]  *subqi3/1
+	cmpzv 8(%ap),%r0,4(%ap),12(%ap)	# 53	[c=96]  *cmpzv_cc
+	jgtru .L6			# 42	[c=26]  *branch_cc
+	movl $1,%r0			# 37	[c=4]  *movsi_2
+	ret				# 48	[c=0]  return
+.L6:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmp|tst)\[bwl\] " } } */
+/* { dg-final { scan-assembler "cmpzv\[^ \]*_cc(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_cc\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-lt-andhi.c b/gcc/testsuite/gcc.target/vax/peephole2-lt-andhi.c
new file mode 100644
index 0000000..9eb40c0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-lt-andhi.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (HI))) int_t;
+
+void
+le_andhi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x & *y;
+  if (v <= 0)
+    *w = 1;
+  else
+    *w = 2;
+}
+
+/* Expect assembly like:
+
+	bitw *8(%ap),*12(%ap)		# 56	[c=50]  *bithi_ccnz
+	jleq .L6			# 46	[c=26]  *branch_ccnz
+	movw $2,%r0			# 41	[c=4]  *movhi
+	movw %r0,*4(%ap)		# 40	[c=4]  *movhi
+	ret				# 52	[c=0]  return
+.L6:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "bithi\[^ \]*_ccnz(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccnz\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-lt-andqi.c b/gcc/testsuite/gcc.target/vax/peephole2-lt-andqi.c
new file mode 100644
index 0000000..d71c46d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-lt-andqi.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (QI))) int_t;
+
+void
+lt_andqi (int_t *w, int_t *x, int_t *y)
+{
+  int_t v;
+
+  v = *x & *y;
+  if (v < 0)
+    *w = 1;
+  else
+    *w = 2;
+}
+
+/* Expect assembly like:
+
+	bitb *8(%ap),*12(%ap)		# 68	[c=50]  *bitqi_ccn
+	jlss .L6			# 58	[c=26]  *branch_ccn
+	movb $2,%r0			# 53	[c=4]  *movqi
+	movb %r0,*4(%ap)		# 52	[c=4]  *movqi
+	ret				# 64	[c=0]  return
+.L6:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "bitqi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-lt-andsi.c b/gcc/testsuite/gcc.target/vax/peephole2-lt-andsi.c
new file mode 100644
index 0000000..4045b36
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-lt-andsi.c
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef int __attribute__ ((mode (SI))) int_t;
+
+int_t
+lt_andsi (int_t x, int_t y)
+{
+  x &= y;
+  if (x < 0)
+    return 1;
+  else
+    return 2;
+}
+
+/* Expect assembly like:
+
+	bitl 4(%ap),8(%ap)		# 68	[c=34]  *bitsi_ccn
+	jgeq .L6			# 57	[c=26]  *branch_ccn
+	movl $1,%r0			# 52	[c=4]  *movsi_2
+	ret				# 63	[c=0]  return
+.L6:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(cmpz?|tst). " } } */
+/* { dg-final { scan-assembler "bitsi\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-lt-cmpvsi.c b/gcc/testsuite/gcc.target/vax/peephole2-lt-cmpvsi.c
new file mode 100644
index 0000000..a50f322
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-lt-cmpvsi.c
@@ -0,0 +1,36 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef signed int __attribute__ ((mode (SI))) int_t;
+typedef struct
+  {
+    int_t h : 7;
+    int_t i : 18;
+    int_t l : 7;
+  }
+bit_t;
+
+int_t
+lt_cmpvsi (bit_t x, int_t y)
+{
+  if (x.i < y)
+    return 1;
+  else
+    return 2;
+}
+
+/* Expect assembly like:
+
+	cmpv $7,$18,4(%ap),8(%ap)	# 50	[c=88]  *cmpv_ccn
+	jgeq .L6			# 39	[c=26]  *branch_ccn
+	movl $1,%r0			# 35	[c=4]  *movsi_2
+	ret				# 45	[c=0]  return
+.L6:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmp|tst)\[bwl\] " } } */
+/* { dg-final { scan-assembler "cmpv\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-lt-cmpzvsi.c b/gcc/testsuite/gcc.target/vax/peephole2-lt-cmpzvsi.c
new file mode 100644
index 0000000..de38643
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-lt-cmpzvsi.c
@@ -0,0 +1,34 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (SI))) uint_t;
+typedef int __attribute__ ((mode (SI))) int_t;
+
+uint_t
+lt_cmpzvsi (uint_t x, int_t y, int_t z)
+{
+  int_t v;
+
+  v = x >> y;
+  if (v < z)
+    return 1;
+  else
+    return 2;
+}
+
+/* Expect assembly like:
+
+	subb3 8(%ap),$32,%r0		# 39	[c=40]  *subqi3/1
+	cmpzv 8(%ap),%r0,4(%ap),12(%ap)	# 53	[c=96]  *cmpzv_ccn
+	jgeq .L6			# 42	[c=26]  *branch_ccn
+	movl $1,%r0			# 37	[c=4]  *movsi_2
+	ret				# 48	[c=0]  return
+.L6:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmp|tst)\[bwl\] " } } */
+/* { dg-final { scan-assembler "cmpzv\[^ \]*_ccn(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_ccn\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-ltu-cmpvsi.c b/gcc/testsuite/gcc.target/vax/peephole2-ltu-cmpvsi.c
new file mode 100644
index 0000000..8eba505
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-ltu-cmpvsi.c
@@ -0,0 +1,40 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (SI))) uint_t;
+typedef signed int __attribute__ ((mode (SI))) int_t;
+typedef struct
+  {
+    int_t h : 7;
+    int_t i : 18;
+    int_t l : 7;
+  }
+bit_t;
+
+int_t
+ltu_cmpvsi (bit_t x, uint_t y)
+{
+  uint_t v;
+
+  v = x.i;
+  if (v < y)
+    return 1;
+  else
+    return 2;
+}
+
+/* Expect assembly like:
+
+	cmpv $7,$18,4(%ap),8(%ap)	# 50	[c=88]  *cmpv_cc
+	jgequ .L6			# 39	[c=26]  *branch_cc
+	movl $1,%r0			# 35	[c=4]  *movsi_2
+	ret				# 45	[c=0]  return
+.L6:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmp|tst)\[bwl\] " } } */
+/* { dg-final { scan-assembler "cmpv\[^ \]*_cc(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_cc\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/peephole2-ltu-cmpzvsi.c b/gcc/testsuite/gcc.target/vax/peephole2-ltu-cmpzvsi.c
new file mode 100644
index 0000000..9cdee86
--- /dev/null
+++ b/gcc/testsuite/gcc.target/vax/peephole2-ltu-cmpzvsi.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-fdump-rtl-peephole2 -dp" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" "-O1" } { "" } } */
+
+typedef unsigned int __attribute__ ((mode (SI))) uint_t;
+typedef int __attribute__ ((mode (SI))) int_t;
+
+uint_t
+ltu_cmpzvsi (uint_t x, int_t y, uint_t z)
+{
+  if (x >> y < z)
+    return 1;
+  else
+    return 2;
+}
+
+/* Expect assembly like:
+
+	subb3 8(%ap),$32,%r0		# 39	[c=40]  *subqi3/1
+	cmpzv 8(%ap),%r0,4(%ap),12(%ap)	# 53	[c=96]  *cmpzv_cc
+	jgequ .L6			# 42	[c=26]  *branch_cc
+	movl $1,%r0			# 37	[c=4]  *movsi_2
+	ret				# 48	[c=0]  return
+.L6:
+
+ */
+
+/* { dg-final { scan-rtl-dump-times "Splitting with gen_peephole2" 1 "peephole2" } } */
+/* { dg-final { scan-assembler-not "\t(bit|cmp|tst)\[bwl\] " } } */
+/* { dg-final { scan-assembler "cmpzv\[^ \]*_cc(/\[0-9\]+)?\n" } } */
+/* { dg-final { scan-assembler "branch_cc\n" } } */
diff --git a/gcc/testsuite/gcc.target/vax/pr56875.c b/gcc/testsuite/gcc.target/vax/pr56875.c
index f409afe..191e05e 100644
--- a/gcc/testsuite/gcc.target/vax/pr56875.c
+++ b/gcc/testsuite/gcc.target/vax/pr56875.c
@@ -1,13 +1,10 @@
 /* { dg-do compile } */
-/* { dg-options "-O0" } */
+/* { dg-options "" } */
 /* { dg-final { scan-assembler     "ashq .*,\\\$0xffffffffffffffff," } } */
 /* { dg-final { scan-assembler-not "ashq .*,\\\$-1," } } */
 
-void
-a (void)
+unsigned long long
+a (unsigned long i)
 {
-	unsigned long i = 1;
-	unsigned long long v;
-
-	v = ~ (unsigned long long) 0 << i;
+  return ~(unsigned long long) 0 << i;
 }
diff --git a/gcc/testsuite/gcc.target/vax/vax.exp b/gcc/testsuite/gcc.target/vax/vax.exp
index 4f48055..678e900 100644
--- a/gcc/testsuite/gcc.target/vax/vax.exp
+++ b/gcc/testsuite/gcc.target/vax/vax.exp
@@ -34,7 +34,7 @@ if ![info exists DEFAULT_CFLAGS] then {
 dg-init
 
 # Main loop.
-dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.\[cS\]]] \
+gcc-dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.\[cS\]]] \
 	"" $DEFAULT_CFLAGS
 
 # All done.
diff --git a/gcc/testsuite/gfortran.dg/coarray/alloc_comp_1.f90 b/gcc/testsuite/gfortran.dg/coarray/alloc_comp_1.f90
index f809a5f..cf3ece2 100644
--- a/gcc/testsuite/gfortran.dg/coarray/alloc_comp_1.f90
+++ b/gcc/testsuite/gfortran.dg/coarray/alloc_comp_1.f90
@@ -10,7 +10,7 @@ allocate (a%caf[3:*])
 a%caf = 7
 if (a%caf /= 7) STOP 1
 if (any (lcobound (a%caf) /= [ 3 ]) &
-    .or. ucobound (a%caf, dim=1) /= this_image ()+2)  &
+    .or. ucobound (a%caf, dim=1) /= num_images ()+2)  &
   STOP 2
 deallocate (a%caf)
 end
diff --git a/gcc/testsuite/gfortran.dg/pr98016.f90 b/gcc/testsuite/gfortran.dg/pr98016.f90
new file mode 100644
index 0000000..71df67e
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/pr98016.f90
@@ -0,0 +1,19 @@
+! { dg-do compile }
+!
+! Fix for PR98016 - Used to fail with Error: Variable ‘n’ cannot appear in the
+! expression at (1) for line 16. Workaround was to declare y to be real.
+!
+! Posted by Juergen Reuter  <juergen.reuter@desy.de>
+!
+program is_it_valid
+  dimension y(3)
+  n=3
+  y=func(1.0)
+  print *, y
+  stop
+contains
+  function func(x) result (y)
+    dimension y(n)
+    y=x
+  end function
+end
diff --git a/gcc/testsuite/go.test/go-test.exp b/gcc/testsuite/go.test/go-test.exp
index 8f17cb3..d129e1c 100644
--- a/gcc/testsuite/go.test/go-test.exp
+++ b/gcc/testsuite/go.test/go-test.exp
@@ -131,11 +131,11 @@ proc errchk { test opts } {
 	    set index [string first "dg-error" $out_line]
 	    regsub -start $index -all "\(\[^\\\\]\)\}\(.\)" $out_line "\\1\\\\\[\\\}\\\\\]\\2" out_line
 	}
-	if [string match "*dg-error*\(*" $out_line] {
+	if [string match "*dg-error*\\\[^\\\\\]\(*" $out_line] {
 	    set index [string first "dg-error" $out_line]
 	    regsub -start $index -all "\\\\\\\(" $out_line "\\\\\[\\\(\\\\\]" out_line
 	}
-	if [string match "*dg-error*\)*\}" $out_line] {
+	if [string match "*dg-error*\\\[^\\\\\]\)*\}" $out_line] {
 	    set index [string first "dg-error" $out_line]
 	    regsub -start $index -all "\\\\\\\)\(.\)" $out_line "\\\\\[\\\)\\\\\]\\1" out_line
 	}