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author | Richard Biener <rguenther@suse.de> | 2022-09-21 11:30:57 +0200 |
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committer | Richard Biener <rguenther@suse.de> | 2022-09-21 11:32:29 +0200 |
commit | 41b5edaa5c03db36ad45a9cf524881de221a1812 (patch) | |
tree | dae81ac6fea95d18b9c3d2d8e3bb35b6e18b0869 /gcc/testsuite | |
parent | 519196a27cf534e94f158733b25a4f9d10737031 (diff) | |
download | gcc-41b5edaa5c03db36ad45a9cf524881de221a1812.zip gcc-41b5edaa5c03db36ad45a9cf524881de221a1812.tar.gz gcc-41b5edaa5c03db36ad45a9cf524881de221a1812.tar.bz2 |
tree-optimization/106984 - tsan and COND_EXPR GIMPLE
The following adjusts a missed spot in TSAN for the RHS COND_EXPR
GIMPLE IL rework.
PR tree-optimization/106984
* tsan.cc (instrument_builtin_call): Build the COND_EXPR condition in
a separate statement.
* gcc.dg/tsan/pr106984.c: New testcase.
Diffstat (limited to 'gcc/testsuite')
-rw-r--r-- | gcc/testsuite/gcc.dg/tsan/pr106984.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/gcc/testsuite/gcc.dg/tsan/pr106984.c b/gcc/testsuite/gcc.dg/tsan/pr106984.c new file mode 100644 index 0000000..69cf83d --- /dev/null +++ b/gcc/testsuite/gcc.dg/tsan/pr106984.c @@ -0,0 +1,7 @@ +/* { dg-do compile } */ +/* { dg-options "-fsanitize=thread" } */ + +int svcsw (int *ptr, int oldval, int newval) +{ + return __sync_val_compare_and_swap (ptr, oldval, newval); +} |