re PR rtl-optimization/45352 (ICE: in reset_sched_cycles_in_current_ebb, at sel-sched.c:7058)

        PR rtl-optimization/45352
        * sel-sched.c (find_best_expr): Do not set pneed_stall when
        the variable_issue hook is not implemented.
        (fill_insns): Remove dead variable stall_iterations.
        (init_seqno_1): Force EBB start for resetting sched cycles on any
        successor blocks of the rescheduled region.
        (sel_sched_region_1): Use bitmap_bit_p instead of bitmap_clear_bit.
        (reset_sched_cycles_in_current_ebb): Add debug printing.
        New variable issued_insns.  Advance state when we have issued
        issue_rate insns.

        gcc.dg/pr45352.c, gcc.dg/pr45352-1.c, gcc.dg/pr45352-2.c: New tests.
        gcc.target/i386/pr45352.c, gcc.target/i386/pr45352-1.c,
        gcc.target/i386/pr45352-2.c: New tests.

From-SVN: r166429

3 files changed, 152 insertions, 0 deletions

diff --git a/gcc/testsuite/gcc.target/i386/pr45352-1.c b/gcc/testsuite/gcc.target/i386/pr45352-1.c
new file mode 100644
index 0000000..5cd1bd8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr45352-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-mtune=amdfam10 -O3 -fpeel-loops -fselective-scheduling2 -fsel-sched-pipelining -fPIC" } */
+
+static int FIR_Tab_16[16][16];
+
+void
+V_Pass_Avrg_16_C_ref (int *Dst, int *Src, int W, int BpS, int Rnd)
+{
+  while (W-- > 0)
+    {
+      int i, k;
+      int Sums[16] = { };
+      for (i = 0; i < 16; ++i)
+	for (k = 0; k < 16; ++k)
+	  Sums[k] += FIR_Tab_16[i][k] * Src[i];
+      for (i = 0; i < 16; ++i)
+	Dst[i] = Sums[i] + Src[i];
+    }
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr45352-2.c b/gcc/testsuite/gcc.target/i386/pr45352-2.c
new file mode 100644
index 0000000..58713af
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr45352-2.c
@@ -0,0 +1,108 @@
+/* { dg-do compile } */
+/* { dg-options "-O1 -mtune=amdfam10 -fexpensive-optimizations -fgcse -foptimize-register-move -freorder-blocks -fschedule-insns2 -funswitch-loops -fgcse-las -fselective-scheduling2 -fsel-sched-pipelining -funroll-all-loops" } */
+
+typedef char uint8_t;
+typedef uint32_t;
+typedef vo_frame_t;
+struct vo_frame_s
+{
+    uint8_t base[3];
+  int pitches[3];};
+typedef struct
+{
+void
+    (*proc_macro_block)
+    (void);
+}
+xine_xvmc_t;
+typedef struct
+{
+  uint8_t ref[2][3];
+int pmv;
+}
+motion_t;
+typedef struct
+{
+  uint32_t bitstream_buf;
+  int bitstream_bits;
+    uint8_t * bitstream_ptr;
+    uint8_t dest[3];
+  int pitches[3];
+  int offset;
+    motion_t b_motion;
+    motion_t f_motion;
+  int v_offset;
+  int coded_picture_width;
+  int picture_structure;
+struct vo_frame_s *current_frame;}
+picture_t;
+typedef struct
+{
+int xvmc_last_slice_code;}
+mpeg2dec_accel_t;
+static bitstream_init (picture_t * picture, void *start)
+{
+  picture->bitstream_ptr = start;
+}
+static slice_xvmc_init (picture_t * picture, int code)
+{
+  int offset;
+  struct vo_frame_s *forward_reference_frame;
+  offset = picture->picture_structure == 2;
+  picture->pitches[0] = picture->current_frame->pitches[0];
+  picture->pitches[1] = picture->current_frame->pitches[1];
+  if (picture)
+    picture->f_motion.ref
+      [0]
+      [0]
+      = forward_reference_frame->base + (offset ? picture->pitches[0] : 0);
+  picture->f_motion.ref[0][1] = (offset);
+  if (picture->picture_structure)
+      picture->pitches[0] <<= picture->pitches[1] <<= 1;
+  offset = 0;
+  while (1)
+    {
+      if (picture->bitstream_buf >= 0x08000000)
+	  break;
+      switch (picture->bitstream_buf >> 12)
+	{
+	case 8:
+	  offset += 33;
+		picture->bitstream_buf
+		  |=
+		  picture->bitstream_ptr[1] << picture->bitstream_bits;
+	}
+    }
+  picture->offset = (offset);
+  while (picture->offset - picture->coded_picture_width >= 0)
+    {
+      picture->offset -= picture->coded_picture_width;
+      if (picture->current_frame)
+	{
+	  picture->dest[0] += picture->pitches[0];
+	  picture->dest[1] += picture->pitches[1];
+	}
+      picture->v_offset += 16;
+    }
+}
+
+void
+mpeg2_xvmc_slice
+  (mpeg2dec_accel_t * accel, picture_t * picture, int code, uint8_t buffer,int mba_inc)
+{
+  xine_xvmc_t * xvmc = bitstream_init (picture, buffer);
+  slice_xvmc_init (picture, code);
+    while (1)
+      {
+	if (picture)
+	    break;
+	switch (picture->bitstream_buf)
+	  {
+	  case 8:
+	    mba_inc += accel->xvmc_last_slice_code = code;
+		  xvmc->proc_macro_block   ();
+	    while (mba_inc)
+	      ;
+	  }
+      }
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr45352.c b/gcc/testsuite/gcc.target/i386/pr45352.c
new file mode 100644
index 0000000..ef710ce
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr45352.c
@@ -0,0 +1,25 @@
+/* { dg-do compile } */
+/* { dg-options "-O3 -march=amdfam10 -fselective-scheduling2 -fsel-sched-pipelining -funroll-all-loops" } */
+
+struct S
+{
+  struct
+  {
+    int i;
+  } **p;
+  int x;
+  int y;
+};
+
+extern int baz (void);
+extern int bar (void *, int, int);
+
+void
+foo (struct S *s)
+{
+  int i;
+  for (i = 0; i < s->x; i++)
+    bar (s->p[i], baz (), s->y);
+  for (i = 0; i < s->x; i++)
+    s->p[i]->i++;
+}