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authorPhilipp Tomsich <philipp.tomsich@vrull.eu>2022-10-16 10:51:47 +0200
committerPhilipp Tomsich <philipp.tomsich@vrull.eu>2022-11-18 21:23:41 +0100
commit3142265dedd84c2f3dbf824f2d1b0c182e3c8b3c (patch)
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RISC-V: No extensions for SImode min/max against safe constant
Optimize the common case of a SImode min/max against a constant that is safe both for sign- and zero-extension. E.g., consider the case int f(unsigned int* a) { const int C = 1000; return *a * 3 > C ? C : *a * 3; } where the constant C will yield the same result in DImode whether sign- or zero-extended. This should eventually go away once the lowering to RTL smartens up and considers the precision/signedness and the value-ranges of the operands to MIN_EXPR and MAX_EXPR. gcc/ChangeLog: * config/riscv/bitmanip.md (*minmax): Additional pattern for min/max against constants that are extension-invariant. * config/riscv/iterators.md (minmax_optab): Add an iterator that has only min and max rtl. gcc/testsuite/ChangeLog: * gcc.target/riscv/zbb-min-max-02.c: New test.
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