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| author | Richard Earnshaw <rearnsha@arm.com> | 2016-12-15 15:49:13 +0000 |
|---|---|---|
| committer | Richard Earnshaw <rearnsha@gcc.gnu.org> | 2016-12-15 15:49:13 +0000 |
| commit | 03d222fab6188f76cd734470d53061f8b5940186 (patch) | |
| tree | cbea8a3df69757818781cf5341197b7f37ac1572 /gcc/stor-layout.c | |
| parent | 6c466c7c6f4b58c7ee2b45bf448ec20bb715f4bc (diff) | |
| download | gcc-03d222fab6188f76cd734470d53061f8b5940186.zip gcc-03d222fab6188f76cd734470d53061f8b5940186.tar.gz gcc-03d222fab6188f76cd734470d53061f8b5940186.tar.bz2 | |
[arm] Rework arm-common to use new feature bits.
This converts the recently added implicit -mthumb support code to use
the new data structures. Since we have a very simple query and no
initialized copies of the sbitmaps, for now we simply scan the list of
features to look for the one of interest.
* arm-opts.h (struct arm_arch_core_flag): Add new field ISA.
Initialize it.
(arm_arch_core_flag): Delete flags field.
(arm_arch_core_flags): Don't initialize flags field.
* common/config/arm/arm-common.c (check_isa_bits_for): New function.
(arm_target_thumb_only): Use new isa bits arrays.
From-SVN: r243704
Diffstat (limited to 'gcc/stor-layout.c')
0 files changed, 0 insertions, 0 deletions