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| author | Marc Glisse <marc.glisse@inria.fr> | 2012-05-30 12:48:06 +0200 |
|---|---|---|
| committer | Marc Glisse <glisse@gcc.gnu.org> | 2012-05-30 10:48:06 +0000 |
| commit | 66c540d27c006b338843d5243e1a3cb0dbbaf6ea (patch) | |
| tree | da9f6d747436ed3223f6278e7b049997631805e4 /gcc/simplify-rtx.c | |
| parent | ab068278e973f6f191e161a1d8705b454bb06dae (diff) | |
| download | gcc-66c540d27c006b338843d5243e1a3cb0dbbaf6ea.zip gcc-66c540d27c006b338843d5243e1a3cb0dbbaf6ea.tar.gz gcc-66c540d27c006b338843d5243e1a3cb0dbbaf6ea.tar.bz2 | |
simplify-rtx.c (simplify_binary_operation_1): Optimize shuffle of concatenations.
2012-05-30 Marc Glisse <marc.glisse@inria.fr>
gcc/
* simplify-rtx.c (simplify_binary_operation_1): Optimize shuffle of
concatenations.
gcc/testsuite/
* gcc.target/i386/shuf-concat.c: New test.
From-SVN: r188006
Diffstat (limited to 'gcc/simplify-rtx.c')
| -rw-r--r-- | gcc/simplify-rtx.c | 23 |
1 files changed, 22 insertions, 1 deletions
diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c index 6b0d56e..6b645fe 100644 --- a/gcc/simplify-rtx.c +++ b/gcc/simplify-rtx.c @@ -1,7 +1,7 @@ /* RTL simplification functions for GNU compiler. Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, - 2011 Free Software Foundation, Inc. + 2011, 2012 Free Software Foundation, Inc. This file is part of GCC. @@ -3242,6 +3242,27 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode, return gen_rtx_CONST_VECTOR (mode, v); } + + /* If we build {a,b} then permute it, build the result directly. */ + if (XVECLEN (trueop1, 0) == 2 + && CONST_INT_P (XVECEXP (trueop1, 0, 0)) + && CONST_INT_P (XVECEXP (trueop1, 0, 1)) + && GET_CODE (trueop0) == VEC_CONCAT + && GET_CODE (XEXP (trueop0, 0)) == VEC_CONCAT + && GET_MODE (XEXP (trueop0, 0)) == mode + && GET_CODE (XEXP (trueop0, 1)) == VEC_CONCAT + && GET_MODE (XEXP (trueop0, 1)) == mode) + { + unsigned int i0 = INTVAL (XVECEXP (trueop1, 0, 0)); + unsigned int i1 = INTVAL (XVECEXP (trueop1, 0, 1)); + rtx subop0, subop1; + + gcc_assert (i0 < 4 && i1 < 4); + subop0 = XEXP (XEXP (trueop0, i0 / 2), i0 % 2); + subop1 = XEXP (XEXP (trueop0, i1 / 2), i1 % 2); + + return simplify_gen_binary (VEC_CONCAT, mode, subop0, subop1); + } } if (XVECLEN (trueop1, 0) == 1 |