Add gen_(const_)vec_duplicate helpers

This patch adds helper functions for generating constant and
non-constant vector duplicates.  These routines help with SVE because
it is then easier to use:

   (const:M (vec_duplicate:M X))

for a broadcast of X, even if the number of elements in M isn't known
at compile time.  It also makes it easier for general rtx code to treat
constant and non-constant duplicates in the same way.

In the target code, the patch uses gen_vec_duplicate instead of
gen_rtx_VEC_DUPLICATE if handling constants correctly is potentially
useful.  It might be that some or all of the call sites only handle
non-constants in practice, in which case the change is a harmless
no-op (and a saving of a few characters).

Otherwise, the target changes use gen_const_vec_duplicate instead
of gen_rtx_CONST_VECTOR if the constant is obviously a duplicate.
They also include some changes to use CONSTxx_RTX for easy global
constants.

2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* emit-rtl.h (gen_const_vec_duplicate): Declare.
	(gen_vec_duplicate): Likewise.
	* emit-rtl.c (gen_const_vec_duplicate_1): New function, split
	out from...
	(gen_const_vector): ...here.
	(gen_const_vec_duplicate, gen_vec_duplicate): New functions.
	(gen_rtx_CONST_VECTOR): Use gen_const_vec_duplicate for constants
	whose elements are all equal.
	* optabs.c (expand_vector_broadcast): Use gen_const_vec_duplicate.
	* simplify-rtx.c (simplify_const_unary_operation): Likewise.
	(simplify_relational_operation): Likewise.
	* config/aarch64/aarch64.c (aarch64_simd_gen_const_vector_dup):
	Likewise.
	(aarch64_simd_dup_constant): Use gen_vec_duplicate.
	(aarch64_expand_vector_init): Likewise.
	* config/arm/arm.c (neon_vdup_constant): Likewise.
	(neon_expand_vector_init): Likewise.
	(arm_expand_vec_perm): Use gen_const_vec_duplicate.
	(arm_block_set_unaligned_vect): Likewise.
	(arm_block_set_aligned_vect): Likewise.
	* config/arm/neon.md (neon_copysignf<mode>): Likewise.
	* config/i386/i386.c (ix86_expand_vec_perm): Likewise.
	(expand_vec_perm_even_odd_pack): Likewise.
	(ix86_vector_duplicate_value): Use gen_vec_duplicate.
	* config/i386/sse.md (one_cmpl<mode>2): Use CONSTM1_RTX.
	* config/ia64/ia64.c (ia64_expand_vecint_compare): Use
	gen_const_vec_duplicate.
	* config/ia64/vect.md (addv2sf3, subv2sf3): Use CONST1_RTX.
	* config/mips/mips.c (mips_gen_const_int_vector): Use
	gen_const_vec_duplicate.
	(mips_expand_vector_init): Use CONST0_RTX.
	* config/powerpcspe/altivec.md (abs<mode>2, nabs<mode>2): Likewise.
	(define_split): Use gen_const_vec_duplicate.
	* config/rs6000/altivec.md (abs<mode>2, nabs<mode>2): Use CONST0_RTX.
	(define_split): Use gen_const_vec_duplicate.
	* config/s390/vx-builtins.md (vec_genmask<mode>): Likewise.
	(vec_ctd_s64, vec_ctd_u64, vec_ctsl, vec_ctul): Likewise.
	* config/spu/spu.c (spu_const): Likewise.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r254292

1 files changed, 11 insertions, 23 deletions

diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c
index da0283d..9736bcc 100644
--- a/gcc/simplify-rtx.c
+++ b/gcc/simplify-rtx.c
@@ -1707,28 +1707,23 @@ simplify_const_unary_operation (enum rtx_code code, machine_mode mode,
 	  gcc_assert (GET_MODE_INNER (mode) == GET_MODE_INNER
 						(GET_MODE (op)));
       }
-      if (CONST_SCALAR_INT_P (op) || CONST_DOUBLE_AS_FLOAT_P (op)
-	  || GET_CODE (op) == CONST_VECTOR)
+      if (CONST_SCALAR_INT_P (op) || CONST_DOUBLE_AS_FLOAT_P (op))
+	return gen_const_vec_duplicate (mode, op);
+      if (GET_CODE (op) == CONST_VECTOR)
 	{
 	  int elt_size = GET_MODE_UNIT_SIZE (mode);
           unsigned n_elts = (GET_MODE_SIZE (mode) / elt_size);
 	  rtvec v = rtvec_alloc (n_elts);
 	  unsigned int i;
 
-	  if (GET_CODE (op) != CONST_VECTOR)
-	    for (i = 0; i < n_elts; i++)
-	      RTVEC_ELT (v, i) = op;
-	  else
-	    {
-	      machine_mode inmode = GET_MODE (op);
-	      int in_elt_size = GET_MODE_UNIT_SIZE (inmode);
-              unsigned in_n_elts = (GET_MODE_SIZE (inmode) / in_elt_size);
+	  machine_mode inmode = GET_MODE (op);
+	  int in_elt_size = GET_MODE_UNIT_SIZE (inmode);
+	  unsigned in_n_elts = (GET_MODE_SIZE (inmode) / in_elt_size);
 
-	      gcc_assert (in_n_elts < n_elts);
-	      gcc_assert ((n_elts % in_n_elts) == 0);
-	      for (i = 0; i < n_elts; i++)
-	        RTVEC_ELT (v, i) = CONST_VECTOR_ELT (op, i % in_n_elts);
-	    }
+	  gcc_assert (in_n_elts < n_elts);
+	  gcc_assert ((n_elts % in_n_elts) == 0);
+	  for (i = 0; i < n_elts; i++)
+	    RTVEC_ELT (v, i) = CONST_VECTOR_ELT (op, i % in_n_elts);
 	  return gen_rtx_CONST_VECTOR (mode, v);
 	}
     }
@@ -4636,20 +4631,13 @@ simplify_relational_operation (enum rtx_code code, machine_mode mode,
 	    return CONST0_RTX (mode);
 #ifdef VECTOR_STORE_FLAG_VALUE
 	  {
-	    int i, units;
-	    rtvec v;
-
 	    rtx val = VECTOR_STORE_FLAG_VALUE (mode);
 	    if (val == NULL_RTX)
 	      return NULL_RTX;
 	    if (val == const1_rtx)
 	      return CONST1_RTX (mode);
 
-	    units = GET_MODE_NUNITS (mode);
-	    v = rtvec_alloc (units);
-	    for (i = 0; i < units; i++)
-	      RTVEC_ELT (v, i) = val;
-	    return gen_rtx_raw_CONST_VECTOR (mode, v);
+	    return gen_const_vec_duplicate (mode, val);
 	  }
 #else
 	  return NULL_RTX;