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author | Ben Elliston <bje@au.ibm.com> | 2005-11-21 20:53:27 +0000 |
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committer | Ben Elliston <bje@gcc.gnu.org> | 2005-11-22 07:53:27 +1100 |
commit | 3d8bf70f59ee15fc337c025307a419558e7aedc4 (patch) | |
tree | b1c6ffb314a145e36beb4e77266fa8a7e304a015 /gcc/simplify-rtx.c | |
parent | 9cfda6fa545e5be0b860644df1b4579f168ec26f (diff) | |
download | gcc-3d8bf70f59ee15fc337c025307a419558e7aedc4.zip gcc-3d8bf70f59ee15fc337c025307a419558e7aedc4.tar.gz gcc-3d8bf70f59ee15fc337c025307a419558e7aedc4.tar.bz2 |
optabs.c (expand_abs_nojump): Use SCALAR_FLOAT_MODE_P instead of explicitly testing GET_MODE_CLASS (x) ==...
* optabs.c (expand_abs_nojump): Use SCALAR_FLOAT_MODE_P instead of
explicitly testing GET_MODE_CLASS (x) == MODE_FLOAT.
* genopinit.c (gen_insn): Likewise.
* reload.c (find_equiv_reg): Likewise.
* loop.c (load_mems): Likewise.
* rtlanal.c (may_trap_p_1, canonicalize_condition): Likewise.
* cse.c (find_comparison_args, fold_rtx): Likewise.
* dwarf2out.c (add_const_value_attribute): Likewise.
* expr.c (convert_move): Likewise.
* recog.c (general_operand, register_operand): Likewise.
* reg-stack.c (replace_reg): Likewise.
* tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
* c-common.c (handle_vector_size_attribute): Likewise.
* simplify-rtx.c (simplify_const_unary_operation): Likewise.
(simplify_binary_operation_1): Likewise.
(simplify_const_binary_operation): Likewise.
(simplify_relational_operation): Likewise.
(simplify_const_relational_operation): Likewise.
(simplify_immed_subreg): Likewise.
* emit-rtl.c (gen_lowpart_common): Likewise.
* expmed.c (expand_mult): Likewise.
* stor-layout.c (layout_type): Likewise.
From-SVN: r107322
Diffstat (limited to 'gcc/simplify-rtx.c')
-rw-r--r-- | gcc/simplify-rtx.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c index 657b2b5..e9a5d1a 100644 --- a/gcc/simplify-rtx.c +++ b/gcc/simplify-rtx.c @@ -983,7 +983,7 @@ simplify_const_unary_operation (enum rtx_code code, enum machine_mode mode, } else if (GET_CODE (op) == CONST_DOUBLE - && GET_MODE_CLASS (mode) == MODE_FLOAT) + && SCALAR_FLOAT_MODE_P (mode)) { REAL_VALUE_TYPE d, t; REAL_VALUE_FROM_CONST_DOUBLE (d, op); @@ -1029,7 +1029,7 @@ simplify_const_unary_operation (enum rtx_code code, enum machine_mode mode, } else if (GET_CODE (op) == CONST_DOUBLE - && GET_MODE_CLASS (GET_MODE (op)) == MODE_FLOAT + && SCALAR_FLOAT_MODE_P (GET_MODE (op)) && GET_MODE_CLASS (mode) == MODE_INT && width <= 2*HOST_BITS_PER_WIDE_INT && width > 0) { @@ -1610,7 +1610,7 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode, /* x*2 is x+x and x*(-1) is -x */ if (GET_CODE (trueop1) == CONST_DOUBLE - && GET_MODE_CLASS (GET_MODE (trueop1)) == MODE_FLOAT + && SCALAR_FLOAT_MODE_P (GET_MODE (trueop1)) && GET_MODE (op0) == mode) { REAL_VALUE_TYPE d; @@ -1792,7 +1792,7 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode, case DIV: /* Handle floating point and integers separately. */ - if (GET_MODE_CLASS (mode) == MODE_FLOAT) + if (SCALAR_FLOAT_MODE_P (mode)) { /* Maybe change 0.0 / x to 0.0. This transformation isn't safe for modes with NaNs, since 0.0 / 0.0 will then be @@ -2146,7 +2146,7 @@ simplify_const_binary_operation (enum rtx_code code, enum machine_mode mode, return gen_rtx_CONST_VECTOR (mode, v); } - if (GET_MODE_CLASS (mode) == MODE_FLOAT + if (SCALAR_FLOAT_MODE_P (mode) && GET_CODE (op0) == CONST_DOUBLE && GET_CODE (op1) == CONST_DOUBLE && mode == GET_MODE (op0) && mode == GET_MODE (op1)) @@ -2890,7 +2890,7 @@ simplify_relational_operation (enum rtx_code code, enum machine_mode mode, tem = simplify_const_relational_operation (code, cmp_mode, op0, op1); if (tem) { - if (GET_MODE_CLASS (mode) == MODE_FLOAT) + if (SCALAR_FLOAT_MODE_P (mode)) { if (tem == const0_rtx) return CONST0_RTX (mode); @@ -3108,7 +3108,7 @@ simplify_const_relational_operation (enum rtx_code code, the result. */ else if (GET_CODE (trueop0) == CONST_DOUBLE && GET_CODE (trueop1) == CONST_DOUBLE - && GET_MODE_CLASS (GET_MODE (trueop0)) == MODE_FLOAT) + && SCALAR_FLOAT_MODE_P (GET_MODE (trueop0))) { REAL_VALUE_TYPE d0, d1; @@ -3642,7 +3642,7 @@ simplify_immed_subreg (enum machine_mode outermode, rtx op, long tmp[max_bitsize / 32]; int bitsize = GET_MODE_BITSIZE (GET_MODE (el)); - gcc_assert (GET_MODE_CLASS (GET_MODE (el)) == MODE_FLOAT); + gcc_assert (SCALAR_FLOAT_MODE_P (GET_MODE (el))); gcc_assert (bitsize <= elem_bitsize); gcc_assert (bitsize % value_bit == 0); |