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author | Richard Sandiford <richard.sandiford@linaro.org> | 2017-11-01 11:49:34 +0000 |
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committer | Richard Sandiford <rsandifo@gcc.gnu.org> | 2017-11-01 11:49:34 +0000 |
commit | ef1d3b57d2d00795c6eb01fe6b8ef6f413163c67 (patch) | |
tree | af7a96746cc35a998026456f2e51bdbaea611a6a /gcc/simplify-rtx.c | |
parent | ef339d6e2e846ba7ff544def1d79f10762da223d (diff) | |
download | gcc-ef1d3b57d2d00795c6eb01fe6b8ef6f413163c67.zip gcc-ef1d3b57d2d00795c6eb01fe6b8ef6f413163c67.tar.gz gcc-ef1d3b57d2d00795c6eb01fe6b8ef6f413163c67.tar.bz2 |
Add a fixed_size_mode class
This patch adds a fixed_size_mode machine_mode wrapper
for modes that are known to have a fixed size. That applies
to all current modes, but future patches will add support for
variable-sized modes.
The use of this class should be pretty restricted. One important
use case is to hold the mode of static data, which can never be
variable-sized with current file formats. Another is to hold
the modes of registers involved in __builtin_apply and
__builtin_result, since those interfaces don't cope well with
variable-sized data.
The class can also be useful when reinterpreting the contents of
a fixed-length bit string as a different kind of value.
2017-11-01 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* machmode.h (fixed_size_mode): New class.
* rtl.h (get_pool_mode): Return fixed_size_mode.
* gengtype.c (main): Add fixed_size_mode.
* target.def (get_raw_result_mode): Return a fixed_size_mode.
(get_raw_arg_mode): Likewise.
* doc/tm.texi: Regenerate.
* targhooks.h (default_get_reg_raw_mode): Return a fixed_size_mode.
* targhooks.c (default_get_reg_raw_mode): Likewise.
* config/ia64/ia64.c (ia64_get_reg_raw_mode): Likewise.
* config/mips/mips.c (mips_get_reg_raw_mode): Likewise.
* config/msp430/msp430.c (msp430_get_raw_arg_mode): Likewise.
(msp430_get_raw_result_mode): Likewise.
* config/avr/avr-protos.h (regmask): Use as_a <fixed_side_mode>
* dbxout.c (dbxout_parms): Require fixed-size modes.
* expr.c (copy_blkmode_from_reg, copy_blkmode_to_reg): Likewise.
* gimple-ssa-store-merging.c (encode_tree_to_bitpos): Likewise.
* omp-low.c (lower_oacc_reductions): Likewise.
* simplify-rtx.c (simplify_immed_subreg): Take fixed_size_modes.
(simplify_subreg): Update accordingly.
* varasm.c (constant_descriptor_rtx::mode): Change to fixed_size_mode.
(force_const_mem): Update accordingly. Return NULL_RTX for modes
that aren't fixed-size.
(get_pool_mode): Return a fixed_size_mode.
(output_constant_pool_2): Take a fixed_size_mode.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254300
Diffstat (limited to 'gcc/simplify-rtx.c')
-rw-r--r-- | gcc/simplify-rtx.c | 19 |
1 files changed, 14 insertions, 5 deletions
diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c index 8bee8ed..a6963ce 100644 --- a/gcc/simplify-rtx.c +++ b/gcc/simplify-rtx.c @@ -48,8 +48,6 @@ along with GCC; see the file COPYING3. If not see static rtx neg_const_int (machine_mode, const_rtx); static bool plus_minus_operand_p (const_rtx); static rtx simplify_plus_minus (enum rtx_code, machine_mode, rtx, rtx); -static rtx simplify_immed_subreg (machine_mode, rtx, machine_mode, - unsigned int); static rtx simplify_associative_operation (enum rtx_code, machine_mode, rtx, rtx); static rtx simplify_relational_operation_1 (enum rtx_code, machine_mode, @@ -5806,8 +5804,8 @@ simplify_ternary_operation (enum rtx_code code, machine_mode mode, and then repacking them again for OUTERMODE. */ static rtx -simplify_immed_subreg (machine_mode outermode, rtx op, - machine_mode innermode, unsigned int byte) +simplify_immed_subreg (fixed_size_mode outermode, rtx op, + fixed_size_mode innermode, unsigned int byte) { enum { value_bit = 8, @@ -6175,7 +6173,18 @@ simplify_subreg (machine_mode outermode, rtx op, || CONST_DOUBLE_AS_FLOAT_P (op) || GET_CODE (op) == CONST_FIXED || GET_CODE (op) == CONST_VECTOR) - return simplify_immed_subreg (outermode, op, innermode, byte); + { + /* simplify_immed_subreg deconstructs OP into bytes and constructs + the result from bytes, so it only works if the sizes of the modes + are known at compile time. Cases that apply to general modes + should be handled here before calling simplify_immed_subreg. */ + fixed_size_mode fs_outermode, fs_innermode; + if (is_a <fixed_size_mode> (outermode, &fs_outermode) + && is_a <fixed_size_mode> (innermode, &fs_innermode)) + return simplify_immed_subreg (fs_outermode, op, fs_innermode, byte); + + return NULL_RTX; + } /* Changing mode twice with SUBREG => just change it once, or not at all if changing back op starting mode. */ |