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| author | Richard Sandiford <rsandifo@gcc.gnu.org> | 2017-12-16 14:23:38 +0000 |
|---|---|---|
| committer | Richard Sandiford <rsandifo@gcc.gnu.org> | 2017-12-16 14:23:38 +0000 |
| commit | b4ddce3663ce151423f81c9e2a206df3081d1071 (patch) | |
| tree | 0932d4f8ba3dd51e383d00346fdcab38cc45d073 /gcc/simplify-rtx.c | |
| parent | 7e594332e400b26cd2df4a40980d08ffc7fcfc1a (diff) | |
| download | gcc-b4ddce3663ce151423f81c9e2a206df3081d1071.zip gcc-b4ddce3663ce151423f81c9e2a206df3081d1071.tar.gz gcc-b4ddce3663ce151423f81c9e2a206df3081d1071.tar.bz2 | |
Revert accidental commit
From-SVN: r255746
Diffstat (limited to 'gcc/simplify-rtx.c')
| -rw-r--r-- | gcc/simplify-rtx.c | 29 |
1 files changed, 11 insertions, 18 deletions
diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c index 3d7423e..806c309 100644 --- a/gcc/simplify-rtx.c +++ b/gcc/simplify-rtx.c @@ -1165,8 +1165,7 @@ simplify_unary_operation_1 (enum rtx_code code, machine_mode mode, rtx op) if (STORE_FLAG_VALUE == 1) { temp = simplify_gen_binary (ASHIFTRT, inner, XEXP (op, 0), - gen_int_shift_amount (inner, - isize - 1)); + GEN_INT (isize - 1)); if (int_mode == inner) return temp; if (GET_MODE_PRECISION (int_mode) > isize) @@ -1176,8 +1175,7 @@ simplify_unary_operation_1 (enum rtx_code code, machine_mode mode, rtx op) else if (STORE_FLAG_VALUE == -1) { temp = simplify_gen_binary (LSHIFTRT, inner, XEXP (op, 0), - gen_int_shift_amount (inner, - isize - 1)); + GEN_INT (isize - 1)); if (int_mode == inner) return temp; if (GET_MODE_PRECISION (int_mode) > isize) @@ -2674,8 +2672,7 @@ simplify_binary_operation_1 (enum rtx_code code, machine_mode mode, { val = wi::exact_log2 (rtx_mode_t (trueop1, mode)); if (val >= 0) - return simplify_gen_binary (ASHIFT, mode, op0, - gen_int_shift_amount (mode, val)); + return simplify_gen_binary (ASHIFT, mode, op0, GEN_INT (val)); } /* x*2 is x+x and x*(-1) is -x */ @@ -3299,8 +3296,7 @@ simplify_binary_operation_1 (enum rtx_code code, machine_mode mode, /* Convert divide by power of two into shift. */ if (CONST_INT_P (trueop1) && (val = exact_log2 (UINTVAL (trueop1))) > 0) - return simplify_gen_binary (LSHIFTRT, mode, op0, - gen_int_shift_amount (mode, val)); + return simplify_gen_binary (LSHIFTRT, mode, op0, GEN_INT (val)); break; case DIV: @@ -3420,12 +3416,10 @@ simplify_binary_operation_1 (enum rtx_code code, machine_mode mode, && IN_RANGE (INTVAL (trueop1), GET_MODE_UNIT_PRECISION (mode) / 2 + (code == ROTATE), GET_MODE_UNIT_PRECISION (mode) - 1)) - { - int new_amount = GET_MODE_UNIT_PRECISION (mode) - INTVAL (trueop1); - rtx new_amount_rtx = gen_int_shift_amount (mode, new_amount); - return simplify_gen_binary (code == ROTATE ? ROTATERT : ROTATE, - mode, op0, new_amount_rtx); - } + return simplify_gen_binary (code == ROTATE ? ROTATERT : ROTATE, + mode, op0, + GEN_INT (GET_MODE_UNIT_PRECISION (mode) + - INTVAL (trueop1))); #endif /* FALLTHRU */ case ASHIFTRT: @@ -3466,8 +3460,8 @@ simplify_binary_operation_1 (enum rtx_code code, machine_mode mode, == GET_MODE_BITSIZE (inner_mode) - GET_MODE_BITSIZE (int_mode)) && subreg_lowpart_p (op0)) { - rtx tmp = gen_int_shift_amount - (inner_mode, INTVAL (XEXP (SUBREG_REG (op0), 1)) + INTVAL (op1)); + rtx tmp = GEN_INT (INTVAL (XEXP (SUBREG_REG (op0), 1)) + + INTVAL (op1)); tmp = simplify_gen_binary (code, inner_mode, XEXP (SUBREG_REG (op0), 0), tmp); @@ -3478,8 +3472,7 @@ simplify_binary_operation_1 (enum rtx_code code, machine_mode mode, { val = INTVAL (op1) & (GET_MODE_UNIT_PRECISION (mode) - 1); if (val != INTVAL (op1)) - return simplify_gen_binary (code, mode, op0, - gen_int_shift_amount (mode, val)); + return simplify_gen_binary (code, mode, op0, GEN_INT (val)); } break; |