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| author | Richard Sandiford <rdsandiford@googlemail.com> | 2014-06-04 17:33:51 +0000 |
|---|---|---|
| committer | Richard Sandiford <rsandifo@gcc.gnu.org> | 2014-06-04 17:33:51 +0000 |
| commit | 29d70a0f6998f34ef7f6fbeff2455dd2d875159f (patch) | |
| tree | 1ffbb6533d75b91c157c61a310b32daa018bf38c /gcc/sel-sched.c | |
| parent | fe6ebcf19314d86bf8d7a1532f1b2b3b548bfa00 (diff) | |
| download | gcc-29d70a0f6998f34ef7f6fbeff2455dd2d875159f.zip gcc-29d70a0f6998f34ef7f6fbeff2455dd2d875159f.tar.gz gcc-29d70a0f6998f34ef7f6fbeff2455dd2d875159f.tar.bz2 | |
recog.h (recog_op_alt): Convert to a flat array.
gcc/
* recog.h (recog_op_alt): Convert to a flat array.
(which_op_alt): New function.
* recog.c (recog_op_alt): Convert to a flat array.
(preprocess_constraints): Update accordingly, grouping all
operands of the same alternative together, rather than the
other way around.
* ira-lives.c (check_and_make_def_conflict): Likewise.
(make_early_clobber_and_input_conflicts): Likewise.
* config/i386/i386.c (ix86_legitimate_combined_insn): Likewise.
* reg-stack.c (check_asm_stack_operands): Use which_op_alt.
(subst_asm_stack_regs): Likewise.
* regcprop.c (copyprop_hardreg_forward_1): Likewise.
* regrename.c (hide_operands, record_out_operands): Likewise.
(build_def_use): Likewise.
* sel-sched.c (get_reg_class): Likewise.
* config/arm/arm.c (note_invalid_constants): Likewise.
From-SVN: r211237
Diffstat (limited to 'gcc/sel-sched.c')
| -rw-r--r-- | gcc/sel-sched.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/gcc/sel-sched.c b/gcc/sel-sched.c index 0c864ac..435cfa5 100644 --- a/gcc/sel-sched.c +++ b/gcc/sel-sched.c @@ -1014,20 +1014,20 @@ vinsn_writes_one_of_regs_p (vinsn_t vi, regset used_regs, static enum reg_class get_reg_class (rtx insn) { - int alt, i, n_ops; + int i, n_ops; extract_insn (insn); if (! constrain_operands (1)) fatal_insn_not_found (insn); preprocess_constraints (); - alt = which_alternative; n_ops = recog_data.n_operands; + operand_alternative *op_alt = which_op_alt (); for (i = 0; i < n_ops; ++i) { - int matches = recog_op_alt[i][alt].matches; + int matches = op_alt[i].matches; if (matches >= 0) - recog_op_alt[i][alt].cl = recog_op_alt[matches][alt].cl; + op_alt[i].cl = op_alt[matches].cl; } if (asm_noperands (PATTERN (insn)) > 0) @@ -1037,7 +1037,7 @@ get_reg_class (rtx insn) { rtx *loc = recog_data.operand_loc[i]; rtx op = *loc; - enum reg_class cl = recog_op_alt[i][alt].cl; + enum reg_class cl = op_alt[i].cl; if (REG_P (op) && REGNO (op) == ORIGINAL_REGNO (op)) @@ -1051,7 +1051,7 @@ get_reg_class (rtx insn) for (i = 0; i < n_ops + recog_data.n_dups; i++) { int opn = i < n_ops ? i : recog_data.dup_num[i - n_ops]; - enum reg_class cl = recog_op_alt[opn][alt].cl; + enum reg_class cl = op_alt[opn].cl; if (recog_data.operand_type[opn] == OP_OUT || recog_data.operand_type[opn] == OP_INOUT) |